1 /* Simulator model support for m32r.
3 This file is machine generated with CGEN.
5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
7 This file is part of the GNU Simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 /* The profiling data is recorded here, but is accessed via the profiling
33 mechanism. After all, this is information for profiling. */
35 #if WITH_PROFILE_MODEL_P
37 /* Track function unit usage for an instruction. */
40 m32r_model_profile_insn (SIM_CPU
*current_cpu
, ARGBUF
*abuf
)
42 const MODEL
*model
= CPU_MODEL (current_cpu
);
43 const INSN_TIMING
*timing
= MODEL_TIMING (model
);
44 const CGEN_INSN
*insn
= abuf
->opcode
;
45 const UNIT
*unit
= &timing
[CGEN_INSN_INDEX (insn
)].units
[0];
46 const UNIT
*unit_end
= unit
+ MAX_UNITS
;
47 PROFILE_DATA
*profile
= CPU_PROFILE_DATA (current_cpu
);
53 case UNIT_M32R_D_U_STORE
:
54 PROFILE_MODEL_CYCLE_COUNT (profile
) += unit
->done
;
55 m32r_model_mark_unbusy_reg (current_cpu
, abuf
);
57 case UNIT_M32R_D_U_LOAD
:
58 PROFILE_MODEL_CYCLE_COUNT (profile
) += unit
->done
;
59 m32r_model_mark_busy_reg (current_cpu
, abuf
);
61 case UNIT_M32R_D_U_EXEC
:
62 PROFILE_MODEL_CYCLE_COUNT (profile
) += unit
->done
;
63 m32r_model_mark_unbusy_reg (current_cpu
, abuf
);
65 case UNIT_TEST_U_EXEC
:
66 PROFILE_MODEL_CYCLE_COUNT (profile
) += unit
->done
;
71 while (unit
!= unit_end
&& unit
->name
!= UNIT_NONE
);
74 /* Track function unit usage for an instruction. */
77 m32r_model_profile_cti_insn (SIM_CPU
*current_cpu
, ARGBUF
*abuf
, int taken_p
)
79 const MODEL
*model
= CPU_MODEL (current_cpu
);
80 const INSN_TIMING
*timing
= MODEL_TIMING (model
);
81 const CGEN_INSN
*insn
= abuf
->opcode
;
82 const UNIT
*unit
= &timing
[CGEN_INSN_INDEX (insn
)].units
[0];
83 const UNIT
*unit_end
= unit
+ MAX_UNITS
;
84 PROFILE_DATA
*profile
= CPU_PROFILE_DATA (current_cpu
);
90 case UNIT_M32R_D_U_STORE
:
91 PROFILE_MODEL_CYCLE_COUNT (profile
) += unit
->done
;
92 m32r_model_mark_unbusy_reg (current_cpu
, abuf
);
94 case UNIT_M32R_D_U_LOAD
:
95 PROFILE_MODEL_CYCLE_COUNT (profile
) += unit
->done
;
96 m32r_model_mark_busy_reg (current_cpu
, abuf
);
98 case UNIT_M32R_D_U_EXEC
:
99 PROFILE_MODEL_CYCLE_COUNT (profile
) += unit
->done
;
100 if (taken_p
) PROFILE_MODEL_CTI_STALL_COUNT (profile
) += 2;
101 m32r_model_mark_unbusy_reg (current_cpu
, abuf
);
103 case UNIT_TEST_U_EXEC
:
104 PROFILE_MODEL_CYCLE_COUNT (profile
) += unit
->done
;
108 PROFILE_MODEL_TAKEN_COUNT (profile
) += 1;
110 PROFILE_MODEL_UNTAKEN_COUNT (profile
) += 1;
113 while (unit
!= unit_end
&& unit
->name
!= UNIT_NONE
);
116 /* We assume UNIT_NONE == 0 because the tables don't always terminate
119 /* Model timing data for `m32r/d'. */
121 static const INSN_TIMING m32r_d_timing
[] = {
122 { { (UQI
) UNIT_NONE
} }, /* illegal insn */
123 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* add */
124 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* add3 */
125 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* add3.a */
126 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* and */
127 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* and3 */
128 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* and3.a */
129 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* or */
130 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* or3 */
131 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* or3.a */
132 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* xor */
133 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* xor3 */
134 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* xor3.a */
135 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* addi */
136 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* addi.a */
137 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* addv */
138 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* addv3 */
139 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* addv3.a */
140 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* addx */
141 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bc8 */
142 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bc8.s */
143 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bc24 */
144 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bc24.l */
145 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* beq */
146 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* beqz */
147 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bgez */
148 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bgtz */
149 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* blez */
150 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bltz */
151 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bnez */
152 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bl8 */
153 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bl8.s */
154 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bl24 */
155 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bl24.l */
156 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bnc8 */
157 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bnc8.s */
158 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bnc24 */
159 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bnc24.l */
160 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bne */
161 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bra8 */
162 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bra8.s */
163 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bra24 */
164 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* bra24.l */
165 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* cmp */
166 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* cmpi */
167 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* cmpi.a */
168 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* cmpu */
169 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* cmpui */
170 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* cmpui.a */
171 { { (UQI
) UNIT_M32R_D_U_EXEC
, 37, 37 } }, /* div */
172 { { (UQI
) UNIT_M32R_D_U_EXEC
, 37, 37 } }, /* divu */
173 { { (UQI
) UNIT_M32R_D_U_EXEC
, 37, 37 } }, /* rem */
174 { { (UQI
) UNIT_M32R_D_U_EXEC
, 37, 37 } }, /* remu */
175 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* jl */
176 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* jmp */
177 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* ld */
178 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* ld-2 */
179 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* ld-d */
180 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* ld-d2 */
181 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* ldb */
182 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* ldb-2 */
183 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* ldb-d */
184 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* ldb-d2 */
185 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* ldh */
186 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* ldh-2 */
187 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* ldh-d */
188 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* ldh-d2 */
189 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* ldub */
190 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* ldub-2 */
191 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* ldub-d */
192 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* ldub-d2 */
193 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* lduh */
194 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* lduh-2 */
195 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* lduh-d */
196 { { (UQI
) UNIT_M32R_D_U_LOAD
, 2, 2 } }, /* lduh-d2 */
197 { { (UQI
) UNIT_M32R_D_U_LOAD
, 1, 1 } }, /* ld-plus */
198 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* ld24 */
199 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* ld24.a */
200 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* ldi8 */
201 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* ldi8.a */
202 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* ldi8a */
203 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* ldi8a.a */
204 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* ldi16 */
205 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* ldi16a */
206 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* lock */
207 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* machi */
208 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* maclo */
209 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* macwhi */
210 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* macwlo */
211 { { (UQI
) UNIT_M32R_D_U_EXEC
, 4, 4 } }, /* mul */
212 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* mulhi */
213 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* mullo */
214 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* mulwhi */
215 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* mulwlo */
216 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* mv */
217 { { (UQI
) UNIT_M32R_D_U_EXEC
, 2, 2 } }, /* mvfachi */
218 { { (UQI
) UNIT_M32R_D_U_EXEC
, 2, 2 } }, /* mvfaclo */
219 { { (UQI
) UNIT_M32R_D_U_EXEC
, 2, 2 } }, /* mvfacmi */
220 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* mvfc */
221 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* mvtachi */
222 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* mvtaclo */
223 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* mvtc */
224 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* neg */
225 { { (UQI
) UNIT_M32R_D_U_EXEC
, 0, 0 } }, /* nop */
226 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* not */
227 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* rac */
228 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* rach */
229 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* rte */
230 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* seth */
231 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* seth.a */
232 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* sll */
233 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* sll3 */
234 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* sll3.a */
235 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* slli */
236 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* slli.a */
237 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* sra */
238 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* sra3 */
239 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* sra3.a */
240 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* srai */
241 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* srai.a */
242 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* srl */
243 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* srl3 */
244 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* srl3.a */
245 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* srli */
246 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* srli.a */
247 { { (UQI
) UNIT_M32R_D_U_STORE
, 1, 1 } }, /* st */
248 { { (UQI
) UNIT_M32R_D_U_STORE
, 1, 1 } }, /* st-2 */
249 { { (UQI
) UNIT_M32R_D_U_STORE
, 2, 2 } }, /* st-d */
250 { { (UQI
) UNIT_M32R_D_U_STORE
, 2, 2 } }, /* st-d2 */
251 { { (UQI
) UNIT_M32R_D_U_STORE
, 1, 1 } }, /* stb */
252 { { (UQI
) UNIT_M32R_D_U_STORE
, 1, 1 } }, /* stb-2 */
253 { { (UQI
) UNIT_M32R_D_U_STORE
, 2, 2 } }, /* stb-d */
254 { { (UQI
) UNIT_M32R_D_U_STORE
, 2, 2 } }, /* stb-d2 */
255 { { (UQI
) UNIT_M32R_D_U_STORE
, 1, 1 } }, /* sth */
256 { { (UQI
) UNIT_M32R_D_U_STORE
, 1, 1 } }, /* sth-2 */
257 { { (UQI
) UNIT_M32R_D_U_STORE
, 2, 2 } }, /* sth-d */
258 { { (UQI
) UNIT_M32R_D_U_STORE
, 2, 2 } }, /* sth-d2 */
259 { { (UQI
) UNIT_M32R_D_U_STORE
, 1, 1 } }, /* st-plus */
260 { { (UQI
) UNIT_M32R_D_U_STORE
, 1, 1 } }, /* st-minus */
261 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* sub */
262 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* subv */
263 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* subx */
264 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* trap */
265 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* trap.a */
266 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* unlock */
267 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* push */
268 { { (UQI
) UNIT_M32R_D_U_EXEC
, 1, 1 } }, /* pop */
271 /* Model timing data for `test'. */
273 static const INSN_TIMING test_timing
[] = {
274 { { (UQI
) UNIT_NONE
} }, /* illegal insn */
275 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* add */
276 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* add3 */
277 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* add3.a */
278 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* and */
279 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* and3 */
280 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* and3.a */
281 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* or */
282 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* or3 */
283 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* or3.a */
284 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* xor */
285 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* xor3 */
286 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* xor3.a */
287 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* addi */
288 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* addi.a */
289 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* addv */
290 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* addv3 */
291 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* addv3.a */
292 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* addx */
293 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bc8 */
294 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bc8.s */
295 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bc24 */
296 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bc24.l */
297 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* beq */
298 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* beqz */
299 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bgez */
300 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bgtz */
301 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* blez */
302 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bltz */
303 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bnez */
304 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bl8 */
305 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bl8.s */
306 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bl24 */
307 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bl24.l */
308 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bnc8 */
309 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bnc8.s */
310 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bnc24 */
311 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bnc24.l */
312 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bne */
313 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bra8 */
314 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bra8.s */
315 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bra24 */
316 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* bra24.l */
317 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* cmp */
318 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* cmpi */
319 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* cmpi.a */
320 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* cmpu */
321 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* cmpui */
322 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* cmpui.a */
323 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* div */
324 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* divu */
325 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* rem */
326 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* remu */
327 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* jl */
328 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* jmp */
329 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ld */
330 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ld-2 */
331 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ld-d */
332 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ld-d2 */
333 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldb */
334 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldb-2 */
335 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldb-d */
336 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldb-d2 */
337 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldh */
338 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldh-2 */
339 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldh-d */
340 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldh-d2 */
341 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldub */
342 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldub-2 */
343 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldub-d */
344 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldub-d2 */
345 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* lduh */
346 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* lduh-2 */
347 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* lduh-d */
348 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* lduh-d2 */
349 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ld-plus */
350 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ld24 */
351 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ld24.a */
352 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldi8 */
353 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldi8.a */
354 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldi8a */
355 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldi8a.a */
356 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldi16 */
357 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* ldi16a */
358 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* lock */
359 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* machi */
360 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* maclo */
361 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* macwhi */
362 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* macwlo */
363 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mul */
364 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mulhi */
365 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mullo */
366 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mulwhi */
367 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mulwlo */
368 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mv */
369 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mvfachi */
370 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mvfaclo */
371 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mvfacmi */
372 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mvfc */
373 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mvtachi */
374 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mvtaclo */
375 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* mvtc */
376 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* neg */
377 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* nop */
378 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* not */
379 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* rac */
380 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* rach */
381 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* rte */
382 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* seth */
383 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* seth.a */
384 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sll */
385 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sll3 */
386 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sll3.a */
387 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* slli */
388 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* slli.a */
389 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sra */
390 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sra3 */
391 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sra3.a */
392 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* srai */
393 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* srai.a */
394 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* srl */
395 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* srl3 */
396 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* srl3.a */
397 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* srli */
398 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* srli.a */
399 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* st */
400 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* st-2 */
401 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* st-d */
402 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* st-d2 */
403 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* stb */
404 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* stb-2 */
405 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* stb-d */
406 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* stb-d2 */
407 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sth */
408 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sth-2 */
409 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sth-d */
410 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sth-d2 */
411 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* st-plus */
412 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* st-minus */
413 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* sub */
414 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* subv */
415 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* subx */
416 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* trap */
417 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* trap.a */
418 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* unlock */
419 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* push */
420 { { (UQI
) UNIT_TEST_U_EXEC
, 1, 1 } }, /* pop */
423 #endif /* WITH_PROFILE_MODEL_P */
425 #if WITH_PROFILE_MODEL_P
426 #define TIMING_DATA(td) td
428 #define TIMING_DATA(td) 0
431 const MODEL m32r_models
[] = {
432 { "m32r/d", &machs
[MACH_M32R
], TIMING_DATA (& m32r_d_timing
[0]) },
433 { "test", &machs
[MACH_M32R
], TIMING_DATA (& test_timing
[0]) },
437 /* The properties of this cpu's implementation. */
439 const IMP_PROPERTIES m32r_imp_properties
= {