sim/m32r/readx.c

   1 /* Simulator instruction operand reader for m32r.
   2
   3 This file is machine generated with CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #ifdef DEFINE_LABELS
  26 #undef DEFINE_LABELS
  27
  28   /* The labels have the case they have because the enum of insn types
  29      is all uppercase and in the non-stdc case the fmt symbol is built
  30      into the enum name.
  31
  32      The order here must match the order in m32rx_decode_vars in decode.c.  */
  33
  34   static void *labels[] = {
  35     && case_read_READ_ILLEGAL,
  36     && case_read_READ_FMT_0_ADD,
  37     && case_read_READ_FMT_1_ADD3,
  38     && case_read_READ_FMT_0_ADD,
  39     && case_read_READ_FMT_2_AND3,
  40     && case_read_READ_FMT_0_ADD,
  41     && case_read_READ_FMT_3_OR3,
  42     && case_read_READ_FMT_0_ADD,
  43     && case_read_READ_FMT_2_AND3,
  44     && case_read_READ_FMT_4_ADDI,
  45     && case_read_READ_FMT_5_ADDV,
  46     && case_read_READ_FMT_6_ADDV3,
  47     && case_read_READ_FMT_7_ADDX,
  48     && case_read_READ_FMT_8_BC8,
  49     && case_read_READ_FMT_9_BC24,
  50     && case_read_READ_FMT_10_BEQ,
  51     && case_read_READ_FMT_11_BEQZ,
  52     && case_read_READ_FMT_11_BEQZ,
  53     && case_read_READ_FMT_11_BEQZ,
  54     && case_read_READ_FMT_11_BEQZ,
  55     && case_read_READ_FMT_11_BEQZ,
  56     && case_read_READ_FMT_11_BEQZ,
  57     && case_read_READ_FMT_12_BL8,
  58     && case_read_READ_FMT_13_BL24,
  59     && case_read_READ_FMT_14_BCL8,
  60     && case_read_READ_FMT_15_BCL24,
  61     && case_read_READ_FMT_8_BC8,
  62     && case_read_READ_FMT_9_BC24,
  63     && case_read_READ_FMT_10_BEQ,
  64     && case_read_READ_FMT_16_BRA8,
  65     && case_read_READ_FMT_17_BRA24,
  66     && case_read_READ_FMT_14_BCL8,
  67     && case_read_READ_FMT_15_BCL24,
  68     && case_read_READ_FMT_18_CMP,
  69     && case_read_READ_FMT_19_CMPI,
  70     && case_read_READ_FMT_18_CMP,
  71     && case_read_READ_FMT_20_CMPUI,
  72     && case_read_READ_FMT_18_CMP,
  73     && case_read_READ_FMT_21_CMPZ,
  74     && case_read_READ_FMT_22_DIV,
  75     && case_read_READ_FMT_22_DIV,
  76     && case_read_READ_FMT_22_DIV,
  77     && case_read_READ_FMT_22_DIV,
  78     && case_read_READ_FMT_22_DIV,
  79     && case_read_READ_FMT_23_JC,
  80     && case_read_READ_FMT_23_JC,
  81     && case_read_READ_FMT_24_JL,
  82     && case_read_READ_FMT_25_JMP,
  83     && case_read_READ_FMT_26_LD,
  84     && case_read_READ_FMT_27_LD_D,
  85     && case_read_READ_FMT_28_LDB,
  86     && case_read_READ_FMT_29_LDB_D,
  87     && case_read_READ_FMT_30_LDH,
  88     && case_read_READ_FMT_31_LDH_D,
  89     && case_read_READ_FMT_28_LDB,
  90     && case_read_READ_FMT_29_LDB_D,
  91     && case_read_READ_FMT_30_LDH,
  92     && case_read_READ_FMT_31_LDH_D,
  93     && case_read_READ_FMT_32_LD_PLUS,
  94     && case_read_READ_FMT_33_LD24,
  95     && case_read_READ_FMT_34_LDI8,
  96     && case_read_READ_FMT_35_LDI16,
  97     && case_read_READ_FMT_36_LOCK,
  98     && case_read_READ_FMT_37_MACHI_A,
  99     && case_read_READ_FMT_37_MACHI_A,
 100     && case_read_READ_FMT_0_ADD,
 101     && case_read_READ_FMT_38_MULHI_A,
 102     && case_read_READ_FMT_38_MULHI_A,
 103     && case_read_READ_FMT_39_MV,
 104     && case_read_READ_FMT_40_MVFACHI_A,
 105     && case_read_READ_FMT_40_MVFACHI_A,
 106     && case_read_READ_FMT_40_MVFACHI_A,
 107     && case_read_READ_FMT_41_MVFC,
 108     && case_read_READ_FMT_42_MVTACHI_A,
 109     && case_read_READ_FMT_42_MVTACHI_A,
 110     && case_read_READ_FMT_43_MVTC,
 111     && case_read_READ_FMT_39_MV,
 112     && case_read_READ_FMT_44_NOP,
 113     && case_read_READ_FMT_39_MV,
 114     && case_read_READ_FMT_45_RAC_DSI,
 115     && case_read_READ_FMT_45_RAC_DSI,
 116     && case_read_READ_FMT_46_RTE,
 117     && case_read_READ_FMT_47_SETH,
 118     && case_read_READ_FMT_0_ADD,
 119     && case_read_READ_FMT_48_SLL3,
 120     && case_read_READ_FMT_49_SLLI,
 121     && case_read_READ_FMT_0_ADD,
 122     && case_read_READ_FMT_48_SLL3,
 123     && case_read_READ_FMT_49_SLLI,
 124     && case_read_READ_FMT_0_ADD,
 125     && case_read_READ_FMT_48_SLL3,
 126     && case_read_READ_FMT_49_SLLI,
 127     && case_read_READ_FMT_50_ST,
 128     && case_read_READ_FMT_51_ST_D,
 129     && case_read_READ_FMT_52_STB,
 130     && case_read_READ_FMT_53_STB_D,
 131     && case_read_READ_FMT_54_STH,
 132     && case_read_READ_FMT_55_STH_D,
 133     && case_read_READ_FMT_56_ST_PLUS,
 134     && case_read_READ_FMT_56_ST_PLUS,
 135     && case_read_READ_FMT_0_ADD,
 136     && case_read_READ_FMT_5_ADDV,
 137     && case_read_READ_FMT_7_ADDX,
 138     && case_read_READ_FMT_57_TRAP,
 139     && case_read_READ_FMT_58_UNLOCK,
 140     && case_read_READ_FMT_59_SATB,
 141     && case_read_READ_FMT_59_SATB,
 142     && case_read_READ_FMT_60_SAT,
 143     && case_read_READ_FMT_21_CMPZ,
 144     && case_read_READ_FMT_61_SADD,
 145     && case_read_READ_FMT_62_MACWU1,
 146     && case_read_READ_FMT_63_MSBLO,
 147     && case_read_READ_FMT_64_MULWU1,
 148     && case_read_READ_FMT_62_MACWU1,
 149     && case_read_READ_FMT_65_SC,
 150     && case_read_READ_FMT_65_SC,
 151     0
 152   };
 153   extern DECODE *m32rx_decode_vars[];
 154   int i;
 155
 156   for (i = 0; m32rx_decode_vars[i] != 0; ++i)
 157     m32rx_decode_vars[i]->read = labels[i];
 158
 159 #endif /* DEFINE_LABELS */
 160
 161 #ifdef DEFINE_SWITCH
 162 #undef DEFINE_SWITCH
 163
 164 {
 165   SWITCH (read, decode->read)
 166     {
 167
 168     CASE (read, READ_ILLEGAL) :
 169     {
 170       sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/);
 171     }
 172     BREAK (read);
 173
 174     CASE (read, READ_FMT_0_ADD) : /* e.g. add $dr,$sr */
 175     {
 176 #define OPRND(f) par_exec->operands.fmt_0_add.f
 177   EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
 178   EXTRACT_FMT_0_ADD_CODE
 179
 180       /* Fetch the input operands for the semantic handler.  */
 181       OPRND (dr) = CPU (h_gr[f_r1]);
 182       OPRND (sr) = CPU (h_gr[f_r2]);
 183 #undef OPRND
 184     }
 185     BREAK (read);
 186
 187     CASE (read, READ_FMT_1_ADD3) : /* e.g. add3 $dr,$sr,#$slo16 */
 188     {
 189 #define OPRND(f) par_exec->operands.fmt_1_add3.f
 190   EXTRACT_FMT_1_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 191   EXTRACT_FMT_1_ADD3_CODE
 192
 193       /* Fetch the input operands for the semantic handler.  */
 194       OPRND (slo16) = f_simm16;
 195       OPRND (sr) = CPU (h_gr[f_r2]);
 196 #undef OPRND
 197     }
 198     BREAK (read);
 199
 200     CASE (read, READ_FMT_2_AND3) : /* e.g. and3 $dr,$sr,#$uimm16 */
 201     {
 202 #define OPRND(f) par_exec->operands.fmt_2_and3.f
 203   EXTRACT_FMT_2_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 204   EXTRACT_FMT_2_AND3_CODE
 205
 206       /* Fetch the input operands for the semantic handler.  */
 207       OPRND (sr) = CPU (h_gr[f_r2]);
 208       OPRND (uimm16) = f_uimm16;
 209 #undef OPRND
 210     }
 211     BREAK (read);
 212
 213     CASE (read, READ_FMT_3_OR3) : /* e.g. or3 $dr,$sr,#$ulo16 */
 214     {
 215 #define OPRND(f) par_exec->operands.fmt_3_or3.f
 216   EXTRACT_FMT_3_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 217   EXTRACT_FMT_3_OR3_CODE
 218
 219       /* Fetch the input operands for the semantic handler.  */
 220       OPRND (sr) = CPU (h_gr[f_r2]);
 221       OPRND (ulo16) = f_uimm16;
 222 #undef OPRND
 223     }
 224     BREAK (read);
 225
 226     CASE (read, READ_FMT_4_ADDI) : /* e.g. addi $dr,#$simm8 */
 227     {
 228 #define OPRND(f) par_exec->operands.fmt_4_addi.f
 229   EXTRACT_FMT_4_ADDI_VARS /* f-op1 f-r1 f-simm8 */
 230   EXTRACT_FMT_4_ADDI_CODE
 231
 232       /* Fetch the input operands for the semantic handler.  */
 233       OPRND (dr) = CPU (h_gr[f_r1]);
 234       OPRND (simm8) = f_simm8;
 235 #undef OPRND
 236     }
 237     BREAK (read);
 238
 239     CASE (read, READ_FMT_5_ADDV) : /* e.g. addv $dr,$sr */
 240     {
 241 #define OPRND(f) par_exec->operands.fmt_5_addv.f
 242   EXTRACT_FMT_5_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
 243   EXTRACT_FMT_5_ADDV_CODE
 244
 245       /* Fetch the input operands for the semantic handler.  */
 246       OPRND (dr) = CPU (h_gr[f_r1]);
 247       OPRND (sr) = CPU (h_gr[f_r2]);
 248 #undef OPRND
 249     }
 250     BREAK (read);
 251
 252     CASE (read, READ_FMT_6_ADDV3) : /* e.g. addv3 $dr,$sr,#$simm16 */
 253     {
 254 #define OPRND(f) par_exec->operands.fmt_6_addv3.f
 255   EXTRACT_FMT_6_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 256   EXTRACT_FMT_6_ADDV3_CODE
 257
 258       /* Fetch the input operands for the semantic handler.  */
 259       OPRND (simm16) = f_simm16;
 260       OPRND (sr) = CPU (h_gr[f_r2]);
 261 #undef OPRND
 262     }
 263     BREAK (read);
 264
 265     CASE (read, READ_FMT_7_ADDX) : /* e.g. addx $dr,$sr */
 266     {
 267 #define OPRND(f) par_exec->operands.fmt_7_addx.f
 268   EXTRACT_FMT_7_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
 269   EXTRACT_FMT_7_ADDX_CODE
 270
 271       /* Fetch the input operands for the semantic handler.  */
 272       OPRND (condbit) = CPU (h_cond);
 273       OPRND (dr) = CPU (h_gr[f_r1]);
 274       OPRND (sr) = CPU (h_gr[f_r2]);
 275 #undef OPRND
 276     }
 277     BREAK (read);
 278
 279     CASE (read, READ_FMT_8_BC8) : /* e.g. bc $disp8 */
 280     {
 281 #define OPRND(f) par_exec->operands.fmt_8_bc8.f
 282   EXTRACT_FMT_8_BC8_VARS /* f-op1 f-r1 f-disp8 */
 283   EXTRACT_FMT_8_BC8_CODE
 284
 285       /* Fetch the input operands for the semantic handler.  */
 286       OPRND (condbit) = CPU (h_cond);
 287       RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8);
 288 #undef OPRND
 289     }
 290     BREAK (read);
 291
 292     CASE (read, READ_FMT_9_BC24) : /* e.g. bc $disp24 */
 293     {
 294 #define OPRND(f) par_exec->operands.fmt_9_bc24.f
 295   EXTRACT_FMT_9_BC24_VARS /* f-op1 f-r1 f-disp24 */
 296   EXTRACT_FMT_9_BC24_CODE
 297
 298       /* Fetch the input operands for the semantic handler.  */
 299       OPRND (condbit) = CPU (h_cond);
 300       OPRND (disp24) = pc + f_disp24;
 301 #undef OPRND
 302     }
 303     BREAK (read);
 304
 305     CASE (read, READ_FMT_10_BEQ) : /* e.g. beq $src1,$src2,$disp16 */
 306     {
 307 #define OPRND(f) par_exec->operands.fmt_10_beq.f
 308   EXTRACT_FMT_10_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 309   EXTRACT_FMT_10_BEQ_CODE
 310
 311       /* Fetch the input operands for the semantic handler.  */
 312       OPRND (disp16) = pc + f_disp16;
 313       OPRND (src1) = CPU (h_gr[f_r1]);
 314       OPRND (src2) = CPU (h_gr[f_r2]);
 315 #undef OPRND
 316     }
 317     BREAK (read);
 318
 319     CASE (read, READ_FMT_11_BEQZ) : /* e.g. beqz $src2,$disp16 */
 320     {
 321 #define OPRND(f) par_exec->operands.fmt_11_beqz.f
 322   EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 323   EXTRACT_FMT_11_BEQZ_CODE
 324
 325       /* Fetch the input operands for the semantic handler.  */
 326       OPRND (disp16) = pc + f_disp16;
 327       OPRND (src2) = CPU (h_gr[f_r2]);
 328 #undef OPRND
 329     }
 330     BREAK (read);
 331
 332     CASE (read, READ_FMT_12_BL8) : /* e.g. bl $disp8 */
 333     {
 334 #define OPRND(f) par_exec->operands.fmt_12_bl8.f
 335   EXTRACT_FMT_12_BL8_VARS /* f-op1 f-r1 f-disp8 */
 336   EXTRACT_FMT_12_BL8_CODE
 337
 338       /* Fetch the input operands for the semantic handler.  */
 339       RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8);
 340       OPRND (pc) = CPU (h_pc);
 341 #undef OPRND
 342     }
 343     BREAK (read);
 344
 345     CASE (read, READ_FMT_13_BL24) : /* e.g. bl $disp24 */
 346     {
 347 #define OPRND(f) par_exec->operands.fmt_13_bl24.f
 348   EXTRACT_FMT_13_BL24_VARS /* f-op1 f-r1 f-disp24 */
 349   EXTRACT_FMT_13_BL24_CODE
 350
 351       /* Fetch the input operands for the semantic handler.  */
 352       OPRND (disp24) = pc + f_disp24;
 353       OPRND (pc) = CPU (h_pc);
 354 #undef OPRND
 355     }
 356     BREAK (read);
 357
 358     CASE (read, READ_FMT_14_BCL8) : /* e.g. bcl $disp8 */
 359     {
 360 #define OPRND(f) par_exec->operands.fmt_14_bcl8.f
 361   EXTRACT_FMT_14_BCL8_VARS /* f-op1 f-r1 f-disp8 */
 362   EXTRACT_FMT_14_BCL8_CODE
 363
 364       /* Fetch the input operands for the semantic handler.  */
 365       OPRND (condbit) = CPU (h_cond);
 366       RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8);
 367       OPRND (pc) = CPU (h_pc);
 368 #undef OPRND
 369     }
 370     BREAK (read);
 371
 372     CASE (read, READ_FMT_15_BCL24) : /* e.g. bcl $disp24 */
 373     {
 374 #define OPRND(f) par_exec->operands.fmt_15_bcl24.f
 375   EXTRACT_FMT_15_BCL24_VARS /* f-op1 f-r1 f-disp24 */
 376   EXTRACT_FMT_15_BCL24_CODE
 377
 378       /* Fetch the input operands for the semantic handler.  */
 379       OPRND (condbit) = CPU (h_cond);
 380       OPRND (disp24) = pc + f_disp24;
 381       OPRND (pc) = CPU (h_pc);
 382 #undef OPRND
 383     }
 384     BREAK (read);
 385
 386     CASE (read, READ_FMT_16_BRA8) : /* e.g. bra $disp8 */
 387     {
 388 #define OPRND(f) par_exec->operands.fmt_16_bra8.f
 389   EXTRACT_FMT_16_BRA8_VARS /* f-op1 f-r1 f-disp8 */
 390   EXTRACT_FMT_16_BRA8_CODE
 391
 392       /* Fetch the input operands for the semantic handler.  */
 393       RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8);
 394 #undef OPRND
 395     }
 396     BREAK (read);
 397
 398     CASE (read, READ_FMT_17_BRA24) : /* e.g. bra $disp24 */
 399     {
 400 #define OPRND(f) par_exec->operands.fmt_17_bra24.f
 401   EXTRACT_FMT_17_BRA24_VARS /* f-op1 f-r1 f-disp24 */
 402   EXTRACT_FMT_17_BRA24_CODE
 403
 404       /* Fetch the input operands for the semantic handler.  */
 405       OPRND (disp24) = pc + f_disp24;
 406 #undef OPRND
 407     }
 408     BREAK (read);
 409
 410     CASE (read, READ_FMT_18_CMP) : /* e.g. cmp $src1,$src2 */
 411     {
 412 #define OPRND(f) par_exec->operands.fmt_18_cmp.f
 413   EXTRACT_FMT_18_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
 414   EXTRACT_FMT_18_CMP_CODE
 415
 416       /* Fetch the input operands for the semantic handler.  */
 417       OPRND (src1) = CPU (h_gr[f_r1]);
 418       OPRND (src2) = CPU (h_gr[f_r2]);
 419 #undef OPRND
 420     }
 421     BREAK (read);
 422
 423     CASE (read, READ_FMT_19_CMPI) : /* e.g. cmpi $src2,#$simm16 */
 424     {
 425 #define OPRND(f) par_exec->operands.fmt_19_cmpi.f
 426   EXTRACT_FMT_19_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 427   EXTRACT_FMT_19_CMPI_CODE
 428
 429       /* Fetch the input operands for the semantic handler.  */
 430       OPRND (simm16) = f_simm16;
 431       OPRND (src2) = CPU (h_gr[f_r2]);
 432 #undef OPRND
 433     }
 434     BREAK (read);
 435
 436     CASE (read, READ_FMT_20_CMPUI) : /* e.g. cmpui $src2,#$uimm16 */
 437     {
 438 #define OPRND(f) par_exec->operands.fmt_20_cmpui.f
 439   EXTRACT_FMT_20_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 440   EXTRACT_FMT_20_CMPUI_CODE
 441
 442       /* Fetch the input operands for the semantic handler.  */
 443       OPRND (src2) = CPU (h_gr[f_r2]);
 444       OPRND (uimm16) = f_uimm16;
 445 #undef OPRND
 446     }
 447     BREAK (read);
 448
 449     CASE (read, READ_FMT_21_CMPZ) : /* e.g. cmpz $src2 */
 450     {
 451 #define OPRND(f) par_exec->operands.fmt_21_cmpz.f
 452   EXTRACT_FMT_21_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
 453   EXTRACT_FMT_21_CMPZ_CODE
 454
 455       /* Fetch the input operands for the semantic handler.  */
 456       OPRND (src2) = CPU (h_gr[f_r2]);
 457 #undef OPRND
 458     }
 459     BREAK (read);
 460
 461     CASE (read, READ_FMT_22_DIV) : /* e.g. div $dr,$sr */
 462     {
 463 #define OPRND(f) par_exec->operands.fmt_22_div.f
 464   EXTRACT_FMT_22_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 465   EXTRACT_FMT_22_DIV_CODE
 466
 467       /* Fetch the input operands for the semantic handler.  */
 468       OPRND (dr) = CPU (h_gr[f_r1]);
 469       OPRND (sr) = CPU (h_gr[f_r2]);
 470 #undef OPRND
 471     }
 472     BREAK (read);
 473
 474     CASE (read, READ_FMT_23_JC) : /* e.g. jc $sr */
 475     {
 476 #define OPRND(f) par_exec->operands.fmt_23_jc.f
 477   EXTRACT_FMT_23_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
 478   EXTRACT_FMT_23_JC_CODE
 479
 480       /* Fetch the input operands for the semantic handler.  */
 481       OPRND (condbit) = CPU (h_cond);
 482       OPRND (sr) = CPU (h_gr[f_r2]);
 483 #undef OPRND
 484     }
 485     BREAK (read);
 486
 487     CASE (read, READ_FMT_24_JL) : /* e.g. jl $sr */
 488     {
 489 #define OPRND(f) par_exec->operands.fmt_24_jl.f
 490   EXTRACT_FMT_24_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
 491   EXTRACT_FMT_24_JL_CODE
 492
 493       /* Fetch the input operands for the semantic handler.  */
 494       OPRND (pc) = CPU (h_pc);
 495       OPRND (sr) = CPU (h_gr[f_r2]);
 496 #undef OPRND
 497     }
 498     BREAK (read);
 499
 500     CASE (read, READ_FMT_25_JMP) : /* e.g. jmp $sr */
 501     {
 502 #define OPRND(f) par_exec->operands.fmt_25_jmp.f
 503   EXTRACT_FMT_25_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
 504   EXTRACT_FMT_25_JMP_CODE
 505
 506       /* Fetch the input operands for the semantic handler.  */
 507       OPRND (sr) = CPU (h_gr[f_r2]);
 508 #undef OPRND
 509     }
 510     BREAK (read);
 511
 512     CASE (read, READ_FMT_26_LD) : /* e.g. ld $dr,@$sr */
 513     {
 514 #define OPRND(f) par_exec->operands.fmt_26_ld.f
 515   EXTRACT_FMT_26_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
 516   EXTRACT_FMT_26_LD_CODE
 517
 518       /* Fetch the input operands for the semantic handler.  */
 519       OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2]));
 520       OPRND (sr) = CPU (h_gr[f_r2]);
 521 #undef OPRND
 522     }
 523     BREAK (read);
 524
 525     CASE (read, READ_FMT_27_LD_D) : /* e.g. ld $dr,@($slo16,$sr) */
 526     {
 527 #define OPRND(f) par_exec->operands.fmt_27_ld_d.f
 528   EXTRACT_FMT_27_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 529   EXTRACT_FMT_27_LD_D_CODE
 530
 531       /* Fetch the input operands for the semantic handler.  */
 532       OPRND (h_memory_add_WI_sr_slo16) = GETMEMSI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
 533       OPRND (slo16) = f_simm16;
 534       OPRND (sr) = CPU (h_gr[f_r2]);
 535 #undef OPRND
 536     }
 537     BREAK (read);
 538
 539     CASE (read, READ_FMT_28_LDB) : /* e.g. ldb $dr,@$sr */
 540     {
 541 #define OPRND(f) par_exec->operands.fmt_28_ldb.f
 542   EXTRACT_FMT_28_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
 543   EXTRACT_FMT_28_LDB_CODE
 544
 545       /* Fetch the input operands for the semantic handler.  */
 546       OPRND (h_memory_sr) = GETMEMQI (current_cpu, CPU (h_gr[f_r2]));
 547       OPRND (sr) = CPU (h_gr[f_r2]);
 548 #undef OPRND
 549     }
 550     BREAK (read);
 551
 552     CASE (read, READ_FMT_29_LDB_D) : /* e.g. ldb $dr,@($slo16,$sr) */
 553     {
 554 #define OPRND(f) par_exec->operands.fmt_29_ldb_d.f
 555   EXTRACT_FMT_29_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 556   EXTRACT_FMT_29_LDB_D_CODE
 557
 558       /* Fetch the input operands for the semantic handler.  */
 559       OPRND (h_memory_add_WI_sr_slo16) = GETMEMQI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
 560       OPRND (slo16) = f_simm16;
 561       OPRND (sr) = CPU (h_gr[f_r2]);
 562 #undef OPRND
 563     }
 564     BREAK (read);
 565
 566     CASE (read, READ_FMT_30_LDH) : /* e.g. ldh $dr,@$sr */
 567     {
 568 #define OPRND(f) par_exec->operands.fmt_30_ldh.f
 569   EXTRACT_FMT_30_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
 570   EXTRACT_FMT_30_LDH_CODE
 571
 572       /* Fetch the input operands for the semantic handler.  */
 573       OPRND (h_memory_sr) = GETMEMHI (current_cpu, CPU (h_gr[f_r2]));
 574       OPRND (sr) = CPU (h_gr[f_r2]);
 575 #undef OPRND
 576     }
 577     BREAK (read);
 578
 579     CASE (read, READ_FMT_31_LDH_D) : /* e.g. ldh $dr,@($slo16,$sr) */
 580     {
 581 #define OPRND(f) par_exec->operands.fmt_31_ldh_d.f
 582   EXTRACT_FMT_31_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 583   EXTRACT_FMT_31_LDH_D_CODE
 584
 585       /* Fetch the input operands for the semantic handler.  */
 586       OPRND (h_memory_add_WI_sr_slo16) = GETMEMHI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
 587       OPRND (slo16) = f_simm16;
 588       OPRND (sr) = CPU (h_gr[f_r2]);
 589 #undef OPRND
 590     }
 591     BREAK (read);
 592
 593     CASE (read, READ_FMT_32_LD_PLUS) : /* e.g. ld $dr,@$sr+ */
 594     {
 595 #define OPRND(f) par_exec->operands.fmt_32_ld_plus.f
 596   EXTRACT_FMT_32_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
 597   EXTRACT_FMT_32_LD_PLUS_CODE
 598
 599       /* Fetch the input operands for the semantic handler.  */
 600       OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2]));
 601       OPRND (sr) = CPU (h_gr[f_r2]);
 602 #undef OPRND
 603     }
 604     BREAK (read);
 605
 606     CASE (read, READ_FMT_33_LD24) : /* e.g. ld24 $dr,#$uimm24 */
 607     {
 608 #define OPRND(f) par_exec->operands.fmt_33_ld24.f
 609   EXTRACT_FMT_33_LD24_VARS /* f-op1 f-r1 f-uimm24 */
 610   EXTRACT_FMT_33_LD24_CODE
 611
 612       /* Fetch the input operands for the semantic handler.  */
 613       OPRND (uimm24) = f_uimm24;
 614 #undef OPRND
 615     }
 616     BREAK (read);
 617
 618     CASE (read, READ_FMT_34_LDI8) : /* e.g. ldi $dr,#$simm8 */
 619     {
 620 #define OPRND(f) par_exec->operands.fmt_34_ldi8.f
 621   EXTRACT_FMT_34_LDI8_VARS /* f-op1 f-r1 f-simm8 */
 622   EXTRACT_FMT_34_LDI8_CODE
 623
 624       /* Fetch the input operands for the semantic handler.  */
 625       OPRND (simm8) = f_simm8;
 626 #undef OPRND
 627     }
 628     BREAK (read);
 629
 630     CASE (read, READ_FMT_35_LDI16) : /* e.g. ldi $dr,$slo16 */
 631     {
 632 #define OPRND(f) par_exec->operands.fmt_35_ldi16.f
 633   EXTRACT_FMT_35_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 634   EXTRACT_FMT_35_LDI16_CODE
 635
 636       /* Fetch the input operands for the semantic handler.  */
 637       OPRND (slo16) = f_simm16;
 638 #undef OPRND
 639     }
 640     BREAK (read);
 641
 642     CASE (read, READ_FMT_36_LOCK) : /* e.g. lock $dr,@$sr */
 643     {
 644 #define OPRND(f) par_exec->operands.fmt_36_lock.f
 645   EXTRACT_FMT_36_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
 646   EXTRACT_FMT_36_LOCK_CODE
 647
 648       /* Fetch the input operands for the semantic handler.  */
 649       OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2]));
 650       OPRND (sr) = CPU (h_gr[f_r2]);
 651 #undef OPRND
 652     }
 653     BREAK (read);
 654
 655     CASE (read, READ_FMT_37_MACHI_A) : /* e.g. machi $src1,$src2,$acc */
 656     {
 657 #define OPRND(f) par_exec->operands.fmt_37_machi_a.f
 658   EXTRACT_FMT_37_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
 659   EXTRACT_FMT_37_MACHI_A_CODE
 660
 661       /* Fetch the input operands for the semantic handler.  */
 662       OPRND (acc) = m32rx_h_accums_get (current_cpu, f_acc);
 663       OPRND (src1) = CPU (h_gr[f_r1]);
 664       OPRND (src2) = CPU (h_gr[f_r2]);
 665 #undef OPRND
 666     }
 667     BREAK (read);
 668
 669     CASE (read, READ_FMT_38_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
 670     {
 671 #define OPRND(f) par_exec->operands.fmt_38_mulhi_a.f
 672   EXTRACT_FMT_38_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
 673   EXTRACT_FMT_38_MULHI_A_CODE
 674
 675       /* Fetch the input operands for the semantic handler.  */
 676       OPRND (src1) = CPU (h_gr[f_r1]);
 677       OPRND (src2) = CPU (h_gr[f_r2]);
 678 #undef OPRND
 679     }
 680     BREAK (read);
 681
 682     CASE (read, READ_FMT_39_MV) : /* e.g. mv $dr,$sr */
 683     {
 684 #define OPRND(f) par_exec->operands.fmt_39_mv.f
 685   EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
 686   EXTRACT_FMT_39_MV_CODE
 687
 688       /* Fetch the input operands for the semantic handler.  */
 689       OPRND (sr) = CPU (h_gr[f_r2]);
 690 #undef OPRND
 691     }
 692     BREAK (read);
 693
 694     CASE (read, READ_FMT_40_MVFACHI_A) : /* e.g. mvfachi $dr,$accs */
 695     {
 696 #define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f
 697   EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
 698   EXTRACT_FMT_40_MVFACHI_A_CODE
 699
 700       /* Fetch the input operands for the semantic handler.  */
 701       OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
 702 #undef OPRND
 703     }
 704     BREAK (read);
 705
 706     CASE (read, READ_FMT_41_MVFC) : /* e.g. mvfc $dr,$scr */
 707     {
 708 #define OPRND(f) par_exec->operands.fmt_41_mvfc.f
 709   EXTRACT_FMT_41_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
 710   EXTRACT_FMT_41_MVFC_CODE
 711
 712       /* Fetch the input operands for the semantic handler.  */
 713       OPRND (scr) = m32rx_h_cr_get (current_cpu, f_r2);
 714 #undef OPRND
 715     }
 716     BREAK (read);
 717
 718     CASE (read, READ_FMT_42_MVTACHI_A) : /* e.g. mvtachi $src1,$accs */
 719     {
 720 #define OPRND(f) par_exec->operands.fmt_42_mvtachi_a.f
 721   EXTRACT_FMT_42_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
 722   EXTRACT_FMT_42_MVTACHI_A_CODE
 723
 724       /* Fetch the input operands for the semantic handler.  */
 725       OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
 726       OPRND (src1) = CPU (h_gr[f_r1]);
 727 #undef OPRND
 728     }
 729     BREAK (read);
 730
 731     CASE (read, READ_FMT_43_MVTC) : /* e.g. mvtc $sr,$dcr */
 732     {
 733 #define OPRND(f) par_exec->operands.fmt_43_mvtc.f
 734   EXTRACT_FMT_43_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
 735   EXTRACT_FMT_43_MVTC_CODE
 736
 737       /* Fetch the input operands for the semantic handler.  */
 738       OPRND (sr) = CPU (h_gr[f_r2]);
 739 #undef OPRND
 740     }
 741     BREAK (read);
 742
 743     CASE (read, READ_FMT_44_NOP) : /* e.g. nop */
 744     {
 745 #define OPRND(f) par_exec->operands.fmt_44_nop.f
 746   EXTRACT_FMT_44_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
 747   EXTRACT_FMT_44_NOP_CODE
 748
 749       /* Fetch the input operands for the semantic handler.  */
 750 #undef OPRND
 751     }
 752     BREAK (read);
 753
 754     CASE (read, READ_FMT_45_RAC_DSI) : /* e.g. rac $accd,$accs,#$imm1 */
 755     {
 756 #define OPRND(f) par_exec->operands.fmt_45_rac_dsi.f
 757   EXTRACT_FMT_45_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
 758   EXTRACT_FMT_45_RAC_DSI_CODE
 759
 760       /* Fetch the input operands for the semantic handler.  */
 761       OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
 762       OPRND (imm1) = f_imm1;
 763 #undef OPRND
 764     }
 765     BREAK (read);
 766
 767     CASE (read, READ_FMT_46_RTE) : /* e.g. rte */
 768     {
 769 #define OPRND(f) par_exec->operands.fmt_46_rte.f
 770   EXTRACT_FMT_46_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
 771   EXTRACT_FMT_46_RTE_CODE
 772
 773       /* Fetch the input operands for the semantic handler.  */
 774       OPRND (h_bcond_0) = CPU (h_bcond);
 775       OPRND (h_bie_0) = CPU (h_bie);
 776       OPRND (h_bpc_0) = CPU (h_bpc);
 777       OPRND (h_bsm_0) = CPU (h_bsm);
 778 #undef OPRND
 779     }
 780     BREAK (read);
 781
 782     CASE (read, READ_FMT_47_SETH) : /* e.g. seth $dr,#$hi16 */
 783     {
 784 #define OPRND(f) par_exec->operands.fmt_47_seth.f
 785   EXTRACT_FMT_47_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
 786   EXTRACT_FMT_47_SETH_CODE
 787
 788       /* Fetch the input operands for the semantic handler.  */
 789       OPRND (hi16) = f_hi16;
 790 #undef OPRND
 791     }
 792     BREAK (read);
 793
 794     CASE (read, READ_FMT_48_SLL3) : /* e.g. sll3 $dr,$sr,#$simm16 */
 795     {
 796 #define OPRND(f) par_exec->operands.fmt_48_sll3.f
 797   EXTRACT_FMT_48_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 798   EXTRACT_FMT_48_SLL3_CODE
 799
 800       /* Fetch the input operands for the semantic handler.  */
 801       OPRND (simm16) = f_simm16;
 802       OPRND (sr) = CPU (h_gr[f_r2]);
 803 #undef OPRND
 804     }
 805     BREAK (read);
 806
 807     CASE (read, READ_FMT_49_SLLI) : /* e.g. slli $dr,#$uimm5 */
 808     {
 809 #define OPRND(f) par_exec->operands.fmt_49_slli.f
 810   EXTRACT_FMT_49_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
 811   EXTRACT_FMT_49_SLLI_CODE
 812
 813       /* Fetch the input operands for the semantic handler.  */
 814       OPRND (dr) = CPU (h_gr[f_r1]);
 815       OPRND (uimm5) = f_uimm5;
 816 #undef OPRND
 817     }
 818     BREAK (read);
 819
 820     CASE (read, READ_FMT_50_ST) : /* e.g. st $src1,@$src2 */
 821     {
 822 #define OPRND(f) par_exec->operands.fmt_50_st.f
 823   EXTRACT_FMT_50_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
 824   EXTRACT_FMT_50_ST_CODE
 825
 826       /* Fetch the input operands for the semantic handler.  */
 827       OPRND (src1) = CPU (h_gr[f_r1]);
 828       OPRND (src2) = CPU (h_gr[f_r2]);
 829 #undef OPRND
 830     }
 831     BREAK (read);
 832
 833     CASE (read, READ_FMT_51_ST_D) : /* e.g. st $src1,@($slo16,$src2) */
 834     {
 835 #define OPRND(f) par_exec->operands.fmt_51_st_d.f
 836   EXTRACT_FMT_51_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 837   EXTRACT_FMT_51_ST_D_CODE
 838
 839       /* Fetch the input operands for the semantic handler.  */
 840       OPRND (slo16) = f_simm16;
 841       OPRND (src1) = CPU (h_gr[f_r1]);
 842       OPRND (src2) = CPU (h_gr[f_r2]);
 843 #undef OPRND
 844     }
 845     BREAK (read);
 846
 847     CASE (read, READ_FMT_52_STB) : /* e.g. stb $src1,@$src2 */
 848     {
 849 #define OPRND(f) par_exec->operands.fmt_52_stb.f
 850   EXTRACT_FMT_52_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
 851   EXTRACT_FMT_52_STB_CODE
 852
 853       /* Fetch the input operands for the semantic handler.  */
 854       OPRND (src1) = CPU (h_gr[f_r1]);
 855       OPRND (src2) = CPU (h_gr[f_r2]);
 856 #undef OPRND
 857     }
 858     BREAK (read);
 859
 860     CASE (read, READ_FMT_53_STB_D) : /* e.g. stb $src1,@($slo16,$src2) */
 861     {
 862 #define OPRND(f) par_exec->operands.fmt_53_stb_d.f
 863   EXTRACT_FMT_53_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 864   EXTRACT_FMT_53_STB_D_CODE
 865
 866       /* Fetch the input operands for the semantic handler.  */
 867       OPRND (slo16) = f_simm16;
 868       OPRND (src1) = CPU (h_gr[f_r1]);
 869       OPRND (src2) = CPU (h_gr[f_r2]);
 870 #undef OPRND
 871     }
 872     BREAK (read);
 873
 874     CASE (read, READ_FMT_54_STH) : /* e.g. sth $src1,@$src2 */
 875     {
 876 #define OPRND(f) par_exec->operands.fmt_54_sth.f
 877   EXTRACT_FMT_54_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
 878   EXTRACT_FMT_54_STH_CODE
 879
 880       /* Fetch the input operands for the semantic handler.  */
 881       OPRND (src1) = CPU (h_gr[f_r1]);
 882       OPRND (src2) = CPU (h_gr[f_r2]);
 883 #undef OPRND
 884     }
 885     BREAK (read);
 886
 887     CASE (read, READ_FMT_55_STH_D) : /* e.g. sth $src1,@($slo16,$src2) */
 888     {
 889 #define OPRND(f) par_exec->operands.fmt_55_sth_d.f
 890   EXTRACT_FMT_55_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 891   EXTRACT_FMT_55_STH_D_CODE
 892
 893       /* Fetch the input operands for the semantic handler.  */
 894       OPRND (slo16) = f_simm16;
 895       OPRND (src1) = CPU (h_gr[f_r1]);
 896       OPRND (src2) = CPU (h_gr[f_r2]);
 897 #undef OPRND
 898     }
 899     BREAK (read);
 900
 901     CASE (read, READ_FMT_56_ST_PLUS) : /* e.g. st $src1,@+$src2 */
 902     {
 903 #define OPRND(f) par_exec->operands.fmt_56_st_plus.f
 904   EXTRACT_FMT_56_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
 905   EXTRACT_FMT_56_ST_PLUS_CODE
 906
 907       /* Fetch the input operands for the semantic handler.  */
 908       OPRND (src1) = CPU (h_gr[f_r1]);
 909       OPRND (src2) = CPU (h_gr[f_r2]);
 910 #undef OPRND
 911     }
 912     BREAK (read);
 913
 914     CASE (read, READ_FMT_57_TRAP) : /* e.g. trap #$uimm4 */
 915     {
 916 #define OPRND(f) par_exec->operands.fmt_57_trap.f
 917   EXTRACT_FMT_57_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
 918   EXTRACT_FMT_57_TRAP_CODE
 919
 920       /* Fetch the input operands for the semantic handler.  */
 921       OPRND (pc) = CPU (h_pc);
 922       OPRND (h_cr_0) = m32rx_h_cr_get (current_cpu, 0);
 923       OPRND (uimm4) = f_uimm4;
 924 #undef OPRND
 925     }
 926     BREAK (read);
 927
 928     CASE (read, READ_FMT_58_UNLOCK) : /* e.g. unlock $src1,@$src2 */
 929     {
 930 #define OPRND(f) par_exec->operands.fmt_58_unlock.f
 931   EXTRACT_FMT_58_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
 932   EXTRACT_FMT_58_UNLOCK_CODE
 933
 934       /* Fetch the input operands for the semantic handler.  */
 935       OPRND (h_lock_0) = CPU (h_lock);
 936       OPRND (src1) = CPU (h_gr[f_r1]);
 937       OPRND (src2) = CPU (h_gr[f_r2]);
 938 #undef OPRND
 939     }
 940     BREAK (read);
 941
 942     CASE (read, READ_FMT_59_SATB) : /* e.g. satb $dr,$sr */
 943     {
 944 #define OPRND(f) par_exec->operands.fmt_59_satb.f
 945   EXTRACT_FMT_59_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 946   EXTRACT_FMT_59_SATB_CODE
 947
 948       /* Fetch the input operands for the semantic handler.  */
 949       OPRND (sr) = CPU (h_gr[f_r2]);
 950 #undef OPRND
 951     }
 952     BREAK (read);
 953
 954     CASE (read, READ_FMT_60_SAT) : /* e.g. sat $dr,$sr */
 955     {
 956 #define OPRND(f) par_exec->operands.fmt_60_sat.f
 957   EXTRACT_FMT_60_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 958   EXTRACT_FMT_60_SAT_CODE
 959
 960       /* Fetch the input operands for the semantic handler.  */
 961       OPRND (condbit) = CPU (h_cond);
 962       OPRND (sr) = CPU (h_gr[f_r2]);
 963 #undef OPRND
 964     }
 965     BREAK (read);
 966
 967     CASE (read, READ_FMT_61_SADD) : /* e.g. sadd */
 968     {
 969 #define OPRND(f) par_exec->operands.fmt_61_sadd.f
 970   EXTRACT_FMT_61_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
 971   EXTRACT_FMT_61_SADD_CODE
 972
 973       /* Fetch the input operands for the semantic handler.  */
 974       OPRND (h_accums_0) = m32rx_h_accums_get (current_cpu, 0);
 975       OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1);
 976 #undef OPRND
 977     }
 978     BREAK (read);
 979
 980     CASE (read, READ_FMT_62_MACWU1) : /* e.g. macwu1 $src1,$src2 */
 981     {
 982 #define OPRND(f) par_exec->operands.fmt_62_macwu1.f
 983   EXTRACT_FMT_62_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
 984   EXTRACT_FMT_62_MACWU1_CODE
 985
 986       /* Fetch the input operands for the semantic handler.  */
 987       OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1);
 988       OPRND (src1) = CPU (h_gr[f_r1]);
 989       OPRND (src2) = CPU (h_gr[f_r2]);
 990 #undef OPRND
 991     }
 992     BREAK (read);
 993
 994     CASE (read, READ_FMT_63_MSBLO) : /* e.g. msblo $src1,$src2 */
 995     {
 996 #define OPRND(f) par_exec->operands.fmt_63_msblo.f
 997   EXTRACT_FMT_63_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
 998   EXTRACT_FMT_63_MSBLO_CODE
 999
1000       /* Fetch the input operands for the semantic handler.  */
1001       OPRND (accum) = CPU (h_accum);
1002       OPRND (src1) = CPU (h_gr[f_r1]);
1003       OPRND (src2) = CPU (h_gr[f_r2]);
1004 #undef OPRND
1005     }
1006     BREAK (read);
1007
1008     CASE (read, READ_FMT_64_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
1009     {
1010 #define OPRND(f) par_exec->operands.fmt_64_mulwu1.f
1011   EXTRACT_FMT_64_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
1012   EXTRACT_FMT_64_MULWU1_CODE
1013
1014       /* Fetch the input operands for the semantic handler.  */
1015       OPRND (src1) = CPU (h_gr[f_r1]);
1016       OPRND (src2) = CPU (h_gr[f_r2]);
1017 #undef OPRND
1018     }
1019     BREAK (read);
1020
1021     CASE (read, READ_FMT_65_SC) : /* e.g. sc */
1022     {
1023 #define OPRND(f) par_exec->operands.fmt_65_sc.f
1024   EXTRACT_FMT_65_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
1025   EXTRACT_FMT_65_SC_CODE
1026
1027       /* Fetch the input operands for the semantic handler.  */
1028       OPRND (condbit) = CPU (h_cond);
1029 #undef OPRND
1030     }
1031     BREAK (read);
1032
1033     }
1034   ENDSWITCH (read) /* End of read switch.  */
1035 }
1036
1037 #endif /* DEFINE_SWITCH */