sim/mips/ChangeLog

   1 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * configure: Regenerate.
   4
   5 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * configure: Regenerate.
   8
   9 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  10
  11         * configure: Regenerate.
  12
  13 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  14
  15         * configure: Regenerate.
  16
  17 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  18
  19         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
  20         * configure: Regenerate.
  21
  22 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  23
  24         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
  25         * configure: Regenerate.
  26
  27 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  28
  29         * configure: Regenerate.
  30
  31 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  32
  33         * configure: Regenerate.
  34
  35 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
  36
  37         * config.in, configure: Regenerate.
  38
  39 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
  40
  41         * interp.c (sim_open): Mark argv const.
  42         (sim_create_inferior): Mark argv and env const.
  43
  44 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
  45
  46         * configure: Regenerate.
  47
  48 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
  49
  50         * interp.c (sim_open): Update sim_parse_args comment.
  51
  52 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
  53
  54         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
  55         * configure: Regenerate.
  56
  57 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
  58
  59         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
  60         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
  61         * configure: Regenerate.
  62         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
  63
  64 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
  65
  66         * dv-tx3904cpu.c (CPU, SD): Delete.
  67
  68 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
  69
  70         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
  71         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
  72         (sim_store_register): Rename to ...
  73         (mips_reg_store): ... this.  Delete local cpu var.
  74         Update sim_io_eprintf calls.
  75         (sim_fetch_register): Rename to ...
  76         (mips_reg_fetch): ... this.  Delete local cpu var.
  77         Update sim_io_eprintf calls.
  78
  79 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
  80
  81         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
  82
  83 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
  84
  85         * config.in, configure: Regenerate.
  86
  87 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
  88
  89         * interp.c (sim_write, sim_read): Delete.
  90         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
  91         (load_word): Likewise.
  92         * micromips.igen (cache): Likewise.
  93         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
  94         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
  95         do_store_left, do_store_right, do_load_double, do_store_double):
  96         Likewise.
  97         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
  98         (do_prefx): Likewise.
  99         * sim-main.c (address_translation, prefetch): Delete.
 100         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 101         paddr=vaddr.
 102         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 103         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 104         (LoadMemory, StoreMemory): Delete CCA arg.
 105
 106 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 107
 108         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 109         * configure: Regenerated.
 110
 111 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 112
 113         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 114         * tconfig.h: Delete.
 115
 116 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 117
 118         * tconfig.h (SIM_HANDLES_LMA): Delete.
 119
 120 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 121
 122         * sim-main.h (WITH_WATCHPOINTS): Delete.
 123
 124 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 125
 126         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 127
 128 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 129
 130         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 131
 132 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 133
 134         * micromips.igen (process_isa_mode): Fix left shift of negative
 135         value.
 136
 137 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 138
 139         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 140
 141 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 142
 143         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 144
 145 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 146
 147         * interp.c (sim_close): Rename to ...
 148         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 149         sim_io_shutdown.
 150         * sim-main.h (mips_sim_close): Declare.
 151         (SIM_CLOSE_HOOK): Define.
 152
 153 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 154             Ali Lown  <ali.lown@imgtec.com>
 155
 156         * Makefile.in (tmp-micromips): New rule.
 157         (tmp-mach-multi): Add support for micromips.
 158         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 159         that works for both mips64 and micromips64.
 160         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 161         micromips32.
 162         Add build support for micromips.
 163         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 164         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 165         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 166         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 167         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 168         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 169         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 170         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 171         Refactored instruction code to use these functions.
 172         * dsp2.igen: Refactored instruction code to use the new functions.
 173         * interp.c (decode_coproc): Refactored to work with any instruction
 174         encoding.
 175         (isa_mode): New variable
 176         (RSVD_INSTRUCTION): Changed to 0x00000039.
 177         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 178         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 179         * micromips.dc: New file.
 180         * micromips.igen: New file.
 181         * micromips16.dc: New file.
 182         * micromipsdsp.igen: New file.
 183         * micromipsrun.c: New file.
 184         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 185         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 186         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 187         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 188         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 189         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 190         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 191         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 192         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 193         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 194         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 195         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 196         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 197         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 198         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 199         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 200         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 201         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 202         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 203         instructions.
 204         Refactored instruction code to use these functions.
 205         (RSVD): Changed to use new reserved instruction.
 206         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 207         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 208         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 209         do_store_double):  Added micromips32 and micromips64 models.
 210         Added include for micromips.igen and micromipsdsp.igen
 211         Add micromips32 and micromips64 models.
 212         (DecodeCoproc): Updated to use new macro definition.
 213         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 214         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 215         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 216         Refactored instruction code to use these functions.
 217         * sim-main.h (CP0_operation): New enum.
 218         (DecodeCoproc): Updated macro.
 219         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 220         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 221         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 222         ISA_MODE_MICROMIPS): New defines.
 223         (sim_state): Add isa_mode field.
 224
 225 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 226
 227         * configure: Regenerate.
 228
 229 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 230
 231         * configure.ac: Change configure.in to configure.ac.
 232         * configure: Regenerate.
 233
 234 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 235
 236         * configure: Regenerate.
 237
 238 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 239
 240         * interp.c [TRACE]: Delete.
 241         (TRACE): Change to WITH_TRACE_ANY_P.
 242         [!WITH_TRACE_ANY_P] (open_trace): Define.
 243         (mips_option_handler, open_trace, sim_close, dotrace):
 244         Change defined(TRACE) to WITH_TRACE_ANY_P.
 245         (sim_open): Delete TRACE ifdef check.
 246         * sim-main.c (load_memory): Delete TRACE ifdef check.
 247         (store_memory): Likewise.
 248         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 249         [!WITH_TRACE_ANY_P] (dotrace): Define.
 250
 251 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 252
 253         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 254         comments.
 255
 256 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 257
 258         * sim-main.h (SIM_CPU): Delete.
 259
 260 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 261
 262         * sim-main.h (sim_cia): Delete.
 263
 264 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 265
 266         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 267         PU_PC_GET.
 268         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 269         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 270         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 271         CIA_SET to CPU_PC_SET.
 272         * sim-main.h (CIA_GET, CIA_SET): Delete.
 273
 274 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 275
 276         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 277         * sim-main.h (STATE_CPU): Delete.
 278
 279 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 280
 281         * configure: Regenerate.
 282
 283 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 284
 285         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 286         * interp.c (mips_pc_get, mips_pc_set): New functions.
 287         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 288         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 289         (sim_pc_get): Delete.
 290         * sim-main.h (SIM_CPU): Define.
 291         (struct sim_state): Change cpu to an array of pointers.
 292         (STATE_CPU): Drop &.
 293
 294 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 295
 296         * interp.c (mips_option_handler, open_trace, sim_close,
 297         sim_write, sim_read, sim_store_register, sim_fetch_register,
 298         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 299         prototypes.
 300         (sim_open): Convert old style prototype.  Change casts with
 301         sim_write to unsigned char *.
 302         (fetch_str): Change null to unsigned char, and change cast to
 303         unsigned char *.
 304         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 305         unsigned char *.
 306
 307 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 308
 309         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 310
 311 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 312
 313         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 314
 315 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 316
 317         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 318
 319 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 320
 321         * config.in, configure: Regenerate.
 322
 323 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 324
 325         * interp.c (sim_pc_get): New function.
 326
 327 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 328
 329         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 330         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 331
 332 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 333
 334         * configure: Regenerate.
 335
 336 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 337
 338         * configure: Regenerate.
 339
 340 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 341
 342         * configure: Regenerate.
 343         * configure.ac (mips_extra_objs): Delete.
 344         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 345         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 346
 347 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 348
 349         * configure: Regenerate.
 350         * configure.ac: Delete sim_hw checks for dv-sockser.
 351
 352 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 353
 354         * config.in, configure: Regenerate.
 355         * tconfig.in: Rename file ...
 356         * tconfig.h: ... here.
 357
 358 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 359
 360         * tconfig.in: Delete includes.
 361         [HAVE_DV_SOCKSER]: Delete.
 362
 363 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 364
 365         * Makefile.in (SIM_RUN_OBJS): Delete.
 366
 367 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 368
 369         * configure.ac (AC_CHECK_HEADERS): Delete.
 370         * aclocal.m4, configure: Regenerate.
 371
 372 2014-08-19  Alan Modra  <amodra@gmail.com>
 373
 374         * configure: Regenerate.
 375
 376 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 377
 378         * configure: Regenerate.
 379         * config.in: Regenerate.
 380
 381 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 382
 383         * configure: Regenerate.
 384
 385 2013-09-23  Alan Modra  <amodra@gmail.com>
 386
 387         * configure: Regenerate.
 388
 389 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 390
 391         * aclocal.m4, configure: Regenerate.
 392
 393 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 394
 395         * configure: Rebuild.
 396
 397 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 398
 399         * configure: Regenerate.
 400
 401 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 402
 403         * configure.ac: Address use of dv-sockser.o.
 404         * tconfig.in: Conditionalize use of dv_sockser_install.
 405         * configure: Regenerated.
 406         * config.in: Regenerated.
 407
 408 2012-10-04  Chao-ying Fu  <fu@mips.com>
 409             Steve Ellcey  <sellcey@mips.com>
 410
 411         * mips/mips3264r2.igen (rdhwr): New.
 412
 413 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 414
 415         * configure.ac: Always link against dv-sockser.o.
 416         * configure: Regenerate.
 417
 418 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 419
 420         * config.in, configure: Regenerate.
 421
 422 2012-05-18  Nick Clifton  <nickc@redhat.com>
 423
 424         PR 14072
 425         * interp.c: Include config.h before system header files.
 426
 427 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 428
 429         * aclocal.m4, config.in, configure: Regenerate.
 430
 431 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 432
 433         * aclocal.m4: New file.
 434         * configure: Regenerate.
 435
 436 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 437
 438         * configure: Regenerate after common/acinclude.m4 update.
 439
 440 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 441
 442         * configure.ac: Change include to common/acinclude.m4.
 443
 444 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 445
 446         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 447         call.  Replace common.m4 include with SIM_AC_COMMON.
 448         * configure: Regenerate.
 449
 450 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 451
 452         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 453         $(SIM_EXTRA_DEPS).
 454         (tmp-mach-multi): Exit early when igen fails.
 455
 456 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 457
 458         * interp.c (sim_do_command): Delete.
 459
 460 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 461
 462         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 463         (tx3904sio_fifo_reset): Likewise.
 464         * interp.c (sim_monitor): Likewise.
 465
 466 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 467
 468         * interp.c (sim_write): Add const to buffer arg.
 469
 470 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 471
 472         * interp.c: Don't include sysdep.h
 473
 474 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 475
 476         * configure: Regenerate.
 477
 478 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 479
 480         * config.in: Regenerate.
 481         * configure: Likewise.
 482
 483         * configure: Regenerate.
 484
 485 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 486
 487         * configure: Regenerate to track ../common/common.m4 changes.
 488         * config.in: Ditto.
 489
 490 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 491             Daniel Jacobowitz  <dan@codesourcery.com>
 492             Joseph Myers  <joseph@codesourcery.com>
 493
 494         * configure: Regenerate.
 495
 496 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 497
 498         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 499         that unconditionally allows fmt_ps.
 500         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 501         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 502         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 503         filter from 64,f to 32,f.
 504         (PREFX): Change filter from 64 to 32.
 505         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 506         that use do_load_double instead of do_load.  Make both LUXC1
 507         versions unpredictable if SizeFGR () != 64.
 508         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 509         instead of do_store.  Remove unused variable.  Make both SUXC1
 510         versions unpredictable if SizeFGR () != 64.
 511
 512 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 513
 514         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 515         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 516         shifts for that case.
 517
 518 2007-09-04  Nick Clifton  <nickc@redhat.com>
 519
 520         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 521         (display_mem_info): New static variable.
 522         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 523         (mips_options): Add info-memory and memory-info.
 524         (sim_open): After processing the command line and board
 525         specification, check display_mem_info.  If it is set then
 526         call the real handler for the --memory-info command line
 527         switch.
 528
 529 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 530
 531         * configure.ac: Change license of multi-run.c to GPL version 3.
 532         * configure: Regenerate.
 533
 534 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 535
 536         * configure.ac, configure: Revert last patch.
 537
 538 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 539
 540         * configure.ac (sim_mipsisa3264_configs): New variable.
 541         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 542         every configuration support all four targets, using the triplet to
 543         determine the default.
 544         * configure: Regenerate.
 545
 546 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 547
 548         * Makefile.in (m16run.o): New rule.
 549
 550 2007-05-15  Thiemo Seufer  <ths@mips.com>
 551
 552         * mips3264r2.igen (DSHD): Fix compile warning.
 553
 554 2007-05-14  Thiemo Seufer  <ths@mips.com>
 555
 556         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 557         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 558         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 559         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 560         for mips32r2.
 561
 562 2007-03-01  Thiemo Seufer  <ths@mips.com>
 563
 564         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 565         and mips64.
 566
 567 2007-02-20  Thiemo Seufer  <ths@mips.com>
 568
 569         * dsp.igen: Update copyright notice.
 570         * dsp2.igen: Fix copyright notice.
 571
 572 2007-02-20  Thiemo Seufer  <ths@mips.com>
 573             Chao-Ying Fu  <fu@mips.com>
 574
 575         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 576         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 577         Add dsp2 to sim_igen_machine.
 578         * configure: Regenerate.
 579         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 580         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 581         (mulq_rs.ph): Use do_ph_mulq.
 582         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 583         * mips.igen: Add dsp2 model and include dsp2.igen.
 584         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 585         for *mips32r2, *mips64r2, *dsp.
 586         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 587         for *mips32r2, *mips64r2, *dsp2.
 588         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 589
 590 2007-02-19  Thiemo Seufer  <ths@mips.com>
 591             Nigel Stephens  <nigel@mips.com>
 592
 593         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 594         jumps with hazard barrier.
 595
 596 2007-02-19  Thiemo Seufer  <ths@mips.com>
 597             Nigel Stephens  <nigel@mips.com>
 598
 599         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 600         after each call to sim_io_write.
 601
 602 2007-02-19  Thiemo Seufer  <ths@mips.com>
 603             Nigel Stephens  <nigel@mips.com>
 604
 605         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 606         supported by this simulator.
 607         (decode_coproc): Recognise additional CP0 Config registers
 608         correctly.
 609
 610 2007-02-19  Thiemo Seufer  <ths@mips.com>
 611             Nigel Stephens  <nigel@mips.com>
 612             David Ung  <davidu@mips.com>
 613
 614         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 615         uninterpreted formats. If fmt is one of the uninterpreted types
 616         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 617         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 618         (store_fpr): When writing an invalid odd register, set the
 619         matching even register to fmt_unknown, not the following register.
 620         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 621         the the memory window at offset 0 set by --memory-size command
 622         line option.
 623         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 624         point register.
 625         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 626         register.
 627         (sim_monitor): When returning the memory size to the MIPS
 628         application, use the value in STATE_MEM_SIZE, not an arbitrary
 629         hardcoded value.
 630         (cop_lw): Don' mess around with FPR_STATE, just pass
 631         fmt_uninterpreted_32 to StoreFPR.
 632         (cop_sw): Similarly.
 633         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 634         (cop_sd): Similarly.
 635         * mips.igen (not_word_value): Single version for mips32, mips64
 636         and mips16.
 637
 638 2007-02-19  Thiemo Seufer <ths@mips.com>
 639             Nigel Stephens  <nigel@mips.com>
 640
 641         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 642         MBytes.
 643
 644 2007-02-17  Thiemo Seufer  <ths@mips.com>
 645
 646         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 647         configuration.
 648         * configure: Regenerate.
 649
 650 2007-02-17  Thiemo Seufer  <ths@mips.com>
 651
 652         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 653         Add mdmx to sim_igen_machine.
 654         (mipsisa64*-*-*): Likewise. Remove dsp.
 655         (mipsisa32*-*-*): Remove dsp.
 656         * configure: Regenerate.
 657
 658 2007-02-13  Thiemo Seufer  <ths@mips.com>
 659
 660         * configure.ac: Add mips*-sde-elf* target.
 661         * configure: Regenerate.
 662
 663 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 664
 665         * acconfig.h: Remove.
 666         * config.in, configure: Regenerate.
 667
 668 2006-11-07  Thiemo Seufer  <ths@mips.com>
 669
 670         * dsp.igen (do_w_op): Fix compiler warning.
 671
 672 2006-08-29  Thiemo Seufer  <ths@mips.com>
 673             David Ung  <davidu@mips.com>
 674
 675         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 676         sim_igen_machine.
 677         * configure: Regenerate.
 678         * mips.igen (model): Add smartmips.
 679         (MADDU): Increment ACX if carry.
 680         (do_mult): Clear ACX.
 681         (ROR,RORV): Add smartmips.
 682         (include): Include smartmips.igen.
 683         * sim-main.h (ACX): Set to REGISTERS[89].
 684         * smartmips.igen: New file.
 685
 686 2006-08-29  Thiemo Seufer  <ths@mips.com>
 687             David Ung  <davidu@mips.com>
 688
 689         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 690         mips3264r2.igen. Add missing dependency rules.
 691         * m16e.igen: Support for mips16e save/restore instructions.
 692
 693 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 694
 695         * configure: Regenerated.
 696
 697 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 698
 699         * configure: Regenerated.
 700
 701 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 702
 703         * configure: Regenerated.
 704
 705 2006-05-15 Chao-ying Fu  <fu@mips.com>
 706
 707         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 708
 709 2006-04-18  Nick Clifton  <nickc@redhat.com>
 710
 711         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 712         statement.
 713
 714 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 715
 716         * configure: Regenerate.
 717
 718 2005-12-14  Chao-ying Fu  <fu@mips.com>
 719
 720         * Makefile.in (SIM_OBJS): Add dsp.o.
 721         (dsp.o): New dependency.
 722         (IGEN_INCLUDE): Add dsp.igen.
 723         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 724         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 725         * configure: Regenerate.
 726         * mips.igen: Add dsp model and include dsp.igen.
 727         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 728         because these instructions are extended in DSP ASE.
 729         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 730         adding 6 DSP accumulator registers and 1 DSP control register.
 731         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 732         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 733         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 734         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 735         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 736         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 737         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 738         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 739         DSPCR_CCOND_SMASK): New define.
 740         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 741         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 742
 743 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 744
 745         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 746
 747 2005-06-16  David Ung  <davidu@mips.com>
 748             Nigel Stephens  <nigel@mips.com>
 749
 750         * mips.igen: New mips16e model and include m16e.igen.
 751         (check_u64): Add mips16e tag.
 752         * m16e.igen: New file for MIPS16e instructions.
 753         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 754         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 755         models.
 756         * configure: Regenerate.
 757
 758 2005-05-26  David Ung  <davidu@mips.com>
 759
 760         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 761         tags to all instructions which are applicable to the new ISAs.
 762         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 763         vr.igen.
 764         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 765         instructions.
 766         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 767         to mips.igen.
 768         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 769         * configure: Regenerate.
 770
 771 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 772
 773         * configure: Regenerate.
 774
 775 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 776
 777         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 778         explicit call to AC_CONFIG_HEADER.
 779         * configure: Regenerate.
 780
 781 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 782
 783         * configure.ac: Update to use ../common/common.m4.
 784         * configure: Re-generate.
 785
 786 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 787
 788         * configure: Regenerated to track ../common/aclocal.m4 changes.
 789
 790 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 791
 792         * configure.ac: Rename configure.in, require autoconf 2.59.
 793         * configure: Re-generate.
 794
 795 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 796
 797         * configure: Regenerate for ../common/aclocal.m4 update.
 798
 799 2004-09-24  Monika Chaddha  <monika@acmet.com>
 800
 801         Committed by Andrew Cagney.
 802         * m16.igen (CMP, CMPI): Fix assembler.
 803
 804 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 805
 806         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 807         * configure: Regenerate.
 808
 809 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 810
 811         * configure.in (sim_m16_machine): Include mipsIII.
 812         * configure: Regenerate.
 813
 814 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 815
 816         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 817         from COP0_BADVADDR.
 818         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 819
 820 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 821
 822         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 823
 824 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 825
 826         * mips.igen (check_fmt): Remove.
 827         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 828         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 829         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 830         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 831         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 832         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 833         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 834         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 835         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 836         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 837
 838 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 839
 840         * sb1.igen (check_sbx): New function.
 841         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 842
 843 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 844             Richard Sandiford  <rsandifo@redhat.com>
 845
 846         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 847         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 848         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 849         separate implementations for mipsIV and mipsV.  Use new macros to
 850         determine whether the restrictions apply.
 851
 852 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 853
 854         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 855         (check_mult_hilo): Improve comments.
 856         (check_div_hilo): Likewise.  Also, fork off a new version
 857         to handle mips32/mips64 (since there are no hazards to check
 858         in MIPS32/MIPS64).
 859
 860 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 861
 862         * mips.igen (do_dmultx): Fix check for negative operands.
 863
 864 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 865
 866         * Makefile.in (SHELL): Make sure this is defined.
 867         (various): Use $(SHELL) whenever we invoke move-if-change.
 868
 869 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 870
 871         * cp1.c: Tweak attribution slightly.
 872         * cp1.h: Likewise.
 873         * mdmx.c: Likewise.
 874         * mdmx.igen: Likewise.
 875         * mips3d.igen: Likewise.
 876         * sb1.igen: Likewise.
 877
 878 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 879
 880         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 881         unsigned operands.
 882
 883 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 884
 885         * interp.c (sim_open): Rename _bfd to bfd.
 886         (sim_create_inferior): Ditto.
 887
 888 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 889
 890         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 891
 892 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 893
 894         * mips.igen (EI, DI): Remove.
 895
 896 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 897
 898         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 899
 900 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 901             Andrew Cagney  <ac131313@redhat.com>
 902             Gavin Romig-Koch  <gavin@redhat.com>
 903             Graydon Hoare  <graydon@redhat.com>
 904             Aldy Hernandez  <aldyh@redhat.com>
 905             Dave Brolley  <brolley@redhat.com>
 906             Chris Demetriou  <cgd@broadcom.com>
 907
 908         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 909         (sim_mach_default): New variable.
 910         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 911         Add a new simulator generator, MULTI.
 912         * configure: Regenerate.
 913         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 914         (multi-run.o): New dependency.
 915         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 916         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 917         (tmp-multi): Combine them.
 918         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 919         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 920         (distclean-extra): New rule.
 921         * sim-main.h: Include bfd.h.
 922         (MIPS_MACH): New macro.
 923         * mips.igen (vr4120, vr5400, vr5500): New models.
 924         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 925         * vr.igen: Replace with new version.
 926
 927 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 928
 929         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 930         * configure: Regenerate.
 931
 932 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 933
 934         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 935         * mips.igen: Remove all invocations of check_branch_bug and
 936         mark_branch_bug.
 937
 938 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 939
 940         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 941
 942 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 943
 944         * mips.igen (do_load_double, do_store_double): New functions.
 945         (LDC1, SDC1): Rename to...
 946         (LDC1b, SDC1b): respectively.
 947         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 948
 949 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 950
 951         * cp1.c (fp_recip2): Modify initialization expression so that
 952         GCC will recognize it as constant.
 953
 954 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 955
 956         * mdmx.c (SD_): Delete.
 957         (Unpredictable): Re-define, for now, to directly invoke
 958         unpredictable_action().
 959         (mdmx_acc_op): Fix error in .ob immediate handling.
 960
 961 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 962
 963         * interp.c (sim_firmware_command): Initialize `address'.
 964
 965 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 966
 967         * configure: Regenerated to track ../common/aclocal.m4 changes.
 968
 969 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 970             Ed Satterthwaite  <ehs@broadcom.com>
 971
 972         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 973         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 974         * mips.igen: Include mips3d.igen.
 975         (mips3d): New model name for MIPS-3D ASE instructions.
 976         (CVT.W.fmt): Don't use this instruction for word (source) format
 977         instructions.
 978         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 979         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 980         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 981         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 982         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 983         (RSquareRoot1, RSquareRoot2): New macros.
 984         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 985         (fp_rsqrt2): New functions.
 986         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 987         * configure: Regenerate.
 988
 989 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 990             Ed Satterthwaite  <ehs@broadcom.com>
 991
 992         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 993         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 994         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 995         (convert): Note that this function is not used for paired-single
 996         format conversions.
 997         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 998         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 999         (check_fmt_p): Enable paired-single support.
1000         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1001         (PUU.PS): New instructions.
1002         (CVT.S.fmt): Don't use this instruction for paired-single format
1003         destinations.
1004         * sim-main.h (FP_formats): New value 'fmt_ps.'
1005         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1006         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1007
1008 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1009
1010         * mips.igen: Fix formatting of function calls in
1011         many FP operations.
1012
1013 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1014
1015         * mips.igen (MOVN, MOVZ): Trace result.
1016         (TNEI): Print "tnei" as the opcode name in traces.
1017         (CEIL.W): Add disassembly string for traces.
1018         (RSQRT.fmt): Make location of disassembly string consistent
1019         with other instructions.
1020
1021 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1022
1023         * mips.igen (X): Delete unused function.
1024
1025 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1026
1027         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1028
1029 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1030             Ed Satterthwaite  <ehs@broadcom.com>
1031
1032         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1033         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1034         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1035         (fp_nmsub): New prototypes.
1036         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1037         (NegMultiplySub): New defines.
1038         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1039         (MADD.D, MADD.S): Replace with...
1040         (MADD.fmt): New instruction.
1041         (MSUB.D, MSUB.S): Replace with...
1042         (MSUB.fmt): New instruction.
1043         (NMADD.D, NMADD.S): Replace with...
1044         (NMADD.fmt): New instruction.
1045         (NMSUB.D, MSUB.S): Replace with...
1046         (NMSUB.fmt): New instruction.
1047
1048 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1049             Ed Satterthwaite  <ehs@broadcom.com>
1050
1051         * cp1.c: Fix more comment spelling and formatting.
1052         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1053         (denorm_mode): New function.
1054         (fpu_unary, fpu_binary): Round results after operation, collect
1055         status from rounding operations, and update the FCSR.
1056         (convert): Collect status from integer conversions and rounding
1057         operations, and update the FCSR.  Adjust NaN values that result
1058         from conversions.  Convert to use sim_io_eprintf rather than
1059         fprintf, and remove some debugging code.
1060         * cp1.h (fenr_FS): New define.
1061
1062 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1063
1064         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1065         rounding mode to sim FP rounding mode flag conversion code into...
1066         (rounding_mode): New function.
1067
1068 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1069
1070         * cp1.c: Clean up formatting of a few comments.
1071         (value_fpr): Reformat switch statement.
1072
1073 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1074             Ed Satterthwaite  <ehs@broadcom.com>
1075
1076         * cp1.h: New file.
1077         * sim-main.h: Include cp1.h.
1078         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1079         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1080         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1081         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1082         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1083         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1084         * cp1.c: Don't include sim-fpu.h; already included by
1085         sim-main.h.  Clean up formatting of some comments.
1086         (NaN, Equal, Less): Remove.
1087         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1088         (fp_cmp): New functions.
1089         * mips.igen (do_c_cond_fmt): Remove.
1090         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1091         Compare.  Add result tracing.
1092         (CxC1): Remove, replace with...
1093         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1094         (DMxC1): Remove, replace with...
1095         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1096         (MxC1): Remove, replace with...
1097         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1098
1099 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1100
1101         * sim-main.h (FGRIDX): Remove, replace all uses with...
1102         (FGR_BASE): New macro.
1103         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1104         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1105         (NR_FGR, FGR): Likewise.
1106         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1107         * mips.igen: Likewise.
1108
1109 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1110
1111         * cp1.c: Add an FSF Copyright notice to this file.
1112
1113 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1114             Ed Satterthwaite  <ehs@broadcom.com>
1115
1116         * cp1.c (Infinity): Remove.
1117         * sim-main.h (Infinity): Likewise.
1118
1119         * cp1.c (fp_unary, fp_binary): New functions.
1120         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1121         (fp_sqrt): New functions, implemented in terms of the above.
1122         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1123         (Recip, SquareRoot): Remove (replaced by functions above).
1124         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1125         (fp_recip, fp_sqrt): New prototypes.
1126         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1127         (Recip, SquareRoot): Replace prototypes with #defines which
1128         invoke the functions above.
1129
1130 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1131
1132         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1133         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1134         file, remove PARAMS from prototypes.
1135         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1136         simulator state arguments.
1137         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1138         pass simulator state arguments.
1139         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1140         (store_fpr, convert): Remove 'sd' argument.
1141         (value_fpr): Likewise.  Convert to use 'SD' instead.
1142
1143 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1144
1145         * cp1.c (Min, Max): Remove #if 0'd functions.
1146         * sim-main.h (Min, Max): Remove.
1147
1148 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1149
1150         * cp1.c: fix formatting of switch case and default labels.
1151         * interp.c: Likewise.
1152         * sim-main.c: Likewise.
1153
1154 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1155
1156         * cp1.c: Clean up comments which describe FP formats.
1157          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1158
1159 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1160             Ed Satterthwaite  <ehs@broadcom.com>
1161
1162         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1163         Broadcom SiByte SB-1 processor configurations.
1164         * configure: Regenerate.
1165         * sb1.igen: New file.
1166         * mips.igen: Include sb1.igen.
1167         (sb1): New model.
1168         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1169         * mdmx.igen: Add "sb1" model to all appropriate functions and
1170         instructions.
1171         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1172         (ob_func, ob_acc): Reference the above.
1173         (qh_acc): Adjust to keep the same size as ob_acc.
1174         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1175         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1176
1177 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1178
1179         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1180
1181 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1182             Ed Satterthwaite  <ehs@broadcom.com>
1183
1184         * mips.igen (mdmx): New (pseudo-)model.
1185         * mdmx.c, mdmx.igen: New files.
1186         * Makefile.in (SIM_OBJS): Add mdmx.o.
1187         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1188         New typedefs.
1189         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1190         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1191         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1192         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1193         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1194         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1195         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1196         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1197         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1198         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1199         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1200         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1201         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1202         (qh_fmtsel): New macros.
1203         (_sim_cpu): New member "acc".
1204         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1205         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1206
1207 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1208
1209         * interp.c: Use 'deprecated' rather than 'depreciated.'
1210         * sim-main.h: Likewise.
1211
1212 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1213
1214         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1215         which wouldn't compile anyway.
1216         * sim-main.h (unpredictable_action): New function prototype.
1217         (Unpredictable): Define to call igen function unpredictable().
1218         (NotWordValue): New macro to call igen function not_word_value().
1219         (UndefinedResult): Remove.
1220         * interp.c (undefined_result): Remove.
1221         (unpredictable_action): New function.
1222         * mips.igen (not_word_value, unpredictable): New functions.
1223         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1224         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1225         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1226         NotWordValue() to check for unpredictable inputs, then
1227         Unpredictable() to handle them.
1228
1229 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1230
1231         * mips.igen: Fix formatting of calls to Unpredictable().
1232
1233 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1234
1235         * interp.c (sim_open): Revert previous change.
1236
1237 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1238
1239         * interp.c (sim_open): Disable chunk of code that wrote code in
1240         vector table entries.
1241
1242 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1243
1244         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1245         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1246         unused definitions.
1247
1248 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1249
1250         * cp1.c: Fix many formatting issues.
1251
1252 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1253
1254         * cp1.c (fpu_format_name): New function to replace...
1255         (DOFMT): This.  Delete, and update all callers.
1256         (fpu_rounding_mode_name): New function to replace...
1257         (RMMODE): This.  Delete, and update all callers.
1258
1259 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1260
1261         * interp.c: Move FPU support routines from here to...
1262         * cp1.c: Here.  New file.
1263         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1264         (cp1.o): New target.
1265
1266 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1267
1268         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1269         * mips.igen (mips32, mips64): New models, add to all instructions
1270         and functions as appropriate.
1271         (loadstore_ea, check_u64): New variant for model mips64.
1272         (check_fmt_p): New variant for models mipsV and mips64, remove
1273         mipsV model marking fro other variant.
1274         (SLL) Rename to...
1275         (SLLa) this.
1276         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1277         for mips32 and mips64.
1278         (DCLO, DCLZ): New instructions for mips64.
1279
1280 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1281
1282         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1283         immediate or code as a hex value with the "%#lx" format.
1284         (ANDI): Likewise, and fix printed instruction name.
1285
1286 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1287
1288         * sim-main.h (UndefinedResult, Unpredictable): New macros
1289         which currently do nothing.
1290
1291 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1292
1293         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1294         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1295         (status_CU3): New definitions.
1296
1297         * sim-main.h (ExceptionCause): Add new values for MIPS32
1298         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1299         for DebugBreakPoint and NMIReset to note their status in
1300         MIPS32 and MIPS64.
1301         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1302         (SignalExceptionCacheErr): New exception macros.
1303
1304 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1305
1306         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1307         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1308         is always enabled.
1309         (SignalExceptionCoProcessorUnusable): Take as argument the
1310         unusable coprocessor number.
1311
1312 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1313
1314         * mips.igen: Fix formatting of all SignalException calls.
1315
1316 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1317
1318         * sim-main.h (SIGNEXTEND): Remove.
1319
1320 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1321
1322         * mips.igen: Remove gencode comment from top of file, fix
1323         spelling in another comment.
1324
1325 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1326
1327         * mips.igen (check_fmt, check_fmt_p): New functions to check
1328         whether specific floating point formats are usable.
1329         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1330         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1331         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1332         Use the new functions.
1333         (do_c_cond_fmt): Remove format checks...
1334         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1335
1336 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1337
1338         * mips.igen: Fix formatting of check_fpu calls.
1339
1340 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1341
1342         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1343
1344 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1345
1346         * mips.igen: Remove whitespace at end of lines.
1347
1348 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1349
1350         * mips.igen (loadstore_ea): New function to do effective
1351         address calculations.
1352         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1353         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1354         CACHE): Use loadstore_ea to do effective address computations.
1355
1356 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1357
1358         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1359         * mips.igen (LL, CxC1, MxC1): Likewise.
1360
1361 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1362
1363         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1364         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1365         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1366         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1367         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1368         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1369         Don't split opcode fields by hand, use the opcode field values
1370         provided by igen.
1371
1372 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1373
1374         * mips.igen (do_divu): Fix spacing.
1375
1376         * mips.igen (do_dsllv): Move to be right before DSLLV,
1377         to match the rest of the do_<shift> functions.
1378
1379 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1380
1381         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1382         DSRL32, do_dsrlv): Trace inputs and results.
1383
1384 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1385
1386         * mips.igen (CACHE): Provide instruction-printing string.
1387
1388         * interp.c (signal_exception): Comment tokens after #endif.
1389
1390 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1391
1392         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1393         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1394         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1395         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1396         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1397         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1398         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1399         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1400
1401 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1402
1403         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1404         instruction-printing string.
1405         (LWU): Use '64' as the filter flag.
1406
1407 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1408
1409         * mips.igen (SDXC1): Fix instruction-printing string.
1410
1411 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1412
1413         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1414         filter flags "32,f".
1415
1416 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1417
1418         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1419         as the filter flag.
1420
1421 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1422
1423         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1424         add a comma) so that it more closely match the MIPS ISA
1425         documentation opcode partitioning.
1426         (PREF): Put useful names on opcode fields, and include
1427         instruction-printing string.
1428
1429 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1430
1431         * mips.igen (check_u64): New function which in the future will
1432         check whether 64-bit instructions are usable and signal an
1433         exception if not.  Currently a no-op.
1434         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1435         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1436         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1437         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1438
1439         * mips.igen (check_fpu): New function which in the future will
1440         check whether FPU instructions are usable and signal an exception
1441         if not.  Currently a no-op.
1442         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1443         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1444         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1445         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1446         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1447         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1448         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1449         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1450
1451 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1452
1453         * mips.igen (do_load_left, do_load_right): Move to be immediately
1454         following do_load.
1455         (do_store_left, do_store_right): Move to be immediately following
1456         do_store.
1457
1458 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1459
1460         * mips.igen (mipsV): New model name.  Also, add it to
1461         all instructions and functions where it is appropriate.
1462
1463 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1464
1465         * mips.igen: For all functions and instructions, list model
1466         names that support that instruction one per line.
1467
1468 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1469
1470         * mips.igen: Add some additional comments about supported
1471         models, and about which instructions go where.
1472         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1473         order as is used in the rest of the file.
1474
1475 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1476
1477         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1478         indicating that ALU32_END or ALU64_END are there to check
1479         for overflow.
1480         (DADD): Likewise, but also remove previous comment about
1481         overflow checking.
1482
1483 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1484
1485         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1486         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1487         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1488         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1489         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1490         fields (i.e., add and move commas) so that they more closely
1491         match the MIPS ISA documentation opcode partitioning.
1492
1493 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1494
1495         * mips.igen (ADDI): Print immediate value.
1496         (BREAK): Print code.
1497         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1498         (SLL): Print "nop" specially, and don't run the code
1499         that does the shift for the "nop" case.
1500
1501 2001-11-17  Fred Fish  <fnf@redhat.com>
1502
1503         * sim-main.h (float_operation): Move enum declaration outside
1504         of _sim_cpu struct declaration.
1505
1506 2001-04-12  Jim Blandy  <jimb@redhat.com>
1507
1508         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1509         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1510         set of the FCSR.
1511         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1512         PENDING_FILL, and you can get the intended effect gracefully by
1513         calling PENDING_SCHED directly.
1514
1515 2001-02-23  Ben Elliston  <bje@redhat.com>
1516
1517         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1518         already defined elsewhere.
1519
1520 2001-02-19  Ben Elliston  <bje@redhat.com>
1521
1522         * sim-main.h (sim_monitor): Return an int.
1523         * interp.c (sim_monitor): Add return values.
1524         (signal_exception): Handle error conditions from sim_monitor.
1525
1526 2001-02-08  Ben Elliston  <bje@redhat.com>
1527
1528         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1529         (store_memory): Likewise, pass cia to sim_core_write*.
1530
1531 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1532
1533         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1534         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1535
1536 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1537
1538         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1539         * Makefile.in: Don't delete *.igen when cleaning directory.
1540
1541 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1542
1543         * m16.igen (break): Call SignalException not sim_engine_halt.
1544
1545 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1546
1547         From Jason Eckhardt:
1548         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1549
1550 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1551
1552         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1553
1554 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1555
1556         * mips.igen (do_dmultx): Fix typo.
1557
1558 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1559
1560         * configure: Regenerated to track ../common/aclocal.m4 changes.
1561
1562 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1563
1564         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1565
1566 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1567
1568         * sim-main.h (GPR_CLEAR): Define macro.
1569
1570 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1571
1572         * interp.c (decode_coproc): Output long using %lx and not %s.
1573
1574 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1575
1576         * interp.c (sim_open): Sort & extend dummy memory regions for
1577         --board=jmr3904 for eCos.
1578
1579 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1580
1581         * configure: Regenerated.
1582
1583 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1584
1585         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1586         calls, conditional on the simulator being in verbose mode.
1587
1588 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1589
1590         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1591         cache don't get ReservedInstruction traps.
1592
1593 1999-11-29  Mark Salter  <msalter@cygnus.com>
1594
1595         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1596         to clear status bits in sdisr register. This is how the hardware works.
1597
1598         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1599         being used by cygmon.
1600
1601 1999-11-11  Andrew Haley  <aph@cygnus.com>
1602
1603         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1604         instructions.
1605
1606 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1607
1608         * mips.igen (MULT): Correct previous mis-applied patch.
1609
1610 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1611
1612         * mips.igen (delayslot32): Handle sequence like
1613         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1614         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1615         (MULT): Actually pass the third register...
1616
1617 1999-09-03  Mark Salter  <msalter@cygnus.com>
1618
1619         * interp.c (sim_open): Added more memory aliases for additional
1620         hardware being touched by cygmon on jmr3904 board.
1621
1622 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1623
1624         * configure: Regenerated to track ../common/aclocal.m4 changes.
1625
1626 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1627
1628         * interp.c (sim_store_register): Handle case where client - GDB -
1629         specifies that a 4 byte register is 8 bytes in size.
1630         (sim_fetch_register): Ditto.
1631
1632 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1633
1634         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1635         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1636         (idt_monitor_base): Base address for IDT monitor traps.
1637         (pmon_monitor_base): Ditto for PMON.
1638         (lsipmon_monitor_base): Ditto for LSI PMON.
1639         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1640         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1641         (sim_firmware_command): New function.
1642         (mips_option_handler): Call it for OPTION_FIRMWARE.
1643         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1644         option was given, add no monitor by default.  Add BREAK hooks only if
1645         monitors are also there.
1646
1647 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1648
1649         * interp.c (sim_monitor): Flush output before reading input.
1650
1651 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1652
1653         * tconfig.in (SIM_HANDLES_LMA): Always define.
1654
1655 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1656
1657         From Mark Salter <msalter@cygnus.com>:
1658         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1659         (sim_open): Add setup for BSP board.
1660
1661 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1662
1663         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1664         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1665         them as unimplemented.
1666
1667 1999-05-08  Felix Lee  <flee@cygnus.com>
1668
1669         * configure: Regenerated to track ../common/aclocal.m4 changes.
1670
1671 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1672
1673         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1674
1675 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1676
1677         * configure.in: Any mips64vr5*-*-* target should have
1678         -DTARGET_ENABLE_FR=1.
1679         (default_endian): Any mips64vr*el-*-* target should default to
1680         LITTLE_ENDIAN.
1681         * configure: Re-generate.
1682
1683 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1684
1685         * mips.igen (ldl): Extend from _16_, not 32.
1686
1687 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1688
1689         * interp.c (sim_store_register): Force registers written to by GDB
1690         into an un-interpreted state.
1691
1692 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1693
1694         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1695         CPU, start periodic background I/O polls.
1696         (tx3904sio_poll): New function: periodic I/O poller.
1697
1698 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1699
1700         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1701
1702 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1703
1704         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1705         case statement.
1706
1707 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1708
1709         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1710         (load_word): Call SIM_CORE_SIGNAL hook on error.
1711         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1712         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1713         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1714         * sim-main.h (COP0_BADVADDR): Define.
1715         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1716         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1717         (_sim_cpu): Add exc_* fields to store register value snapshots.
1718         * mips.igen (*): Replace memory-related SignalException* calls
1719         with references to SIM_CORE_SIGNAL hook.
1720
1721         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1722         fix.
1723         * sim-main.c (*): Minor warning cleanups.
1724
1725 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1726
1727         * m16.igen (DADDIU5): Correct type-o.
1728
1729 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1730
1731         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1732         variables.
1733
1734 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1735
1736         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1737         to include path.
1738         (interp.o): Add dependency on itable.h
1739         (oengine.c, gencode): Delete remaining references.
1740         (BUILT_SRC_FROM_GEN): Clean up.
1741
1742 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1743
1744         * vr4run.c: New.
1745         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1746         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1747         tmp-run-hack) : New.
1748         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1749         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1750         Drop the "64" qualifier to get the HACK generator working.
1751         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1752         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1753         qualifier to get the hack generator working.
1754         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1755         (DSLL): Use do_dsll.
1756         (DSLLV): Use do_dsllv.
1757         (DSRA): Use do_dsra.
1758         (DSRL): Use do_dsrl.
1759         (DSRLV): Use do_dsrlv.
1760         (BC1): Move *vr4100 to get the HACK generator working.
1761         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1762         get the HACK generator working.
1763         (MACC) Rename to get the HACK generator working.
1764         (DMACC,MACCS,DMACCS): Add the 64.
1765
1766 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1767
1768         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1769         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1770
1771 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1772
1773     * mips/interp.c (DEBUG): Cleanups.
1774
1775 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1776
1777         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1778         (tx3904sio_tickle): fflush after a stdout character output.
1779
1780 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1781
1782         * interp.c (sim_close): Uninstall modules.
1783
1784 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1785
1786         * sim-main.h, interp.c (sim_monitor): Change to global
1787         function.
1788
1789 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1790
1791         * configure.in (vr4100): Only include vr4100 instructions in
1792         simulator.
1793         * configure: Re-generate.
1794         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1795
1796 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1797
1798         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1799         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1800         true alternative.
1801
1802         * configure.in (sim_default_gen, sim_use_gen): Replace with
1803         sim_gen.
1804         (--enable-sim-igen): Delete config option. Always using IGEN.
1805         * configure: Re-generate.
1806
1807         * Makefile.in (gencode): Kill, kill, kill.
1808         * gencode.c: Ditto.
1809
1810 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1811
1812         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1813         bit mips16 igen simulator.
1814         * configure: Re-generate.
1815
1816         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1817         as part of vr4100 ISA.
1818         * vr.igen: Mark all instructions as 64 bit only.
1819
1820 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1821
1822         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1823         Pacify GCC.
1824
1825 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1826
1827         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1828         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1829         * configure: Re-generate.
1830
1831         * m16.igen (BREAK): Define breakpoint instruction.
1832         (JALX32): Mark instruction as mips16 and not r3900.
1833         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1834
1835         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1836
1837 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1838
1839         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1840         insn as a debug breakpoint.
1841
1842         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1843         pending.slot_size.
1844         (PENDING_SCHED): Clean up trace statement.
1845         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1846         (PENDING_FILL): Delay write by only one cycle.
1847         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1848
1849         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1850         of pending writes.
1851         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1852         32 & 64.
1853         (pending_tick): Move incrementing of index to FOR statement.
1854         (pending_tick): Only update PENDING_OUT after a write has occured.
1855
1856         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1857         build simulator.
1858         * configure: Re-generate.
1859
1860         * interp.c (sim_engine_run OLD): Delete explicit call to
1861         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1862
1863 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1864
1865         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1866         interrupt level number to match changed SignalExceptionInterrupt
1867         macro.
1868
1869 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1870
1871         * interp.c: #include "itable.h" if WITH_IGEN.
1872         (get_insn_name): New function.
1873         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1874         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1875
1876 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1877
1878         * configure: Rebuilt to inhale new common/aclocal.m4.
1879
1880 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1881
1882         * dv-tx3904sio.c: Include sim-assert.h.
1883
1884 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1885
1886         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1887         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1888         Reorganize target-specific sim-hardware checks.
1889         * configure: rebuilt.
1890         * interp.c (sim_open): For tx39 target boards, set
1891         OPERATING_ENVIRONMENT, add tx3904sio devices.
1892         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1893         ROM executables.  Install dv-sockser into sim-modules list.
1894
1895         * dv-tx3904irc.c: Compiler warning clean-up.
1896         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1897         frequent hw-trace messages.
1898
1899 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1900
1901         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1902
1903 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1904
1905         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1906
1907         * vr.igen: New file.
1908         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1909         * mips.igen: Define vr4100 model. Include vr.igen.
1910 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1911
1912         * mips.igen (check_mf_hilo): Correct check.
1913
1914 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1915
1916         * sim-main.h (interrupt_event): Add prototype.
1917
1918         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1919         register_ptr, register_value.
1920         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1921
1922         * sim-main.h (tracefh): Make extern.
1923
1924 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1925
1926         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1927         Reduce unnecessarily high timer event frequency.
1928         * dv-tx3904cpu.c: Ditto for interrupt event.
1929
1930 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1931
1932         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1933         to allay warnings.
1934         (interrupt_event): Made non-static.
1935
1936         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1937         interchange of configuration values for external vs. internal
1938         clock dividers.
1939
1940 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1941
1942         * mips.igen (BREAK): Moved code to here for
1943         simulator-reserved break instructions.
1944         * gencode.c (build_instruction): Ditto.
1945         * interp.c (signal_exception): Code moved from here.  Non-
1946         reserved instructions now use exception vector, rather
1947         than halting sim.
1948         * sim-main.h: Moved magic constants to here.
1949
1950 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1951
1952         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1953         register upon non-zero interrupt event level, clear upon zero
1954         event value.
1955         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1956         by passing zero event value.
1957         (*_io_{read,write}_buffer): Endianness fixes.
1958         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1959         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1960
1961         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1962         serial I/O and timer module at base address 0xFFFF0000.
1963
1964 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1965
1966         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1967         and BigEndianCPU.
1968
1969 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1970
1971         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1972         parts.
1973         * configure: Update.
1974
1975 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1976
1977         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1978         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1979         * configure.in: Include tx3904tmr in hw_device list.
1980         * configure: Rebuilt.
1981         * interp.c (sim_open): Instantiate three timer instances.
1982         Fix address typo of tx3904irc instance.
1983
1984 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1985
1986         * interp.c (signal_exception): SystemCall exception now uses
1987         the exception vector.
1988
1989 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1990
1991         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1992         to allay warnings.
1993
1994 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1995
1996         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1997
1998 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1999
2000         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2001
2002         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2003         sim-main.h. Declare a struct hw_descriptor instead of struct
2004         hw_device_descriptor.
2005
2006 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2007
2008         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2009         right bits and then re-align left hand bytes to correct byte
2010         lanes.  Fix incorrect computation in do_store_left when loading
2011         bytes from second word.
2012
2013 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2014
2015         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2016         * interp.c (sim_open): Only create a device tree when HW is
2017         enabled.
2018
2019         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2020         * interp.c (signal_exception): Ditto.
2021
2022 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2023
2024         * gencode.c: Mark BEGEZALL as LIKELY.
2025
2026 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2027
2028         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2029         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2030
2031 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2032
2033         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2034         modules.  Recognize TX39 target with "mips*tx39" pattern.
2035         * configure: Rebuilt.
2036         * sim-main.h (*): Added many macros defining bits in
2037         TX39 control registers.
2038         (SignalInterrupt): Send actual PC instead of NULL.
2039         (SignalNMIReset): New exception type.
2040         * interp.c (board): New variable for future use to identify
2041         a particular board being simulated.
2042         (mips_option_handler,mips_options): Added "--board" option.
2043         (interrupt_event): Send actual PC.
2044         (sim_open): Make memory layout conditional on board setting.
2045         (signal_exception): Initial implementation of hardware interrupt
2046         handling.  Accept another break instruction variant for simulator
2047         exit.
2048         (decode_coproc): Implement RFE instruction for TX39.
2049         (mips.igen): Decode RFE instruction as such.
2050         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2051         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2052         bbegin to implement memory map.
2053         * dv-tx3904cpu.c: New file.
2054         * dv-tx3904irc.c: New file.
2055
2056 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2057
2058         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2059
2060 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2061
2062         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2063         with calls to check_div_hilo.
2064
2065 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2066
2067         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2068         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2069         Add special r3900 version of do_mult_hilo.
2070         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2071         with calls to check_mult_hilo.
2072         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2073         with calls to check_div_hilo.
2074
2075 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2076
2077         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2078         Document a replacement.
2079
2080 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2081
2082         * interp.c (sim_monitor): Make mon_printf work.
2083
2084 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2085
2086         * sim-main.h (INSN_NAME): New arg `cpu'.
2087
2088 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2089
2090         * configure: Regenerated to track ../common/aclocal.m4 changes.
2091
2092 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2093
2094         * configure: Regenerated to track ../common/aclocal.m4 changes.
2095         * config.in: Ditto.
2096
2097 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2098
2099         * acconfig.h: New file.
2100         * configure.in: Reverted change of Apr 24; use sinclude again.
2101
2102 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2103
2104         * configure: Regenerated to track ../common/aclocal.m4 changes.
2105         * config.in: Ditto.
2106
2107 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2108
2109         * configure.in: Don't call sinclude.
2110
2111 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2112
2113         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2114
2115 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2116
2117         * mips.igen (ERET): Implement.
2118
2119         * interp.c (decode_coproc): Return sign-extended EPC.
2120
2121         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2122
2123         * interp.c (signal_exception): Do not ignore Trap.
2124         (signal_exception): On TRAP, restart at exception address.
2125         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2126         (signal_exception): Update.
2127         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2128         so that TRAP instructions are caught.
2129
2130 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2131
2132         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2133         contains HI/LO access history.
2134         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2135         (HIACCESS, LOACCESS): Delete, replace with
2136         (HIHISTORY, LOHISTORY): New macros.
2137         (CHECKHILO): Delete all, moved to mips.igen
2138
2139         * gencode.c (build_instruction): Do not generate checks for
2140         correct HI/LO register usage.
2141
2142         * interp.c (old_engine_run): Delete checks for correct HI/LO
2143         register usage.
2144
2145         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2146         check_mf_cycles): New functions.
2147         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2148         do_divu, domultx, do_mult, do_multu): Use.
2149
2150         * tx.igen ("madd", "maddu"): Use.
2151
2152 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2153
2154         * mips.igen (DSRAV): Use function do_dsrav.
2155         (SRAV): Use new function do_srav.
2156
2157         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2158         (B): Sign extend 11 bit immediate.
2159         (EXT-B*): Shift 16 bit immediate left by 1.
2160         (ADDIU*): Don't sign extend immediate value.
2161
2162 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2163
2164         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2165
2166         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2167         functions.
2168
2169         * mips.igen (delayslot32, nullify_next_insn): New functions.
2170         (m16.igen): Always include.
2171         (do_*): Add more tracing.
2172
2173         * m16.igen (delayslot16): Add NIA argument, could be called by a
2174         32 bit MIPS16 instruction.
2175
2176         * interp.c (ifetch16): Move function from here.
2177         * sim-main.c (ifetch16): To here.
2178
2179         * sim-main.c (ifetch16, ifetch32): Update to match current
2180         implementations of LH, LW.
2181         (signal_exception): Don't print out incorrect hex value of illegal
2182         instruction.
2183
2184 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2185
2186         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2187         instruction.
2188
2189         * m16.igen: Implement MIPS16 instructions.
2190
2191         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2192         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2193         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2194         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2195         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2196         bodies of corresponding code from 32 bit insn to these.  Also used
2197         by MIPS16 versions of functions.
2198
2199         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2200         (IMEM16): Drop NR argument from macro.
2201
2202 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2203
2204         * Makefile.in (SIM_OBJS): Add sim-main.o.
2205
2206         * sim-main.h (address_translation, load_memory, store_memory,
2207         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2208         as INLINE_SIM_MAIN.
2209         (pr_addr, pr_uword64): Declare.
2210         (sim-main.c): Include when H_REVEALS_MODULE_P.
2211
2212         * interp.c (address_translation, load_memory, store_memory,
2213         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2214         from here.
2215         * sim-main.c: To here. Fix compilation problems.
2216
2217         * configure.in: Enable inlining.
2218         * configure: Re-config.
2219
2220 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2221
2222         * configure: Regenerated to track ../common/aclocal.m4 changes.
2223
2224 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2225
2226         * mips.igen: Include tx.igen.
2227         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2228         * tx.igen: New file, contains MADD and MADDU.
2229
2230         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2231         the hardwired constant `7'.
2232         (store_memory): Ditto.
2233         (LOADDRMASK): Move definition to sim-main.h.
2234
2235         mips.igen (MTC0): Enable for r3900.
2236         (ADDU): Add trace.
2237
2238         mips.igen (do_load_byte): Delete.
2239         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2240         do_store_right): New functions.
2241         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2242
2243         configure.in: Let the tx39 use igen again.
2244         configure: Update.
2245
2246 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2247
2248         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2249         not an address sized quantity.  Return zero for cache sizes.
2250
2251 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2252
2253         * mips.igen (r3900): r3900 does not support 64 bit integer
2254         operations.
2255
2256 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2257
2258         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2259         than igen one.
2260         * configure : Rebuild.
2261
2262 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2263
2264         * configure: Regenerated to track ../common/aclocal.m4 changes.
2265
2266 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2267
2268         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2269
2270 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2271
2272         * configure: Regenerated to track ../common/aclocal.m4 changes.
2273         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2274
2275 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2276
2277         * configure: Regenerated to track ../common/aclocal.m4 changes.
2278
2279 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2280
2281         * interp.c (Max, Min): Comment out functions. Not yet used.
2282
2283 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2284
2285         * configure: Regenerated to track ../common/aclocal.m4 changes.
2286
2287 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2288
2289         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2290         configurable settings for stand-alone simulator.
2291
2292         * configure.in: Added X11 search, just in case.
2293
2294         * configure: Regenerated.
2295
2296 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2297
2298         * interp.c (sim_write, sim_read, load_memory, store_memory):
2299         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2300
2301 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2302
2303         * sim-main.h (GETFCC): Return an unsigned value.
2304
2305 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2306
2307         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2308         (DADD): Result destination is RD not RT.
2309
2310 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2311
2312         * sim-main.h (HIACCESS, LOACCESS): Always define.
2313
2314         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2315
2316         * interp.c (sim_info): Delete.
2317
2318 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2319
2320         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2321         (mips_option_handler): New argument `cpu'.
2322         (sim_open): Update call to sim_add_option_table.
2323
2324 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2325
2326         * mips.igen (CxC1): Add tracing.
2327
2328 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2329
2330         * sim-main.h (Max, Min): Declare.
2331
2332         * interp.c (Max, Min): New functions.
2333
2334         * mips.igen (BC1): Add tracing.
2335
2336 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2337
2338         * interp.c Added memory map for stack in vr4100
2339
2340 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2341
2342         * interp.c (load_memory): Add missing "break"'s.
2343
2344 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2345
2346         * interp.c (sim_store_register, sim_fetch_register): Pass in
2347         length parameter.  Return -1.
2348
2349 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2350
2351         * interp.c: Added hardware init hook, fixed warnings.
2352
2353 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2354
2355         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2356
2357 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2358
2359         * interp.c (ifetch16): New function.
2360
2361         * sim-main.h (IMEM32): Rename IMEM.
2362         (IMEM16_IMMED): Define.
2363         (IMEM16): Define.
2364         (DELAY_SLOT): Update.
2365
2366         * m16run.c (sim_engine_run): New file.
2367
2368         * m16.igen: All instructions except LB.
2369         (LB): Call do_load_byte.
2370         * mips.igen (do_load_byte): New function.
2371         (LB): Call do_load_byte.
2372
2373         * mips.igen: Move spec for insn bit size and high bit from here.
2374         * Makefile.in (tmp-igen, tmp-m16): To here.
2375
2376         * m16.dc: New file, decode mips16 instructions.
2377
2378         * Makefile.in (SIM_NO_ALL): Define.
2379         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2380
2381 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2382
2383         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2384         point unit to 32 bit registers.
2385         * configure: Re-generate.
2386
2387 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2388
2389         * configure.in (sim_use_gen): Make IGEN the default simulator
2390         generator for generic 32 and 64 bit mips targets.
2391         * configure: Re-generate.
2392
2393 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2394
2395         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2396         bitsize.
2397
2398         * interp.c (sim_fetch_register, sim_store_register): Read/write
2399         FGR from correct location.
2400         (sim_open): Set size of FGR's according to
2401         WITH_TARGET_FLOATING_POINT_BITSIZE.
2402
2403         * sim-main.h (FGR): Store floating point registers in a separate
2404         array.
2405
2406 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2407
2408         * configure: Regenerated to track ../common/aclocal.m4 changes.
2409
2410 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2411
2412         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2413
2414         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2415
2416         * interp.c (pending_tick): New function.  Deliver pending writes.
2417
2418         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2419         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2420         it can handle mixed sized quantites and single bits.
2421
2422 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2423
2424         * interp.c (oengine.h): Do not include when building with IGEN.
2425         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2426         (sim_info): Ditto for PROCESSOR_64BIT.
2427         (sim_monitor): Replace ut_reg with unsigned_word.
2428         (*): Ditto for t_reg.
2429         (LOADDRMASK): Define.
2430         (sim_open): Remove defunct check that host FP is IEEE compliant,
2431         using software to emulate floating point.
2432         (value_fpr, ...): Always compile, was conditional on HASFPU.
2433
2434 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2435
2436         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2437         size.
2438
2439         * interp.c (SD, CPU): Define.
2440         (mips_option_handler): Set flags in each CPU.
2441         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2442         (sim_close): Do not clear STATE, deleted anyway.
2443         (sim_write, sim_read): Assume CPU zero's vm should be used for
2444         data transfers.
2445         (sim_create_inferior): Set the PC for all processors.
2446         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2447         argument.
2448         (mips16_entry): Pass correct nr of args to store_word, load_word.
2449         (ColdReset): Cold reset all cpu's.
2450         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2451         (sim_monitor, load_memory, store_memory, signal_exception): Use
2452         `CPU' instead of STATE_CPU.
2453
2454
2455         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2456         SD or CPU_.
2457
2458         * sim-main.h (signal_exception): Add sim_cpu arg.
2459         (SignalException*): Pass both SD and CPU to signal_exception.
2460         * interp.c (signal_exception): Update.
2461
2462         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2463         Ditto
2464         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2465         address_translation): Ditto
2466         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2467
2468 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2469
2470         * configure: Regenerated to track ../common/aclocal.m4 changes.
2471
2472 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2473
2474         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2475
2476         * mips.igen (model): Map processor names onto BFD name.
2477
2478         * sim-main.h (CPU_CIA): Delete.
2479         (SET_CIA, GET_CIA): Define
2480
2481 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2482
2483         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2484         regiser.
2485
2486         * configure.in (default_endian): Configure a big-endian simulator
2487         by default.
2488         * configure: Re-generate.
2489
2490 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2491
2492         * configure: Regenerated to track ../common/aclocal.m4 changes.
2493
2494 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2495
2496         * interp.c (sim_monitor): Handle Densan monitor outbyte
2497         and inbyte functions.
2498
2499 1997-12-29  Felix Lee  <flee@cygnus.com>
2500
2501         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2502
2503 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2504
2505         * Makefile.in (tmp-igen): Arrange for $zero to always be
2506         reset to zero after every instruction.
2507
2508 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2509
2510         * configure: Regenerated to track ../common/aclocal.m4 changes.
2511         * config.in: Ditto.
2512
2513 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2514
2515         * mips.igen (MSUB): Fix to work like MADD.
2516         * gencode.c (MSUB): Similarly.
2517
2518 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2519
2520         * configure: Regenerated to track ../common/aclocal.m4 changes.
2521
2522 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2523
2524         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2525
2526 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2527
2528         * sim-main.h (sim-fpu.h): Include.
2529
2530         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2531         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2532         using host independant sim_fpu module.
2533
2534 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2535
2536         * interp.c (signal_exception): Report internal errors with SIGABRT
2537         not SIGQUIT.
2538
2539         * sim-main.h (C0_CONFIG): New register.
2540         (signal.h): No longer include.
2541
2542         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2543
2544 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2545
2546         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2547
2548 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2549
2550         * mips.igen: Tag vr5000 instructions.
2551         (ANDI): Was missing mipsIV model, fix assembler syntax.
2552         (do_c_cond_fmt): New function.
2553         (C.cond.fmt): Handle mips I-III which do not support CC field
2554         separatly.
2555         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2556         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2557         in IV3.2 spec.
2558         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2559         vr5000 which saves LO in a GPR separatly.
2560
2561         * configure.in (enable-sim-igen): For vr5000, select vr5000
2562         specific instructions.
2563         * configure: Re-generate.
2564
2565 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2566
2567         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2568
2569         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2570         fmt_uninterpreted_64 bit cases to switch.  Convert to
2571         fmt_formatted,
2572
2573         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2574
2575         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2576         as specified in IV3.2 spec.
2577         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2578
2579 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2580
2581         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2582         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2583         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2584         PENDING_FILL versions of instructions.  Simplify.
2585         (X): New function.
2586         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2587         instructions.
2588         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2589         a signed value.
2590         (MTHI, MFHI): Disable code checking HI-LO.
2591
2592         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2593         global.
2594         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2595
2596 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2597
2598         * gencode.c (build_mips16_operands): Replace IPC with cia.
2599
2600         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2601         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2602         IPC to `cia'.
2603         (UndefinedResult): Replace function with macro/function
2604         combination.
2605         (sim_engine_run): Don't save PC in IPC.
2606
2607         * sim-main.h (IPC): Delete.
2608
2609
2610         * interp.c (signal_exception, store_word, load_word,
2611         address_translation, load_memory, store_memory, cache_op,
2612         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2613         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2614         current instruction address - cia - argument.
2615         (sim_read, sim_write): Call address_translation directly.
2616         (sim_engine_run): Rename variable vaddr to cia.
2617         (signal_exception): Pass cia to sim_monitor
2618
2619         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2620         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2621         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2622
2623         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2624         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2625         SIM_ASSERT.
2626
2627         * interp.c (signal_exception): Pass restart address to
2628         sim_engine_restart.
2629
2630         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2631         idecode.o): Add dependency.
2632
2633         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2634         Delete definitions
2635         (DELAY_SLOT): Update NIA not PC with branch address.
2636         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2637
2638         * mips.igen: Use CIA not PC in branch calculations.
2639         (illegal): Call SignalException.
2640         (BEQ, ADDIU): Fix assembler.
2641
2642 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2643
2644         * m16.igen (JALX): Was missing.
2645
2646         * configure.in (enable-sim-igen): New configuration option.
2647         * configure: Re-generate.
2648
2649         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2650
2651         * interp.c (load_memory, store_memory): Delete parameter RAW.
2652         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2653         bypassing {load,store}_memory.
2654
2655         * sim-main.h (ByteSwapMem): Delete definition.
2656
2657         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2658
2659         * interp.c (sim_do_command, sim_commands): Delete mips specific
2660         commands.  Handled by module sim-options.
2661
2662         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2663         (WITH_MODULO_MEMORY): Define.
2664
2665         * interp.c (sim_info): Delete code printing memory size.
2666
2667         * interp.c (mips_size): Nee sim_size, delete function.
2668         (power2): Delete.
2669         (monitor, monitor_base, monitor_size): Delete global variables.
2670         (sim_open, sim_close): Delete code creating monitor and other
2671         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2672         manage memory regions.
2673         (load_memory, store_memory): Use sim-core for memory model.
2674
2675         * interp.c (address_translation): Delete all memory map code
2676         except line forcing 32 bit addresses.
2677
2678 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2679
2680         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2681         trace options.
2682
2683         * interp.c (logfh, logfile): Delete globals.
2684         (sim_open, sim_close): Delete code opening & closing log file.
2685         (mips_option_handler): Delete -l and -n options.
2686         (OPTION mips_options): Ditto.
2687
2688         * interp.c (OPTION mips_options): Rename option trace to dinero.
2689         (mips_option_handler): Update.
2690
2691 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2692
2693         * interp.c (fetch_str): New function.
2694         (sim_monitor): Rewrite using sim_read & sim_write.
2695         (sim_open): Check magic number.
2696         (sim_open): Write monitor vectors into memory using sim_write.
2697         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2698         (sim_read, sim_write): Simplify - transfer data one byte at a
2699         time.
2700         (load_memory, store_memory): Clarify meaning of parameter RAW.
2701
2702         * sim-main.h (isHOST): Defete definition.
2703         (isTARGET): Mark as depreciated.
2704         (address_translation): Delete parameter HOST.
2705
2706         * interp.c (address_translation): Delete parameter HOST.
2707
2708 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2709
2710         * mips.igen:
2711
2712         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2713         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2714
2715 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2716
2717         * mips.igen: Add model filter field to records.
2718
2719 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2720
2721         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2722
2723         interp.c (sim_engine_run): Do not compile function sim_engine_run
2724         when WITH_IGEN == 1.
2725
2726         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2727         target architecture.
2728
2729         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2730         igen. Replace with configuration variables sim_igen_flags /
2731         sim_m16_flags.
2732
2733         * m16.igen: New file.  Copy mips16 insns here.
2734         * mips.igen: From here.
2735
2736 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2737
2738         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2739         to top.
2740         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2741
2742 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2743
2744         * gencode.c (build_instruction): Follow sim_write's lead in using
2745         BigEndianMem instead of !ByteSwapMem.
2746
2747 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2748
2749         * configure.in (sim_gen): Dependent on target, select type of
2750         generator.  Always select old style generator.
2751
2752         configure: Re-generate.
2753
2754         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2755         targets.
2756         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2757         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2758         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2759         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2760         SIM_@sim_gen@_*, set by autoconf.
2761
2762 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2763
2764         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2765
2766         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2767         CURRENT_FLOATING_POINT instead.
2768
2769         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2770         (address_translation): Raise exception InstructionFetch when
2771         translation fails and isINSTRUCTION.
2772
2773         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2774         sim_engine_run): Change type of of vaddr and paddr to
2775         address_word.
2776         (address_translation, prefetch, load_memory, store_memory,
2777         cache_op): Change type of vAddr and pAddr to address_word.
2778
2779         * gencode.c (build_instruction): Change type of vaddr and paddr to
2780         address_word.
2781
2782 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2783
2784         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2785         macro to obtain result of ALU op.
2786
2787 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2788
2789         * interp.c (sim_info): Call profile_print.
2790
2791 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2792
2793         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2794
2795         * sim-main.h (WITH_PROFILE): Do not define, defined in
2796         common/sim-config.h.  Use sim-profile module.
2797         (simPROFILE): Delete defintion.
2798
2799         * interp.c (PROFILE): Delete definition.
2800         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2801         (sim_close): Delete code writing profile histogram.
2802         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2803         Delete.
2804         (sim_engine_run): Delete code profiling the PC.
2805
2806 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2807
2808         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2809
2810         * interp.c (sim_monitor): Make register pointers of type
2811         unsigned_word*.
2812
2813         * sim-main.h: Make registers of type unsigned_word not
2814         signed_word.
2815
2816 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2817
2818         * interp.c (sync_operation): Rename from SyncOperation, make
2819         global, add SD argument.
2820         (prefetch): Rename from Prefetch, make global, add SD argument.
2821         (decode_coproc): Make global.
2822
2823         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2824
2825         * gencode.c (build_instruction): Generate DecodeCoproc not
2826         decode_coproc calls.
2827
2828         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2829         (SizeFGR): Move to sim-main.h
2830         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2831         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2832         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2833         sim-main.h.
2834         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2835         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2836         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2837         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2838         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2839         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2840
2841         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2842         exception.
2843         (sim-alu.h): Include.
2844         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2845         (sim_cia): Typedef to instruction_address.
2846
2847 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2848
2849         * Makefile.in (interp.o): Rename generated file engine.c to
2850         oengine.c.
2851
2852         * interp.c: Update.
2853
2854 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2855
2856         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2857
2858 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2859
2860         * gencode.c (build_instruction): For "FPSQRT", output correct
2861         number of arguments to Recip.
2862
2863 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2864
2865         * Makefile.in (interp.o): Depends on sim-main.h
2866
2867         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2868
2869         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2870         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2871         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2872         STATE, DSSTATE): Define
2873         (GPR, FGRIDX, ..): Define.
2874
2875         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2876         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2877         (GPR, FGRIDX, ...): Delete macros.
2878
2879         * interp.c: Update names to match defines from sim-main.h
2880
2881 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2882
2883         * interp.c (sim_monitor): Add SD argument.
2884         (sim_warning): Delete.  Replace calls with calls to
2885         sim_io_eprintf.
2886         (sim_error): Delete. Replace calls with sim_io_error.
2887         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2888         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2889         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2890         argument.
2891         (mips_size): Rename from sim_size. Add SD argument.
2892
2893         * interp.c (simulator): Delete global variable.
2894         (callback): Delete global variable.
2895         (mips_option_handler, sim_open, sim_write, sim_read,
2896         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2897         sim_size,sim_monitor): Use sim_io_* not callback->*.
2898         (sim_open): ZALLOC simulator struct.
2899         (PROFILE): Do not define.
2900
2901 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2902
2903         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2904         support.h with corresponding code.
2905
2906         * sim-main.h (word64, uword64), support.h: Move definition to
2907         sim-main.h.
2908         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2909
2910         * support.h: Delete
2911         * Makefile.in: Update dependencies
2912         * interp.c: Do not include.
2913
2914 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2915
2916         * interp.c (address_translation, load_memory, store_memory,
2917         cache_op): Rename to from AddressTranslation et.al., make global,
2918         add SD argument
2919
2920         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2921         CacheOp): Define.
2922
2923         * interp.c (SignalException): Rename to signal_exception, make
2924         global.
2925
2926         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2927
2928         * sim-main.h (SignalException, SignalExceptionInterrupt,
2929         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2930         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2931         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2932         Define.
2933
2934         * interp.c, support.h: Use.
2935
2936 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2937
2938         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2939         to value_fpr / store_fpr. Add SD argument.
2940         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2941         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2942
2943         * sim-main.h (ValueFPR, StoreFPR): Define.
2944
2945 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2946
2947         * interp.c (sim_engine_run): Check consistency between configure
2948         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2949         and HASFPU.
2950
2951         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2952         (mips_fpu): Configure WITH_FLOATING_POINT.
2953         (mips_endian): Configure WITH_TARGET_ENDIAN.
2954         * configure: Update.
2955
2956 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2957
2958         * configure: Regenerated to track ../common/aclocal.m4 changes.
2959
2960 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2961
2962         * configure: Regenerated.
2963
2964 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2965
2966         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2967
2968 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2969
2970         * gencode.c (print_igen_insn_models): Assume certain architectures
2971         include all mips* instructions.
2972         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2973         instruction.
2974
2975         * Makefile.in (tmp.igen): Add target. Generate igen input from
2976         gencode file.
2977
2978         * gencode.c (FEATURE_IGEN): Define.
2979         (main): Add --igen option.  Generate output in igen format.
2980         (process_instructions): Format output according to igen option.
2981         (print_igen_insn_format): New function.
2982         (print_igen_insn_models): New function.
2983         (process_instructions): Only issue warnings and ignore
2984         instructions when no FEATURE_IGEN.
2985
2986 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2987
2988         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2989         MIPS targets.
2990
2991 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2992
2993         * configure: Regenerated to track ../common/aclocal.m4 changes.
2994
2995 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2996
2997         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2998         SIM_RESERVED_BITS): Delete, moved to common.
2999         (SIM_EXTRA_CFLAGS): Update.
3000
3001 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3002
3003         * configure.in: Configure non-strict memory alignment.
3004         * configure: Regenerated to track ../common/aclocal.m4 changes.
3005
3006 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3007
3008         * configure: Regenerated to track ../common/aclocal.m4 changes.
3009
3010 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3011
3012         * gencode.c (SDBBP,DERET): Added (3900) insns.
3013         (RFE): Turn on for 3900.
3014         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3015         (dsstate): Made global.
3016         (SUBTARGET_R3900): Added.
3017         (CANCELDELAYSLOT): New.
3018         (SignalException): Ignore SystemCall rather than ignore and
3019         terminate.  Add DebugBreakPoint handling.
3020         (decode_coproc): New insns RFE, DERET; and new registers Debug
3021         and DEPC protected by SUBTARGET_R3900.
3022         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3023         bits explicitly.
3024         * Makefile.in,configure.in: Add mips subtarget option.
3025         * configure: Update.
3026
3027 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3028
3029         * gencode.c: Add r3900 (tx39).
3030
3031
3032 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3033
3034         * gencode.c (build_instruction): Don't need to subtract 4 for
3035         JALR, just 2.
3036
3037 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3038
3039         * interp.c: Correct some HASFPU problems.
3040
3041 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3042
3043         * configure: Regenerated to track ../common/aclocal.m4 changes.
3044
3045 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3046
3047         * interp.c (mips_options): Fix samples option short form, should
3048         be `x'.
3049
3050 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3051
3052         * interp.c (sim_info): Enable info code.  Was just returning.
3053
3054 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3055
3056         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3057         MFC0.
3058
3059 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3060
3061         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3062         constants.
3063         (build_instruction): Ditto for LL.
3064
3065 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3066
3067         * configure: Regenerated to track ../common/aclocal.m4 changes.
3068
3069 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3070
3071         * configure: Regenerated to track ../common/aclocal.m4 changes.
3072         * config.in: Ditto.
3073
3074 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3075
3076         * interp.c (sim_open): Add call to sim_analyze_program, update
3077         call to sim_config.
3078
3079 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3080
3081         * interp.c (sim_kill): Delete.
3082         (sim_create_inferior): Add ABFD argument. Set PC from same.
3083         (sim_load): Move code initializing trap handlers from here.
3084         (sim_open): To here.
3085         (sim_load): Delete, use sim-hload.c.
3086
3087         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3088
3089 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3090
3091         * configure: Regenerated to track ../common/aclocal.m4 changes.
3092         * config.in: Ditto.
3093
3094 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3095
3096         * interp.c (sim_open): Add ABFD argument.
3097         (sim_load): Move call to sim_config from here.
3098         (sim_open): To here.  Check return status.
3099
3100 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3101
3102         * gencode.c (build_instruction): Two arg MADD should
3103         not assign result to $0.
3104
3105 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3106
3107         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3108         * sim/mips/configure.in: Regenerate.
3109
3110 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3111
3112         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3113         signed8, unsigned8 et.al. types.
3114
3115         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3116         hosts when selecting subreg.
3117
3118 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3119
3120         * interp.c (sim_engine_run): Reset the ZERO register to zero
3121         regardless of FEATURE_WARN_ZERO.
3122         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3123
3124 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3125
3126         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3127         (SignalException): For BreakPoints ignore any mode bits and just
3128         save the PC.
3129         (SignalException): Always set the CAUSE register.
3130
3131 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3132
3133         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3134         exception has been taken.
3135
3136         * interp.c: Implement the ERET and mt/f sr instructions.
3137
3138 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3139
3140         * interp.c (SignalException): Don't bother restarting an
3141         interrupt.
3142
3143 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3144
3145         * interp.c (SignalException): Really take an interrupt.
3146         (interrupt_event): Only deliver interrupts when enabled.
3147
3148 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3149
3150         * interp.c (sim_info): Only print info when verbose.
3151         (sim_info) Use sim_io_printf for output.
3152
3153 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3154
3155         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3156         mips architectures.
3157
3158 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3159
3160         * interp.c (sim_do_command): Check for common commands if a
3161         simulator specific command fails.
3162
3163 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3164
3165         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3166         and simBE when DEBUG is defined.
3167
3168 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3169
3170         * interp.c (interrupt_event): New function.  Pass exception event
3171         onto exception handler.
3172
3173         * configure.in: Check for stdlib.h.
3174         * configure: Regenerate.
3175
3176         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3177         variable declaration.
3178         (build_instruction): Initialize memval1.
3179         (build_instruction): Add UNUSED attribute to byte, bigend,
3180         reverse.
3181         (build_operands): Ditto.
3182
3183         * interp.c: Fix GCC warnings.
3184         (sim_get_quit_code): Delete.
3185
3186         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3187         * Makefile.in: Ditto.
3188         * configure: Re-generate.
3189
3190         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3191
3192 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3193
3194         * interp.c (mips_option_handler): New function parse argumes using
3195         sim-options.
3196         (myname): Replace with STATE_MY_NAME.
3197         (sim_open): Delete check for host endianness - performed by
3198         sim_config.
3199         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3200         (sim_open): Move much of the initialization from here.
3201         (sim_load): To here.  After the image has been loaded and
3202         endianness set.
3203         (sim_open): Move ColdReset from here.
3204         (sim_create_inferior): To here.
3205         (sim_open): Make FP check less dependant on host endianness.
3206
3207         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3208         run.
3209         * interp.c (sim_set_callbacks): Delete.
3210
3211         * interp.c (membank, membank_base, membank_size): Replace with
3212         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3213         (sim_open): Remove call to callback->init. gdb/run do this.
3214
3215         * interp.c: Update
3216
3217         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3218
3219         * interp.c (big_endian_p): Delete, replaced by
3220         current_target_byte_order.
3221
3222 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3223
3224         * interp.c (host_read_long, host_read_word, host_swap_word,
3225         host_swap_long): Delete. Using common sim-endian.
3226         (sim_fetch_register, sim_store_register): Use H2T.
3227         (pipeline_ticks): Delete.  Handled by sim-events.
3228         (sim_info): Update.
3229         (sim_engine_run): Update.
3230
3231 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3232
3233         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3234         reason from here.
3235         (SignalException): To here. Signal using sim_engine_halt.
3236         (sim_stop_reason): Delete, moved to common.
3237
3238 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3239
3240         * interp.c (sim_open): Add callback argument.
3241         (sim_set_callbacks): Delete SIM_DESC argument.
3242         (sim_size): Ditto.
3243
3244 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3245
3246         * Makefile.in (SIM_OBJS): Add common modules.
3247
3248         * interp.c (sim_set_callbacks): Also set SD callback.
3249         (set_endianness, xfer_*, swap_*): Delete.
3250         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3251         Change to functions using sim-endian macros.
3252         (control_c, sim_stop): Delete, use common version.
3253         (simulate): Convert into.
3254         (sim_engine_run): This function.
3255         (sim_resume): Delete.
3256
3257         * interp.c (simulation): New variable - the simulator object.
3258         (sim_kind): Delete global - merged into simulation.
3259         (sim_load): Cleanup.  Move PC assignment from here.
3260         (sim_create_inferior): To here.
3261
3262         * sim-main.h: New file.
3263         * interp.c (sim-main.h): Include.
3264
3265 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3266
3267         * configure: Regenerated to track ../common/aclocal.m4 changes.
3268
3269 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3270
3271         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3272
3273 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3274
3275         * gencode.c (build_instruction): DIV instructions: check
3276         for division by zero and integer overflow before using
3277         host's division operation.
3278
3279 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3280
3281         * Makefile.in (SIM_OBJS): Add sim-load.o.
3282         * interp.c: #include bfd.h.
3283         (target_byte_order): Delete.
3284         (sim_kind, myname, big_endian_p): New static locals.
3285         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3286         after argument parsing.  Recognize -E arg, set endianness accordingly.
3287         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3288         load file into simulator.  Set PC from bfd.
3289         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3290         (set_endianness): Use big_endian_p instead of target_byte_order.
3291
3292 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3293
3294         * interp.c (sim_size): Delete prototype - conflicts with
3295         definition in remote-sim.h.  Correct definition.
3296
3297 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3298
3299         * configure: Regenerated to track ../common/aclocal.m4 changes.
3300         * config.in: Ditto.
3301
3302 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3303
3304         * interp.c (sim_open): New arg `kind'.
3305
3306         * configure: Regenerated to track ../common/aclocal.m4 changes.
3307
3308 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3309
3310         * configure: Regenerated to track ../common/aclocal.m4 changes.
3311
3312 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3313
3314         * interp.c (sim_open): Set optind to 0 before calling getopt.
3315
3316 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3317
3318         * configure: Regenerated to track ../common/aclocal.m4 changes.
3319
3320 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3321
3322         * interp.c : Replace uses of pr_addr with pr_uword64
3323         where the bit length is always 64 independent of SIM_ADDR.
3324         (pr_uword64) : added.
3325
3326 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3327
3328         * configure: Re-generate.
3329
3330 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3331
3332         * configure: Regenerate to track ../common/aclocal.m4 changes.
3333
3334 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3335
3336         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3337         in argv form.
3338         (other sim_*): New SIM_DESC argument.
3339
3340 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3341
3342         * interp.c: Fix printing of addresses for non-64-bit targets.
3343         (pr_addr): Add function to print address based on size.
3344
3345 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3346
3347         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3348
3349 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3350
3351         * gencode.c (build_mips16_operands): Correct computation of base
3352         address for extended PC relative instruction.
3353
3354 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3355
3356         * interp.c (mips16_entry): Add support for floating point cases.
3357         (SignalException): Pass floating point cases to mips16_entry.
3358         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3359         registers.
3360         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3361         or fmt_word.
3362         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3363         and then set the state to fmt_uninterpreted.
3364         (COP_SW): Temporarily set the state to fmt_word while calling
3365         ValueFPR.
3366
3367 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3368
3369         * gencode.c (build_instruction): The high order may be set in the
3370         comparison flags at any ISA level, not just ISA 4.
3371
3372 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3373
3374         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3375         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3376         * configure.in: sinclude ../common/aclocal.m4.
3377         * configure: Regenerated.
3378
3379 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3380
3381         * configure: Rebuild after change to aclocal.m4.
3382
3383 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3384
3385         * configure configure.in Makefile.in:  Update to new configure
3386         scheme which is more compatible with WinGDB builds.
3387         * configure.in:  Improve comment on how to run autoconf.
3388         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3389         * Makefile.in:  Use autoconf substitution to install common
3390         makefile fragment.
3391
3392 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3393
3394         * gencode.c (build_instruction): Use BigEndianCPU instead of
3395         ByteSwapMem.
3396
3397 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3398
3399         * interp.c (sim_monitor): Make output to stdout visible in
3400         wingdb's I/O log window.
3401
3402 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3403
3404         * support.h: Undo previous change to SIGTRAP
3405         and SIGQUIT values.
3406
3407 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3408
3409         * interp.c (store_word, load_word): New static functions.
3410         (mips16_entry): New static function.
3411         (SignalException): Look for mips16 entry and exit instructions.
3412         (simulate): Use the correct index when setting fpr_state after
3413         doing a pending move.
3414
3415 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3416
3417         * interp.c: Fix byte-swapping code throughout to work on
3418         both little- and big-endian hosts.
3419
3420 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3421
3422         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3423         with gdb/config/i386/xm-windows.h.
3424
3425 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3426
3427         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3428         that messes up arithmetic shifts.
3429
3430 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3431
3432         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3433         SIGTRAP and SIGQUIT for _WIN32.
3434
3435 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3436
3437         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3438         force a 64 bit multiplication.
3439         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3440         destination register is 0, since that is the default mips16 nop
3441         instruction.
3442
3443 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3444
3445         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3446         (build_endian_shift): Don't check proc64.
3447         (build_instruction): Always set memval to uword64.  Cast op2 to
3448         uword64 when shifting it left in memory instructions.  Always use
3449         the same code for stores--don't special case proc64.
3450
3451         * gencode.c (build_mips16_operands): Fix base PC value for PC
3452         relative operands.
3453         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3454         jal instruction.
3455         * interp.c (simJALDELAYSLOT): Define.
3456         (JALDELAYSLOT): Define.
3457         (INDELAYSLOT, INJALDELAYSLOT): Define.
3458         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3459
3460 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3461
3462         * interp.c (sim_open): add flush_cache as a PMON routine
3463         (sim_monitor): handle flush_cache by ignoring it
3464
3465 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3466
3467         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3468         BigEndianMem.
3469         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3470         (BigEndianMem): Rename to ByteSwapMem and change sense.
3471         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3472         BigEndianMem references to !ByteSwapMem.
3473         (set_endianness): New function, with prototype.
3474         (sim_open): Call set_endianness.
3475         (sim_info): Use simBE instead of BigEndianMem.
3476         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3477         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3478         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3479         ifdefs, keeping the prototype declaration.
3480         (swap_word): Rewrite correctly.
3481         (ColdReset): Delete references to CONFIG.  Delete endianness related
3482         code; moved to set_endianness.
3483
3484 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3485
3486         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3487         * interp.c (CHECKHILO): Define away.
3488         (simSIGINT): New macro.
3489         (membank_size): Increase from 1MB to 2MB.
3490         (control_c): New function.
3491         (sim_resume): Rename parameter signal to signal_number.  Add local
3492         variable prev.  Call signal before and after simulate.
3493         (sim_stop_reason): Add simSIGINT support.
3494         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3495         functions always.
3496         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3497         if logfh is NULL.
3498         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3499         a call to sim_warning.
3500
3501 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3502
3503         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3504         16 bit instructions.
3505
3506 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3507
3508         Add support for mips16 (16 bit MIPS implementation):
3509         * gencode.c (inst_type): Add mips16 instruction encoding types.
3510         (GETDATASIZEINSN): Define.
3511         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3512         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3513         mtlo.
3514         (MIPS16_DECODE): New table, for mips16 instructions.
3515         (bitmap_val): New static function.
3516         (struct mips16_op): Define.
3517         (mips16_op_table): New table, for mips16 operands.
3518         (build_mips16_operands): New static function.
3519         (process_instructions): If PC is odd, decode a mips16
3520         instruction.  Break out instruction handling into new
3521         build_instruction function.
3522         (build_instruction): New static function, broken out of
3523         process_instructions.  Check modifiers rather than flags for SHIFT
3524         bit count and m[ft]{hi,lo} direction.
3525         (usage): Pass program name to fprintf.
3526         (main): Remove unused variable this_option_optind.  Change
3527         ``*loptarg++'' to ``loptarg++''.
3528         (my_strtoul): Parenthesize && within ||.
3529         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3530         (simulate): If PC is odd, fetch a 16 bit instruction, and
3531         increment PC by 2 rather than 4.
3532         * configure.in: Add case for mips16*-*-*.
3533         * configure: Rebuild.
3534
3535 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3536
3537         * interp.c: Allow -t to enable tracing in standalone simulator.
3538         Fix garbage output in trace file and error messages.
3539
3540 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3541
3542         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3543         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3544         * configure.in: Simplify using macros in ../common/aclocal.m4.
3545         * configure: Regenerated.
3546         * tconfig.in: New file.
3547
3548 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3549
3550         * interp.c: Fix bugs in 64-bit port.
3551         Use ansi function declarations for msvc compiler.
3552         Initialize and test file pointer in trace code.
3553         Prevent duplicate definition of LAST_EMED_REGNUM.
3554
3555 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3556
3557         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3558
3559 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3560
3561         * interp.c (SignalException): Check for explicit terminating
3562         breakpoint value.
3563         * gencode.c: Pass instruction value through SignalException()
3564         calls for Trap, Breakpoint and Syscall.
3565
3566 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3567
3568         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3569         only used on those hosts that provide it.
3570         * configure.in: Add sqrt() to list of functions to be checked for.
3571         * config.in: Re-generated.
3572         * configure: Re-generated.
3573
3574 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3575
3576         * gencode.c (process_instructions): Call build_endian_shift when
3577         expanding STORE RIGHT, to fix swr.
3578         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3579         clear the high bits.
3580         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3581         Fix float to int conversions to produce signed values.
3582
3583 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3584
3585         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3586         (process_instructions): Correct handling of nor instruction.
3587         Correct shift count for 32 bit shift instructions. Correct sign
3588         extension for arithmetic shifts to not shift the number of bits in
3589         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3590         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3591         Fix madd.
3592         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3593         It's OK to have a mult follow a mult.  What's not OK is to have a
3594         mult follow an mfhi.
3595         (Convert): Comment out incorrect rounding code.
3596
3597 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3598
3599         * interp.c (sim_monitor): Improved monitor printf
3600         simulation. Tidied up simulator warnings, and added "--log" option
3601         for directing warning message output.
3602         * gencode.c: Use sim_warning() rather than WARNING macro.
3603
3604 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3605
3606         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3607         getopt1.o, rather than on gencode.c.  Link objects together.
3608         Don't link against -liberty.
3609         (gencode.o, getopt.o, getopt1.o): New targets.
3610         * gencode.c: Include <ctype.h> and "ansidecl.h".
3611         (AND): Undefine after including "ansidecl.h".
3612         (ULONG_MAX): Define if not defined.
3613         (OP_*): Don't define macros; now defined in opcode/mips.h.
3614         (main): Call my_strtoul rather than strtoul.
3615         (my_strtoul): New static function.
3616
3617 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3618
3619         * gencode.c (process_instructions):  Generate word64 and uword64
3620         instead of `long long' and `unsigned long long' data types.
3621         * interp.c:  #include sysdep.h to get signals, and define default
3622         for SIGBUS.
3623         * (Convert):  Work around for Visual-C++ compiler bug with type
3624         conversion.
3625         * support.h:  Make things compile under Visual-C++ by using
3626         __int64 instead of `long long'.  Change many refs to long long
3627         into word64/uword64 typedefs.
3628
3629 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3630
3631         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3632         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3633         (docdir): Removed.
3634         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3635         (AC_PROG_INSTALL): Added.
3636         (AC_PROG_CC): Moved to before configure.host call.
3637         * configure: Rebuilt.
3638
3639 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3640
3641         * configure.in: Define @SIMCONF@ depending on mips target.
3642         * configure: Rebuild.
3643         * Makefile.in (run): Add @SIMCONF@ to control simulator
3644         construction.
3645         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3646         * interp.c: Remove some debugging, provide more detailed error
3647         messages, update memory accesses to use LOADDRMASK.
3648
3649 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3650
3651         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3652         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3653         stamp-h.
3654         * configure: Rebuild.
3655         * config.in: New file, generated by autoheader.
3656         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3657         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3658         HAVE_ANINT and HAVE_AINT, as appropriate.
3659         * Makefile.in (run): Use @LIBS@ rather than -lm.
3660         (interp.o): Depend upon config.h.
3661         (Makefile): Just rebuild Makefile.
3662         (clean): Remove stamp-h.
3663         (mostlyclean): Make the same as clean, not as distclean.
3664         (config.h, stamp-h): New targets.
3665
3666 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3667
3668         * interp.c (ColdReset): Fix boolean test. Make all simulator
3669         globals static.
3670
3671 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3672
3673         * interp.c (xfer_direct_word, xfer_direct_long,
3674         swap_direct_word, swap_direct_long, xfer_big_word,
3675         xfer_big_long, xfer_little_word, xfer_little_long,
3676         swap_word,swap_long): Added.
3677         * interp.c (ColdReset): Provide function indirection to
3678         host<->simulated_target transfer routines.
3679         * interp.c (sim_store_register, sim_fetch_register): Updated to
3680         make use of indirected transfer routines.
3681
3682 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3683
3684         * gencode.c (process_instructions): Ensure FP ABS instruction
3685         recognised.
3686         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3687         system call support.
3688
3689 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3690
3691         * interp.c (sim_do_command): Complain if callback structure not
3692         initialised.
3693
3694 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3695
3696         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3697         support for Sun hosts.
3698         * Makefile.in (gencode): Ensure the host compiler and libraries
3699         used for cross-hosted build.
3700
3701 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3702
3703         * interp.c, gencode.c: Some more (TODO) tidying.
3704
3705 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3706
3707         * gencode.c, interp.c: Replaced explicit long long references with
3708         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3709         * support.h (SET64LO, SET64HI): Macros added.
3710
3711 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3712
3713         * configure: Regenerate with autoconf 2.7.
3714
3715 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3716
3717         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3718         * support.h: Remove superfluous "1" from #if.
3719         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3720
3721 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3722
3723         * interp.c (StoreFPR): Control UndefinedResult() call on
3724         WARN_RESULT manifest.
3725
3726 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3727
3728         * gencode.c: Tidied instruction decoding, and added FP instruction
3729         support.
3730
3731         * interp.c: Added dineroIII, and BSD profiling support. Also
3732         run-time FP handling.
3733
3734 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3735
3736         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3737         gencode.c, interp.c, support.h: created.