sim/mips/ChangeLog

   1 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
   4         * aclocal.m4, configure: Regenerate.
   5
   6 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
   7
   8         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
   9
  10 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  11
  12         * configure: Regenerate.
  13
  14 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  15
  16         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  17
  18 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  19
  20         * config.in, configure: Regenerate.
  21         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  22         and strings.h include.
  23
  24 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * configure: Regenerate.
  27
  28 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  29
  30         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  31         * configure: Regenerate.
  32
  33 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  34
  35         * configure: Regenerate.
  36
  37 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
  38
  39         * configure: Regenerate.
  40
  41 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  42
  43         *  sim-main.c: Include <stdlib.h>.
  44
  45 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  46
  47         * cp1.c: Include <stdlib.h>.
  48
  49 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
  50
  51         * configure: Re-generate.
  52
  53 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
  54
  55         * configure: Regenerate.
  56
  57 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  58
  59         PR sim/20808
  60         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
  61         and SD to sd.
  62
  63 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  64
  65         PR sim/20809
  66         * mips.igen (check_u64): Enable for `r3900'.
  67
  68 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
  69
  70         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
  71         STATE_PROG_BFD (sd).
  72         * configure: Regenerate.
  73
  74 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
  75             Maciej W. Rozycki  <macro@imgtec.com>
  76
  77         PR sim/19441
  78         * micromips.igen (delayslot_micromips): Enable for `micromips32',
  79         `micromips64' and `micromipsdsp' only.
  80         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
  81         (do_micromips_jalr, do_micromips_jal): Likewise.
  82         (compute_movep_src_reg): Likewise.
  83         (compute_andi16_imm): Likewise.
  84         (convert_fmt_micromips): Likewise.
  85         (convert_fmt_micromips_cvt_d): Likewise.
  86         (convert_fmt_micromips_cvt_s): Likewise.
  87         (FMT_MICROMIPS): Likewise.
  88         (FMT_MICROMIPS_CVT_D): Likewise.
  89         (FMT_MICROMIPS_CVT_S): Likewise.
  90
  91 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
  92
  93         * interp.c: Include elf-bfd.h.
  94         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
  95         ELFCLASS32.
  96
  97 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  98
  99         * config.in, configure: Regenerate.
 100
 101 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 102
 103         * configure: Regenerate.
 104
 105 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 106
 107         * configure: Regenerate.
 108
 109 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 110
 111         * configure: Regenerate.
 112
 113 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 114
 115         * configure: Regenerate.
 116
 117 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 118
 119         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 120         * configure: Regenerate.
 121
 122 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 123
 124         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 125         * configure: Regenerate.
 126
 127 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 128
 129         * configure: Regenerate.
 130
 131 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 132
 133         * configure: Regenerate.
 134
 135 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 136
 137         * config.in, configure: Regenerate.
 138
 139 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 140
 141         * interp.c (sim_open): Mark argv const.
 142         (sim_create_inferior): Mark argv and env const.
 143
 144 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 145
 146         * configure: Regenerate.
 147
 148 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 149
 150         * interp.c (sim_open): Update sim_parse_args comment.
 151
 152 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 153
 154         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 155         * configure: Regenerate.
 156
 157 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 158
 159         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 160         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 161         * configure: Regenerate.
 162         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 163
 164 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 165
 166         * dv-tx3904cpu.c (CPU, SD): Delete.
 167
 168 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 169
 170         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 171         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 172         (sim_store_register): Rename to ...
 173         (mips_reg_store): ... this.  Delete local cpu var.
 174         Update sim_io_eprintf calls.
 175         (sim_fetch_register): Rename to ...
 176         (mips_reg_fetch): ... this.  Delete local cpu var.
 177         Update sim_io_eprintf calls.
 178
 179 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 180
 181         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 182
 183 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 184
 185         * config.in, configure: Regenerate.
 186
 187 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 188
 189         * interp.c (sim_write, sim_read): Delete.
 190         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 191         (load_word): Likewise.
 192         * micromips.igen (cache): Likewise.
 193         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 194         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 195         do_store_left, do_store_right, do_load_double, do_store_double):
 196         Likewise.
 197         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 198         (do_prefx): Likewise.
 199         * sim-main.c (address_translation, prefetch): Delete.
 200         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 201         paddr=vaddr.
 202         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 203         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 204         (LoadMemory, StoreMemory): Delete CCA arg.
 205
 206 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 207
 208         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 209         * configure: Regenerated.
 210
 211 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 212
 213         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 214         * tconfig.h: Delete.
 215
 216 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 217
 218         * tconfig.h (SIM_HANDLES_LMA): Delete.
 219
 220 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 221
 222         * sim-main.h (WITH_WATCHPOINTS): Delete.
 223
 224 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 225
 226         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 227
 228 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 229
 230         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 231
 232 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 233
 234         * micromips.igen (process_isa_mode): Fix left shift of negative
 235         value.
 236
 237 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 238
 239         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 240
 241 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 242
 243         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 244
 245 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 246
 247         * interp.c (sim_close): Rename to ...
 248         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 249         sim_io_shutdown.
 250         * sim-main.h (mips_sim_close): Declare.
 251         (SIM_CLOSE_HOOK): Define.
 252
 253 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 254             Ali Lown  <ali.lown@imgtec.com>
 255
 256         * Makefile.in (tmp-micromips): New rule.
 257         (tmp-mach-multi): Add support for micromips.
 258         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 259         that works for both mips64 and micromips64.
 260         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 261         micromips32.
 262         Add build support for micromips.
 263         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 264         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 265         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 266         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 267         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 268         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 269         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 270         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 271         Refactored instruction code to use these functions.
 272         * dsp2.igen: Refactored instruction code to use the new functions.
 273         * interp.c (decode_coproc): Refactored to work with any instruction
 274         encoding.
 275         (isa_mode): New variable
 276         (RSVD_INSTRUCTION): Changed to 0x00000039.
 277         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 278         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 279         * micromips.dc: New file.
 280         * micromips.igen: New file.
 281         * micromips16.dc: New file.
 282         * micromipsdsp.igen: New file.
 283         * micromipsrun.c: New file.
 284         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 285         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 286         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 287         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 288         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 289         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 290         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 291         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 292         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 293         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 294         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 295         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 296         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 297         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 298         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 299         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 300         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 301         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 302         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 303         instructions.
 304         Refactored instruction code to use these functions.
 305         (RSVD): Changed to use new reserved instruction.
 306         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 307         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 308         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 309         do_store_double):  Added micromips32 and micromips64 models.
 310         Added include for micromips.igen and micromipsdsp.igen
 311         Add micromips32 and micromips64 models.
 312         (DecodeCoproc): Updated to use new macro definition.
 313         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 314         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 315         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 316         Refactored instruction code to use these functions.
 317         * sim-main.h (CP0_operation): New enum.
 318         (DecodeCoproc): Updated macro.
 319         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 320         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 321         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 322         ISA_MODE_MICROMIPS): New defines.
 323         (sim_state): Add isa_mode field.
 324
 325 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 326
 327         * configure: Regenerate.
 328
 329 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 330
 331         * configure.ac: Change configure.in to configure.ac.
 332         * configure: Regenerate.
 333
 334 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 335
 336         * configure: Regenerate.
 337
 338 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 339
 340         * interp.c [TRACE]: Delete.
 341         (TRACE): Change to WITH_TRACE_ANY_P.
 342         [!WITH_TRACE_ANY_P] (open_trace): Define.
 343         (mips_option_handler, open_trace, sim_close, dotrace):
 344         Change defined(TRACE) to WITH_TRACE_ANY_P.
 345         (sim_open): Delete TRACE ifdef check.
 346         * sim-main.c (load_memory): Delete TRACE ifdef check.
 347         (store_memory): Likewise.
 348         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 349         [!WITH_TRACE_ANY_P] (dotrace): Define.
 350
 351 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 352
 353         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 354         comments.
 355
 356 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 357
 358         * sim-main.h (SIM_CPU): Delete.
 359
 360 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 361
 362         * sim-main.h (sim_cia): Delete.
 363
 364 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 365
 366         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 367         PU_PC_GET.
 368         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 369         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 370         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 371         CIA_SET to CPU_PC_SET.
 372         * sim-main.h (CIA_GET, CIA_SET): Delete.
 373
 374 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 375
 376         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 377         * sim-main.h (STATE_CPU): Delete.
 378
 379 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 380
 381         * configure: Regenerate.
 382
 383 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 384
 385         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 386         * interp.c (mips_pc_get, mips_pc_set): New functions.
 387         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 388         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 389         (sim_pc_get): Delete.
 390         * sim-main.h (SIM_CPU): Define.
 391         (struct sim_state): Change cpu to an array of pointers.
 392         (STATE_CPU): Drop &.
 393
 394 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 395
 396         * interp.c (mips_option_handler, open_trace, sim_close,
 397         sim_write, sim_read, sim_store_register, sim_fetch_register,
 398         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 399         prototypes.
 400         (sim_open): Convert old style prototype.  Change casts with
 401         sim_write to unsigned char *.
 402         (fetch_str): Change null to unsigned char, and change cast to
 403         unsigned char *.
 404         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 405         unsigned char *.
 406
 407 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 408
 409         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 410
 411 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 412
 413         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 414
 415 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 416
 417         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 418
 419 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 420
 421         * config.in, configure: Regenerate.
 422
 423 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 424
 425         * interp.c (sim_pc_get): New function.
 426
 427 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 428
 429         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 430         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 431
 432 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 433
 434         * configure: Regenerate.
 435
 436 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 437
 438         * configure: Regenerate.
 439
 440 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 441
 442         * configure: Regenerate.
 443         * configure.ac (mips_extra_objs): Delete.
 444         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 445         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 446
 447 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 448
 449         * configure: Regenerate.
 450         * configure.ac: Delete sim_hw checks for dv-sockser.
 451
 452 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 453
 454         * config.in, configure: Regenerate.
 455         * tconfig.in: Rename file ...
 456         * tconfig.h: ... here.
 457
 458 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 459
 460         * tconfig.in: Delete includes.
 461         [HAVE_DV_SOCKSER]: Delete.
 462
 463 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 464
 465         * Makefile.in (SIM_RUN_OBJS): Delete.
 466
 467 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 468
 469         * configure.ac (AC_CHECK_HEADERS): Delete.
 470         * aclocal.m4, configure: Regenerate.
 471
 472 2014-08-19  Alan Modra  <amodra@gmail.com>
 473
 474         * configure: Regenerate.
 475
 476 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 477
 478         * configure: Regenerate.
 479         * config.in: Regenerate.
 480
 481 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 482
 483         * configure: Regenerate.
 484
 485 2013-09-23  Alan Modra  <amodra@gmail.com>
 486
 487         * configure: Regenerate.
 488
 489 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 490
 491         * aclocal.m4, configure: Regenerate.
 492
 493 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 494
 495         * configure: Rebuild.
 496
 497 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 498
 499         * configure: Regenerate.
 500
 501 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 502
 503         * configure.ac: Address use of dv-sockser.o.
 504         * tconfig.in: Conditionalize use of dv_sockser_install.
 505         * configure: Regenerated.
 506         * config.in: Regenerated.
 507
 508 2012-10-04  Chao-ying Fu  <fu@mips.com>
 509             Steve Ellcey  <sellcey@mips.com>
 510
 511         * mips/mips3264r2.igen (rdhwr): New.
 512
 513 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 514
 515         * configure.ac: Always link against dv-sockser.o.
 516         * configure: Regenerate.
 517
 518 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 519
 520         * config.in, configure: Regenerate.
 521
 522 2012-05-18  Nick Clifton  <nickc@redhat.com>
 523
 524         PR 14072
 525         * interp.c: Include config.h before system header files.
 526
 527 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 528
 529         * aclocal.m4, config.in, configure: Regenerate.
 530
 531 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 532
 533         * aclocal.m4: New file.
 534         * configure: Regenerate.
 535
 536 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 537
 538         * configure: Regenerate after common/acinclude.m4 update.
 539
 540 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 541
 542         * configure.ac: Change include to common/acinclude.m4.
 543
 544 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 545
 546         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 547         call.  Replace common.m4 include with SIM_AC_COMMON.
 548         * configure: Regenerate.
 549
 550 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 551
 552         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 553         $(SIM_EXTRA_DEPS).
 554         (tmp-mach-multi): Exit early when igen fails.
 555
 556 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 557
 558         * interp.c (sim_do_command): Delete.
 559
 560 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 561
 562         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 563         (tx3904sio_fifo_reset): Likewise.
 564         * interp.c (sim_monitor): Likewise.
 565
 566 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 567
 568         * interp.c (sim_write): Add const to buffer arg.
 569
 570 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 571
 572         * interp.c: Don't include sysdep.h
 573
 574 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 575
 576         * configure: Regenerate.
 577
 578 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 579
 580         * config.in: Regenerate.
 581         * configure: Likewise.
 582
 583         * configure: Regenerate.
 584
 585 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 586
 587         * configure: Regenerate to track ../common/common.m4 changes.
 588         * config.in: Ditto.
 589
 590 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 591             Daniel Jacobowitz  <dan@codesourcery.com>
 592             Joseph Myers  <joseph@codesourcery.com>
 593
 594         * configure: Regenerate.
 595
 596 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 597
 598         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 599         that unconditionally allows fmt_ps.
 600         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 601         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 602         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 603         filter from 64,f to 32,f.
 604         (PREFX): Change filter from 64 to 32.
 605         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 606         that use do_load_double instead of do_load.  Make both LUXC1
 607         versions unpredictable if SizeFGR () != 64.
 608         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 609         instead of do_store.  Remove unused variable.  Make both SUXC1
 610         versions unpredictable if SizeFGR () != 64.
 611
 612 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 613
 614         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 615         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 616         shifts for that case.
 617
 618 2007-09-04  Nick Clifton  <nickc@redhat.com>
 619
 620         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 621         (display_mem_info): New static variable.
 622         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 623         (mips_options): Add info-memory and memory-info.
 624         (sim_open): After processing the command line and board
 625         specification, check display_mem_info.  If it is set then
 626         call the real handler for the --memory-info command line
 627         switch.
 628
 629 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 630
 631         * configure.ac: Change license of multi-run.c to GPL version 3.
 632         * configure: Regenerate.
 633
 634 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 635
 636         * configure.ac, configure: Revert last patch.
 637
 638 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 639
 640         * configure.ac (sim_mipsisa3264_configs): New variable.
 641         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 642         every configuration support all four targets, using the triplet to
 643         determine the default.
 644         * configure: Regenerate.
 645
 646 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 647
 648         * Makefile.in (m16run.o): New rule.
 649
 650 2007-05-15  Thiemo Seufer  <ths@mips.com>
 651
 652         * mips3264r2.igen (DSHD): Fix compile warning.
 653
 654 2007-05-14  Thiemo Seufer  <ths@mips.com>
 655
 656         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 657         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 658         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 659         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 660         for mips32r2.
 661
 662 2007-03-01  Thiemo Seufer  <ths@mips.com>
 663
 664         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 665         and mips64.
 666
 667 2007-02-20  Thiemo Seufer  <ths@mips.com>
 668
 669         * dsp.igen: Update copyright notice.
 670         * dsp2.igen: Fix copyright notice.
 671
 672 2007-02-20  Thiemo Seufer  <ths@mips.com>
 673             Chao-Ying Fu  <fu@mips.com>
 674
 675         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 676         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 677         Add dsp2 to sim_igen_machine.
 678         * configure: Regenerate.
 679         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 680         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 681         (mulq_rs.ph): Use do_ph_mulq.
 682         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 683         * mips.igen: Add dsp2 model and include dsp2.igen.
 684         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 685         for *mips32r2, *mips64r2, *dsp.
 686         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 687         for *mips32r2, *mips64r2, *dsp2.
 688         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 689
 690 2007-02-19  Thiemo Seufer  <ths@mips.com>
 691             Nigel Stephens  <nigel@mips.com>
 692
 693         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 694         jumps with hazard barrier.
 695
 696 2007-02-19  Thiemo Seufer  <ths@mips.com>
 697             Nigel Stephens  <nigel@mips.com>
 698
 699         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 700         after each call to sim_io_write.
 701
 702 2007-02-19  Thiemo Seufer  <ths@mips.com>
 703             Nigel Stephens  <nigel@mips.com>
 704
 705         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 706         supported by this simulator.
 707         (decode_coproc): Recognise additional CP0 Config registers
 708         correctly.
 709
 710 2007-02-19  Thiemo Seufer  <ths@mips.com>
 711             Nigel Stephens  <nigel@mips.com>
 712             David Ung  <davidu@mips.com>
 713
 714         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 715         uninterpreted formats. If fmt is one of the uninterpreted types
 716         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 717         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 718         (store_fpr): When writing an invalid odd register, set the
 719         matching even register to fmt_unknown, not the following register.
 720         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 721         the the memory window at offset 0 set by --memory-size command
 722         line option.
 723         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 724         point register.
 725         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 726         register.
 727         (sim_monitor): When returning the memory size to the MIPS
 728         application, use the value in STATE_MEM_SIZE, not an arbitrary
 729         hardcoded value.
 730         (cop_lw): Don' mess around with FPR_STATE, just pass
 731         fmt_uninterpreted_32 to StoreFPR.
 732         (cop_sw): Similarly.
 733         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 734         (cop_sd): Similarly.
 735         * mips.igen (not_word_value): Single version for mips32, mips64
 736         and mips16.
 737
 738 2007-02-19  Thiemo Seufer <ths@mips.com>
 739             Nigel Stephens  <nigel@mips.com>
 740
 741         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 742         MBytes.
 743
 744 2007-02-17  Thiemo Seufer  <ths@mips.com>
 745
 746         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 747         configuration.
 748         * configure: Regenerate.
 749
 750 2007-02-17  Thiemo Seufer  <ths@mips.com>
 751
 752         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 753         Add mdmx to sim_igen_machine.
 754         (mipsisa64*-*-*): Likewise. Remove dsp.
 755         (mipsisa32*-*-*): Remove dsp.
 756         * configure: Regenerate.
 757
 758 2007-02-13  Thiemo Seufer  <ths@mips.com>
 759
 760         * configure.ac: Add mips*-sde-elf* target.
 761         * configure: Regenerate.
 762
 763 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 764
 765         * acconfig.h: Remove.
 766         * config.in, configure: Regenerate.
 767
 768 2006-11-07  Thiemo Seufer  <ths@mips.com>
 769
 770         * dsp.igen (do_w_op): Fix compiler warning.
 771
 772 2006-08-29  Thiemo Seufer  <ths@mips.com>
 773             David Ung  <davidu@mips.com>
 774
 775         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 776         sim_igen_machine.
 777         * configure: Regenerate.
 778         * mips.igen (model): Add smartmips.
 779         (MADDU): Increment ACX if carry.
 780         (do_mult): Clear ACX.
 781         (ROR,RORV): Add smartmips.
 782         (include): Include smartmips.igen.
 783         * sim-main.h (ACX): Set to REGISTERS[89].
 784         * smartmips.igen: New file.
 785
 786 2006-08-29  Thiemo Seufer  <ths@mips.com>
 787             David Ung  <davidu@mips.com>
 788
 789         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 790         mips3264r2.igen. Add missing dependency rules.
 791         * m16e.igen: Support for mips16e save/restore instructions.
 792
 793 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 794
 795         * configure: Regenerated.
 796
 797 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 798
 799         * configure: Regenerated.
 800
 801 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 802
 803         * configure: Regenerated.
 804
 805 2006-05-15 Chao-ying Fu  <fu@mips.com>
 806
 807         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 808
 809 2006-04-18  Nick Clifton  <nickc@redhat.com>
 810
 811         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 812         statement.
 813
 814 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 815
 816         * configure: Regenerate.
 817
 818 2005-12-14  Chao-ying Fu  <fu@mips.com>
 819
 820         * Makefile.in (SIM_OBJS): Add dsp.o.
 821         (dsp.o): New dependency.
 822         (IGEN_INCLUDE): Add dsp.igen.
 823         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 824         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 825         * configure: Regenerate.
 826         * mips.igen: Add dsp model and include dsp.igen.
 827         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 828         because these instructions are extended in DSP ASE.
 829         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 830         adding 6 DSP accumulator registers and 1 DSP control register.
 831         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 832         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 833         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 834         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 835         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 836         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 837         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 838         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 839         DSPCR_CCOND_SMASK): New define.
 840         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 841         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 842
 843 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 844
 845         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 846
 847 2005-06-16  David Ung  <davidu@mips.com>
 848             Nigel Stephens  <nigel@mips.com>
 849
 850         * mips.igen: New mips16e model and include m16e.igen.
 851         (check_u64): Add mips16e tag.
 852         * m16e.igen: New file for MIPS16e instructions.
 853         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 854         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 855         models.
 856         * configure: Regenerate.
 857
 858 2005-05-26  David Ung  <davidu@mips.com>
 859
 860         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 861         tags to all instructions which are applicable to the new ISAs.
 862         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 863         vr.igen.
 864         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 865         instructions.
 866         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 867         to mips.igen.
 868         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 869         * configure: Regenerate.
 870
 871 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 872
 873         * configure: Regenerate.
 874
 875 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 876
 877         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 878         explicit call to AC_CONFIG_HEADER.
 879         * configure: Regenerate.
 880
 881 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 882
 883         * configure.ac: Update to use ../common/common.m4.
 884         * configure: Re-generate.
 885
 886 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 887
 888         * configure: Regenerated to track ../common/aclocal.m4 changes.
 889
 890 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 891
 892         * configure.ac: Rename configure.in, require autoconf 2.59.
 893         * configure: Re-generate.
 894
 895 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 896
 897         * configure: Regenerate for ../common/aclocal.m4 update.
 898
 899 2004-09-24  Monika Chaddha  <monika@acmet.com>
 900
 901         Committed by Andrew Cagney.
 902         * m16.igen (CMP, CMPI): Fix assembler.
 903
 904 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 905
 906         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 907         * configure: Regenerate.
 908
 909 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 910
 911         * configure.in (sim_m16_machine): Include mipsIII.
 912         * configure: Regenerate.
 913
 914 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 915
 916         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 917         from COP0_BADVADDR.
 918         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 919
 920 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 921
 922         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 923
 924 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 925
 926         * mips.igen (check_fmt): Remove.
 927         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 928         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 929         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 930         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 931         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 932         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 933         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 934         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 935         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 936         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 937
 938 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 939
 940         * sb1.igen (check_sbx): New function.
 941         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 942
 943 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 944             Richard Sandiford  <rsandifo@redhat.com>
 945
 946         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 947         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 948         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 949         separate implementations for mipsIV and mipsV.  Use new macros to
 950         determine whether the restrictions apply.
 951
 952 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 953
 954         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 955         (check_mult_hilo): Improve comments.
 956         (check_div_hilo): Likewise.  Also, fork off a new version
 957         to handle mips32/mips64 (since there are no hazards to check
 958         in MIPS32/MIPS64).
 959
 960 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 961
 962         * mips.igen (do_dmultx): Fix check for negative operands.
 963
 964 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 965
 966         * Makefile.in (SHELL): Make sure this is defined.
 967         (various): Use $(SHELL) whenever we invoke move-if-change.
 968
 969 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 970
 971         * cp1.c: Tweak attribution slightly.
 972         * cp1.h: Likewise.
 973         * mdmx.c: Likewise.
 974         * mdmx.igen: Likewise.
 975         * mips3d.igen: Likewise.
 976         * sb1.igen: Likewise.
 977
 978 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 979
 980         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 981         unsigned operands.
 982
 983 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 984
 985         * interp.c (sim_open): Rename _bfd to bfd.
 986         (sim_create_inferior): Ditto.
 987
 988 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 989
 990         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 991
 992 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 993
 994         * mips.igen (EI, DI): Remove.
 995
 996 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 997
 998         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 999
1000 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1001             Andrew Cagney  <ac131313@redhat.com>
1002             Gavin Romig-Koch  <gavin@redhat.com>
1003             Graydon Hoare  <graydon@redhat.com>
1004             Aldy Hernandez  <aldyh@redhat.com>
1005             Dave Brolley  <brolley@redhat.com>
1006             Chris Demetriou  <cgd@broadcom.com>
1007
1008         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1009         (sim_mach_default): New variable.
1010         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1011         Add a new simulator generator, MULTI.
1012         * configure: Regenerate.
1013         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1014         (multi-run.o): New dependency.
1015         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1016         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1017         (tmp-multi): Combine them.
1018         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1019         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1020         (distclean-extra): New rule.
1021         * sim-main.h: Include bfd.h.
1022         (MIPS_MACH): New macro.
1023         * mips.igen (vr4120, vr5400, vr5500): New models.
1024         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1025         * vr.igen: Replace with new version.
1026
1027 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1028
1029         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1030         * configure: Regenerate.
1031
1032 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1033
1034         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1035         * mips.igen: Remove all invocations of check_branch_bug and
1036         mark_branch_bug.
1037
1038 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1039
1040         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1041
1042 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1043
1044         * mips.igen (do_load_double, do_store_double): New functions.
1045         (LDC1, SDC1): Rename to...
1046         (LDC1b, SDC1b): respectively.
1047         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1048
1049 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1050
1051         * cp1.c (fp_recip2): Modify initialization expression so that
1052         GCC will recognize it as constant.
1053
1054 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1055
1056         * mdmx.c (SD_): Delete.
1057         (Unpredictable): Re-define, for now, to directly invoke
1058         unpredictable_action().
1059         (mdmx_acc_op): Fix error in .ob immediate handling.
1060
1061 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1062
1063         * interp.c (sim_firmware_command): Initialize `address'.
1064
1065 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1066
1067         * configure: Regenerated to track ../common/aclocal.m4 changes.
1068
1069 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1070             Ed Satterthwaite  <ehs@broadcom.com>
1071
1072         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1073         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1074         * mips.igen: Include mips3d.igen.
1075         (mips3d): New model name for MIPS-3D ASE instructions.
1076         (CVT.W.fmt): Don't use this instruction for word (source) format
1077         instructions.
1078         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1079         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1080         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1081         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1082         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1083         (RSquareRoot1, RSquareRoot2): New macros.
1084         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1085         (fp_rsqrt2): New functions.
1086         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1087         * configure: Regenerate.
1088
1089 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1090             Ed Satterthwaite  <ehs@broadcom.com>
1091
1092         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1093         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1094         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1095         (convert): Note that this function is not used for paired-single
1096         format conversions.
1097         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1098         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1099         (check_fmt_p): Enable paired-single support.
1100         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1101         (PUU.PS): New instructions.
1102         (CVT.S.fmt): Don't use this instruction for paired-single format
1103         destinations.
1104         * sim-main.h (FP_formats): New value 'fmt_ps.'
1105         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1106         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1107
1108 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1109
1110         * mips.igen: Fix formatting of function calls in
1111         many FP operations.
1112
1113 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1114
1115         * mips.igen (MOVN, MOVZ): Trace result.
1116         (TNEI): Print "tnei" as the opcode name in traces.
1117         (CEIL.W): Add disassembly string for traces.
1118         (RSQRT.fmt): Make location of disassembly string consistent
1119         with other instructions.
1120
1121 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1122
1123         * mips.igen (X): Delete unused function.
1124
1125 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1126
1127         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1128
1129 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1130             Ed Satterthwaite  <ehs@broadcom.com>
1131
1132         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1133         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1134         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1135         (fp_nmsub): New prototypes.
1136         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1137         (NegMultiplySub): New defines.
1138         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1139         (MADD.D, MADD.S): Replace with...
1140         (MADD.fmt): New instruction.
1141         (MSUB.D, MSUB.S): Replace with...
1142         (MSUB.fmt): New instruction.
1143         (NMADD.D, NMADD.S): Replace with...
1144         (NMADD.fmt): New instruction.
1145         (NMSUB.D, MSUB.S): Replace with...
1146         (NMSUB.fmt): New instruction.
1147
1148 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1149             Ed Satterthwaite  <ehs@broadcom.com>
1150
1151         * cp1.c: Fix more comment spelling and formatting.
1152         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1153         (denorm_mode): New function.
1154         (fpu_unary, fpu_binary): Round results after operation, collect
1155         status from rounding operations, and update the FCSR.
1156         (convert): Collect status from integer conversions and rounding
1157         operations, and update the FCSR.  Adjust NaN values that result
1158         from conversions.  Convert to use sim_io_eprintf rather than
1159         fprintf, and remove some debugging code.
1160         * cp1.h (fenr_FS): New define.
1161
1162 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1163
1164         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1165         rounding mode to sim FP rounding mode flag conversion code into...
1166         (rounding_mode): New function.
1167
1168 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1169
1170         * cp1.c: Clean up formatting of a few comments.
1171         (value_fpr): Reformat switch statement.
1172
1173 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1174             Ed Satterthwaite  <ehs@broadcom.com>
1175
1176         * cp1.h: New file.
1177         * sim-main.h: Include cp1.h.
1178         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1179         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1180         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1181         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1182         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1183         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1184         * cp1.c: Don't include sim-fpu.h; already included by
1185         sim-main.h.  Clean up formatting of some comments.
1186         (NaN, Equal, Less): Remove.
1187         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1188         (fp_cmp): New functions.
1189         * mips.igen (do_c_cond_fmt): Remove.
1190         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1191         Compare.  Add result tracing.
1192         (CxC1): Remove, replace with...
1193         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1194         (DMxC1): Remove, replace with...
1195         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1196         (MxC1): Remove, replace with...
1197         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1198
1199 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1200
1201         * sim-main.h (FGRIDX): Remove, replace all uses with...
1202         (FGR_BASE): New macro.
1203         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1204         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1205         (NR_FGR, FGR): Likewise.
1206         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1207         * mips.igen: Likewise.
1208
1209 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1210
1211         * cp1.c: Add an FSF Copyright notice to this file.
1212
1213 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1214             Ed Satterthwaite  <ehs@broadcom.com>
1215
1216         * cp1.c (Infinity): Remove.
1217         * sim-main.h (Infinity): Likewise.
1218
1219         * cp1.c (fp_unary, fp_binary): New functions.
1220         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1221         (fp_sqrt): New functions, implemented in terms of the above.
1222         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1223         (Recip, SquareRoot): Remove (replaced by functions above).
1224         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1225         (fp_recip, fp_sqrt): New prototypes.
1226         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1227         (Recip, SquareRoot): Replace prototypes with #defines which
1228         invoke the functions above.
1229
1230 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1231
1232         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1233         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1234         file, remove PARAMS from prototypes.
1235         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1236         simulator state arguments.
1237         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1238         pass simulator state arguments.
1239         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1240         (store_fpr, convert): Remove 'sd' argument.
1241         (value_fpr): Likewise.  Convert to use 'SD' instead.
1242
1243 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1244
1245         * cp1.c (Min, Max): Remove #if 0'd functions.
1246         * sim-main.h (Min, Max): Remove.
1247
1248 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1249
1250         * cp1.c: fix formatting of switch case and default labels.
1251         * interp.c: Likewise.
1252         * sim-main.c: Likewise.
1253
1254 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1255
1256         * cp1.c: Clean up comments which describe FP formats.
1257          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1258
1259 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1260             Ed Satterthwaite  <ehs@broadcom.com>
1261
1262         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1263         Broadcom SiByte SB-1 processor configurations.
1264         * configure: Regenerate.
1265         * sb1.igen: New file.
1266         * mips.igen: Include sb1.igen.
1267         (sb1): New model.
1268         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1269         * mdmx.igen: Add "sb1" model to all appropriate functions and
1270         instructions.
1271         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1272         (ob_func, ob_acc): Reference the above.
1273         (qh_acc): Adjust to keep the same size as ob_acc.
1274         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1275         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1276
1277 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1278
1279         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1280
1281 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1282             Ed Satterthwaite  <ehs@broadcom.com>
1283
1284         * mips.igen (mdmx): New (pseudo-)model.
1285         * mdmx.c, mdmx.igen: New files.
1286         * Makefile.in (SIM_OBJS): Add mdmx.o.
1287         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1288         New typedefs.
1289         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1290         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1291         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1292         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1293         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1294         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1295         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1296         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1297         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1298         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1299         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1300         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1301         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1302         (qh_fmtsel): New macros.
1303         (_sim_cpu): New member "acc".
1304         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1305         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1306
1307 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1308
1309         * interp.c: Use 'deprecated' rather than 'depreciated.'
1310         * sim-main.h: Likewise.
1311
1312 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1313
1314         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1315         which wouldn't compile anyway.
1316         * sim-main.h (unpredictable_action): New function prototype.
1317         (Unpredictable): Define to call igen function unpredictable().
1318         (NotWordValue): New macro to call igen function not_word_value().
1319         (UndefinedResult): Remove.
1320         * interp.c (undefined_result): Remove.
1321         (unpredictable_action): New function.
1322         * mips.igen (not_word_value, unpredictable): New functions.
1323         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1324         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1325         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1326         NotWordValue() to check for unpredictable inputs, then
1327         Unpredictable() to handle them.
1328
1329 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1330
1331         * mips.igen: Fix formatting of calls to Unpredictable().
1332
1333 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1334
1335         * interp.c (sim_open): Revert previous change.
1336
1337 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1338
1339         * interp.c (sim_open): Disable chunk of code that wrote code in
1340         vector table entries.
1341
1342 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1343
1344         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1345         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1346         unused definitions.
1347
1348 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1349
1350         * cp1.c: Fix many formatting issues.
1351
1352 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1353
1354         * cp1.c (fpu_format_name): New function to replace...
1355         (DOFMT): This.  Delete, and update all callers.
1356         (fpu_rounding_mode_name): New function to replace...
1357         (RMMODE): This.  Delete, and update all callers.
1358
1359 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1360
1361         * interp.c: Move FPU support routines from here to...
1362         * cp1.c: Here.  New file.
1363         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1364         (cp1.o): New target.
1365
1366 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1367
1368         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1369         * mips.igen (mips32, mips64): New models, add to all instructions
1370         and functions as appropriate.
1371         (loadstore_ea, check_u64): New variant for model mips64.
1372         (check_fmt_p): New variant for models mipsV and mips64, remove
1373         mipsV model marking fro other variant.
1374         (SLL) Rename to...
1375         (SLLa) this.
1376         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1377         for mips32 and mips64.
1378         (DCLO, DCLZ): New instructions for mips64.
1379
1380 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1381
1382         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1383         immediate or code as a hex value with the "%#lx" format.
1384         (ANDI): Likewise, and fix printed instruction name.
1385
1386 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1387
1388         * sim-main.h (UndefinedResult, Unpredictable): New macros
1389         which currently do nothing.
1390
1391 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1392
1393         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1394         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1395         (status_CU3): New definitions.
1396
1397         * sim-main.h (ExceptionCause): Add new values for MIPS32
1398         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1399         for DebugBreakPoint and NMIReset to note their status in
1400         MIPS32 and MIPS64.
1401         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1402         (SignalExceptionCacheErr): New exception macros.
1403
1404 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1405
1406         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1407         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1408         is always enabled.
1409         (SignalExceptionCoProcessorUnusable): Take as argument the
1410         unusable coprocessor number.
1411
1412 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1413
1414         * mips.igen: Fix formatting of all SignalException calls.
1415
1416 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1417
1418         * sim-main.h (SIGNEXTEND): Remove.
1419
1420 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1421
1422         * mips.igen: Remove gencode comment from top of file, fix
1423         spelling in another comment.
1424
1425 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1426
1427         * mips.igen (check_fmt, check_fmt_p): New functions to check
1428         whether specific floating point formats are usable.
1429         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1430         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1431         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1432         Use the new functions.
1433         (do_c_cond_fmt): Remove format checks...
1434         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1435
1436 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1437
1438         * mips.igen: Fix formatting of check_fpu calls.
1439
1440 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1441
1442         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1443
1444 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1445
1446         * mips.igen: Remove whitespace at end of lines.
1447
1448 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1449
1450         * mips.igen (loadstore_ea): New function to do effective
1451         address calculations.
1452         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1453         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1454         CACHE): Use loadstore_ea to do effective address computations.
1455
1456 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1457
1458         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1459         * mips.igen (LL, CxC1, MxC1): Likewise.
1460
1461 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1462
1463         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1464         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1465         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1466         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1467         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1468         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1469         Don't split opcode fields by hand, use the opcode field values
1470         provided by igen.
1471
1472 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1473
1474         * mips.igen (do_divu): Fix spacing.
1475
1476         * mips.igen (do_dsllv): Move to be right before DSLLV,
1477         to match the rest of the do_<shift> functions.
1478
1479 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1480
1481         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1482         DSRL32, do_dsrlv): Trace inputs and results.
1483
1484 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1485
1486         * mips.igen (CACHE): Provide instruction-printing string.
1487
1488         * interp.c (signal_exception): Comment tokens after #endif.
1489
1490 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1491
1492         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1493         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1494         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1495         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1496         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1497         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1498         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1499         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1500
1501 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1502
1503         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1504         instruction-printing string.
1505         (LWU): Use '64' as the filter flag.
1506
1507 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1508
1509         * mips.igen (SDXC1): Fix instruction-printing string.
1510
1511 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1512
1513         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1514         filter flags "32,f".
1515
1516 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1517
1518         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1519         as the filter flag.
1520
1521 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1522
1523         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1524         add a comma) so that it more closely match the MIPS ISA
1525         documentation opcode partitioning.
1526         (PREF): Put useful names on opcode fields, and include
1527         instruction-printing string.
1528
1529 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1530
1531         * mips.igen (check_u64): New function which in the future will
1532         check whether 64-bit instructions are usable and signal an
1533         exception if not.  Currently a no-op.
1534         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1535         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1536         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1537         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1538
1539         * mips.igen (check_fpu): New function which in the future will
1540         check whether FPU instructions are usable and signal an exception
1541         if not.  Currently a no-op.
1542         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1543         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1544         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1545         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1546         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1547         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1548         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1549         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1550
1551 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1552
1553         * mips.igen (do_load_left, do_load_right): Move to be immediately
1554         following do_load.
1555         (do_store_left, do_store_right): Move to be immediately following
1556         do_store.
1557
1558 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1559
1560         * mips.igen (mipsV): New model name.  Also, add it to
1561         all instructions and functions where it is appropriate.
1562
1563 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1564
1565         * mips.igen: For all functions and instructions, list model
1566         names that support that instruction one per line.
1567
1568 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1569
1570         * mips.igen: Add some additional comments about supported
1571         models, and about which instructions go where.
1572         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1573         order as is used in the rest of the file.
1574
1575 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1576
1577         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1578         indicating that ALU32_END or ALU64_END are there to check
1579         for overflow.
1580         (DADD): Likewise, but also remove previous comment about
1581         overflow checking.
1582
1583 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1584
1585         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1586         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1587         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1588         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1589         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1590         fields (i.e., add and move commas) so that they more closely
1591         match the MIPS ISA documentation opcode partitioning.
1592
1593 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1594
1595         * mips.igen (ADDI): Print immediate value.
1596         (BREAK): Print code.
1597         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1598         (SLL): Print "nop" specially, and don't run the code
1599         that does the shift for the "nop" case.
1600
1601 2001-11-17  Fred Fish  <fnf@redhat.com>
1602
1603         * sim-main.h (float_operation): Move enum declaration outside
1604         of _sim_cpu struct declaration.
1605
1606 2001-04-12  Jim Blandy  <jimb@redhat.com>
1607
1608         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1609         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1610         set of the FCSR.
1611         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1612         PENDING_FILL, and you can get the intended effect gracefully by
1613         calling PENDING_SCHED directly.
1614
1615 2001-02-23  Ben Elliston  <bje@redhat.com>
1616
1617         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1618         already defined elsewhere.
1619
1620 2001-02-19  Ben Elliston  <bje@redhat.com>
1621
1622         * sim-main.h (sim_monitor): Return an int.
1623         * interp.c (sim_monitor): Add return values.
1624         (signal_exception): Handle error conditions from sim_monitor.
1625
1626 2001-02-08  Ben Elliston  <bje@redhat.com>
1627
1628         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1629         (store_memory): Likewise, pass cia to sim_core_write*.
1630
1631 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1632
1633         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1634         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1635
1636 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1637
1638         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1639         * Makefile.in: Don't delete *.igen when cleaning directory.
1640
1641 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1642
1643         * m16.igen (break): Call SignalException not sim_engine_halt.
1644
1645 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1646
1647         From Jason Eckhardt:
1648         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1649
1650 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1651
1652         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1653
1654 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1655
1656         * mips.igen (do_dmultx): Fix typo.
1657
1658 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1659
1660         * configure: Regenerated to track ../common/aclocal.m4 changes.
1661
1662 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1663
1664         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1665
1666 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1667
1668         * sim-main.h (GPR_CLEAR): Define macro.
1669
1670 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1671
1672         * interp.c (decode_coproc): Output long using %lx and not %s.
1673
1674 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1675
1676         * interp.c (sim_open): Sort & extend dummy memory regions for
1677         --board=jmr3904 for eCos.
1678
1679 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1680
1681         * configure: Regenerated.
1682
1683 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1684
1685         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1686         calls, conditional on the simulator being in verbose mode.
1687
1688 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1689
1690         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1691         cache don't get ReservedInstruction traps.
1692
1693 1999-11-29  Mark Salter  <msalter@cygnus.com>
1694
1695         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1696         to clear status bits in sdisr register. This is how the hardware works.
1697
1698         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1699         being used by cygmon.
1700
1701 1999-11-11  Andrew Haley  <aph@cygnus.com>
1702
1703         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1704         instructions.
1705
1706 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1707
1708         * mips.igen (MULT): Correct previous mis-applied patch.
1709
1710 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1711
1712         * mips.igen (delayslot32): Handle sequence like
1713         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1714         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1715         (MULT): Actually pass the third register...
1716
1717 1999-09-03  Mark Salter  <msalter@cygnus.com>
1718
1719         * interp.c (sim_open): Added more memory aliases for additional
1720         hardware being touched by cygmon on jmr3904 board.
1721
1722 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1723
1724         * configure: Regenerated to track ../common/aclocal.m4 changes.
1725
1726 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1727
1728         * interp.c (sim_store_register): Handle case where client - GDB -
1729         specifies that a 4 byte register is 8 bytes in size.
1730         (sim_fetch_register): Ditto.
1731
1732 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1733
1734         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1735         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1736         (idt_monitor_base): Base address for IDT monitor traps.
1737         (pmon_monitor_base): Ditto for PMON.
1738         (lsipmon_monitor_base): Ditto for LSI PMON.
1739         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1740         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1741         (sim_firmware_command): New function.
1742         (mips_option_handler): Call it for OPTION_FIRMWARE.
1743         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1744         option was given, add no monitor by default.  Add BREAK hooks only if
1745         monitors are also there.
1746
1747 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1748
1749         * interp.c (sim_monitor): Flush output before reading input.
1750
1751 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1752
1753         * tconfig.in (SIM_HANDLES_LMA): Always define.
1754
1755 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1756
1757         From Mark Salter <msalter@cygnus.com>:
1758         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1759         (sim_open): Add setup for BSP board.
1760
1761 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1762
1763         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1764         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1765         them as unimplemented.
1766
1767 1999-05-08  Felix Lee  <flee@cygnus.com>
1768
1769         * configure: Regenerated to track ../common/aclocal.m4 changes.
1770
1771 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1772
1773         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1774
1775 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1776
1777         * configure.in: Any mips64vr5*-*-* target should have
1778         -DTARGET_ENABLE_FR=1.
1779         (default_endian): Any mips64vr*el-*-* target should default to
1780         LITTLE_ENDIAN.
1781         * configure: Re-generate.
1782
1783 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1784
1785         * mips.igen (ldl): Extend from _16_, not 32.
1786
1787 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1788
1789         * interp.c (sim_store_register): Force registers written to by GDB
1790         into an un-interpreted state.
1791
1792 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1793
1794         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1795         CPU, start periodic background I/O polls.
1796         (tx3904sio_poll): New function: periodic I/O poller.
1797
1798 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1799
1800         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1801
1802 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1803
1804         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1805         case statement.
1806
1807 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1808
1809         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1810         (load_word): Call SIM_CORE_SIGNAL hook on error.
1811         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1812         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1813         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1814         * sim-main.h (COP0_BADVADDR): Define.
1815         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1816         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1817         (_sim_cpu): Add exc_* fields to store register value snapshots.
1818         * mips.igen (*): Replace memory-related SignalException* calls
1819         with references to SIM_CORE_SIGNAL hook.
1820
1821         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1822         fix.
1823         * sim-main.c (*): Minor warning cleanups.
1824
1825 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1826
1827         * m16.igen (DADDIU5): Correct type-o.
1828
1829 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1830
1831         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1832         variables.
1833
1834 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1835
1836         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1837         to include path.
1838         (interp.o): Add dependency on itable.h
1839         (oengine.c, gencode): Delete remaining references.
1840         (BUILT_SRC_FROM_GEN): Clean up.
1841
1842 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1843
1844         * vr4run.c: New.
1845         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1846         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1847         tmp-run-hack) : New.
1848         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1849         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1850         Drop the "64" qualifier to get the HACK generator working.
1851         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1852         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1853         qualifier to get the hack generator working.
1854         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1855         (DSLL): Use do_dsll.
1856         (DSLLV): Use do_dsllv.
1857         (DSRA): Use do_dsra.
1858         (DSRL): Use do_dsrl.
1859         (DSRLV): Use do_dsrlv.
1860         (BC1): Move *vr4100 to get the HACK generator working.
1861         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1862         get the HACK generator working.
1863         (MACC) Rename to get the HACK generator working.
1864         (DMACC,MACCS,DMACCS): Add the 64.
1865
1866 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1867
1868         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1869         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1870
1871 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1872
1873     * mips/interp.c (DEBUG): Cleanups.
1874
1875 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1876
1877         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1878         (tx3904sio_tickle): fflush after a stdout character output.
1879
1880 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1881
1882         * interp.c (sim_close): Uninstall modules.
1883
1884 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1885
1886         * sim-main.h, interp.c (sim_monitor): Change to global
1887         function.
1888
1889 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1890
1891         * configure.in (vr4100): Only include vr4100 instructions in
1892         simulator.
1893         * configure: Re-generate.
1894         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1895
1896 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1897
1898         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1899         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1900         true alternative.
1901
1902         * configure.in (sim_default_gen, sim_use_gen): Replace with
1903         sim_gen.
1904         (--enable-sim-igen): Delete config option. Always using IGEN.
1905         * configure: Re-generate.
1906
1907         * Makefile.in (gencode): Kill, kill, kill.
1908         * gencode.c: Ditto.
1909
1910 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1911
1912         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1913         bit mips16 igen simulator.
1914         * configure: Re-generate.
1915
1916         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1917         as part of vr4100 ISA.
1918         * vr.igen: Mark all instructions as 64 bit only.
1919
1920 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1921
1922         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1923         Pacify GCC.
1924
1925 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1926
1927         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1928         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1929         * configure: Re-generate.
1930
1931         * m16.igen (BREAK): Define breakpoint instruction.
1932         (JALX32): Mark instruction as mips16 and not r3900.
1933         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1934
1935         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1936
1937 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1938
1939         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1940         insn as a debug breakpoint.
1941
1942         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1943         pending.slot_size.
1944         (PENDING_SCHED): Clean up trace statement.
1945         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1946         (PENDING_FILL): Delay write by only one cycle.
1947         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1948
1949         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1950         of pending writes.
1951         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1952         32 & 64.
1953         (pending_tick): Move incrementing of index to FOR statement.
1954         (pending_tick): Only update PENDING_OUT after a write has occured.
1955
1956         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1957         build simulator.
1958         * configure: Re-generate.
1959
1960         * interp.c (sim_engine_run OLD): Delete explicit call to
1961         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1962
1963 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1964
1965         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1966         interrupt level number to match changed SignalExceptionInterrupt
1967         macro.
1968
1969 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1970
1971         * interp.c: #include "itable.h" if WITH_IGEN.
1972         (get_insn_name): New function.
1973         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1974         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1975
1976 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1977
1978         * configure: Rebuilt to inhale new common/aclocal.m4.
1979
1980 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1981
1982         * dv-tx3904sio.c: Include sim-assert.h.
1983
1984 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1985
1986         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1987         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1988         Reorganize target-specific sim-hardware checks.
1989         * configure: rebuilt.
1990         * interp.c (sim_open): For tx39 target boards, set
1991         OPERATING_ENVIRONMENT, add tx3904sio devices.
1992         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1993         ROM executables.  Install dv-sockser into sim-modules list.
1994
1995         * dv-tx3904irc.c: Compiler warning clean-up.
1996         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1997         frequent hw-trace messages.
1998
1999 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2000
2001         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2002
2003 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2004
2005         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2006
2007         * vr.igen: New file.
2008         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2009         * mips.igen: Define vr4100 model. Include vr.igen.
2010 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2011
2012         * mips.igen (check_mf_hilo): Correct check.
2013
2014 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2015
2016         * sim-main.h (interrupt_event): Add prototype.
2017
2018         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2019         register_ptr, register_value.
2020         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2021
2022         * sim-main.h (tracefh): Make extern.
2023
2024 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2025
2026         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2027         Reduce unnecessarily high timer event frequency.
2028         * dv-tx3904cpu.c: Ditto for interrupt event.
2029
2030 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2031
2032         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2033         to allay warnings.
2034         (interrupt_event): Made non-static.
2035
2036         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2037         interchange of configuration values for external vs. internal
2038         clock dividers.
2039
2040 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2041
2042         * mips.igen (BREAK): Moved code to here for
2043         simulator-reserved break instructions.
2044         * gencode.c (build_instruction): Ditto.
2045         * interp.c (signal_exception): Code moved from here.  Non-
2046         reserved instructions now use exception vector, rather
2047         than halting sim.
2048         * sim-main.h: Moved magic constants to here.
2049
2050 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2051
2052         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2053         register upon non-zero interrupt event level, clear upon zero
2054         event value.
2055         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2056         by passing zero event value.
2057         (*_io_{read,write}_buffer): Endianness fixes.
2058         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2059         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2060
2061         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2062         serial I/O and timer module at base address 0xFFFF0000.
2063
2064 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2065
2066         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2067         and BigEndianCPU.
2068
2069 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2070
2071         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2072         parts.
2073         * configure: Update.
2074
2075 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2076
2077         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2078         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2079         * configure.in: Include tx3904tmr in hw_device list.
2080         * configure: Rebuilt.
2081         * interp.c (sim_open): Instantiate three timer instances.
2082         Fix address typo of tx3904irc instance.
2083
2084 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2085
2086         * interp.c (signal_exception): SystemCall exception now uses
2087         the exception vector.
2088
2089 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2090
2091         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2092         to allay warnings.
2093
2094 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2095
2096         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2097
2098 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2099
2100         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2101
2102         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2103         sim-main.h. Declare a struct hw_descriptor instead of struct
2104         hw_device_descriptor.
2105
2106 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2107
2108         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2109         right bits and then re-align left hand bytes to correct byte
2110         lanes.  Fix incorrect computation in do_store_left when loading
2111         bytes from second word.
2112
2113 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2114
2115         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2116         * interp.c (sim_open): Only create a device tree when HW is
2117         enabled.
2118
2119         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2120         * interp.c (signal_exception): Ditto.
2121
2122 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2123
2124         * gencode.c: Mark BEGEZALL as LIKELY.
2125
2126 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2127
2128         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2129         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2130
2131 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2132
2133         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2134         modules.  Recognize TX39 target with "mips*tx39" pattern.
2135         * configure: Rebuilt.
2136         * sim-main.h (*): Added many macros defining bits in
2137         TX39 control registers.
2138         (SignalInterrupt): Send actual PC instead of NULL.
2139         (SignalNMIReset): New exception type.
2140         * interp.c (board): New variable for future use to identify
2141         a particular board being simulated.
2142         (mips_option_handler,mips_options): Added "--board" option.
2143         (interrupt_event): Send actual PC.
2144         (sim_open): Make memory layout conditional on board setting.
2145         (signal_exception): Initial implementation of hardware interrupt
2146         handling.  Accept another break instruction variant for simulator
2147         exit.
2148         (decode_coproc): Implement RFE instruction for TX39.
2149         (mips.igen): Decode RFE instruction as such.
2150         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2151         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2152         bbegin to implement memory map.
2153         * dv-tx3904cpu.c: New file.
2154         * dv-tx3904irc.c: New file.
2155
2156 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2157
2158         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2159
2160 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2161
2162         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2163         with calls to check_div_hilo.
2164
2165 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2166
2167         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2168         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2169         Add special r3900 version of do_mult_hilo.
2170         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2171         with calls to check_mult_hilo.
2172         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2173         with calls to check_div_hilo.
2174
2175 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2176
2177         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2178         Document a replacement.
2179
2180 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2181
2182         * interp.c (sim_monitor): Make mon_printf work.
2183
2184 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2185
2186         * sim-main.h (INSN_NAME): New arg `cpu'.
2187
2188 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2189
2190         * configure: Regenerated to track ../common/aclocal.m4 changes.
2191
2192 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2193
2194         * configure: Regenerated to track ../common/aclocal.m4 changes.
2195         * config.in: Ditto.
2196
2197 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2198
2199         * acconfig.h: New file.
2200         * configure.in: Reverted change of Apr 24; use sinclude again.
2201
2202 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2203
2204         * configure: Regenerated to track ../common/aclocal.m4 changes.
2205         * config.in: Ditto.
2206
2207 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2208
2209         * configure.in: Don't call sinclude.
2210
2211 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2212
2213         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2214
2215 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2216
2217         * mips.igen (ERET): Implement.
2218
2219         * interp.c (decode_coproc): Return sign-extended EPC.
2220
2221         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2222
2223         * interp.c (signal_exception): Do not ignore Trap.
2224         (signal_exception): On TRAP, restart at exception address.
2225         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2226         (signal_exception): Update.
2227         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2228         so that TRAP instructions are caught.
2229
2230 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2231
2232         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2233         contains HI/LO access history.
2234         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2235         (HIACCESS, LOACCESS): Delete, replace with
2236         (HIHISTORY, LOHISTORY): New macros.
2237         (CHECKHILO): Delete all, moved to mips.igen
2238
2239         * gencode.c (build_instruction): Do not generate checks for
2240         correct HI/LO register usage.
2241
2242         * interp.c (old_engine_run): Delete checks for correct HI/LO
2243         register usage.
2244
2245         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2246         check_mf_cycles): New functions.
2247         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2248         do_divu, domultx, do_mult, do_multu): Use.
2249
2250         * tx.igen ("madd", "maddu"): Use.
2251
2252 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2253
2254         * mips.igen (DSRAV): Use function do_dsrav.
2255         (SRAV): Use new function do_srav.
2256
2257         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2258         (B): Sign extend 11 bit immediate.
2259         (EXT-B*): Shift 16 bit immediate left by 1.
2260         (ADDIU*): Don't sign extend immediate value.
2261
2262 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2263
2264         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2265
2266         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2267         functions.
2268
2269         * mips.igen (delayslot32, nullify_next_insn): New functions.
2270         (m16.igen): Always include.
2271         (do_*): Add more tracing.
2272
2273         * m16.igen (delayslot16): Add NIA argument, could be called by a
2274         32 bit MIPS16 instruction.
2275
2276         * interp.c (ifetch16): Move function from here.
2277         * sim-main.c (ifetch16): To here.
2278
2279         * sim-main.c (ifetch16, ifetch32): Update to match current
2280         implementations of LH, LW.
2281         (signal_exception): Don't print out incorrect hex value of illegal
2282         instruction.
2283
2284 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2285
2286         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2287         instruction.
2288
2289         * m16.igen: Implement MIPS16 instructions.
2290
2291         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2292         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2293         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2294         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2295         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2296         bodies of corresponding code from 32 bit insn to these.  Also used
2297         by MIPS16 versions of functions.
2298
2299         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2300         (IMEM16): Drop NR argument from macro.
2301
2302 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2303
2304         * Makefile.in (SIM_OBJS): Add sim-main.o.
2305
2306         * sim-main.h (address_translation, load_memory, store_memory,
2307         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2308         as INLINE_SIM_MAIN.
2309         (pr_addr, pr_uword64): Declare.
2310         (sim-main.c): Include when H_REVEALS_MODULE_P.
2311
2312         * interp.c (address_translation, load_memory, store_memory,
2313         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2314         from here.
2315         * sim-main.c: To here. Fix compilation problems.
2316
2317         * configure.in: Enable inlining.
2318         * configure: Re-config.
2319
2320 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2321
2322         * configure: Regenerated to track ../common/aclocal.m4 changes.
2323
2324 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2325
2326         * mips.igen: Include tx.igen.
2327         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2328         * tx.igen: New file, contains MADD and MADDU.
2329
2330         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2331         the hardwired constant `7'.
2332         (store_memory): Ditto.
2333         (LOADDRMASK): Move definition to sim-main.h.
2334
2335         mips.igen (MTC0): Enable for r3900.
2336         (ADDU): Add trace.
2337
2338         mips.igen (do_load_byte): Delete.
2339         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2340         do_store_right): New functions.
2341         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2342
2343         configure.in: Let the tx39 use igen again.
2344         configure: Update.
2345
2346 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2347
2348         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2349         not an address sized quantity.  Return zero for cache sizes.
2350
2351 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2352
2353         * mips.igen (r3900): r3900 does not support 64 bit integer
2354         operations.
2355
2356 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2357
2358         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2359         than igen one.
2360         * configure : Rebuild.
2361
2362 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2363
2364         * configure: Regenerated to track ../common/aclocal.m4 changes.
2365
2366 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2367
2368         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2369
2370 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2371
2372         * configure: Regenerated to track ../common/aclocal.m4 changes.
2373         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2374
2375 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2376
2377         * configure: Regenerated to track ../common/aclocal.m4 changes.
2378
2379 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2380
2381         * interp.c (Max, Min): Comment out functions. Not yet used.
2382
2383 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2384
2385         * configure: Regenerated to track ../common/aclocal.m4 changes.
2386
2387 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2388
2389         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2390         configurable settings for stand-alone simulator.
2391
2392         * configure.in: Added X11 search, just in case.
2393
2394         * configure: Regenerated.
2395
2396 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2397
2398         * interp.c (sim_write, sim_read, load_memory, store_memory):
2399         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2400
2401 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2402
2403         * sim-main.h (GETFCC): Return an unsigned value.
2404
2405 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2406
2407         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2408         (DADD): Result destination is RD not RT.
2409
2410 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2411
2412         * sim-main.h (HIACCESS, LOACCESS): Always define.
2413
2414         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2415
2416         * interp.c (sim_info): Delete.
2417
2418 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2419
2420         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2421         (mips_option_handler): New argument `cpu'.
2422         (sim_open): Update call to sim_add_option_table.
2423
2424 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2425
2426         * mips.igen (CxC1): Add tracing.
2427
2428 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2429
2430         * sim-main.h (Max, Min): Declare.
2431
2432         * interp.c (Max, Min): New functions.
2433
2434         * mips.igen (BC1): Add tracing.
2435
2436 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2437
2438         * interp.c Added memory map for stack in vr4100
2439
2440 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2441
2442         * interp.c (load_memory): Add missing "break"'s.
2443
2444 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2445
2446         * interp.c (sim_store_register, sim_fetch_register): Pass in
2447         length parameter.  Return -1.
2448
2449 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2450
2451         * interp.c: Added hardware init hook, fixed warnings.
2452
2453 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2454
2455         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2456
2457 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2458
2459         * interp.c (ifetch16): New function.
2460
2461         * sim-main.h (IMEM32): Rename IMEM.
2462         (IMEM16_IMMED): Define.
2463         (IMEM16): Define.
2464         (DELAY_SLOT): Update.
2465
2466         * m16run.c (sim_engine_run): New file.
2467
2468         * m16.igen: All instructions except LB.
2469         (LB): Call do_load_byte.
2470         * mips.igen (do_load_byte): New function.
2471         (LB): Call do_load_byte.
2472
2473         * mips.igen: Move spec for insn bit size and high bit from here.
2474         * Makefile.in (tmp-igen, tmp-m16): To here.
2475
2476         * m16.dc: New file, decode mips16 instructions.
2477
2478         * Makefile.in (SIM_NO_ALL): Define.
2479         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2480
2481 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2482
2483         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2484         point unit to 32 bit registers.
2485         * configure: Re-generate.
2486
2487 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2488
2489         * configure.in (sim_use_gen): Make IGEN the default simulator
2490         generator for generic 32 and 64 bit mips targets.
2491         * configure: Re-generate.
2492
2493 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2494
2495         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2496         bitsize.
2497
2498         * interp.c (sim_fetch_register, sim_store_register): Read/write
2499         FGR from correct location.
2500         (sim_open): Set size of FGR's according to
2501         WITH_TARGET_FLOATING_POINT_BITSIZE.
2502
2503         * sim-main.h (FGR): Store floating point registers in a separate
2504         array.
2505
2506 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2507
2508         * configure: Regenerated to track ../common/aclocal.m4 changes.
2509
2510 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2511
2512         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2513
2514         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2515
2516         * interp.c (pending_tick): New function.  Deliver pending writes.
2517
2518         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2519         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2520         it can handle mixed sized quantites and single bits.
2521
2522 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2523
2524         * interp.c (oengine.h): Do not include when building with IGEN.
2525         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2526         (sim_info): Ditto for PROCESSOR_64BIT.
2527         (sim_monitor): Replace ut_reg with unsigned_word.
2528         (*): Ditto for t_reg.
2529         (LOADDRMASK): Define.
2530         (sim_open): Remove defunct check that host FP is IEEE compliant,
2531         using software to emulate floating point.
2532         (value_fpr, ...): Always compile, was conditional on HASFPU.
2533
2534 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2535
2536         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2537         size.
2538
2539         * interp.c (SD, CPU): Define.
2540         (mips_option_handler): Set flags in each CPU.
2541         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2542         (sim_close): Do not clear STATE, deleted anyway.
2543         (sim_write, sim_read): Assume CPU zero's vm should be used for
2544         data transfers.
2545         (sim_create_inferior): Set the PC for all processors.
2546         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2547         argument.
2548         (mips16_entry): Pass correct nr of args to store_word, load_word.
2549         (ColdReset): Cold reset all cpu's.
2550         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2551         (sim_monitor, load_memory, store_memory, signal_exception): Use
2552         `CPU' instead of STATE_CPU.
2553
2554
2555         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2556         SD or CPU_.
2557
2558         * sim-main.h (signal_exception): Add sim_cpu arg.
2559         (SignalException*): Pass both SD and CPU to signal_exception.
2560         * interp.c (signal_exception): Update.
2561
2562         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2563         Ditto
2564         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2565         address_translation): Ditto
2566         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2567
2568 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2569
2570         * configure: Regenerated to track ../common/aclocal.m4 changes.
2571
2572 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2573
2574         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2575
2576         * mips.igen (model): Map processor names onto BFD name.
2577
2578         * sim-main.h (CPU_CIA): Delete.
2579         (SET_CIA, GET_CIA): Define
2580
2581 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2582
2583         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2584         regiser.
2585
2586         * configure.in (default_endian): Configure a big-endian simulator
2587         by default.
2588         * configure: Re-generate.
2589
2590 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2591
2592         * configure: Regenerated to track ../common/aclocal.m4 changes.
2593
2594 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2595
2596         * interp.c (sim_monitor): Handle Densan monitor outbyte
2597         and inbyte functions.
2598
2599 1997-12-29  Felix Lee  <flee@cygnus.com>
2600
2601         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2602
2603 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2604
2605         * Makefile.in (tmp-igen): Arrange for $zero to always be
2606         reset to zero after every instruction.
2607
2608 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2609
2610         * configure: Regenerated to track ../common/aclocal.m4 changes.
2611         * config.in: Ditto.
2612
2613 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2614
2615         * mips.igen (MSUB): Fix to work like MADD.
2616         * gencode.c (MSUB): Similarly.
2617
2618 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2619
2620         * configure: Regenerated to track ../common/aclocal.m4 changes.
2621
2622 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2623
2624         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2625
2626 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2627
2628         * sim-main.h (sim-fpu.h): Include.
2629
2630         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2631         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2632         using host independant sim_fpu module.
2633
2634 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2635
2636         * interp.c (signal_exception): Report internal errors with SIGABRT
2637         not SIGQUIT.
2638
2639         * sim-main.h (C0_CONFIG): New register.
2640         (signal.h): No longer include.
2641
2642         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2643
2644 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2645
2646         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2647
2648 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2649
2650         * mips.igen: Tag vr5000 instructions.
2651         (ANDI): Was missing mipsIV model, fix assembler syntax.
2652         (do_c_cond_fmt): New function.
2653         (C.cond.fmt): Handle mips I-III which do not support CC field
2654         separatly.
2655         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2656         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2657         in IV3.2 spec.
2658         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2659         vr5000 which saves LO in a GPR separatly.
2660
2661         * configure.in (enable-sim-igen): For vr5000, select vr5000
2662         specific instructions.
2663         * configure: Re-generate.
2664
2665 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2666
2667         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2668
2669         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2670         fmt_uninterpreted_64 bit cases to switch.  Convert to
2671         fmt_formatted,
2672
2673         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2674
2675         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2676         as specified in IV3.2 spec.
2677         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2678
2679 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2680
2681         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2682         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2683         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2684         PENDING_FILL versions of instructions.  Simplify.
2685         (X): New function.
2686         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2687         instructions.
2688         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2689         a signed value.
2690         (MTHI, MFHI): Disable code checking HI-LO.
2691
2692         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2693         global.
2694         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2695
2696 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2697
2698         * gencode.c (build_mips16_operands): Replace IPC with cia.
2699
2700         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2701         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2702         IPC to `cia'.
2703         (UndefinedResult): Replace function with macro/function
2704         combination.
2705         (sim_engine_run): Don't save PC in IPC.
2706
2707         * sim-main.h (IPC): Delete.
2708
2709
2710         * interp.c (signal_exception, store_word, load_word,
2711         address_translation, load_memory, store_memory, cache_op,
2712         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2713         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2714         current instruction address - cia - argument.
2715         (sim_read, sim_write): Call address_translation directly.
2716         (sim_engine_run): Rename variable vaddr to cia.
2717         (signal_exception): Pass cia to sim_monitor
2718
2719         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2720         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2721         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2722
2723         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2724         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2725         SIM_ASSERT.
2726
2727         * interp.c (signal_exception): Pass restart address to
2728         sim_engine_restart.
2729
2730         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2731         idecode.o): Add dependency.
2732
2733         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2734         Delete definitions
2735         (DELAY_SLOT): Update NIA not PC with branch address.
2736         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2737
2738         * mips.igen: Use CIA not PC in branch calculations.
2739         (illegal): Call SignalException.
2740         (BEQ, ADDIU): Fix assembler.
2741
2742 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2743
2744         * m16.igen (JALX): Was missing.
2745
2746         * configure.in (enable-sim-igen): New configuration option.
2747         * configure: Re-generate.
2748
2749         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2750
2751         * interp.c (load_memory, store_memory): Delete parameter RAW.
2752         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2753         bypassing {load,store}_memory.
2754
2755         * sim-main.h (ByteSwapMem): Delete definition.
2756
2757         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2758
2759         * interp.c (sim_do_command, sim_commands): Delete mips specific
2760         commands.  Handled by module sim-options.
2761
2762         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2763         (WITH_MODULO_MEMORY): Define.
2764
2765         * interp.c (sim_info): Delete code printing memory size.
2766
2767         * interp.c (mips_size): Nee sim_size, delete function.
2768         (power2): Delete.
2769         (monitor, monitor_base, monitor_size): Delete global variables.
2770         (sim_open, sim_close): Delete code creating monitor and other
2771         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2772         manage memory regions.
2773         (load_memory, store_memory): Use sim-core for memory model.
2774
2775         * interp.c (address_translation): Delete all memory map code
2776         except line forcing 32 bit addresses.
2777
2778 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2779
2780         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2781         trace options.
2782
2783         * interp.c (logfh, logfile): Delete globals.
2784         (sim_open, sim_close): Delete code opening & closing log file.
2785         (mips_option_handler): Delete -l and -n options.
2786         (OPTION mips_options): Ditto.
2787
2788         * interp.c (OPTION mips_options): Rename option trace to dinero.
2789         (mips_option_handler): Update.
2790
2791 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2792
2793         * interp.c (fetch_str): New function.
2794         (sim_monitor): Rewrite using sim_read & sim_write.
2795         (sim_open): Check magic number.
2796         (sim_open): Write monitor vectors into memory using sim_write.
2797         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2798         (sim_read, sim_write): Simplify - transfer data one byte at a
2799         time.
2800         (load_memory, store_memory): Clarify meaning of parameter RAW.
2801
2802         * sim-main.h (isHOST): Defete definition.
2803         (isTARGET): Mark as depreciated.
2804         (address_translation): Delete parameter HOST.
2805
2806         * interp.c (address_translation): Delete parameter HOST.
2807
2808 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2809
2810         * mips.igen:
2811
2812         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2813         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2814
2815 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2816
2817         * mips.igen: Add model filter field to records.
2818
2819 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2820
2821         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2822
2823         interp.c (sim_engine_run): Do not compile function sim_engine_run
2824         when WITH_IGEN == 1.
2825
2826         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2827         target architecture.
2828
2829         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2830         igen. Replace with configuration variables sim_igen_flags /
2831         sim_m16_flags.
2832
2833         * m16.igen: New file.  Copy mips16 insns here.
2834         * mips.igen: From here.
2835
2836 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2837
2838         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2839         to top.
2840         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2841
2842 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2843
2844         * gencode.c (build_instruction): Follow sim_write's lead in using
2845         BigEndianMem instead of !ByteSwapMem.
2846
2847 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2848
2849         * configure.in (sim_gen): Dependent on target, select type of
2850         generator.  Always select old style generator.
2851
2852         configure: Re-generate.
2853
2854         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2855         targets.
2856         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2857         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2858         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2859         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2860         SIM_@sim_gen@_*, set by autoconf.
2861
2862 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2863
2864         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2865
2866         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2867         CURRENT_FLOATING_POINT instead.
2868
2869         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2870         (address_translation): Raise exception InstructionFetch when
2871         translation fails and isINSTRUCTION.
2872
2873         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2874         sim_engine_run): Change type of of vaddr and paddr to
2875         address_word.
2876         (address_translation, prefetch, load_memory, store_memory,
2877         cache_op): Change type of vAddr and pAddr to address_word.
2878
2879         * gencode.c (build_instruction): Change type of vaddr and paddr to
2880         address_word.
2881
2882 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2883
2884         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2885         macro to obtain result of ALU op.
2886
2887 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2888
2889         * interp.c (sim_info): Call profile_print.
2890
2891 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2892
2893         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2894
2895         * sim-main.h (WITH_PROFILE): Do not define, defined in
2896         common/sim-config.h.  Use sim-profile module.
2897         (simPROFILE): Delete defintion.
2898
2899         * interp.c (PROFILE): Delete definition.
2900         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2901         (sim_close): Delete code writing profile histogram.
2902         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2903         Delete.
2904         (sim_engine_run): Delete code profiling the PC.
2905
2906 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2907
2908         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2909
2910         * interp.c (sim_monitor): Make register pointers of type
2911         unsigned_word*.
2912
2913         * sim-main.h: Make registers of type unsigned_word not
2914         signed_word.
2915
2916 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2917
2918         * interp.c (sync_operation): Rename from SyncOperation, make
2919         global, add SD argument.
2920         (prefetch): Rename from Prefetch, make global, add SD argument.
2921         (decode_coproc): Make global.
2922
2923         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2924
2925         * gencode.c (build_instruction): Generate DecodeCoproc not
2926         decode_coproc calls.
2927
2928         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2929         (SizeFGR): Move to sim-main.h
2930         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2931         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2932         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2933         sim-main.h.
2934         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2935         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2936         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2937         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2938         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2939         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2940
2941         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2942         exception.
2943         (sim-alu.h): Include.
2944         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2945         (sim_cia): Typedef to instruction_address.
2946
2947 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2948
2949         * Makefile.in (interp.o): Rename generated file engine.c to
2950         oengine.c.
2951
2952         * interp.c: Update.
2953
2954 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2955
2956         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2957
2958 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2959
2960         * gencode.c (build_instruction): For "FPSQRT", output correct
2961         number of arguments to Recip.
2962
2963 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2964
2965         * Makefile.in (interp.o): Depends on sim-main.h
2966
2967         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2968
2969         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2970         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2971         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2972         STATE, DSSTATE): Define
2973         (GPR, FGRIDX, ..): Define.
2974
2975         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2976         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2977         (GPR, FGRIDX, ...): Delete macros.
2978
2979         * interp.c: Update names to match defines from sim-main.h
2980
2981 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2982
2983         * interp.c (sim_monitor): Add SD argument.
2984         (sim_warning): Delete.  Replace calls with calls to
2985         sim_io_eprintf.
2986         (sim_error): Delete. Replace calls with sim_io_error.
2987         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2988         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2989         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2990         argument.
2991         (mips_size): Rename from sim_size. Add SD argument.
2992
2993         * interp.c (simulator): Delete global variable.
2994         (callback): Delete global variable.
2995         (mips_option_handler, sim_open, sim_write, sim_read,
2996         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2997         sim_size,sim_monitor): Use sim_io_* not callback->*.
2998         (sim_open): ZALLOC simulator struct.
2999         (PROFILE): Do not define.
3000
3001 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3002
3003         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3004         support.h with corresponding code.
3005
3006         * sim-main.h (word64, uword64), support.h: Move definition to
3007         sim-main.h.
3008         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3009
3010         * support.h: Delete
3011         * Makefile.in: Update dependencies
3012         * interp.c: Do not include.
3013
3014 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3015
3016         * interp.c (address_translation, load_memory, store_memory,
3017         cache_op): Rename to from AddressTranslation et.al., make global,
3018         add SD argument
3019
3020         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3021         CacheOp): Define.
3022
3023         * interp.c (SignalException): Rename to signal_exception, make
3024         global.
3025
3026         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3027
3028         * sim-main.h (SignalException, SignalExceptionInterrupt,
3029         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3030         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3031         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3032         Define.
3033
3034         * interp.c, support.h: Use.
3035
3036 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3037
3038         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3039         to value_fpr / store_fpr. Add SD argument.
3040         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3041         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3042
3043         * sim-main.h (ValueFPR, StoreFPR): Define.
3044
3045 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3046
3047         * interp.c (sim_engine_run): Check consistency between configure
3048         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3049         and HASFPU.
3050
3051         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3052         (mips_fpu): Configure WITH_FLOATING_POINT.
3053         (mips_endian): Configure WITH_TARGET_ENDIAN.
3054         * configure: Update.
3055
3056 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3057
3058         * configure: Regenerated to track ../common/aclocal.m4 changes.
3059
3060 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3061
3062         * configure: Regenerated.
3063
3064 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3065
3066         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3067
3068 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3069
3070         * gencode.c (print_igen_insn_models): Assume certain architectures
3071         include all mips* instructions.
3072         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3073         instruction.
3074
3075         * Makefile.in (tmp.igen): Add target. Generate igen input from
3076         gencode file.
3077
3078         * gencode.c (FEATURE_IGEN): Define.
3079         (main): Add --igen option.  Generate output in igen format.
3080         (process_instructions): Format output according to igen option.
3081         (print_igen_insn_format): New function.
3082         (print_igen_insn_models): New function.
3083         (process_instructions): Only issue warnings and ignore
3084         instructions when no FEATURE_IGEN.
3085
3086 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3087
3088         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3089         MIPS targets.
3090
3091 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3092
3093         * configure: Regenerated to track ../common/aclocal.m4 changes.
3094
3095 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3096
3097         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3098         SIM_RESERVED_BITS): Delete, moved to common.
3099         (SIM_EXTRA_CFLAGS): Update.
3100
3101 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3102
3103         * configure.in: Configure non-strict memory alignment.
3104         * configure: Regenerated to track ../common/aclocal.m4 changes.
3105
3106 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3107
3108         * configure: Regenerated to track ../common/aclocal.m4 changes.
3109
3110 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3111
3112         * gencode.c (SDBBP,DERET): Added (3900) insns.
3113         (RFE): Turn on for 3900.
3114         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3115         (dsstate): Made global.
3116         (SUBTARGET_R3900): Added.
3117         (CANCELDELAYSLOT): New.
3118         (SignalException): Ignore SystemCall rather than ignore and
3119         terminate.  Add DebugBreakPoint handling.
3120         (decode_coproc): New insns RFE, DERET; and new registers Debug
3121         and DEPC protected by SUBTARGET_R3900.
3122         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3123         bits explicitly.
3124         * Makefile.in,configure.in: Add mips subtarget option.
3125         * configure: Update.
3126
3127 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3128
3129         * gencode.c: Add r3900 (tx39).
3130
3131
3132 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3133
3134         * gencode.c (build_instruction): Don't need to subtract 4 for
3135         JALR, just 2.
3136
3137 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3138
3139         * interp.c: Correct some HASFPU problems.
3140
3141 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3142
3143         * configure: Regenerated to track ../common/aclocal.m4 changes.
3144
3145 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3146
3147         * interp.c (mips_options): Fix samples option short form, should
3148         be `x'.
3149
3150 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3151
3152         * interp.c (sim_info): Enable info code.  Was just returning.
3153
3154 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3155
3156         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3157         MFC0.
3158
3159 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3160
3161         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3162         constants.
3163         (build_instruction): Ditto for LL.
3164
3165 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3166
3167         * configure: Regenerated to track ../common/aclocal.m4 changes.
3168
3169 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3170
3171         * configure: Regenerated to track ../common/aclocal.m4 changes.
3172         * config.in: Ditto.
3173
3174 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3175
3176         * interp.c (sim_open): Add call to sim_analyze_program, update
3177         call to sim_config.
3178
3179 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3180
3181         * interp.c (sim_kill): Delete.
3182         (sim_create_inferior): Add ABFD argument. Set PC from same.
3183         (sim_load): Move code initializing trap handlers from here.
3184         (sim_open): To here.
3185         (sim_load): Delete, use sim-hload.c.
3186
3187         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3188
3189 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3190
3191         * configure: Regenerated to track ../common/aclocal.m4 changes.
3192         * config.in: Ditto.
3193
3194 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3195
3196         * interp.c (sim_open): Add ABFD argument.
3197         (sim_load): Move call to sim_config from here.
3198         (sim_open): To here.  Check return status.
3199
3200 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3201
3202         * gencode.c (build_instruction): Two arg MADD should
3203         not assign result to $0.
3204
3205 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3206
3207         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3208         * sim/mips/configure.in: Regenerate.
3209
3210 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3211
3212         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3213         signed8, unsigned8 et.al. types.
3214
3215         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3216         hosts when selecting subreg.
3217
3218 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3219
3220         * interp.c (sim_engine_run): Reset the ZERO register to zero
3221         regardless of FEATURE_WARN_ZERO.
3222         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3223
3224 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3225
3226         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3227         (SignalException): For BreakPoints ignore any mode bits and just
3228         save the PC.
3229         (SignalException): Always set the CAUSE register.
3230
3231 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3232
3233         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3234         exception has been taken.
3235
3236         * interp.c: Implement the ERET and mt/f sr instructions.
3237
3238 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3239
3240         * interp.c (SignalException): Don't bother restarting an
3241         interrupt.
3242
3243 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3244
3245         * interp.c (SignalException): Really take an interrupt.
3246         (interrupt_event): Only deliver interrupts when enabled.
3247
3248 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3249
3250         * interp.c (sim_info): Only print info when verbose.
3251         (sim_info) Use sim_io_printf for output.
3252
3253 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3254
3255         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3256         mips architectures.
3257
3258 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3259
3260         * interp.c (sim_do_command): Check for common commands if a
3261         simulator specific command fails.
3262
3263 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3264
3265         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3266         and simBE when DEBUG is defined.
3267
3268 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3269
3270         * interp.c (interrupt_event): New function.  Pass exception event
3271         onto exception handler.
3272
3273         * configure.in: Check for stdlib.h.
3274         * configure: Regenerate.
3275
3276         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3277         variable declaration.
3278         (build_instruction): Initialize memval1.
3279         (build_instruction): Add UNUSED attribute to byte, bigend,
3280         reverse.
3281         (build_operands): Ditto.
3282
3283         * interp.c: Fix GCC warnings.
3284         (sim_get_quit_code): Delete.
3285
3286         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3287         * Makefile.in: Ditto.
3288         * configure: Re-generate.
3289
3290         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3291
3292 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3293
3294         * interp.c (mips_option_handler): New function parse argumes using
3295         sim-options.
3296         (myname): Replace with STATE_MY_NAME.
3297         (sim_open): Delete check for host endianness - performed by
3298         sim_config.
3299         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3300         (sim_open): Move much of the initialization from here.
3301         (sim_load): To here.  After the image has been loaded and
3302         endianness set.
3303         (sim_open): Move ColdReset from here.
3304         (sim_create_inferior): To here.
3305         (sim_open): Make FP check less dependant on host endianness.
3306
3307         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3308         run.
3309         * interp.c (sim_set_callbacks): Delete.
3310
3311         * interp.c (membank, membank_base, membank_size): Replace with
3312         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3313         (sim_open): Remove call to callback->init. gdb/run do this.
3314
3315         * interp.c: Update
3316
3317         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3318
3319         * interp.c (big_endian_p): Delete, replaced by
3320         current_target_byte_order.
3321
3322 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3323
3324         * interp.c (host_read_long, host_read_word, host_swap_word,
3325         host_swap_long): Delete. Using common sim-endian.
3326         (sim_fetch_register, sim_store_register): Use H2T.
3327         (pipeline_ticks): Delete.  Handled by sim-events.
3328         (sim_info): Update.
3329         (sim_engine_run): Update.
3330
3331 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3332
3333         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3334         reason from here.
3335         (SignalException): To here. Signal using sim_engine_halt.
3336         (sim_stop_reason): Delete, moved to common.
3337
3338 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3339
3340         * interp.c (sim_open): Add callback argument.
3341         (sim_set_callbacks): Delete SIM_DESC argument.
3342         (sim_size): Ditto.
3343
3344 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3345
3346         * Makefile.in (SIM_OBJS): Add common modules.
3347
3348         * interp.c (sim_set_callbacks): Also set SD callback.
3349         (set_endianness, xfer_*, swap_*): Delete.
3350         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3351         Change to functions using sim-endian macros.
3352         (control_c, sim_stop): Delete, use common version.
3353         (simulate): Convert into.
3354         (sim_engine_run): This function.
3355         (sim_resume): Delete.
3356
3357         * interp.c (simulation): New variable - the simulator object.
3358         (sim_kind): Delete global - merged into simulation.
3359         (sim_load): Cleanup.  Move PC assignment from here.
3360         (sim_create_inferior): To here.
3361
3362         * sim-main.h: New file.
3363         * interp.c (sim-main.h): Include.
3364
3365 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3366
3367         * configure: Regenerated to track ../common/aclocal.m4 changes.
3368
3369 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3370
3371         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3372
3373 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3374
3375         * gencode.c (build_instruction): DIV instructions: check
3376         for division by zero and integer overflow before using
3377         host's division operation.
3378
3379 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3380
3381         * Makefile.in (SIM_OBJS): Add sim-load.o.
3382         * interp.c: #include bfd.h.
3383         (target_byte_order): Delete.
3384         (sim_kind, myname, big_endian_p): New static locals.
3385         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3386         after argument parsing.  Recognize -E arg, set endianness accordingly.
3387         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3388         load file into simulator.  Set PC from bfd.
3389         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3390         (set_endianness): Use big_endian_p instead of target_byte_order.
3391
3392 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3393
3394         * interp.c (sim_size): Delete prototype - conflicts with
3395         definition in remote-sim.h.  Correct definition.
3396
3397 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3398
3399         * configure: Regenerated to track ../common/aclocal.m4 changes.
3400         * config.in: Ditto.
3401
3402 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3403
3404         * interp.c (sim_open): New arg `kind'.
3405
3406         * configure: Regenerated to track ../common/aclocal.m4 changes.
3407
3408 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3409
3410         * configure: Regenerated to track ../common/aclocal.m4 changes.
3411
3412 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3413
3414         * interp.c (sim_open): Set optind to 0 before calling getopt.
3415
3416 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3417
3418         * configure: Regenerated to track ../common/aclocal.m4 changes.
3419
3420 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3421
3422         * interp.c : Replace uses of pr_addr with pr_uword64
3423         where the bit length is always 64 independent of SIM_ADDR.
3424         (pr_uword64) : added.
3425
3426 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3427
3428         * configure: Re-generate.
3429
3430 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3431
3432         * configure: Regenerate to track ../common/aclocal.m4 changes.
3433
3434 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3435
3436         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3437         in argv form.
3438         (other sim_*): New SIM_DESC argument.
3439
3440 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3441
3442         * interp.c: Fix printing of addresses for non-64-bit targets.
3443         (pr_addr): Add function to print address based on size.
3444
3445 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3446
3447         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3448
3449 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3450
3451         * gencode.c (build_mips16_operands): Correct computation of base
3452         address for extended PC relative instruction.
3453
3454 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3455
3456         * interp.c (mips16_entry): Add support for floating point cases.
3457         (SignalException): Pass floating point cases to mips16_entry.
3458         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3459         registers.
3460         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3461         or fmt_word.
3462         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3463         and then set the state to fmt_uninterpreted.
3464         (COP_SW): Temporarily set the state to fmt_word while calling
3465         ValueFPR.
3466
3467 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3468
3469         * gencode.c (build_instruction): The high order may be set in the
3470         comparison flags at any ISA level, not just ISA 4.
3471
3472 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3473
3474         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3475         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3476         * configure.in: sinclude ../common/aclocal.m4.
3477         * configure: Regenerated.
3478
3479 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3480
3481         * configure: Rebuild after change to aclocal.m4.
3482
3483 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3484
3485         * configure configure.in Makefile.in:  Update to new configure
3486         scheme which is more compatible with WinGDB builds.
3487         * configure.in:  Improve comment on how to run autoconf.
3488         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3489         * Makefile.in:  Use autoconf substitution to install common
3490         makefile fragment.
3491
3492 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3493
3494         * gencode.c (build_instruction): Use BigEndianCPU instead of
3495         ByteSwapMem.
3496
3497 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3498
3499         * interp.c (sim_monitor): Make output to stdout visible in
3500         wingdb's I/O log window.
3501
3502 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3503
3504         * support.h: Undo previous change to SIGTRAP
3505         and SIGQUIT values.
3506
3507 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3508
3509         * interp.c (store_word, load_word): New static functions.
3510         (mips16_entry): New static function.
3511         (SignalException): Look for mips16 entry and exit instructions.
3512         (simulate): Use the correct index when setting fpr_state after
3513         doing a pending move.
3514
3515 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3516
3517         * interp.c: Fix byte-swapping code throughout to work on
3518         both little- and big-endian hosts.
3519
3520 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3521
3522         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3523         with gdb/config/i386/xm-windows.h.
3524
3525 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3526
3527         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3528         that messes up arithmetic shifts.
3529
3530 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3531
3532         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3533         SIGTRAP and SIGQUIT for _WIN32.
3534
3535 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3536
3537         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3538         force a 64 bit multiplication.
3539         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3540         destination register is 0, since that is the default mips16 nop
3541         instruction.
3542
3543 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3544
3545         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3546         (build_endian_shift): Don't check proc64.
3547         (build_instruction): Always set memval to uword64.  Cast op2 to
3548         uword64 when shifting it left in memory instructions.  Always use
3549         the same code for stores--don't special case proc64.
3550
3551         * gencode.c (build_mips16_operands): Fix base PC value for PC
3552         relative operands.
3553         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3554         jal instruction.
3555         * interp.c (simJALDELAYSLOT): Define.
3556         (JALDELAYSLOT): Define.
3557         (INDELAYSLOT, INJALDELAYSLOT): Define.
3558         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3559
3560 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3561
3562         * interp.c (sim_open): add flush_cache as a PMON routine
3563         (sim_monitor): handle flush_cache by ignoring it
3564
3565 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3566
3567         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3568         BigEndianMem.
3569         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3570         (BigEndianMem): Rename to ByteSwapMem and change sense.
3571         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3572         BigEndianMem references to !ByteSwapMem.
3573         (set_endianness): New function, with prototype.
3574         (sim_open): Call set_endianness.
3575         (sim_info): Use simBE instead of BigEndianMem.
3576         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3577         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3578         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3579         ifdefs, keeping the prototype declaration.
3580         (swap_word): Rewrite correctly.
3581         (ColdReset): Delete references to CONFIG.  Delete endianness related
3582         code; moved to set_endianness.
3583
3584 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3585
3586         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3587         * interp.c (CHECKHILO): Define away.
3588         (simSIGINT): New macro.
3589         (membank_size): Increase from 1MB to 2MB.
3590         (control_c): New function.
3591         (sim_resume): Rename parameter signal to signal_number.  Add local
3592         variable prev.  Call signal before and after simulate.
3593         (sim_stop_reason): Add simSIGINT support.
3594         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3595         functions always.
3596         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3597         if logfh is NULL.
3598         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3599         a call to sim_warning.
3600
3601 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3602
3603         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3604         16 bit instructions.
3605
3606 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3607
3608         Add support for mips16 (16 bit MIPS implementation):
3609         * gencode.c (inst_type): Add mips16 instruction encoding types.
3610         (GETDATASIZEINSN): Define.
3611         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3612         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3613         mtlo.
3614         (MIPS16_DECODE): New table, for mips16 instructions.
3615         (bitmap_val): New static function.
3616         (struct mips16_op): Define.
3617         (mips16_op_table): New table, for mips16 operands.
3618         (build_mips16_operands): New static function.
3619         (process_instructions): If PC is odd, decode a mips16
3620         instruction.  Break out instruction handling into new
3621         build_instruction function.
3622         (build_instruction): New static function, broken out of
3623         process_instructions.  Check modifiers rather than flags for SHIFT
3624         bit count and m[ft]{hi,lo} direction.
3625         (usage): Pass program name to fprintf.
3626         (main): Remove unused variable this_option_optind.  Change
3627         ``*loptarg++'' to ``loptarg++''.
3628         (my_strtoul): Parenthesize && within ||.
3629         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3630         (simulate): If PC is odd, fetch a 16 bit instruction, and
3631         increment PC by 2 rather than 4.
3632         * configure.in: Add case for mips16*-*-*.
3633         * configure: Rebuild.
3634
3635 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3636
3637         * interp.c: Allow -t to enable tracing in standalone simulator.
3638         Fix garbage output in trace file and error messages.
3639
3640 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3641
3642         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3643         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3644         * configure.in: Simplify using macros in ../common/aclocal.m4.
3645         * configure: Regenerated.
3646         * tconfig.in: New file.
3647
3648 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3649
3650         * interp.c: Fix bugs in 64-bit port.
3651         Use ansi function declarations for msvc compiler.
3652         Initialize and test file pointer in trace code.
3653         Prevent duplicate definition of LAST_EMED_REGNUM.
3654
3655 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3656
3657         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3658
3659 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3660
3661         * interp.c (SignalException): Check for explicit terminating
3662         breakpoint value.
3663         * gencode.c: Pass instruction value through SignalException()
3664         calls for Trap, Breakpoint and Syscall.
3665
3666 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3667
3668         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3669         only used on those hosts that provide it.
3670         * configure.in: Add sqrt() to list of functions to be checked for.
3671         * config.in: Re-generated.
3672         * configure: Re-generated.
3673
3674 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3675
3676         * gencode.c (process_instructions): Call build_endian_shift when
3677         expanding STORE RIGHT, to fix swr.
3678         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3679         clear the high bits.
3680         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3681         Fix float to int conversions to produce signed values.
3682
3683 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3684
3685         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3686         (process_instructions): Correct handling of nor instruction.
3687         Correct shift count for 32 bit shift instructions. Correct sign
3688         extension for arithmetic shifts to not shift the number of bits in
3689         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3690         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3691         Fix madd.
3692         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3693         It's OK to have a mult follow a mult.  What's not OK is to have a
3694         mult follow an mfhi.
3695         (Convert): Comment out incorrect rounding code.
3696
3697 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3698
3699         * interp.c (sim_monitor): Improved monitor printf
3700         simulation. Tidied up simulator warnings, and added "--log" option
3701         for directing warning message output.
3702         * gencode.c: Use sim_warning() rather than WARNING macro.
3703
3704 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3705
3706         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3707         getopt1.o, rather than on gencode.c.  Link objects together.
3708         Don't link against -liberty.
3709         (gencode.o, getopt.o, getopt1.o): New targets.
3710         * gencode.c: Include <ctype.h> and "ansidecl.h".
3711         (AND): Undefine after including "ansidecl.h".
3712         (ULONG_MAX): Define if not defined.
3713         (OP_*): Don't define macros; now defined in opcode/mips.h.
3714         (main): Call my_strtoul rather than strtoul.
3715         (my_strtoul): New static function.
3716
3717 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3718
3719         * gencode.c (process_instructions):  Generate word64 and uword64
3720         instead of `long long' and `unsigned long long' data types.
3721         * interp.c:  #include sysdep.h to get signals, and define default
3722         for SIGBUS.
3723         * (Convert):  Work around for Visual-C++ compiler bug with type
3724         conversion.
3725         * support.h:  Make things compile under Visual-C++ by using
3726         __int64 instead of `long long'.  Change many refs to long long
3727         into word64/uword64 typedefs.
3728
3729 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3730
3731         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3732         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3733         (docdir): Removed.
3734         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3735         (AC_PROG_INSTALL): Added.
3736         (AC_PROG_CC): Moved to before configure.host call.
3737         * configure: Rebuilt.
3738
3739 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3740
3741         * configure.in: Define @SIMCONF@ depending on mips target.
3742         * configure: Rebuild.
3743         * Makefile.in (run): Add @SIMCONF@ to control simulator
3744         construction.
3745         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3746         * interp.c: Remove some debugging, provide more detailed error
3747         messages, update memory accesses to use LOADDRMASK.
3748
3749 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3750
3751         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3752         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3753         stamp-h.
3754         * configure: Rebuild.
3755         * config.in: New file, generated by autoheader.
3756         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3757         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3758         HAVE_ANINT and HAVE_AINT, as appropriate.
3759         * Makefile.in (run): Use @LIBS@ rather than -lm.
3760         (interp.o): Depend upon config.h.
3761         (Makefile): Just rebuild Makefile.
3762         (clean): Remove stamp-h.
3763         (mostlyclean): Make the same as clean, not as distclean.
3764         (config.h, stamp-h): New targets.
3765
3766 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3767
3768         * interp.c (ColdReset): Fix boolean test. Make all simulator
3769         globals static.
3770
3771 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3772
3773         * interp.c (xfer_direct_word, xfer_direct_long,
3774         swap_direct_word, swap_direct_long, xfer_big_word,
3775         xfer_big_long, xfer_little_word, xfer_little_long,
3776         swap_word,swap_long): Added.
3777         * interp.c (ColdReset): Provide function indirection to
3778         host<->simulated_target transfer routines.
3779         * interp.c (sim_store_register, sim_fetch_register): Updated to
3780         make use of indirected transfer routines.
3781
3782 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3783
3784         * gencode.c (process_instructions): Ensure FP ABS instruction
3785         recognised.
3786         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3787         system call support.
3788
3789 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3790
3791         * interp.c (sim_do_command): Complain if callback structure not
3792         initialised.
3793
3794 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3795
3796         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3797         support for Sun hosts.
3798         * Makefile.in (gencode): Ensure the host compiler and libraries
3799         used for cross-hosted build.
3800
3801 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3802
3803         * interp.c, gencode.c: Some more (TODO) tidying.
3804
3805 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3806
3807         * gencode.c, interp.c: Replaced explicit long long references with
3808         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3809         * support.h (SET64LO, SET64HI): Macros added.
3810
3811 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3812
3813         * configure: Regenerate with autoconf 2.7.
3814
3815 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3816
3817         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3818         * support.h: Remove superfluous "1" from #if.
3819         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3820
3821 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3822
3823         * interp.c (StoreFPR): Control UndefinedResult() call on
3824         WARN_RESULT manifest.
3825
3826 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3827
3828         * gencode.c: Tidied instruction decoding, and added FP instruction
3829         support.
3830
3831         * interp.c: Added dineroIII, and BSD profiling support. Also
3832         run-time FP handling.
3833
3834 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3835
3836         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3837         gencode.c, interp.c, support.h: created.