1 2021-06-20 Mike Frysinger <vapier@gentoo.org>
3 * configure.ac (SIM_AC_COMMON): Delete.
4 * aclocal.m4, configure: Regenerate.
6 2021-06-20 Mike Frysinger <vapier@gentoo.org>
8 * aclocal.m4: Regenerate.
9 * configure: Regenerate.
11 2021-06-19 Mike Frysinger <vapier@gentoo.org>
13 * aclocal.m4: Regenerate.
14 * configure: Regenerate.
16 2021-06-19 Mike Frysinger <vapier@gentoo.org>
18 * configure.ac: Delete AC_PATH_X call.
19 * configure: Regenerate.
21 2021-06-19 Mike Frysinger <vapier@gentoo.org>
23 * configure.ac: Delete AC_CHECK_LIB calls.
24 * configure: Regenerate.
26 2021-06-18 Mike Frysinger <vapier@gentoo.org>
28 * aclocal.m4, configure: Regenerate.
30 2021-06-18 Mike Frysinger <vapier@gentoo.org>
32 * Makefile.in (SIM_WERROR_CFLAGS): New variable.
33 * configure.ac: Delete call to SIM_AC_OPTION_WARNINGS.
34 * configure: Regenerate.
36 2021-06-18 Mike Frysinger <vapier@gentoo.org>
38 * interp.c: Include sim-signal.h.
40 2021-06-17 Mike Frysinger <vapier@gentoo.org>
42 * configure.ac: Delete SIM_AC_OPTION_ENDIAN call.
43 * aclocal.m4, configure: Regenerate.
45 2021-06-16 Mike Frysinger <vapier@gentoo.org>
47 * interp.c (dotrace): Make comment const.
48 * sim-main.h (dotrace): Likewise. Add ATTRIBUTE_PRINTF.
50 2021-06-16 Mike Frysinger <vapier@gentoo.org>
52 * interp.c (sim_monitor): Change ap type to address_word*.
53 (_P, P): New macros. Rewrite dynamic printf logic to use these.
55 2021-06-16 Mike Frysinger <vapier@gentoo.org>
57 * dv-tx3904sio.c (tx3904sio_fifo_push): Change next_buf to
60 2021-06-16 Mike Frysinger <vapier@gentoo.org>
62 * dv-tx3904irc.c (tx3904irc_io_write_buffer): Initialize
65 2021-06-16 Mike Frysinger <vapier@gentoo.org>
67 * configure: Regenerate.
69 2021-06-16 Mike Frysinger <vapier@gentoo.org>
71 * interp.c (sim_open): Change %lx to %x and PRIx macros.
73 2021-06-16 Mike Frysinger <vapier@gentoo.org>
75 * configure: Regenerate.
78 2021-06-15 Mike Frysinger <vapier@gentoo.org>
80 * config.in, configure: Regenerate.
82 2021-06-12 Mike Frysinger <vapier@gentoo.org>
84 * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
86 2021-06-12 Mike Frysinger <vapier@gentoo.org>
88 * aclocal.m4, config.in, configure: Regenerate.
90 2021-06-12 Mike Frysinger <vapier@gentoo.org>
92 * configure.ac: Delete call to AC_CHECK_FUNCS.
93 * config.in, configure: Regenerate.
95 2021-06-08 Mike Frysinger <vapier@gentoo.org>
97 * Makefile.in: Replace $(IGEN) with $(IGEN_RUN) and ../igen/igen
100 2021-05-29 Mike Frysinger <vapier@gentoo.org>
102 * interp.c [!HAVE_DV_SOCKSER] (sockser_addr): Define to NULL.
104 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
106 * interp.c (sim_open): Add shadow mappings from 32-bit
107 address space to 64-bit sign-extended address space.
109 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
111 * interp.c (sim_create_inferior): Only truncate sign extension
112 bits for 32-bit target models.
114 2021-05-17 Mike Frysinger <vapier@gentoo.org>
116 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
118 2021-05-17 Mike Frysinger <vapier@gentoo.org>
120 * interp.c (sim_open): Switch to sim_state_alloc_extra.
121 * micromips.igen: Change SD to mips_sim_state.
122 * micromipsrun.c (sim_engine_run): Likewise.
123 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
124 (watch_options_install): Delete.
125 (struct swatch): Delete.
126 (struct sim_state): Delete.
127 (struct mips_sim_state): New struct.
128 (MIPS_SIM_STATE): Define.
130 2021-05-16 Mike Frysinger <vapier@gentoo.org>
132 * interp.c: Replace config.h include with defs.h.
133 * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
134 dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
137 2021-05-16 Mike Frysinger <vapier@gentoo.org>
139 * config.in, configure: Regenerate.
141 2021-05-14 Mike Frysinger <vapier@gentoo.org>
143 * interp.c: Update include path.
145 2021-05-04 Mike Frysinger <vapier@gentoo.org>
147 * dv-tx3904sio.c: Include stdlib.h.
149 2021-05-04 Mike Frysinger <vapier@gentoo.org>
151 * configure.ac (hw_extra_devices): Inline contents into
152 SIM_AC_OPTION_HARDWARE and delete.
153 * configure: Regenerate.
155 2021-05-04 Mike Frysinger <vapier@gentoo.org>
157 * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
158 (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
159 * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
160 * configure: Regenerate.
162 2021-05-04 Mike Frysinger <vapier@gentoo.org>
164 * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
166 2021-05-04 Mike Frysinger <vapier@gentoo.org>
168 * configure: Regenerate.
170 2021-05-01 Mike Frysinger <vapier@gentoo.org>
172 * cp1.c (store_fcr): Mark static.
174 2021-05-01 Mike Frysinger <vapier@gentoo.org>
176 * config.in, configure: Regenerate.
178 2021-04-23 Mike Frysinger <vapier@gentoo.org>
180 * configure.ac (hw_enabled): Delete.
181 (SIM_AC_OPTION_HARDWARE): Delete first two args.
182 * configure: Regenerate.
184 2021-04-22 Tom Tromey <tom@tromey.com>
186 * configure, config.in: Rebuild.
188 2021-04-22 Tom Tromey <tom@tromey.com>
190 * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
192 (SIM_EXTRA_DEPS): New variable.
194 2021-04-22 Tom Tromey <tom@tromey.com>
196 * configure: Rebuild.
198 2021-04-21 Mike Frysinger <vapier@gentoo.org>
200 * aclocal.m4: Regenerate.
202 2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
204 * configure: Regenerate.
206 2021-04-18 Mike Frysinger <vapier@gentoo.org>
208 * configure: Regenerate.
210 2021-04-12 Mike Frysinger <vapier@gentoo.org>
212 * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
214 2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
216 * Makefile.in: Set ASAN_OPTIONS when running igen.
218 2021-04-04 Steve Ellcey <sellcey@mips.com>
219 Faraz Shahbazker <fshahbazker@wavecomp.com>
221 * interp.c (sim_monitor): Add switch entries for unlink (13),
222 lseek (14), and stat (15).
224 2021-04-02 Mike Frysinger <vapier@gentoo.org>
226 * Makefile.in (../igen/igen): Delete rule.
227 (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
229 2021-04-02 Mike Frysinger <vapier@gentoo.org>
231 * aclocal.m4, configure: Regenerate.
233 2021-02-28 Mike Frysinger <vapier@gentoo.org>
235 * configure: Regenerate.
237 2021-02-27 Mike Frysinger <vapier@gentoo.org>
239 * Makefile.in (SIM_EXTRA_ALL): Delete.
242 2021-02-21 Mike Frysinger <vapier@gentoo.org>
244 * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
245 * aclocal.m4, configure: Regenerate.
247 2021-02-13 Mike Frysinger <vapier@gentoo.org>
249 * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
250 * aclocal.m4, configure: Regenerate.
252 2021-02-06 Mike Frysinger <vapier@gentoo.org>
254 * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
256 2021-02-06 Mike Frysinger <vapier@gentoo.org>
258 * configure: Regenerate.
260 2021-01-30 Mike Frysinger <vapier@gentoo.org>
262 * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
264 2021-01-11 Mike Frysinger <vapier@gentoo.org>
266 * config.in, configure: Regenerate.
267 * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
268 and strings.h include.
270 2021-01-09 Mike Frysinger <vapier@gentoo.org>
272 * configure: Regenerate.
274 2021-01-09 Mike Frysinger <vapier@gentoo.org>
276 * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
277 * configure: Regenerate.
279 2021-01-08 Mike Frysinger <vapier@gentoo.org>
281 * configure: Regenerate.
283 2021-01-04 Mike Frysinger <vapier@gentoo.org>
285 * configure: Regenerate.
287 2020-12-31 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
289 * sim-main.c: Include <stdlib.h>.
291 2020-12-14 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
293 * cp1.c: Include <stdlib.h>.
295 2020-07-29 Simon Marchi <simon.marchi@efficios.com>
297 * configure: Re-generate.
299 2017-09-06 John Baldwin <jhb@FreeBSD.org>
301 * configure: Regenerate.
303 2016-11-11 Mike Frysinger <vapier@gentoo.org>
306 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
309 2016-11-11 Mike Frysinger <vapier@gentoo.org>
312 * mips.igen (check_u64): Enable for `r3900'.
314 2016-02-05 Mike Frysinger <vapier@gentoo.org>
316 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
318 * configure: Regenerate.
320 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
321 Maciej W. Rozycki <macro@imgtec.com>
324 * micromips.igen (delayslot_micromips): Enable for `micromips32',
325 `micromips64' and `micromipsdsp' only.
326 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
327 (do_micromips_jalr, do_micromips_jal): Likewise.
328 (compute_movep_src_reg): Likewise.
329 (compute_andi16_imm): Likewise.
330 (convert_fmt_micromips): Likewise.
331 (convert_fmt_micromips_cvt_d): Likewise.
332 (convert_fmt_micromips_cvt_s): Likewise.
333 (FMT_MICROMIPS): Likewise.
334 (FMT_MICROMIPS_CVT_D): Likewise.
335 (FMT_MICROMIPS_CVT_S): Likewise.
337 2016-01-12 Mike Frysinger <vapier@gentoo.org>
339 * interp.c: Include elf-bfd.h.
340 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
343 2016-01-10 Mike Frysinger <vapier@gentoo.org>
345 * config.in, configure: Regenerate.
347 2016-01-10 Mike Frysinger <vapier@gentoo.org>
349 * configure: Regenerate.
351 2016-01-10 Mike Frysinger <vapier@gentoo.org>
353 * configure: Regenerate.
355 2016-01-10 Mike Frysinger <vapier@gentoo.org>
357 * configure: Regenerate.
359 2016-01-10 Mike Frysinger <vapier@gentoo.org>
361 * configure: Regenerate.
363 2016-01-10 Mike Frysinger <vapier@gentoo.org>
365 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
366 * configure: Regenerate.
368 2016-01-10 Mike Frysinger <vapier@gentoo.org>
370 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
371 * configure: Regenerate.
373 2016-01-10 Mike Frysinger <vapier@gentoo.org>
375 * configure: Regenerate.
377 2016-01-10 Mike Frysinger <vapier@gentoo.org>
379 * configure: Regenerate.
381 2016-01-09 Mike Frysinger <vapier@gentoo.org>
383 * config.in, configure: Regenerate.
385 2016-01-06 Mike Frysinger <vapier@gentoo.org>
387 * interp.c (sim_open): Mark argv const.
388 (sim_create_inferior): Mark argv and env const.
390 2016-01-04 Mike Frysinger <vapier@gentoo.org>
392 * configure: Regenerate.
394 2016-01-03 Mike Frysinger <vapier@gentoo.org>
396 * interp.c (sim_open): Update sim_parse_args comment.
398 2016-01-03 Mike Frysinger <vapier@gentoo.org>
400 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
401 * configure: Regenerate.
403 2016-01-02 Mike Frysinger <vapier@gentoo.org>
405 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
406 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
407 * configure: Regenerate.
408 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
410 2016-01-02 Mike Frysinger <vapier@gentoo.org>
412 * dv-tx3904cpu.c (CPU, SD): Delete.
414 2015-12-30 Mike Frysinger <vapier@gentoo.org>
416 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
417 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
418 (sim_store_register): Rename to ...
419 (mips_reg_store): ... this. Delete local cpu var.
420 Update sim_io_eprintf calls.
421 (sim_fetch_register): Rename to ...
422 (mips_reg_fetch): ... this. Delete local cpu var.
423 Update sim_io_eprintf calls.
425 2015-12-27 Mike Frysinger <vapier@gentoo.org>
427 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
429 2015-12-26 Mike Frysinger <vapier@gentoo.org>
431 * config.in, configure: Regenerate.
433 2015-12-26 Mike Frysinger <vapier@gentoo.org>
435 * interp.c (sim_write, sim_read): Delete.
436 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
437 (load_word): Likewise.
438 * micromips.igen (cache): Likewise.
439 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
440 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
441 do_store_left, do_store_right, do_load_double, do_store_double):
443 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
444 (do_prefx): Likewise.
445 * sim-main.c (address_translation, prefetch): Delete.
446 (ifetch32, ifetch16): Delete call to AddressTranslation and set
448 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
449 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
450 (LoadMemory, StoreMemory): Delete CCA arg.
452 2015-12-24 Mike Frysinger <vapier@gentoo.org>
454 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
455 * configure: Regenerated.
457 2015-12-24 Mike Frysinger <vapier@gentoo.org>
459 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
462 2015-12-24 Mike Frysinger <vapier@gentoo.org>
464 * tconfig.h (SIM_HANDLES_LMA): Delete.
466 2015-12-24 Mike Frysinger <vapier@gentoo.org>
468 * sim-main.h (WITH_WATCHPOINTS): Delete.
470 2015-12-24 Mike Frysinger <vapier@gentoo.org>
472 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
474 2015-12-24 Mike Frysinger <vapier@gentoo.org>
476 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
478 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
480 * micromips.igen (process_isa_mode): Fix left shift of negative
483 2015-11-17 Mike Frysinger <vapier@gentoo.org>
485 * sim-main.h (WITH_MODULO_MEMORY): Delete.
487 2015-11-15 Mike Frysinger <vapier@gentoo.org>
489 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
491 2015-11-14 Mike Frysinger <vapier@gentoo.org>
493 * interp.c (sim_close): Rename to ...
494 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
496 * sim-main.h (mips_sim_close): Declare.
497 (SIM_CLOSE_HOOK): Define.
499 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
500 Ali Lown <ali.lown@imgtec.com>
502 * Makefile.in (tmp-micromips): New rule.
503 (tmp-mach-multi): Add support for micromips.
504 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
505 that works for both mips64 and micromips64.
506 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
508 Add build support for micromips.
509 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
510 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
511 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
512 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
513 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
514 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
515 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
516 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
517 Refactored instruction code to use these functions.
518 * dsp2.igen: Refactored instruction code to use the new functions.
519 * interp.c (decode_coproc): Refactored to work with any instruction
521 (isa_mode): New variable
522 (RSVD_INSTRUCTION): Changed to 0x00000039.
523 * m16.igen (BREAK16): Refactored instruction to use do_break16.
524 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
525 * micromips.dc: New file.
526 * micromips.igen: New file.
527 * micromips16.dc: New file.
528 * micromipsdsp.igen: New file.
529 * micromipsrun.c: New file.
530 * mips.igen (do_swc1): Changed to work with any instruction encoding.
531 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
532 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
533 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
534 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
535 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
536 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
537 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
538 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
539 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
540 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
541 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
542 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
543 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
544 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
545 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
546 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
547 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
548 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
550 Refactored instruction code to use these functions.
551 (RSVD): Changed to use new reserved instruction.
552 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
553 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
554 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
555 do_store_double): Added micromips32 and micromips64 models.
556 Added include for micromips.igen and micromipsdsp.igen
557 Add micromips32 and micromips64 models.
558 (DecodeCoproc): Updated to use new macro definition.
559 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
560 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
561 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
562 Refactored instruction code to use these functions.
563 * sim-main.h (CP0_operation): New enum.
564 (DecodeCoproc): Updated macro.
565 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
566 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
567 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
568 ISA_MODE_MICROMIPS): New defines.
569 (sim_state): Add isa_mode field.
571 2015-06-23 Mike Frysinger <vapier@gentoo.org>
573 * configure: Regenerate.
575 2015-06-12 Mike Frysinger <vapier@gentoo.org>
577 * configure.ac: Change configure.in to configure.ac.
578 * configure: Regenerate.
580 2015-06-12 Mike Frysinger <vapier@gentoo.org>
582 * configure: Regenerate.
584 2015-06-12 Mike Frysinger <vapier@gentoo.org>
586 * interp.c [TRACE]: Delete.
587 (TRACE): Change to WITH_TRACE_ANY_P.
588 [!WITH_TRACE_ANY_P] (open_trace): Define.
589 (mips_option_handler, open_trace, sim_close, dotrace):
590 Change defined(TRACE) to WITH_TRACE_ANY_P.
591 (sim_open): Delete TRACE ifdef check.
592 * sim-main.c (load_memory): Delete TRACE ifdef check.
593 (store_memory): Likewise.
594 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
595 [!WITH_TRACE_ANY_P] (dotrace): Define.
597 2015-04-18 Mike Frysinger <vapier@gentoo.org>
599 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
602 2015-04-18 Mike Frysinger <vapier@gentoo.org>
604 * sim-main.h (SIM_CPU): Delete.
606 2015-04-18 Mike Frysinger <vapier@gentoo.org>
608 * sim-main.h (sim_cia): Delete.
610 2015-04-17 Mike Frysinger <vapier@gentoo.org>
612 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
614 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
615 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
616 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
617 CIA_SET to CPU_PC_SET.
618 * sim-main.h (CIA_GET, CIA_SET): Delete.
620 2015-04-15 Mike Frysinger <vapier@gentoo.org>
622 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
623 * sim-main.h (STATE_CPU): Delete.
625 2015-04-13 Mike Frysinger <vapier@gentoo.org>
627 * configure: Regenerate.
629 2015-04-13 Mike Frysinger <vapier@gentoo.org>
631 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
632 * interp.c (mips_pc_get, mips_pc_set): New functions.
633 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
634 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
635 (sim_pc_get): Delete.
636 * sim-main.h (SIM_CPU): Define.
637 (struct sim_state): Change cpu to an array of pointers.
640 2015-04-13 Mike Frysinger <vapier@gentoo.org>
642 * interp.c (mips_option_handler, open_trace, sim_close,
643 sim_write, sim_read, sim_store_register, sim_fetch_register,
644 sim_create_inferior, pr_addr, pr_uword64): Convert old style
646 (sim_open): Convert old style prototype. Change casts with
647 sim_write to unsigned char *.
648 (fetch_str): Change null to unsigned char, and change cast to
650 (sim_monitor): Change c & ch to unsigned char. Change cast to
653 2015-04-12 Mike Frysinger <vapier@gentoo.org>
655 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
657 2015-04-06 Mike Frysinger <vapier@gentoo.org>
659 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
661 2015-04-01 Mike Frysinger <vapier@gentoo.org>
663 * tconfig.h (SIM_HAVE_PROFILE): Delete.
665 2015-03-31 Mike Frysinger <vapier@gentoo.org>
667 * config.in, configure: Regenerate.
669 2015-03-24 Mike Frysinger <vapier@gentoo.org>
671 * interp.c (sim_pc_get): New function.
673 2015-03-24 Mike Frysinger <vapier@gentoo.org>
675 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
676 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
678 2015-03-24 Mike Frysinger <vapier@gentoo.org>
680 * configure: Regenerate.
682 2015-03-23 Mike Frysinger <vapier@gentoo.org>
684 * configure: Regenerate.
686 2015-03-23 Mike Frysinger <vapier@gentoo.org>
688 * configure: Regenerate.
689 * configure.ac (mips_extra_objs): Delete.
690 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
691 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
693 2015-03-23 Mike Frysinger <vapier@gentoo.org>
695 * configure: Regenerate.
696 * configure.ac: Delete sim_hw checks for dv-sockser.
698 2015-03-16 Mike Frysinger <vapier@gentoo.org>
700 * config.in, configure: Regenerate.
701 * tconfig.in: Rename file ...
702 * tconfig.h: ... here.
704 2015-03-15 Mike Frysinger <vapier@gentoo.org>
706 * tconfig.in: Delete includes.
707 [HAVE_DV_SOCKSER]: Delete.
709 2015-03-14 Mike Frysinger <vapier@gentoo.org>
711 * Makefile.in (SIM_RUN_OBJS): Delete.
713 2015-03-14 Mike Frysinger <vapier@gentoo.org>
715 * configure.ac (AC_CHECK_HEADERS): Delete.
716 * aclocal.m4, configure: Regenerate.
718 2014-08-19 Alan Modra <amodra@gmail.com>
720 * configure: Regenerate.
722 2014-08-15 Roland McGrath <mcgrathr@google.com>
724 * configure: Regenerate.
725 * config.in: Regenerate.
727 2014-03-04 Mike Frysinger <vapier@gentoo.org>
729 * configure: Regenerate.
731 2013-09-23 Alan Modra <amodra@gmail.com>
733 * configure: Regenerate.
735 2013-06-03 Mike Frysinger <vapier@gentoo.org>
737 * aclocal.m4, configure: Regenerate.
739 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
741 * configure: Rebuild.
743 2013-03-26 Mike Frysinger <vapier@gentoo.org>
745 * configure: Regenerate.
747 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
749 * configure.ac: Address use of dv-sockser.o.
750 * tconfig.in: Conditionalize use of dv_sockser_install.
751 * configure: Regenerated.
752 * config.in: Regenerated.
754 2012-10-04 Chao-ying Fu <fu@mips.com>
755 Steve Ellcey <sellcey@mips.com>
757 * mips/mips3264r2.igen (rdhwr): New.
759 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
761 * configure.ac: Always link against dv-sockser.o.
762 * configure: Regenerate.
764 2012-06-15 Joel Brobecker <brobecker@adacore.com>
766 * config.in, configure: Regenerate.
768 2012-05-18 Nick Clifton <nickc@redhat.com>
771 * interp.c: Include config.h before system header files.
773 2012-03-24 Mike Frysinger <vapier@gentoo.org>
775 * aclocal.m4, config.in, configure: Regenerate.
777 2011-12-03 Mike Frysinger <vapier@gentoo.org>
779 * aclocal.m4: New file.
780 * configure: Regenerate.
782 2011-10-19 Mike Frysinger <vapier@gentoo.org>
784 * configure: Regenerate after common/acinclude.m4 update.
786 2011-10-17 Mike Frysinger <vapier@gentoo.org>
788 * configure.ac: Change include to common/acinclude.m4.
790 2011-10-17 Mike Frysinger <vapier@gentoo.org>
792 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
793 call. Replace common.m4 include with SIM_AC_COMMON.
794 * configure: Regenerate.
796 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
798 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
800 (tmp-mach-multi): Exit early when igen fails.
802 2011-07-05 Mike Frysinger <vapier@gentoo.org>
804 * interp.c (sim_do_command): Delete.
806 2011-02-14 Mike Frysinger <vapier@gentoo.org>
808 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
809 (tx3904sio_fifo_reset): Likewise.
810 * interp.c (sim_monitor): Likewise.
812 2010-04-14 Mike Frysinger <vapier@gentoo.org>
814 * interp.c (sim_write): Add const to buffer arg.
816 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
818 * interp.c: Don't include sysdep.h
820 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
822 * configure: Regenerate.
824 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
826 * config.in: Regenerate.
827 * configure: Likewise.
829 * configure: Regenerate.
831 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
833 * configure: Regenerate to track ../common/common.m4 changes.
836 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
837 Daniel Jacobowitz <dan@codesourcery.com>
838 Joseph Myers <joseph@codesourcery.com>
840 * configure: Regenerate.
842 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
844 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
845 that unconditionally allows fmt_ps.
846 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
847 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
848 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
849 filter from 64,f to 32,f.
850 (PREFX): Change filter from 64 to 32.
851 (LDXC1, LUXC1): Provide separate mips32r2 implementations
852 that use do_load_double instead of do_load. Make both LUXC1
853 versions unpredictable if SizeFGR () != 64.
854 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
855 instead of do_store. Remove unused variable. Make both SUXC1
856 versions unpredictable if SizeFGR () != 64.
858 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
860 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
861 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
862 shifts for that case.
864 2007-09-04 Nick Clifton <nickc@redhat.com>
866 * interp.c (options enum): Add OPTION_INFO_MEMORY.
867 (display_mem_info): New static variable.
868 (mips_option_handler): Handle OPTION_INFO_MEMORY.
869 (mips_options): Add info-memory and memory-info.
870 (sim_open): After processing the command line and board
871 specification, check display_mem_info. If it is set then
872 call the real handler for the --memory-info command line
875 2007-08-24 Joel Brobecker <brobecker@adacore.com>
877 * configure.ac: Change license of multi-run.c to GPL version 3.
878 * configure: Regenerate.
880 2007-06-28 Richard Sandiford <richard@codesourcery.com>
882 * configure.ac, configure: Revert last patch.
884 2007-06-26 Richard Sandiford <richard@codesourcery.com>
886 * configure.ac (sim_mipsisa3264_configs): New variable.
887 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
888 every configuration support all four targets, using the triplet to
889 determine the default.
890 * configure: Regenerate.
892 2007-06-25 Richard Sandiford <richard@codesourcery.com>
894 * Makefile.in (m16run.o): New rule.
896 2007-05-15 Thiemo Seufer <ths@mips.com>
898 * mips3264r2.igen (DSHD): Fix compile warning.
900 2007-05-14 Thiemo Seufer <ths@mips.com>
902 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
903 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
904 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
905 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
908 2007-03-01 Thiemo Seufer <ths@mips.com>
910 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
913 2007-02-20 Thiemo Seufer <ths@mips.com>
915 * dsp.igen: Update copyright notice.
916 * dsp2.igen: Fix copyright notice.
918 2007-02-20 Thiemo Seufer <ths@mips.com>
919 Chao-Ying Fu <fu@mips.com>
921 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
922 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
923 Add dsp2 to sim_igen_machine.
924 * configure: Regenerate.
925 * dsp.igen (do_ph_op): Add MUL support when op = 2.
926 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
927 (mulq_rs.ph): Use do_ph_mulq.
928 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
929 * mips.igen: Add dsp2 model and include dsp2.igen.
930 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
931 for *mips32r2, *mips64r2, *dsp.
932 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
933 for *mips32r2, *mips64r2, *dsp2.
934 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
936 2007-02-19 Thiemo Seufer <ths@mips.com>
937 Nigel Stephens <nigel@mips.com>
939 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
940 jumps with hazard barrier.
942 2007-02-19 Thiemo Seufer <ths@mips.com>
943 Nigel Stephens <nigel@mips.com>
945 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
946 after each call to sim_io_write.
948 2007-02-19 Thiemo Seufer <ths@mips.com>
949 Nigel Stephens <nigel@mips.com>
951 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
952 supported by this simulator.
953 (decode_coproc): Recognise additional CP0 Config registers
956 2007-02-19 Thiemo Seufer <ths@mips.com>
957 Nigel Stephens <nigel@mips.com>
958 David Ung <davidu@mips.com>
960 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
961 uninterpreted formats. If fmt is one of the uninterpreted types
962 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
963 fmt_word, and fmt_uninterpreted_64 like fmt_long.
964 (store_fpr): When writing an invalid odd register, set the
965 matching even register to fmt_unknown, not the following register.
966 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
967 the the memory window at offset 0 set by --memory-size command
969 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
971 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
973 (sim_monitor): When returning the memory size to the MIPS
974 application, use the value in STATE_MEM_SIZE, not an arbitrary
976 (cop_lw): Don' mess around with FPR_STATE, just pass
977 fmt_uninterpreted_32 to StoreFPR.
979 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
981 * mips.igen (not_word_value): Single version for mips32, mips64
984 2007-02-19 Thiemo Seufer <ths@mips.com>
985 Nigel Stephens <nigel@mips.com>
987 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
990 2007-02-17 Thiemo Seufer <ths@mips.com>
992 * configure.ac (mips*-sde-elf*): Move in front of generic machine
994 * configure: Regenerate.
996 2007-02-17 Thiemo Seufer <ths@mips.com>
998 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
999 Add mdmx to sim_igen_machine.
1000 (mipsisa64*-*-*): Likewise. Remove dsp.
1001 (mipsisa32*-*-*): Remove dsp.
1002 * configure: Regenerate.
1004 2007-02-13 Thiemo Seufer <ths@mips.com>
1006 * configure.ac: Add mips*-sde-elf* target.
1007 * configure: Regenerate.
1009 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
1011 * acconfig.h: Remove.
1012 * config.in, configure: Regenerate.
1014 2006-11-07 Thiemo Seufer <ths@mips.com>
1016 * dsp.igen (do_w_op): Fix compiler warning.
1018 2006-08-29 Thiemo Seufer <ths@mips.com>
1019 David Ung <davidu@mips.com>
1021 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
1023 * configure: Regenerate.
1024 * mips.igen (model): Add smartmips.
1025 (MADDU): Increment ACX if carry.
1026 (do_mult): Clear ACX.
1027 (ROR,RORV): Add smartmips.
1028 (include): Include smartmips.igen.
1029 * sim-main.h (ACX): Set to REGISTERS[89].
1030 * smartmips.igen: New file.
1032 2006-08-29 Thiemo Seufer <ths@mips.com>
1033 David Ung <davidu@mips.com>
1035 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
1036 mips3264r2.igen. Add missing dependency rules.
1037 * m16e.igen: Support for mips16e save/restore instructions.
1039 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
1041 * configure: Regenerated.
1043 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1045 * configure: Regenerated.
1047 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1049 * configure: Regenerated.
1051 2006-05-15 Chao-ying Fu <fu@mips.com>
1053 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
1055 2006-04-18 Nick Clifton <nickc@redhat.com>
1057 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
1060 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
1062 * configure: Regenerate.
1064 2005-12-14 Chao-ying Fu <fu@mips.com>
1066 * Makefile.in (SIM_OBJS): Add dsp.o.
1067 (dsp.o): New dependency.
1068 (IGEN_INCLUDE): Add dsp.igen.
1069 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
1070 mipsisa64*-*-*): Add dsp to sim_igen_machine.
1071 * configure: Regenerate.
1072 * mips.igen: Add dsp model and include dsp.igen.
1073 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
1074 because these instructions are extended in DSP ASE.
1075 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
1076 adding 6 DSP accumulator registers and 1 DSP control register.
1077 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
1078 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
1079 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
1080 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
1081 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
1082 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
1083 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
1084 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
1085 DSPCR_CCOND_SMASK): New define.
1086 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
1087 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
1089 2005-07-08 Ian Lance Taylor <ian@airs.com>
1091 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
1093 2005-06-16 David Ung <davidu@mips.com>
1094 Nigel Stephens <nigel@mips.com>
1096 * mips.igen: New mips16e model and include m16e.igen.
1097 (check_u64): Add mips16e tag.
1098 * m16e.igen: New file for MIPS16e instructions.
1099 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
1100 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
1102 * configure: Regenerate.
1104 2005-05-26 David Ung <davidu@mips.com>
1106 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
1107 tags to all instructions which are applicable to the new ISAs.
1108 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1110 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1112 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1114 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1115 * configure: Regenerate.
1117 2005-03-23 Mark Kettenis <kettenis@gnu.org>
1119 * configure: Regenerate.
1121 2005-01-14 Andrew Cagney <cagney@gnu.org>
1123 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
1124 explicit call to AC_CONFIG_HEADER.
1125 * configure: Regenerate.
1127 2005-01-12 Andrew Cagney <cagney@gnu.org>
1129 * configure.ac: Update to use ../common/common.m4.
1130 * configure: Re-generate.
1132 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
1134 * configure: Regenerated to track ../common/aclocal.m4 changes.
1136 2005-01-07 Andrew Cagney <cagney@gnu.org>
1138 * configure.ac: Rename configure.in, require autoconf 2.59.
1139 * configure: Re-generate.
1141 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
1143 * configure: Regenerate for ../common/aclocal.m4 update.
1145 2004-09-24 Monika Chaddha <monika@acmet.com>
1147 Committed by Andrew Cagney.
1148 * m16.igen (CMP, CMPI): Fix assembler.
1150 2004-08-18 Chris Demetriou <cgd@broadcom.com>
1152 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1153 * configure: Regenerate.
1155 2004-06-25 Chris Demetriou <cgd@broadcom.com>
1157 * configure.in (sim_m16_machine): Include mipsIII.
1158 * configure: Regenerate.
1160 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
1162 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1164 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1166 2004-04-10 Chris Demetriou <cgd@broadcom.com>
1168 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1170 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1172 * mips.igen (check_fmt): Remove.
1173 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1174 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1175 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1176 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1177 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1178 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1179 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1180 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1181 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1182 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1184 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1186 * sb1.igen (check_sbx): New function.
1187 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1189 2004-03-29 Chris Demetriou <cgd@broadcom.com>
1190 Richard Sandiford <rsandifo@redhat.com>
1192 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1193 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1194 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1195 separate implementations for mipsIV and mipsV. Use new macros to
1196 determine whether the restrictions apply.
1198 2004-01-19 Chris Demetriou <cgd@broadcom.com>
1200 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1201 (check_mult_hilo): Improve comments.
1202 (check_div_hilo): Likewise. Also, fork off a new version
1203 to handle mips32/mips64 (since there are no hazards to check
1206 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
1208 * mips.igen (do_dmultx): Fix check for negative operands.
1210 2003-05-16 Ian Lance Taylor <ian@airs.com>
1212 * Makefile.in (SHELL): Make sure this is defined.
1213 (various): Use $(SHELL) whenever we invoke move-if-change.
1215 2003-05-03 Chris Demetriou <cgd@broadcom.com>
1217 * cp1.c: Tweak attribution slightly.
1220 * mdmx.igen: Likewise.
1221 * mips3d.igen: Likewise.
1222 * sb1.igen: Likewise.
1224 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
1226 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1229 2003-02-27 Andrew Cagney <cagney@redhat.com>
1231 * interp.c (sim_open): Rename _bfd to bfd.
1232 (sim_create_inferior): Ditto.
1234 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1236 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1238 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1240 * mips.igen (EI, DI): Remove.
1242 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
1244 * Makefile.in (tmp-run-multi): Fix mips16 filter.
1246 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
1247 Andrew Cagney <ac131313@redhat.com>
1248 Gavin Romig-Koch <gavin@redhat.com>
1249 Graydon Hoare <graydon@redhat.com>
1250 Aldy Hernandez <aldyh@redhat.com>
1251 Dave Brolley <brolley@redhat.com>
1252 Chris Demetriou <cgd@broadcom.com>
1254 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1255 (sim_mach_default): New variable.
1256 (mips64vr-*-*, mips64vrel-*-*): New configurations.
1257 Add a new simulator generator, MULTI.
1258 * configure: Regenerate.
1259 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1260 (multi-run.o): New dependency.
1261 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1262 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1263 (tmp-multi): Combine them.
1264 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
1265 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1266 (distclean-extra): New rule.
1267 * sim-main.h: Include bfd.h.
1268 (MIPS_MACH): New macro.
1269 * mips.igen (vr4120, vr5400, vr5500): New models.
1270 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1271 * vr.igen: Replace with new version.
1273 2003-01-04 Chris Demetriou <cgd@broadcom.com>
1275 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1276 * configure: Regenerate.
1278 2002-12-31 Chris Demetriou <cgd@broadcom.com>
1280 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1281 * mips.igen: Remove all invocations of check_branch_bug and
1284 2002-12-16 Chris Demetriou <cgd@broadcom.com>
1286 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1288 2002-07-30 Chris Demetriou <cgd@broadcom.com>
1290 * mips.igen (do_load_double, do_store_double): New functions.
1291 (LDC1, SDC1): Rename to...
1292 (LDC1b, SDC1b): respectively.
1293 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1295 2002-07-29 Michael Snyder <msnyder@redhat.com>
1297 * cp1.c (fp_recip2): Modify initialization expression so that
1298 GCC will recognize it as constant.
1300 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1302 * mdmx.c (SD_): Delete.
1303 (Unpredictable): Re-define, for now, to directly invoke
1304 unpredictable_action().
1305 (mdmx_acc_op): Fix error in .ob immediate handling.
1307 2002-06-18 Andrew Cagney <cagney@redhat.com>
1309 * interp.c (sim_firmware_command): Initialize `address'.
1311 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1313 * configure: Regenerated to track ../common/aclocal.m4 changes.
1315 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1316 Ed Satterthwaite <ehs@broadcom.com>
1318 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1319 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1320 * mips.igen: Include mips3d.igen.
1321 (mips3d): New model name for MIPS-3D ASE instructions.
1322 (CVT.W.fmt): Don't use this instruction for word (source) format
1324 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1325 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1326 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1327 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1328 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1329 (RSquareRoot1, RSquareRoot2): New macros.
1330 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1331 (fp_rsqrt2): New functions.
1332 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1333 * configure: Regenerate.
1335 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1336 Ed Satterthwaite <ehs@broadcom.com>
1338 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1339 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1340 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1341 (convert): Note that this function is not used for paired-single
1343 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1344 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1345 (check_fmt_p): Enable paired-single support.
1346 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1347 (PUU.PS): New instructions.
1348 (CVT.S.fmt): Don't use this instruction for paired-single format
1350 * sim-main.h (FP_formats): New value 'fmt_ps.'
1351 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1352 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1354 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1356 * mips.igen: Fix formatting of function calls in
1359 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1361 * mips.igen (MOVN, MOVZ): Trace result.
1362 (TNEI): Print "tnei" as the opcode name in traces.
1363 (CEIL.W): Add disassembly string for traces.
1364 (RSQRT.fmt): Make location of disassembly string consistent
1365 with other instructions.
1367 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1369 * mips.igen (X): Delete unused function.
1371 2002-06-08 Andrew Cagney <cagney@redhat.com>
1373 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1375 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1376 Ed Satterthwaite <ehs@broadcom.com>
1378 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1379 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1380 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1381 (fp_nmsub): New prototypes.
1382 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1383 (NegMultiplySub): New defines.
1384 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1385 (MADD.D, MADD.S): Replace with...
1386 (MADD.fmt): New instruction.
1387 (MSUB.D, MSUB.S): Replace with...
1388 (MSUB.fmt): New instruction.
1389 (NMADD.D, NMADD.S): Replace with...
1390 (NMADD.fmt): New instruction.
1391 (NMSUB.D, MSUB.S): Replace with...
1392 (NMSUB.fmt): New instruction.
1394 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1395 Ed Satterthwaite <ehs@broadcom.com>
1397 * cp1.c: Fix more comment spelling and formatting.
1398 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1399 (denorm_mode): New function.
1400 (fpu_unary, fpu_binary): Round results after operation, collect
1401 status from rounding operations, and update the FCSR.
1402 (convert): Collect status from integer conversions and rounding
1403 operations, and update the FCSR. Adjust NaN values that result
1404 from conversions. Convert to use sim_io_eprintf rather than
1405 fprintf, and remove some debugging code.
1406 * cp1.h (fenr_FS): New define.
1408 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1410 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1411 rounding mode to sim FP rounding mode flag conversion code into...
1412 (rounding_mode): New function.
1414 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1416 * cp1.c: Clean up formatting of a few comments.
1417 (value_fpr): Reformat switch statement.
1419 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1420 Ed Satterthwaite <ehs@broadcom.com>
1423 * sim-main.h: Include cp1.h.
1424 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1425 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1426 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1427 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1428 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1429 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1430 * cp1.c: Don't include sim-fpu.h; already included by
1431 sim-main.h. Clean up formatting of some comments.
1432 (NaN, Equal, Less): Remove.
1433 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1434 (fp_cmp): New functions.
1435 * mips.igen (do_c_cond_fmt): Remove.
1436 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1437 Compare. Add result tracing.
1438 (CxC1): Remove, replace with...
1439 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1440 (DMxC1): Remove, replace with...
1441 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1442 (MxC1): Remove, replace with...
1443 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1445 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1447 * sim-main.h (FGRIDX): Remove, replace all uses with...
1448 (FGR_BASE): New macro.
1449 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1450 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1451 (NR_FGR, FGR): Likewise.
1452 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1453 * mips.igen: Likewise.
1455 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1457 * cp1.c: Add an FSF Copyright notice to this file.
1459 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1460 Ed Satterthwaite <ehs@broadcom.com>
1462 * cp1.c (Infinity): Remove.
1463 * sim-main.h (Infinity): Likewise.
1465 * cp1.c (fp_unary, fp_binary): New functions.
1466 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1467 (fp_sqrt): New functions, implemented in terms of the above.
1468 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1469 (Recip, SquareRoot): Remove (replaced by functions above).
1470 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1471 (fp_recip, fp_sqrt): New prototypes.
1472 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1473 (Recip, SquareRoot): Replace prototypes with #defines which
1474 invoke the functions above.
1476 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1478 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1479 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1480 file, remove PARAMS from prototypes.
1481 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1482 simulator state arguments.
1483 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1484 pass simulator state arguments.
1485 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1486 (store_fpr, convert): Remove 'sd' argument.
1487 (value_fpr): Likewise. Convert to use 'SD' instead.
1489 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1491 * cp1.c (Min, Max): Remove #if 0'd functions.
1492 * sim-main.h (Min, Max): Remove.
1494 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1496 * cp1.c: fix formatting of switch case and default labels.
1497 * interp.c: Likewise.
1498 * sim-main.c: Likewise.
1500 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1502 * cp1.c: Clean up comments which describe FP formats.
1503 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1505 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1506 Ed Satterthwaite <ehs@broadcom.com>
1508 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1509 Broadcom SiByte SB-1 processor configurations.
1510 * configure: Regenerate.
1511 * sb1.igen: New file.
1512 * mips.igen: Include sb1.igen.
1514 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1515 * mdmx.igen: Add "sb1" model to all appropriate functions and
1517 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1518 (ob_func, ob_acc): Reference the above.
1519 (qh_acc): Adjust to keep the same size as ob_acc.
1520 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1521 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1523 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1525 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1527 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1528 Ed Satterthwaite <ehs@broadcom.com>
1530 * mips.igen (mdmx): New (pseudo-)model.
1531 * mdmx.c, mdmx.igen: New files.
1532 * Makefile.in (SIM_OBJS): Add mdmx.o.
1533 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1535 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1536 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1537 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1538 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1539 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1540 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1541 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1542 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1543 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1544 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1545 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1546 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1547 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1548 (qh_fmtsel): New macros.
1549 (_sim_cpu): New member "acc".
1550 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1551 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1553 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1555 * interp.c: Use 'deprecated' rather than 'depreciated.'
1556 * sim-main.h: Likewise.
1558 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1560 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1561 which wouldn't compile anyway.
1562 * sim-main.h (unpredictable_action): New function prototype.
1563 (Unpredictable): Define to call igen function unpredictable().
1564 (NotWordValue): New macro to call igen function not_word_value().
1565 (UndefinedResult): Remove.
1566 * interp.c (undefined_result): Remove.
1567 (unpredictable_action): New function.
1568 * mips.igen (not_word_value, unpredictable): New functions.
1569 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1570 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1571 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1572 NotWordValue() to check for unpredictable inputs, then
1573 Unpredictable() to handle them.
1575 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1577 * mips.igen: Fix formatting of calls to Unpredictable().
1579 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1581 * interp.c (sim_open): Revert previous change.
1583 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1585 * interp.c (sim_open): Disable chunk of code that wrote code in
1586 vector table entries.
1588 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1590 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1591 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1594 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1596 * cp1.c: Fix many formatting issues.
1598 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1600 * cp1.c (fpu_format_name): New function to replace...
1601 (DOFMT): This. Delete, and update all callers.
1602 (fpu_rounding_mode_name): New function to replace...
1603 (RMMODE): This. Delete, and update all callers.
1605 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1607 * interp.c: Move FPU support routines from here to...
1608 * cp1.c: Here. New file.
1609 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1610 (cp1.o): New target.
1612 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1614 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1615 * mips.igen (mips32, mips64): New models, add to all instructions
1616 and functions as appropriate.
1617 (loadstore_ea, check_u64): New variant for model mips64.
1618 (check_fmt_p): New variant for models mipsV and mips64, remove
1619 mipsV model marking fro other variant.
1622 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1623 for mips32 and mips64.
1624 (DCLO, DCLZ): New instructions for mips64.
1626 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1628 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1629 immediate or code as a hex value with the "%#lx" format.
1630 (ANDI): Likewise, and fix printed instruction name.
1632 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1634 * sim-main.h (UndefinedResult, Unpredictable): New macros
1635 which currently do nothing.
1637 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1639 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1640 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1641 (status_CU3): New definitions.
1643 * sim-main.h (ExceptionCause): Add new values for MIPS32
1644 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1645 for DebugBreakPoint and NMIReset to note their status in
1647 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1648 (SignalExceptionCacheErr): New exception macros.
1650 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1652 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1653 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1655 (SignalExceptionCoProcessorUnusable): Take as argument the
1656 unusable coprocessor number.
1658 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1660 * mips.igen: Fix formatting of all SignalException calls.
1662 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1664 * sim-main.h (SIGNEXTEND): Remove.
1666 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1668 * mips.igen: Remove gencode comment from top of file, fix
1669 spelling in another comment.
1671 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1673 * mips.igen (check_fmt, check_fmt_p): New functions to check
1674 whether specific floating point formats are usable.
1675 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1676 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1677 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1678 Use the new functions.
1679 (do_c_cond_fmt): Remove format checks...
1680 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1682 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1684 * mips.igen: Fix formatting of check_fpu calls.
1686 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1688 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1690 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1692 * mips.igen: Remove whitespace at end of lines.
1694 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1696 * mips.igen (loadstore_ea): New function to do effective
1697 address calculations.
1698 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1699 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1700 CACHE): Use loadstore_ea to do effective address computations.
1702 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1704 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1705 * mips.igen (LL, CxC1, MxC1): Likewise.
1707 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1709 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1710 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1711 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1712 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1713 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1714 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1715 Don't split opcode fields by hand, use the opcode field values
1718 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1720 * mips.igen (do_divu): Fix spacing.
1722 * mips.igen (do_dsllv): Move to be right before DSLLV,
1723 to match the rest of the do_<shift> functions.
1725 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1727 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1728 DSRL32, do_dsrlv): Trace inputs and results.
1730 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1732 * mips.igen (CACHE): Provide instruction-printing string.
1734 * interp.c (signal_exception): Comment tokens after #endif.
1736 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1738 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1739 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1740 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1741 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1742 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1743 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1744 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1745 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1747 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1749 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1750 instruction-printing string.
1751 (LWU): Use '64' as the filter flag.
1753 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1755 * mips.igen (SDXC1): Fix instruction-printing string.
1757 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1759 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1760 filter flags "32,f".
1762 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1764 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1767 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1769 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1770 add a comma) so that it more closely match the MIPS ISA
1771 documentation opcode partitioning.
1772 (PREF): Put useful names on opcode fields, and include
1773 instruction-printing string.
1775 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1777 * mips.igen (check_u64): New function which in the future will
1778 check whether 64-bit instructions are usable and signal an
1779 exception if not. Currently a no-op.
1780 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1781 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1782 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1783 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1785 * mips.igen (check_fpu): New function which in the future will
1786 check whether FPU instructions are usable and signal an exception
1787 if not. Currently a no-op.
1788 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1789 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1790 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1791 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1792 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1793 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1794 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1795 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1797 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1799 * mips.igen (do_load_left, do_load_right): Move to be immediately
1801 (do_store_left, do_store_right): Move to be immediately following
1804 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1806 * mips.igen (mipsV): New model name. Also, add it to
1807 all instructions and functions where it is appropriate.
1809 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1811 * mips.igen: For all functions and instructions, list model
1812 names that support that instruction one per line.
1814 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1816 * mips.igen: Add some additional comments about supported
1817 models, and about which instructions go where.
1818 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1819 order as is used in the rest of the file.
1821 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1823 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1824 indicating that ALU32_END or ALU64_END are there to check
1826 (DADD): Likewise, but also remove previous comment about
1829 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1831 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1832 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1833 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1834 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1835 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1836 fields (i.e., add and move commas) so that they more closely
1837 match the MIPS ISA documentation opcode partitioning.
1839 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1841 * mips.igen (ADDI): Print immediate value.
1842 (BREAK): Print code.
1843 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1844 (SLL): Print "nop" specially, and don't run the code
1845 that does the shift for the "nop" case.
1847 2001-11-17 Fred Fish <fnf@redhat.com>
1849 * sim-main.h (float_operation): Move enum declaration outside
1850 of _sim_cpu struct declaration.
1852 2001-04-12 Jim Blandy <jimb@redhat.com>
1854 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1855 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1857 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1858 PENDING_FILL, and you can get the intended effect gracefully by
1859 calling PENDING_SCHED directly.
1861 2001-02-23 Ben Elliston <bje@redhat.com>
1863 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1864 already defined elsewhere.
1866 2001-02-19 Ben Elliston <bje@redhat.com>
1868 * sim-main.h (sim_monitor): Return an int.
1869 * interp.c (sim_monitor): Add return values.
1870 (signal_exception): Handle error conditions from sim_monitor.
1872 2001-02-08 Ben Elliston <bje@redhat.com>
1874 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1875 (store_memory): Likewise, pass cia to sim_core_write*.
1877 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1879 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1880 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1882 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1884 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1885 * Makefile.in: Don't delete *.igen when cleaning directory.
1887 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1889 * m16.igen (break): Call SignalException not sim_engine_halt.
1891 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1893 From Jason Eckhardt:
1894 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1896 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1898 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1900 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1902 * mips.igen (do_dmultx): Fix typo.
1904 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1906 * configure: Regenerated to track ../common/aclocal.m4 changes.
1908 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1910 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1912 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1914 * sim-main.h (GPR_CLEAR): Define macro.
1916 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1918 * interp.c (decode_coproc): Output long using %lx and not %s.
1920 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1922 * interp.c (sim_open): Sort & extend dummy memory regions for
1923 --board=jmr3904 for eCos.
1925 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1927 * configure: Regenerated.
1929 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1931 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1932 calls, conditional on the simulator being in verbose mode.
1934 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1936 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1937 cache don't get ReservedInstruction traps.
1939 1999-11-29 Mark Salter <msalter@cygnus.com>
1941 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1942 to clear status bits in sdisr register. This is how the hardware works.
1944 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1945 being used by cygmon.
1947 1999-11-11 Andrew Haley <aph@cygnus.com>
1949 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1952 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1954 * mips.igen (MULT): Correct previous mis-applied patch.
1956 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1958 * mips.igen (delayslot32): Handle sequence like
1959 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1960 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1961 (MULT): Actually pass the third register...
1963 1999-09-03 Mark Salter <msalter@cygnus.com>
1965 * interp.c (sim_open): Added more memory aliases for additional
1966 hardware being touched by cygmon on jmr3904 board.
1968 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1970 * configure: Regenerated to track ../common/aclocal.m4 changes.
1972 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1974 * interp.c (sim_store_register): Handle case where client - GDB -
1975 specifies that a 4 byte register is 8 bytes in size.
1976 (sim_fetch_register): Ditto.
1978 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1980 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1981 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1982 (idt_monitor_base): Base address for IDT monitor traps.
1983 (pmon_monitor_base): Ditto for PMON.
1984 (lsipmon_monitor_base): Ditto for LSI PMON.
1985 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1986 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1987 (sim_firmware_command): New function.
1988 (mips_option_handler): Call it for OPTION_FIRMWARE.
1989 (sim_open): Allocate memory for idt_monitor region. If "--board"
1990 option was given, add no monitor by default. Add BREAK hooks only if
1991 monitors are also there.
1993 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1995 * interp.c (sim_monitor): Flush output before reading input.
1997 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999 * tconfig.in (SIM_HANDLES_LMA): Always define.
2001 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
2003 From Mark Salter <msalter@cygnus.com>:
2004 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
2005 (sim_open): Add setup for BSP board.
2007 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
2009 * mips.igen (MULT, MULTU): Add syntax for two operand version.
2010 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
2011 them as unimplemented.
2013 1999-05-08 Felix Lee <flee@cygnus.com>
2015 * configure: Regenerated to track ../common/aclocal.m4 changes.
2017 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
2019 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
2021 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
2023 * configure.in: Any mips64vr5*-*-* target should have
2024 -DTARGET_ENABLE_FR=1.
2025 (default_endian): Any mips64vr*el-*-* target should default to
2027 * configure: Re-generate.
2029 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
2031 * mips.igen (ldl): Extend from _16_, not 32.
2033 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
2035 * interp.c (sim_store_register): Force registers written to by GDB
2036 into an un-interpreted state.
2038 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
2040 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
2041 CPU, start periodic background I/O polls.
2042 (tx3904sio_poll): New function: periodic I/O poller.
2044 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
2046 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
2048 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
2050 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
2053 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
2055 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
2056 (load_word): Call SIM_CORE_SIGNAL hook on error.
2057 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
2058 starting. For exception dispatching, pass PC instead of NULL_CIA.
2059 (decode_coproc): Use COP0_BADVADDR to store faulting address.
2060 * sim-main.h (COP0_BADVADDR): Define.
2061 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
2062 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
2063 (_sim_cpu): Add exc_* fields to store register value snapshots.
2064 * mips.igen (*): Replace memory-related SignalException* calls
2065 with references to SIM_CORE_SIGNAL hook.
2067 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
2069 * sim-main.c (*): Minor warning cleanups.
2071 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
2073 * m16.igen (DADDIU5): Correct type-o.
2075 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
2077 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
2080 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
2082 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
2084 (interp.o): Add dependency on itable.h
2085 (oengine.c, gencode): Delete remaining references.
2086 (BUILT_SRC_FROM_GEN): Clean up.
2088 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
2091 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
2092 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
2093 tmp-run-hack) : New.
2094 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
2095 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
2096 Drop the "64" qualifier to get the HACK generator working.
2097 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
2098 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
2099 qualifier to get the hack generator working.
2100 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
2101 (DSLL): Use do_dsll.
2102 (DSLLV): Use do_dsllv.
2103 (DSRA): Use do_dsra.
2104 (DSRL): Use do_dsrl.
2105 (DSRLV): Use do_dsrlv.
2106 (BC1): Move *vr4100 to get the HACK generator working.
2107 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2108 get the HACK generator working.
2109 (MACC) Rename to get the HACK generator working.
2110 (DMACC,MACCS,DMACCS): Add the 64.
2112 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
2114 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2115 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2117 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
2119 * mips/interp.c (DEBUG): Cleanups.
2121 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
2123 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2124 (tx3904sio_tickle): fflush after a stdout character output.
2126 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
2128 * interp.c (sim_close): Uninstall modules.
2130 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
2132 * sim-main.h, interp.c (sim_monitor): Change to global
2135 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2137 * configure.in (vr4100): Only include vr4100 instructions in
2139 * configure: Re-generate.
2140 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2142 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2144 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2145 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2148 * configure.in (sim_default_gen, sim_use_gen): Replace with
2150 (--enable-sim-igen): Delete config option. Always using IGEN.
2151 * configure: Re-generate.
2153 * Makefile.in (gencode): Kill, kill, kill.
2156 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2158 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2159 bit mips16 igen simulator.
2160 * configure: Re-generate.
2162 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2163 as part of vr4100 ISA.
2164 * vr.igen: Mark all instructions as 64 bit only.
2166 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2168 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2171 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
2173 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2174 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
2175 * configure: Re-generate.
2177 * m16.igen (BREAK): Define breakpoint instruction.
2178 (JALX32): Mark instruction as mips16 and not r3900.
2179 * mips.igen (C.cond.fmt): Fix typo in instruction format.
2181 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2183 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2185 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2186 insn as a debug breakpoint.
2188 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2190 (PENDING_SCHED): Clean up trace statement.
2191 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2192 (PENDING_FILL): Delay write by only one cycle.
2193 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2195 * sim-main.c (pending_tick): Clean up trace statements. Add trace
2197 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2199 (pending_tick): Move incrementing of index to FOR statement.
2200 (pending_tick): Only update PENDING_OUT after a write has occured.
2202 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2204 * configure: Re-generate.
2206 * interp.c (sim_engine_run OLD): Delete explicit call to
2207 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2209 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
2211 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2212 interrupt level number to match changed SignalExceptionInterrupt
2215 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
2217 * interp.c: #include "itable.h" if WITH_IGEN.
2218 (get_insn_name): New function.
2219 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2220 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2222 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
2224 * configure: Rebuilt to inhale new common/aclocal.m4.
2226 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
2228 * dv-tx3904sio.c: Include sim-assert.h.
2230 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
2232 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2233 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2234 Reorganize target-specific sim-hardware checks.
2235 * configure: rebuilt.
2236 * interp.c (sim_open): For tx39 target boards, set
2237 OPERATING_ENVIRONMENT, add tx3904sio devices.
2238 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2239 ROM executables. Install dv-sockser into sim-modules list.
2241 * dv-tx3904irc.c: Compiler warning clean-up.
2242 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
2243 frequent hw-trace messages.
2245 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2247 * vr.igen (MulAcc): Identify as a vr4100 specific function.
2249 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2251 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2253 * vr.igen: New file.
2254 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2255 * mips.igen: Define vr4100 model. Include vr.igen.
2256 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
2258 * mips.igen (check_mf_hilo): Correct check.
2260 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2262 * sim-main.h (interrupt_event): Add prototype.
2264 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2265 register_ptr, register_value.
2266 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2268 * sim-main.h (tracefh): Make extern.
2270 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
2272 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2273 Reduce unnecessarily high timer event frequency.
2274 * dv-tx3904cpu.c: Ditto for interrupt event.
2276 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
2278 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2280 (interrupt_event): Made non-static.
2282 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2283 interchange of configuration values for external vs. internal
2286 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
2288 * mips.igen (BREAK): Moved code to here for
2289 simulator-reserved break instructions.
2290 * gencode.c (build_instruction): Ditto.
2291 * interp.c (signal_exception): Code moved from here. Non-
2292 reserved instructions now use exception vector, rather
2294 * sim-main.h: Moved magic constants to here.
2296 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
2298 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2299 register upon non-zero interrupt event level, clear upon zero
2301 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2302 by passing zero event value.
2303 (*_io_{read,write}_buffer): Endianness fixes.
2304 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2305 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2307 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2308 serial I/O and timer module at base address 0xFFFF0000.
2310 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2312 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2315 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2317 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2319 * configure: Update.
2321 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2323 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2324 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2325 * configure.in: Include tx3904tmr in hw_device list.
2326 * configure: Rebuilt.
2327 * interp.c (sim_open): Instantiate three timer instances.
2328 Fix address typo of tx3904irc instance.
2330 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2332 * interp.c (signal_exception): SystemCall exception now uses
2333 the exception vector.
2335 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2337 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2340 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2342 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2344 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2346 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2348 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2349 sim-main.h. Declare a struct hw_descriptor instead of struct
2350 hw_device_descriptor.
2352 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2354 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2355 right bits and then re-align left hand bytes to correct byte
2356 lanes. Fix incorrect computation in do_store_left when loading
2357 bytes from second word.
2359 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2361 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2362 * interp.c (sim_open): Only create a device tree when HW is
2365 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2366 * interp.c (signal_exception): Ditto.
2368 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2370 * gencode.c: Mark BEGEZALL as LIKELY.
2372 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2374 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2375 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2377 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2379 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2380 modules. Recognize TX39 target with "mips*tx39" pattern.
2381 * configure: Rebuilt.
2382 * sim-main.h (*): Added many macros defining bits in
2383 TX39 control registers.
2384 (SignalInterrupt): Send actual PC instead of NULL.
2385 (SignalNMIReset): New exception type.
2386 * interp.c (board): New variable for future use to identify
2387 a particular board being simulated.
2388 (mips_option_handler,mips_options): Added "--board" option.
2389 (interrupt_event): Send actual PC.
2390 (sim_open): Make memory layout conditional on board setting.
2391 (signal_exception): Initial implementation of hardware interrupt
2392 handling. Accept another break instruction variant for simulator
2394 (decode_coproc): Implement RFE instruction for TX39.
2395 (mips.igen): Decode RFE instruction as such.
2396 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2397 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2398 bbegin to implement memory map.
2399 * dv-tx3904cpu.c: New file.
2400 * dv-tx3904irc.c: New file.
2402 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2404 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2406 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2408 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2409 with calls to check_div_hilo.
2411 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2413 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2414 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2415 Add special r3900 version of do_mult_hilo.
2416 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2417 with calls to check_mult_hilo.
2418 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2419 with calls to check_div_hilo.
2421 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2423 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2424 Document a replacement.
2426 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2428 * interp.c (sim_monitor): Make mon_printf work.
2430 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2432 * sim-main.h (INSN_NAME): New arg `cpu'.
2434 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2436 * configure: Regenerated to track ../common/aclocal.m4 changes.
2438 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2440 * configure: Regenerated to track ../common/aclocal.m4 changes.
2443 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2445 * acconfig.h: New file.
2446 * configure.in: Reverted change of Apr 24; use sinclude again.
2448 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2450 * configure: Regenerated to track ../common/aclocal.m4 changes.
2453 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2455 * configure.in: Don't call sinclude.
2457 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2459 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2461 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2463 * mips.igen (ERET): Implement.
2465 * interp.c (decode_coproc): Return sign-extended EPC.
2467 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2469 * interp.c (signal_exception): Do not ignore Trap.
2470 (signal_exception): On TRAP, restart at exception address.
2471 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2472 (signal_exception): Update.
2473 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2474 so that TRAP instructions are caught.
2476 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2478 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2479 contains HI/LO access history.
2480 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2481 (HIACCESS, LOACCESS): Delete, replace with
2482 (HIHISTORY, LOHISTORY): New macros.
2483 (CHECKHILO): Delete all, moved to mips.igen
2485 * gencode.c (build_instruction): Do not generate checks for
2486 correct HI/LO register usage.
2488 * interp.c (old_engine_run): Delete checks for correct HI/LO
2491 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2492 check_mf_cycles): New functions.
2493 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2494 do_divu, domultx, do_mult, do_multu): Use.
2496 * tx.igen ("madd", "maddu"): Use.
2498 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2500 * mips.igen (DSRAV): Use function do_dsrav.
2501 (SRAV): Use new function do_srav.
2503 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2504 (B): Sign extend 11 bit immediate.
2505 (EXT-B*): Shift 16 bit immediate left by 1.
2506 (ADDIU*): Don't sign extend immediate value.
2508 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2510 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2512 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2515 * mips.igen (delayslot32, nullify_next_insn): New functions.
2516 (m16.igen): Always include.
2517 (do_*): Add more tracing.
2519 * m16.igen (delayslot16): Add NIA argument, could be called by a
2520 32 bit MIPS16 instruction.
2522 * interp.c (ifetch16): Move function from here.
2523 * sim-main.c (ifetch16): To here.
2525 * sim-main.c (ifetch16, ifetch32): Update to match current
2526 implementations of LH, LW.
2527 (signal_exception): Don't print out incorrect hex value of illegal
2530 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2532 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2535 * m16.igen: Implement MIPS16 instructions.
2537 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2538 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2539 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2540 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2541 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2542 bodies of corresponding code from 32 bit insn to these. Also used
2543 by MIPS16 versions of functions.
2545 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2546 (IMEM16): Drop NR argument from macro.
2548 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2550 * Makefile.in (SIM_OBJS): Add sim-main.o.
2552 * sim-main.h (address_translation, load_memory, store_memory,
2553 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2555 (pr_addr, pr_uword64): Declare.
2556 (sim-main.c): Include when H_REVEALS_MODULE_P.
2558 * interp.c (address_translation, load_memory, store_memory,
2559 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2561 * sim-main.c: To here. Fix compilation problems.
2563 * configure.in: Enable inlining.
2564 * configure: Re-config.
2566 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2568 * configure: Regenerated to track ../common/aclocal.m4 changes.
2570 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2572 * mips.igen: Include tx.igen.
2573 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2574 * tx.igen: New file, contains MADD and MADDU.
2576 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2577 the hardwired constant `7'.
2578 (store_memory): Ditto.
2579 (LOADDRMASK): Move definition to sim-main.h.
2581 mips.igen (MTC0): Enable for r3900.
2584 mips.igen (do_load_byte): Delete.
2585 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2586 do_store_right): New functions.
2587 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2589 configure.in: Let the tx39 use igen again.
2592 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2594 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2595 not an address sized quantity. Return zero for cache sizes.
2597 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2599 * mips.igen (r3900): r3900 does not support 64 bit integer
2602 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2604 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2606 * configure : Rebuild.
2608 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2610 * configure: Regenerated to track ../common/aclocal.m4 changes.
2612 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2614 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2616 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2618 * configure: Regenerated to track ../common/aclocal.m4 changes.
2619 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2621 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2623 * configure: Regenerated to track ../common/aclocal.m4 changes.
2625 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2627 * interp.c (Max, Min): Comment out functions. Not yet used.
2629 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2631 * configure: Regenerated to track ../common/aclocal.m4 changes.
2633 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2635 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2636 configurable settings for stand-alone simulator.
2638 * configure.in: Added X11 search, just in case.
2640 * configure: Regenerated.
2642 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2644 * interp.c (sim_write, sim_read, load_memory, store_memory):
2645 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2647 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2649 * sim-main.h (GETFCC): Return an unsigned value.
2651 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2653 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2654 (DADD): Result destination is RD not RT.
2656 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2658 * sim-main.h (HIACCESS, LOACCESS): Always define.
2660 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2662 * interp.c (sim_info): Delete.
2664 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2666 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2667 (mips_option_handler): New argument `cpu'.
2668 (sim_open): Update call to sim_add_option_table.
2670 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2672 * mips.igen (CxC1): Add tracing.
2674 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2676 * sim-main.h (Max, Min): Declare.
2678 * interp.c (Max, Min): New functions.
2680 * mips.igen (BC1): Add tracing.
2682 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2684 * interp.c Added memory map for stack in vr4100
2686 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2688 * interp.c (load_memory): Add missing "break"'s.
2690 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2692 * interp.c (sim_store_register, sim_fetch_register): Pass in
2693 length parameter. Return -1.
2695 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2697 * interp.c: Added hardware init hook, fixed warnings.
2699 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2701 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2703 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2705 * interp.c (ifetch16): New function.
2707 * sim-main.h (IMEM32): Rename IMEM.
2708 (IMEM16_IMMED): Define.
2710 (DELAY_SLOT): Update.
2712 * m16run.c (sim_engine_run): New file.
2714 * m16.igen: All instructions except LB.
2715 (LB): Call do_load_byte.
2716 * mips.igen (do_load_byte): New function.
2717 (LB): Call do_load_byte.
2719 * mips.igen: Move spec for insn bit size and high bit from here.
2720 * Makefile.in (tmp-igen, tmp-m16): To here.
2722 * m16.dc: New file, decode mips16 instructions.
2724 * Makefile.in (SIM_NO_ALL): Define.
2725 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2727 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2729 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2730 point unit to 32 bit registers.
2731 * configure: Re-generate.
2733 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2735 * configure.in (sim_use_gen): Make IGEN the default simulator
2736 generator for generic 32 and 64 bit mips targets.
2737 * configure: Re-generate.
2739 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2741 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2744 * interp.c (sim_fetch_register, sim_store_register): Read/write
2745 FGR from correct location.
2746 (sim_open): Set size of FGR's according to
2747 WITH_TARGET_FLOATING_POINT_BITSIZE.
2749 * sim-main.h (FGR): Store floating point registers in a separate
2752 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2754 * configure: Regenerated to track ../common/aclocal.m4 changes.
2756 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2758 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2760 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2762 * interp.c (pending_tick): New function. Deliver pending writes.
2764 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2765 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2766 it can handle mixed sized quantites and single bits.
2768 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2770 * interp.c (oengine.h): Do not include when building with IGEN.
2771 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2772 (sim_info): Ditto for PROCESSOR_64BIT.
2773 (sim_monitor): Replace ut_reg with unsigned_word.
2774 (*): Ditto for t_reg.
2775 (LOADDRMASK): Define.
2776 (sim_open): Remove defunct check that host FP is IEEE compliant,
2777 using software to emulate floating point.
2778 (value_fpr, ...): Always compile, was conditional on HASFPU.
2780 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2782 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2785 * interp.c (SD, CPU): Define.
2786 (mips_option_handler): Set flags in each CPU.
2787 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2788 (sim_close): Do not clear STATE, deleted anyway.
2789 (sim_write, sim_read): Assume CPU zero's vm should be used for
2791 (sim_create_inferior): Set the PC for all processors.
2792 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2794 (mips16_entry): Pass correct nr of args to store_word, load_word.
2795 (ColdReset): Cold reset all cpu's.
2796 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2797 (sim_monitor, load_memory, store_memory, signal_exception): Use
2798 `CPU' instead of STATE_CPU.
2801 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2804 * sim-main.h (signal_exception): Add sim_cpu arg.
2805 (SignalException*): Pass both SD and CPU to signal_exception.
2806 * interp.c (signal_exception): Update.
2808 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2810 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2811 address_translation): Ditto
2812 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2814 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2816 * configure: Regenerated to track ../common/aclocal.m4 changes.
2818 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2820 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2822 * mips.igen (model): Map processor names onto BFD name.
2824 * sim-main.h (CPU_CIA): Delete.
2825 (SET_CIA, GET_CIA): Define
2827 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2829 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2832 * configure.in (default_endian): Configure a big-endian simulator
2834 * configure: Re-generate.
2836 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2838 * configure: Regenerated to track ../common/aclocal.m4 changes.
2840 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2842 * interp.c (sim_monitor): Handle Densan monitor outbyte
2843 and inbyte functions.
2845 1997-12-29 Felix Lee <flee@cygnus.com>
2847 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2849 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2851 * Makefile.in (tmp-igen): Arrange for $zero to always be
2852 reset to zero after every instruction.
2854 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2856 * configure: Regenerated to track ../common/aclocal.m4 changes.
2859 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2861 * mips.igen (MSUB): Fix to work like MADD.
2862 * gencode.c (MSUB): Similarly.
2864 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2866 * configure: Regenerated to track ../common/aclocal.m4 changes.
2868 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2870 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2872 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2874 * sim-main.h (sim-fpu.h): Include.
2876 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2877 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2878 using host independant sim_fpu module.
2880 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2882 * interp.c (signal_exception): Report internal errors with SIGABRT
2885 * sim-main.h (C0_CONFIG): New register.
2886 (signal.h): No longer include.
2888 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2890 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2892 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2894 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2896 * mips.igen: Tag vr5000 instructions.
2897 (ANDI): Was missing mipsIV model, fix assembler syntax.
2898 (do_c_cond_fmt): New function.
2899 (C.cond.fmt): Handle mips I-III which do not support CC field
2901 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2902 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2904 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2905 vr5000 which saves LO in a GPR separatly.
2907 * configure.in (enable-sim-igen): For vr5000, select vr5000
2908 specific instructions.
2909 * configure: Re-generate.
2911 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2913 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2915 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2916 fmt_uninterpreted_64 bit cases to switch. Convert to
2919 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2921 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2922 as specified in IV3.2 spec.
2923 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2925 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2927 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2928 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2929 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2930 PENDING_FILL versions of instructions. Simplify.
2932 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2934 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2936 (MTHI, MFHI): Disable code checking HI-LO.
2938 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2940 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2942 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2944 * gencode.c (build_mips16_operands): Replace IPC with cia.
2946 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2947 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2949 (UndefinedResult): Replace function with macro/function
2951 (sim_engine_run): Don't save PC in IPC.
2953 * sim-main.h (IPC): Delete.
2956 * interp.c (signal_exception, store_word, load_word,
2957 address_translation, load_memory, store_memory, cache_op,
2958 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2959 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2960 current instruction address - cia - argument.
2961 (sim_read, sim_write): Call address_translation directly.
2962 (sim_engine_run): Rename variable vaddr to cia.
2963 (signal_exception): Pass cia to sim_monitor
2965 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2966 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2967 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2969 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2970 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2973 * interp.c (signal_exception): Pass restart address to
2976 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2977 idecode.o): Add dependency.
2979 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2981 (DELAY_SLOT): Update NIA not PC with branch address.
2982 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2984 * mips.igen: Use CIA not PC in branch calculations.
2985 (illegal): Call SignalException.
2986 (BEQ, ADDIU): Fix assembler.
2988 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2990 * m16.igen (JALX): Was missing.
2992 * configure.in (enable-sim-igen): New configuration option.
2993 * configure: Re-generate.
2995 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2997 * interp.c (load_memory, store_memory): Delete parameter RAW.
2998 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2999 bypassing {load,store}_memory.
3001 * sim-main.h (ByteSwapMem): Delete definition.
3003 * Makefile.in (SIM_OBJS): Add sim-memopt module.
3005 * interp.c (sim_do_command, sim_commands): Delete mips specific
3006 commands. Handled by module sim-options.
3008 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
3009 (WITH_MODULO_MEMORY): Define.
3011 * interp.c (sim_info): Delete code printing memory size.
3013 * interp.c (mips_size): Nee sim_size, delete function.
3015 (monitor, monitor_base, monitor_size): Delete global variables.
3016 (sim_open, sim_close): Delete code creating monitor and other
3017 memory regions. Use sim-memopts module, via sim_do_commandf, to
3018 manage memory regions.
3019 (load_memory, store_memory): Use sim-core for memory model.
3021 * interp.c (address_translation): Delete all memory map code
3022 except line forcing 32 bit addresses.
3024 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
3026 * sim-main.h (WITH_TRACE): Delete definition. Enables common
3029 * interp.c (logfh, logfile): Delete globals.
3030 (sim_open, sim_close): Delete code opening & closing log file.
3031 (mips_option_handler): Delete -l and -n options.
3032 (OPTION mips_options): Ditto.
3034 * interp.c (OPTION mips_options): Rename option trace to dinero.
3035 (mips_option_handler): Update.
3037 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3039 * interp.c (fetch_str): New function.
3040 (sim_monitor): Rewrite using sim_read & sim_write.
3041 (sim_open): Check magic number.
3042 (sim_open): Write monitor vectors into memory using sim_write.
3043 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
3044 (sim_read, sim_write): Simplify - transfer data one byte at a
3046 (load_memory, store_memory): Clarify meaning of parameter RAW.
3048 * sim-main.h (isHOST): Defete definition.
3049 (isTARGET): Mark as depreciated.
3050 (address_translation): Delete parameter HOST.
3052 * interp.c (address_translation): Delete parameter HOST.
3054 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3058 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
3059 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
3061 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
3063 * mips.igen: Add model filter field to records.
3065 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3067 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
3069 interp.c (sim_engine_run): Do not compile function sim_engine_run
3070 when WITH_IGEN == 1.
3072 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
3073 target architecture.
3075 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
3076 igen. Replace with configuration variables sim_igen_flags /
3079 * m16.igen: New file. Copy mips16 insns here.
3080 * mips.igen: From here.
3082 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3084 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
3086 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
3088 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
3090 * gencode.c (build_instruction): Follow sim_write's lead in using
3091 BigEndianMem instead of !ByteSwapMem.
3093 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
3095 * configure.in (sim_gen): Dependent on target, select type of
3096 generator. Always select old style generator.
3098 configure: Re-generate.
3100 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
3102 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
3103 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
3104 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
3105 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
3106 SIM_@sim_gen@_*, set by autoconf.
3108 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3110 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3112 * interp.c (ColdReset): Remove #ifdef HASFPU, check
3113 CURRENT_FLOATING_POINT instead.
3115 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3116 (address_translation): Raise exception InstructionFetch when
3117 translation fails and isINSTRUCTION.
3119 * interp.c (sim_open, sim_write, sim_monitor, store_word,
3120 sim_engine_run): Change type of of vaddr and paddr to
3122 (address_translation, prefetch, load_memory, store_memory,
3123 cache_op): Change type of vAddr and pAddr to address_word.
3125 * gencode.c (build_instruction): Change type of vaddr and paddr to
3128 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
3130 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3131 macro to obtain result of ALU op.
3133 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3135 * interp.c (sim_info): Call profile_print.
3137 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3139 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3141 * sim-main.h (WITH_PROFILE): Do not define, defined in
3142 common/sim-config.h. Use sim-profile module.
3143 (simPROFILE): Delete defintion.
3145 * interp.c (PROFILE): Delete definition.
3146 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3147 (sim_close): Delete code writing profile histogram.
3148 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3150 (sim_engine_run): Delete code profiling the PC.
3152 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3154 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3156 * interp.c (sim_monitor): Make register pointers of type
3159 * sim-main.h: Make registers of type unsigned_word not
3162 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3164 * interp.c (sync_operation): Rename from SyncOperation, make
3165 global, add SD argument.
3166 (prefetch): Rename from Prefetch, make global, add SD argument.
3167 (decode_coproc): Make global.
3169 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3171 * gencode.c (build_instruction): Generate DecodeCoproc not
3172 decode_coproc calls.
3174 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3175 (SizeFGR): Move to sim-main.h
3176 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3177 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3178 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3180 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3181 FP_RM_TOMINF, GETRM): Move to sim-main.h.
3182 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3183 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3184 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3185 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3187 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3189 (sim-alu.h): Include.
3190 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3191 (sim_cia): Typedef to instruction_address.
3193 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
3195 * Makefile.in (interp.o): Rename generated file engine.c to
3200 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
3202 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3204 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3206 * gencode.c (build_instruction): For "FPSQRT", output correct
3207 number of arguments to Recip.
3209 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
3211 * Makefile.in (interp.o): Depends on sim-main.h
3213 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3215 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3216 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3217 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3218 STATE, DSSTATE): Define
3219 (GPR, FGRIDX, ..): Define.
3221 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3222 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3223 (GPR, FGRIDX, ...): Delete macros.
3225 * interp.c: Update names to match defines from sim-main.h
3227 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
3229 * interp.c (sim_monitor): Add SD argument.
3230 (sim_warning): Delete. Replace calls with calls to
3232 (sim_error): Delete. Replace calls with sim_io_error.
3233 (open_trace, writeout32, writeout16, getnum): Add SD argument.
3234 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3235 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3237 (mips_size): Rename from sim_size. Add SD argument.
3239 * interp.c (simulator): Delete global variable.
3240 (callback): Delete global variable.
3241 (mips_option_handler, sim_open, sim_write, sim_read,
3242 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3243 sim_size,sim_monitor): Use sim_io_* not callback->*.
3244 (sim_open): ZALLOC simulator struct.
3245 (PROFILE): Do not define.
3247 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3249 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3250 support.h with corresponding code.
3252 * sim-main.h (word64, uword64), support.h: Move definition to
3254 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3257 * Makefile.in: Update dependencies
3258 * interp.c: Do not include.
3260 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3262 * interp.c (address_translation, load_memory, store_memory,
3263 cache_op): Rename to from AddressTranslation et.al., make global,
3266 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3269 * interp.c (SignalException): Rename to signal_exception, make
3272 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3274 * sim-main.h (SignalException, SignalExceptionInterrupt,
3275 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3276 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3277 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3280 * interp.c, support.h: Use.
3282 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3284 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3285 to value_fpr / store_fpr. Add SD argument.
3286 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3287 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3289 * sim-main.h (ValueFPR, StoreFPR): Define.
3291 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3293 * interp.c (sim_engine_run): Check consistency between configure
3294 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3297 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3298 (mips_fpu): Configure WITH_FLOATING_POINT.
3299 (mips_endian): Configure WITH_TARGET_ENDIAN.
3300 * configure: Update.
3302 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3304 * configure: Regenerated to track ../common/aclocal.m4 changes.
3306 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3308 * configure: Regenerated.
3310 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3312 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3314 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3316 * gencode.c (print_igen_insn_models): Assume certain architectures
3317 include all mips* instructions.
3318 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3321 * Makefile.in (tmp.igen): Add target. Generate igen input from
3324 * gencode.c (FEATURE_IGEN): Define.
3325 (main): Add --igen option. Generate output in igen format.
3326 (process_instructions): Format output according to igen option.
3327 (print_igen_insn_format): New function.
3328 (print_igen_insn_models): New function.
3329 (process_instructions): Only issue warnings and ignore
3330 instructions when no FEATURE_IGEN.
3332 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3334 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3337 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3339 * configure: Regenerated to track ../common/aclocal.m4 changes.
3341 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3343 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3344 SIM_RESERVED_BITS): Delete, moved to common.
3345 (SIM_EXTRA_CFLAGS): Update.
3347 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3349 * configure.in: Configure non-strict memory alignment.
3350 * configure: Regenerated to track ../common/aclocal.m4 changes.
3352 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3354 * configure: Regenerated to track ../common/aclocal.m4 changes.
3356 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3358 * gencode.c (SDBBP,DERET): Added (3900) insns.
3359 (RFE): Turn on for 3900.
3360 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3361 (dsstate): Made global.
3362 (SUBTARGET_R3900): Added.
3363 (CANCELDELAYSLOT): New.
3364 (SignalException): Ignore SystemCall rather than ignore and
3365 terminate. Add DebugBreakPoint handling.
3366 (decode_coproc): New insns RFE, DERET; and new registers Debug
3367 and DEPC protected by SUBTARGET_R3900.
3368 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3370 * Makefile.in,configure.in: Add mips subtarget option.
3371 * configure: Update.
3373 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3375 * gencode.c: Add r3900 (tx39).
3378 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3380 * gencode.c (build_instruction): Don't need to subtract 4 for
3383 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3385 * interp.c: Correct some HASFPU problems.
3387 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3389 * configure: Regenerated to track ../common/aclocal.m4 changes.
3391 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3393 * interp.c (mips_options): Fix samples option short form, should
3396 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3398 * interp.c (sim_info): Enable info code. Was just returning.
3400 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3402 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3405 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3407 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3409 (build_instruction): Ditto for LL.
3411 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3413 * configure: Regenerated to track ../common/aclocal.m4 changes.
3415 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3417 * configure: Regenerated to track ../common/aclocal.m4 changes.
3420 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3422 * interp.c (sim_open): Add call to sim_analyze_program, update
3425 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3427 * interp.c (sim_kill): Delete.
3428 (sim_create_inferior): Add ABFD argument. Set PC from same.
3429 (sim_load): Move code initializing trap handlers from here.
3430 (sim_open): To here.
3431 (sim_load): Delete, use sim-hload.c.
3433 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3435 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3437 * configure: Regenerated to track ../common/aclocal.m4 changes.
3440 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3442 * interp.c (sim_open): Add ABFD argument.
3443 (sim_load): Move call to sim_config from here.
3444 (sim_open): To here. Check return status.
3446 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3448 * gencode.c (build_instruction): Two arg MADD should
3449 not assign result to $0.
3451 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3453 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3454 * sim/mips/configure.in: Regenerate.
3456 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3458 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3459 signed8, unsigned8 et.al. types.
3461 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3462 hosts when selecting subreg.
3464 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3466 * interp.c (sim_engine_run): Reset the ZERO register to zero
3467 regardless of FEATURE_WARN_ZERO.
3468 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3470 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3472 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3473 (SignalException): For BreakPoints ignore any mode bits and just
3475 (SignalException): Always set the CAUSE register.
3477 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3479 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3480 exception has been taken.
3482 * interp.c: Implement the ERET and mt/f sr instructions.
3484 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3486 * interp.c (SignalException): Don't bother restarting an
3489 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3491 * interp.c (SignalException): Really take an interrupt.
3492 (interrupt_event): Only deliver interrupts when enabled.
3494 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3496 * interp.c (sim_info): Only print info when verbose.
3497 (sim_info) Use sim_io_printf for output.
3499 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3501 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3504 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3506 * interp.c (sim_do_command): Check for common commands if a
3507 simulator specific command fails.
3509 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3511 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3512 and simBE when DEBUG is defined.
3514 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3516 * interp.c (interrupt_event): New function. Pass exception event
3517 onto exception handler.
3519 * configure.in: Check for stdlib.h.
3520 * configure: Regenerate.
3522 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3523 variable declaration.
3524 (build_instruction): Initialize memval1.
3525 (build_instruction): Add UNUSED attribute to byte, bigend,
3527 (build_operands): Ditto.
3529 * interp.c: Fix GCC warnings.
3530 (sim_get_quit_code): Delete.
3532 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3533 * Makefile.in: Ditto.
3534 * configure: Re-generate.
3536 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3538 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3540 * interp.c (mips_option_handler): New function parse argumes using
3542 (myname): Replace with STATE_MY_NAME.
3543 (sim_open): Delete check for host endianness - performed by
3545 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3546 (sim_open): Move much of the initialization from here.
3547 (sim_load): To here. After the image has been loaded and
3549 (sim_open): Move ColdReset from here.
3550 (sim_create_inferior): To here.
3551 (sim_open): Make FP check less dependant on host endianness.
3553 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3555 * interp.c (sim_set_callbacks): Delete.
3557 * interp.c (membank, membank_base, membank_size): Replace with
3558 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3559 (sim_open): Remove call to callback->init. gdb/run do this.
3563 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3565 * interp.c (big_endian_p): Delete, replaced by
3566 current_target_byte_order.
3568 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3570 * interp.c (host_read_long, host_read_word, host_swap_word,
3571 host_swap_long): Delete. Using common sim-endian.
3572 (sim_fetch_register, sim_store_register): Use H2T.
3573 (pipeline_ticks): Delete. Handled by sim-events.
3575 (sim_engine_run): Update.
3577 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3579 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3581 (SignalException): To here. Signal using sim_engine_halt.
3582 (sim_stop_reason): Delete, moved to common.
3584 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3586 * interp.c (sim_open): Add callback argument.
3587 (sim_set_callbacks): Delete SIM_DESC argument.
3590 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3592 * Makefile.in (SIM_OBJS): Add common modules.
3594 * interp.c (sim_set_callbacks): Also set SD callback.
3595 (set_endianness, xfer_*, swap_*): Delete.
3596 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3597 Change to functions using sim-endian macros.
3598 (control_c, sim_stop): Delete, use common version.
3599 (simulate): Convert into.
3600 (sim_engine_run): This function.
3601 (sim_resume): Delete.
3603 * interp.c (simulation): New variable - the simulator object.
3604 (sim_kind): Delete global - merged into simulation.
3605 (sim_load): Cleanup. Move PC assignment from here.
3606 (sim_create_inferior): To here.
3608 * sim-main.h: New file.
3609 * interp.c (sim-main.h): Include.
3611 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3613 * configure: Regenerated to track ../common/aclocal.m4 changes.
3615 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3617 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3619 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3621 * gencode.c (build_instruction): DIV instructions: check
3622 for division by zero and integer overflow before using
3623 host's division operation.
3625 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3627 * Makefile.in (SIM_OBJS): Add sim-load.o.
3628 * interp.c: #include bfd.h.
3629 (target_byte_order): Delete.
3630 (sim_kind, myname, big_endian_p): New static locals.
3631 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3632 after argument parsing. Recognize -E arg, set endianness accordingly.
3633 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3634 load file into simulator. Set PC from bfd.
3635 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3636 (set_endianness): Use big_endian_p instead of target_byte_order.
3638 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3640 * interp.c (sim_size): Delete prototype - conflicts with
3641 definition in remote-sim.h. Correct definition.
3643 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3645 * configure: Regenerated to track ../common/aclocal.m4 changes.
3648 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3650 * interp.c (sim_open): New arg `kind'.
3652 * configure: Regenerated to track ../common/aclocal.m4 changes.
3654 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3656 * configure: Regenerated to track ../common/aclocal.m4 changes.
3658 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3660 * interp.c (sim_open): Set optind to 0 before calling getopt.
3662 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3664 * configure: Regenerated to track ../common/aclocal.m4 changes.
3666 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3668 * interp.c : Replace uses of pr_addr with pr_uword64
3669 where the bit length is always 64 independent of SIM_ADDR.
3670 (pr_uword64) : added.
3672 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3674 * configure: Re-generate.
3676 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3678 * configure: Regenerate to track ../common/aclocal.m4 changes.
3680 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3682 * interp.c (sim_open): New SIM_DESC result. Argument is now
3684 (other sim_*): New SIM_DESC argument.
3686 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3688 * interp.c: Fix printing of addresses for non-64-bit targets.
3689 (pr_addr): Add function to print address based on size.
3691 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3693 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3695 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3697 * gencode.c (build_mips16_operands): Correct computation of base
3698 address for extended PC relative instruction.
3700 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3702 * interp.c (mips16_entry): Add support for floating point cases.
3703 (SignalException): Pass floating point cases to mips16_entry.
3704 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3706 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3708 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3709 and then set the state to fmt_uninterpreted.
3710 (COP_SW): Temporarily set the state to fmt_word while calling
3713 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3715 * gencode.c (build_instruction): The high order may be set in the
3716 comparison flags at any ISA level, not just ISA 4.
3718 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3720 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3721 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3722 * configure.in: sinclude ../common/aclocal.m4.
3723 * configure: Regenerated.
3725 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3727 * configure: Rebuild after change to aclocal.m4.
3729 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3731 * configure configure.in Makefile.in: Update to new configure
3732 scheme which is more compatible with WinGDB builds.
3733 * configure.in: Improve comment on how to run autoconf.
3734 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3735 * Makefile.in: Use autoconf substitution to install common
3738 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3740 * gencode.c (build_instruction): Use BigEndianCPU instead of
3743 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3745 * interp.c (sim_monitor): Make output to stdout visible in
3746 wingdb's I/O log window.
3748 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3750 * support.h: Undo previous change to SIGTRAP
3753 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3755 * interp.c (store_word, load_word): New static functions.
3756 (mips16_entry): New static function.
3757 (SignalException): Look for mips16 entry and exit instructions.
3758 (simulate): Use the correct index when setting fpr_state after
3759 doing a pending move.
3761 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3763 * interp.c: Fix byte-swapping code throughout to work on
3764 both little- and big-endian hosts.
3766 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3768 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3769 with gdb/config/i386/xm-windows.h.
3771 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3773 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3774 that messes up arithmetic shifts.
3776 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3778 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3779 SIGTRAP and SIGQUIT for _WIN32.
3781 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3783 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3784 force a 64 bit multiplication.
3785 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3786 destination register is 0, since that is the default mips16 nop
3789 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3791 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3792 (build_endian_shift): Don't check proc64.
3793 (build_instruction): Always set memval to uword64. Cast op2 to
3794 uword64 when shifting it left in memory instructions. Always use
3795 the same code for stores--don't special case proc64.
3797 * gencode.c (build_mips16_operands): Fix base PC value for PC
3799 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3801 * interp.c (simJALDELAYSLOT): Define.
3802 (JALDELAYSLOT): Define.
3803 (INDELAYSLOT, INJALDELAYSLOT): Define.
3804 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3806 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3808 * interp.c (sim_open): add flush_cache as a PMON routine
3809 (sim_monitor): handle flush_cache by ignoring it
3811 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3813 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3815 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3816 (BigEndianMem): Rename to ByteSwapMem and change sense.
3817 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3818 BigEndianMem references to !ByteSwapMem.
3819 (set_endianness): New function, with prototype.
3820 (sim_open): Call set_endianness.
3821 (sim_info): Use simBE instead of BigEndianMem.
3822 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3823 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3824 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3825 ifdefs, keeping the prototype declaration.
3826 (swap_word): Rewrite correctly.
3827 (ColdReset): Delete references to CONFIG. Delete endianness related
3828 code; moved to set_endianness.
3830 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3832 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3833 * interp.c (CHECKHILO): Define away.
3834 (simSIGINT): New macro.
3835 (membank_size): Increase from 1MB to 2MB.
3836 (control_c): New function.
3837 (sim_resume): Rename parameter signal to signal_number. Add local
3838 variable prev. Call signal before and after simulate.
3839 (sim_stop_reason): Add simSIGINT support.
3840 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3842 (sim_warning): Delete call to SignalException. Do call printf_filtered
3844 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3845 a call to sim_warning.
3847 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3849 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3850 16 bit instructions.
3852 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3854 Add support for mips16 (16 bit MIPS implementation):
3855 * gencode.c (inst_type): Add mips16 instruction encoding types.
3856 (GETDATASIZEINSN): Define.
3857 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3858 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3860 (MIPS16_DECODE): New table, for mips16 instructions.
3861 (bitmap_val): New static function.
3862 (struct mips16_op): Define.
3863 (mips16_op_table): New table, for mips16 operands.
3864 (build_mips16_operands): New static function.
3865 (process_instructions): If PC is odd, decode a mips16
3866 instruction. Break out instruction handling into new
3867 build_instruction function.
3868 (build_instruction): New static function, broken out of
3869 process_instructions. Check modifiers rather than flags for SHIFT
3870 bit count and m[ft]{hi,lo} direction.
3871 (usage): Pass program name to fprintf.
3872 (main): Remove unused variable this_option_optind. Change
3873 ``*loptarg++'' to ``loptarg++''.
3874 (my_strtoul): Parenthesize && within ||.
3875 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3876 (simulate): If PC is odd, fetch a 16 bit instruction, and
3877 increment PC by 2 rather than 4.
3878 * configure.in: Add case for mips16*-*-*.
3879 * configure: Rebuild.
3881 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3883 * interp.c: Allow -t to enable tracing in standalone simulator.
3884 Fix garbage output in trace file and error messages.
3886 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3888 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3889 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3890 * configure.in: Simplify using macros in ../common/aclocal.m4.
3891 * configure: Regenerated.
3892 * tconfig.in: New file.
3894 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3896 * interp.c: Fix bugs in 64-bit port.
3897 Use ansi function declarations for msvc compiler.
3898 Initialize and test file pointer in trace code.
3899 Prevent duplicate definition of LAST_EMED_REGNUM.
3901 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3903 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3905 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3907 * interp.c (SignalException): Check for explicit terminating
3909 * gencode.c: Pass instruction value through SignalException()
3910 calls for Trap, Breakpoint and Syscall.
3912 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3914 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3915 only used on those hosts that provide it.
3916 * configure.in: Add sqrt() to list of functions to be checked for.
3917 * config.in: Re-generated.
3918 * configure: Re-generated.
3920 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3922 * gencode.c (process_instructions): Call build_endian_shift when
3923 expanding STORE RIGHT, to fix swr.
3924 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3925 clear the high bits.
3926 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3927 Fix float to int conversions to produce signed values.
3929 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3931 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3932 (process_instructions): Correct handling of nor instruction.
3933 Correct shift count for 32 bit shift instructions. Correct sign
3934 extension for arithmetic shifts to not shift the number of bits in
3935 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3936 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3938 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3939 It's OK to have a mult follow a mult. What's not OK is to have a
3940 mult follow an mfhi.
3941 (Convert): Comment out incorrect rounding code.
3943 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3945 * interp.c (sim_monitor): Improved monitor printf
3946 simulation. Tidied up simulator warnings, and added "--log" option
3947 for directing warning message output.
3948 * gencode.c: Use sim_warning() rather than WARNING macro.
3950 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3952 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3953 getopt1.o, rather than on gencode.c. Link objects together.
3954 Don't link against -liberty.
3955 (gencode.o, getopt.o, getopt1.o): New targets.
3956 * gencode.c: Include <ctype.h> and "ansidecl.h".
3957 (AND): Undefine after including "ansidecl.h".
3958 (ULONG_MAX): Define if not defined.
3959 (OP_*): Don't define macros; now defined in opcode/mips.h.
3960 (main): Call my_strtoul rather than strtoul.
3961 (my_strtoul): New static function.
3963 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3965 * gencode.c (process_instructions): Generate word64 and uword64
3966 instead of `long long' and `unsigned long long' data types.
3967 * interp.c: #include sysdep.h to get signals, and define default
3969 * (Convert): Work around for Visual-C++ compiler bug with type
3971 * support.h: Make things compile under Visual-C++ by using
3972 __int64 instead of `long long'. Change many refs to long long
3973 into word64/uword64 typedefs.
3975 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3977 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3978 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3980 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3981 (AC_PROG_INSTALL): Added.
3982 (AC_PROG_CC): Moved to before configure.host call.
3983 * configure: Rebuilt.
3985 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3987 * configure.in: Define @SIMCONF@ depending on mips target.
3988 * configure: Rebuild.
3989 * Makefile.in (run): Add @SIMCONF@ to control simulator
3991 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3992 * interp.c: Remove some debugging, provide more detailed error
3993 messages, update memory accesses to use LOADDRMASK.
3995 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3997 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3998 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
4000 * configure: Rebuild.
4001 * config.in: New file, generated by autoheader.
4002 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
4003 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
4004 HAVE_ANINT and HAVE_AINT, as appropriate.
4005 * Makefile.in (run): Use @LIBS@ rather than -lm.
4006 (interp.o): Depend upon config.h.
4007 (Makefile): Just rebuild Makefile.
4008 (clean): Remove stamp-h.
4009 (mostlyclean): Make the same as clean, not as distclean.
4010 (config.h, stamp-h): New targets.
4012 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
4014 * interp.c (ColdReset): Fix boolean test. Make all simulator
4017 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
4019 * interp.c (xfer_direct_word, xfer_direct_long,
4020 swap_direct_word, swap_direct_long, xfer_big_word,
4021 xfer_big_long, xfer_little_word, xfer_little_long,
4022 swap_word,swap_long): Added.
4023 * interp.c (ColdReset): Provide function indirection to
4024 host<->simulated_target transfer routines.
4025 * interp.c (sim_store_register, sim_fetch_register): Updated to
4026 make use of indirected transfer routines.
4028 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
4030 * gencode.c (process_instructions): Ensure FP ABS instruction
4032 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
4033 system call support.
4035 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
4037 * interp.c (sim_do_command): Complain if callback structure not
4040 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
4042 * interp.c (Convert): Provide round-to-nearest and round-to-zero
4043 support for Sun hosts.
4044 * Makefile.in (gencode): Ensure the host compiler and libraries
4045 used for cross-hosted build.
4047 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
4049 * interp.c, gencode.c: Some more (TODO) tidying.
4051 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
4053 * gencode.c, interp.c: Replaced explicit long long references with
4054 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
4055 * support.h (SET64LO, SET64HI): Macros added.
4057 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
4059 * configure: Regenerate with autoconf 2.7.
4061 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
4063 * interp.c (LoadMemory): Enclose text following #endif in /* */.
4064 * support.h: Remove superfluous "1" from #if.
4065 * support.h (CHECKSIM): Remove stray 'a' at end of line.
4067 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
4069 * interp.c (StoreFPR): Control UndefinedResult() call on
4070 WARN_RESULT manifest.
4072 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
4074 * gencode.c: Tidied instruction decoding, and added FP instruction
4077 * interp.c: Added dineroIII, and BSD profiling support. Also
4078 run-time FP handling.
4080 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
4082 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
4083 gencode.c, interp.c, support.h: created.
projects / thirdparty / binutils-gdb.git / blob