1 2016-01-09 Mike Frysinger <vapier@gentoo.org>
3 * config.in, configure: Regenerate.
5 2016-01-06 Mike Frysinger <vapier@gentoo.org>
7 * interp.c (sim_open): Mark argv const.
8 (sim_create_inferior): Mark argv and env const.
10 2016-01-04 Mike Frysinger <vapier@gentoo.org>
12 * configure: Regenerate.
14 2016-01-03 Mike Frysinger <vapier@gentoo.org>
16 * interp.c (sim_open): Update sim_parse_args comment.
18 2016-01-03 Mike Frysinger <vapier@gentoo.org>
20 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
21 * configure: Regenerate.
23 2016-01-02 Mike Frysinger <vapier@gentoo.org>
25 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
26 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
27 * configure: Regenerate.
28 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
30 2016-01-02 Mike Frysinger <vapier@gentoo.org>
32 * dv-tx3904cpu.c (CPU, SD): Delete.
34 2015-12-30 Mike Frysinger <vapier@gentoo.org>
36 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
37 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
38 (sim_store_register): Rename to ...
39 (mips_reg_store): ... this. Delete local cpu var.
40 Update sim_io_eprintf calls.
41 (sim_fetch_register): Rename to ...
42 (mips_reg_fetch): ... this. Delete local cpu var.
43 Update sim_io_eprintf calls.
45 2015-12-27 Mike Frysinger <vapier@gentoo.org>
47 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
49 2015-12-26 Mike Frysinger <vapier@gentoo.org>
51 * config.in, configure: Regenerate.
53 2015-12-26 Mike Frysinger <vapier@gentoo.org>
55 * interp.c (sim_write, sim_read): Delete.
56 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
57 (load_word): Likewise.
58 * micromips.igen (cache): Likewise.
59 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
60 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
61 do_store_left, do_store_right, do_load_double, do_store_double):
63 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
65 * sim-main.c (address_translation, prefetch): Delete.
66 (ifetch32, ifetch16): Delete call to AddressTranslation and set
68 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
69 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
70 (LoadMemory, StoreMemory): Delete CCA arg.
72 2015-12-24 Mike Frysinger <vapier@gentoo.org>
74 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
75 * configure: Regenerated.
77 2015-12-24 Mike Frysinger <vapier@gentoo.org>
79 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
82 2015-12-24 Mike Frysinger <vapier@gentoo.org>
84 * tconfig.h (SIM_HANDLES_LMA): Delete.
86 2015-12-24 Mike Frysinger <vapier@gentoo.org>
88 * sim-main.h (WITH_WATCHPOINTS): Delete.
90 2015-12-24 Mike Frysinger <vapier@gentoo.org>
92 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
94 2015-12-24 Mike Frysinger <vapier@gentoo.org>
96 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
98 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
100 * micromips.igen (process_isa_mode): Fix left shift of negative
103 2015-11-17 Mike Frysinger <vapier@gentoo.org>
105 * sim-main.h (WITH_MODULO_MEMORY): Delete.
107 2015-11-15 Mike Frysinger <vapier@gentoo.org>
109 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
111 2015-11-14 Mike Frysinger <vapier@gentoo.org>
113 * interp.c (sim_close): Rename to ...
114 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
116 * sim-main.h (mips_sim_close): Declare.
117 (SIM_CLOSE_HOOK): Define.
119 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
120 Ali Lown <ali.lown@imgtec.com>
122 * Makefile.in (tmp-micromips): New rule.
123 (tmp-mach-multi): Add support for micromips.
124 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
125 that works for both mips64 and micromips64.
126 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
128 Add build support for micromips.
129 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
130 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
131 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
132 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
133 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
134 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
135 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
136 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
137 Refactored instruction code to use these functions.
138 * dsp2.igen: Refactored instruction code to use the new functions.
139 * interp.c (decode_coproc): Refactored to work with any instruction
141 (isa_mode): New variable
142 (RSVD_INSTRUCTION): Changed to 0x00000039.
143 * m16.igen (BREAK16): Refactored instruction to use do_break16.
144 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
145 * micromips.dc: New file.
146 * micromips.igen: New file.
147 * micromips16.dc: New file.
148 * micromipsdsp.igen: New file.
149 * micromipsrun.c: New file.
150 * mips.igen (do_swc1): Changed to work with any instruction encoding.
151 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
152 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
153 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
154 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
155 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
156 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
157 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
158 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
159 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
160 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
161 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
162 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
163 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
164 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
165 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
166 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
167 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
168 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
170 Refactored instruction code to use these functions.
171 (RSVD): Changed to use new reserved instruction.
172 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
173 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
174 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
175 do_store_double): Added micromips32 and micromips64 models.
176 Added include for micromips.igen and micromipsdsp.igen
177 Add micromips32 and micromips64 models.
178 (DecodeCoproc): Updated to use new macro definition.
179 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
180 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
181 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
182 Refactored instruction code to use these functions.
183 * sim-main.h (CP0_operation): New enum.
184 (DecodeCoproc): Updated macro.
185 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
186 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
187 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
188 ISA_MODE_MICROMIPS): New defines.
189 (sim_state): Add isa_mode field.
191 2015-06-23 Mike Frysinger <vapier@gentoo.org>
193 * configure: Regenerate.
195 2015-06-12 Mike Frysinger <vapier@gentoo.org>
197 * configure.ac: Change configure.in to configure.ac.
198 * configure: Regenerate.
200 2015-06-12 Mike Frysinger <vapier@gentoo.org>
202 * configure: Regenerate.
204 2015-06-12 Mike Frysinger <vapier@gentoo.org>
206 * interp.c [TRACE]: Delete.
207 (TRACE): Change to WITH_TRACE_ANY_P.
208 [!WITH_TRACE_ANY_P] (open_trace): Define.
209 (mips_option_handler, open_trace, sim_close, dotrace):
210 Change defined(TRACE) to WITH_TRACE_ANY_P.
211 (sim_open): Delete TRACE ifdef check.
212 * sim-main.c (load_memory): Delete TRACE ifdef check.
213 (store_memory): Likewise.
214 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
215 [!WITH_TRACE_ANY_P] (dotrace): Define.
217 2015-04-18 Mike Frysinger <vapier@gentoo.org>
219 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
222 2015-04-18 Mike Frysinger <vapier@gentoo.org>
224 * sim-main.h (SIM_CPU): Delete.
226 2015-04-18 Mike Frysinger <vapier@gentoo.org>
228 * sim-main.h (sim_cia): Delete.
230 2015-04-17 Mike Frysinger <vapier@gentoo.org>
232 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
234 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
235 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
236 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
237 CIA_SET to CPU_PC_SET.
238 * sim-main.h (CIA_GET, CIA_SET): Delete.
240 2015-04-15 Mike Frysinger <vapier@gentoo.org>
242 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
243 * sim-main.h (STATE_CPU): Delete.
245 2015-04-13 Mike Frysinger <vapier@gentoo.org>
247 * configure: Regenerate.
249 2015-04-13 Mike Frysinger <vapier@gentoo.org>
251 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
252 * interp.c (mips_pc_get, mips_pc_set): New functions.
253 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
254 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
255 (sim_pc_get): Delete.
256 * sim-main.h (SIM_CPU): Define.
257 (struct sim_state): Change cpu to an array of pointers.
260 2015-04-13 Mike Frysinger <vapier@gentoo.org>
262 * interp.c (mips_option_handler, open_trace, sim_close,
263 sim_write, sim_read, sim_store_register, sim_fetch_register,
264 sim_create_inferior, pr_addr, pr_uword64): Convert old style
266 (sim_open): Convert old style prototype. Change casts with
267 sim_write to unsigned char *.
268 (fetch_str): Change null to unsigned char, and change cast to
270 (sim_monitor): Change c & ch to unsigned char. Change cast to
273 2015-04-12 Mike Frysinger <vapier@gentoo.org>
275 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
277 2015-04-06 Mike Frysinger <vapier@gentoo.org>
279 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
281 2015-04-01 Mike Frysinger <vapier@gentoo.org>
283 * tconfig.h (SIM_HAVE_PROFILE): Delete.
285 2015-03-31 Mike Frysinger <vapier@gentoo.org>
287 * config.in, configure: Regenerate.
289 2015-03-24 Mike Frysinger <vapier@gentoo.org>
291 * interp.c (sim_pc_get): New function.
293 2015-03-24 Mike Frysinger <vapier@gentoo.org>
295 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
296 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
298 2015-03-24 Mike Frysinger <vapier@gentoo.org>
300 * configure: Regenerate.
302 2015-03-23 Mike Frysinger <vapier@gentoo.org>
304 * configure: Regenerate.
306 2015-03-23 Mike Frysinger <vapier@gentoo.org>
308 * configure: Regenerate.
309 * configure.ac (mips_extra_objs): Delete.
310 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
311 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
313 2015-03-23 Mike Frysinger <vapier@gentoo.org>
315 * configure: Regenerate.
316 * configure.ac: Delete sim_hw checks for dv-sockser.
318 2015-03-16 Mike Frysinger <vapier@gentoo.org>
320 * config.in, configure: Regenerate.
321 * tconfig.in: Rename file ...
322 * tconfig.h: ... here.
324 2015-03-15 Mike Frysinger <vapier@gentoo.org>
326 * tconfig.in: Delete includes.
327 [HAVE_DV_SOCKSER]: Delete.
329 2015-03-14 Mike Frysinger <vapier@gentoo.org>
331 * Makefile.in (SIM_RUN_OBJS): Delete.
333 2015-03-14 Mike Frysinger <vapier@gentoo.org>
335 * configure.ac (AC_CHECK_HEADERS): Delete.
336 * aclocal.m4, configure: Regenerate.
338 2014-08-19 Alan Modra <amodra@gmail.com>
340 * configure: Regenerate.
342 2014-08-15 Roland McGrath <mcgrathr@google.com>
344 * configure: Regenerate.
345 * config.in: Regenerate.
347 2014-03-04 Mike Frysinger <vapier@gentoo.org>
349 * configure: Regenerate.
351 2013-09-23 Alan Modra <amodra@gmail.com>
353 * configure: Regenerate.
355 2013-06-03 Mike Frysinger <vapier@gentoo.org>
357 * aclocal.m4, configure: Regenerate.
359 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
361 * configure: Rebuild.
363 2013-03-26 Mike Frysinger <vapier@gentoo.org>
365 * configure: Regenerate.
367 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
369 * configure.ac: Address use of dv-sockser.o.
370 * tconfig.in: Conditionalize use of dv_sockser_install.
371 * configure: Regenerated.
372 * config.in: Regenerated.
374 2012-10-04 Chao-ying Fu <fu@mips.com>
375 Steve Ellcey <sellcey@mips.com>
377 * mips/mips3264r2.igen (rdhwr): New.
379 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
381 * configure.ac: Always link against dv-sockser.o.
382 * configure: Regenerate.
384 2012-06-15 Joel Brobecker <brobecker@adacore.com>
386 * config.in, configure: Regenerate.
388 2012-05-18 Nick Clifton <nickc@redhat.com>
391 * interp.c: Include config.h before system header files.
393 2012-03-24 Mike Frysinger <vapier@gentoo.org>
395 * aclocal.m4, config.in, configure: Regenerate.
397 2011-12-03 Mike Frysinger <vapier@gentoo.org>
399 * aclocal.m4: New file.
400 * configure: Regenerate.
402 2011-10-19 Mike Frysinger <vapier@gentoo.org>
404 * configure: Regenerate after common/acinclude.m4 update.
406 2011-10-17 Mike Frysinger <vapier@gentoo.org>
408 * configure.ac: Change include to common/acinclude.m4.
410 2011-10-17 Mike Frysinger <vapier@gentoo.org>
412 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
413 call. Replace common.m4 include with SIM_AC_COMMON.
414 * configure: Regenerate.
416 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
418 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
420 (tmp-mach-multi): Exit early when igen fails.
422 2011-07-05 Mike Frysinger <vapier@gentoo.org>
424 * interp.c (sim_do_command): Delete.
426 2011-02-14 Mike Frysinger <vapier@gentoo.org>
428 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
429 (tx3904sio_fifo_reset): Likewise.
430 * interp.c (sim_monitor): Likewise.
432 2010-04-14 Mike Frysinger <vapier@gentoo.org>
434 * interp.c (sim_write): Add const to buffer arg.
436 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
438 * interp.c: Don't include sysdep.h
440 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
442 * configure: Regenerate.
444 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
446 * config.in: Regenerate.
447 * configure: Likewise.
449 * configure: Regenerate.
451 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
453 * configure: Regenerate to track ../common/common.m4 changes.
456 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
457 Daniel Jacobowitz <dan@codesourcery.com>
458 Joseph Myers <joseph@codesourcery.com>
460 * configure: Regenerate.
462 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
464 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
465 that unconditionally allows fmt_ps.
466 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
467 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
468 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
469 filter from 64,f to 32,f.
470 (PREFX): Change filter from 64 to 32.
471 (LDXC1, LUXC1): Provide separate mips32r2 implementations
472 that use do_load_double instead of do_load. Make both LUXC1
473 versions unpredictable if SizeFGR () != 64.
474 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
475 instead of do_store. Remove unused variable. Make both SUXC1
476 versions unpredictable if SizeFGR () != 64.
478 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
480 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
481 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
482 shifts for that case.
484 2007-09-04 Nick Clifton <nickc@redhat.com>
486 * interp.c (options enum): Add OPTION_INFO_MEMORY.
487 (display_mem_info): New static variable.
488 (mips_option_handler): Handle OPTION_INFO_MEMORY.
489 (mips_options): Add info-memory and memory-info.
490 (sim_open): After processing the command line and board
491 specification, check display_mem_info. If it is set then
492 call the real handler for the --memory-info command line
495 2007-08-24 Joel Brobecker <brobecker@adacore.com>
497 * configure.ac: Change license of multi-run.c to GPL version 3.
498 * configure: Regenerate.
500 2007-06-28 Richard Sandiford <richard@codesourcery.com>
502 * configure.ac, configure: Revert last patch.
504 2007-06-26 Richard Sandiford <richard@codesourcery.com>
506 * configure.ac (sim_mipsisa3264_configs): New variable.
507 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
508 every configuration support all four targets, using the triplet to
509 determine the default.
510 * configure: Regenerate.
512 2007-06-25 Richard Sandiford <richard@codesourcery.com>
514 * Makefile.in (m16run.o): New rule.
516 2007-05-15 Thiemo Seufer <ths@mips.com>
518 * mips3264r2.igen (DSHD): Fix compile warning.
520 2007-05-14 Thiemo Seufer <ths@mips.com>
522 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
523 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
524 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
525 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
528 2007-03-01 Thiemo Seufer <ths@mips.com>
530 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
533 2007-02-20 Thiemo Seufer <ths@mips.com>
535 * dsp.igen: Update copyright notice.
536 * dsp2.igen: Fix copyright notice.
538 2007-02-20 Thiemo Seufer <ths@mips.com>
539 Chao-Ying Fu <fu@mips.com>
541 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
542 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
543 Add dsp2 to sim_igen_machine.
544 * configure: Regenerate.
545 * dsp.igen (do_ph_op): Add MUL support when op = 2.
546 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
547 (mulq_rs.ph): Use do_ph_mulq.
548 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
549 * mips.igen: Add dsp2 model and include dsp2.igen.
550 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
551 for *mips32r2, *mips64r2, *dsp.
552 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
553 for *mips32r2, *mips64r2, *dsp2.
554 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
556 2007-02-19 Thiemo Seufer <ths@mips.com>
557 Nigel Stephens <nigel@mips.com>
559 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
560 jumps with hazard barrier.
562 2007-02-19 Thiemo Seufer <ths@mips.com>
563 Nigel Stephens <nigel@mips.com>
565 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
566 after each call to sim_io_write.
568 2007-02-19 Thiemo Seufer <ths@mips.com>
569 Nigel Stephens <nigel@mips.com>
571 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
572 supported by this simulator.
573 (decode_coproc): Recognise additional CP0 Config registers
576 2007-02-19 Thiemo Seufer <ths@mips.com>
577 Nigel Stephens <nigel@mips.com>
578 David Ung <davidu@mips.com>
580 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
581 uninterpreted formats. If fmt is one of the uninterpreted types
582 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
583 fmt_word, and fmt_uninterpreted_64 like fmt_long.
584 (store_fpr): When writing an invalid odd register, set the
585 matching even register to fmt_unknown, not the following register.
586 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
587 the the memory window at offset 0 set by --memory-size command
589 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
591 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
593 (sim_monitor): When returning the memory size to the MIPS
594 application, use the value in STATE_MEM_SIZE, not an arbitrary
596 (cop_lw): Don' mess around with FPR_STATE, just pass
597 fmt_uninterpreted_32 to StoreFPR.
599 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
601 * mips.igen (not_word_value): Single version for mips32, mips64
604 2007-02-19 Thiemo Seufer <ths@mips.com>
605 Nigel Stephens <nigel@mips.com>
607 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
610 2007-02-17 Thiemo Seufer <ths@mips.com>
612 * configure.ac (mips*-sde-elf*): Move in front of generic machine
614 * configure: Regenerate.
616 2007-02-17 Thiemo Seufer <ths@mips.com>
618 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
619 Add mdmx to sim_igen_machine.
620 (mipsisa64*-*-*): Likewise. Remove dsp.
621 (mipsisa32*-*-*): Remove dsp.
622 * configure: Regenerate.
624 2007-02-13 Thiemo Seufer <ths@mips.com>
626 * configure.ac: Add mips*-sde-elf* target.
627 * configure: Regenerate.
629 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
631 * acconfig.h: Remove.
632 * config.in, configure: Regenerate.
634 2006-11-07 Thiemo Seufer <ths@mips.com>
636 * dsp.igen (do_w_op): Fix compiler warning.
638 2006-08-29 Thiemo Seufer <ths@mips.com>
639 David Ung <davidu@mips.com>
641 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
643 * configure: Regenerate.
644 * mips.igen (model): Add smartmips.
645 (MADDU): Increment ACX if carry.
646 (do_mult): Clear ACX.
647 (ROR,RORV): Add smartmips.
648 (include): Include smartmips.igen.
649 * sim-main.h (ACX): Set to REGISTERS[89].
650 * smartmips.igen: New file.
652 2006-08-29 Thiemo Seufer <ths@mips.com>
653 David Ung <davidu@mips.com>
655 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
656 mips3264r2.igen. Add missing dependency rules.
657 * m16e.igen: Support for mips16e save/restore instructions.
659 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
661 * configure: Regenerated.
663 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
665 * configure: Regenerated.
667 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
669 * configure: Regenerated.
671 2006-05-15 Chao-ying Fu <fu@mips.com>
673 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
675 2006-04-18 Nick Clifton <nickc@redhat.com>
677 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
680 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
682 * configure: Regenerate.
684 2005-12-14 Chao-ying Fu <fu@mips.com>
686 * Makefile.in (SIM_OBJS): Add dsp.o.
687 (dsp.o): New dependency.
688 (IGEN_INCLUDE): Add dsp.igen.
689 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
690 mipsisa64*-*-*): Add dsp to sim_igen_machine.
691 * configure: Regenerate.
692 * mips.igen: Add dsp model and include dsp.igen.
693 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
694 because these instructions are extended in DSP ASE.
695 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
696 adding 6 DSP accumulator registers and 1 DSP control register.
697 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
698 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
699 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
700 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
701 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
702 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
703 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
704 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
705 DSPCR_CCOND_SMASK): New define.
706 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
707 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
709 2005-07-08 Ian Lance Taylor <ian@airs.com>
711 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
713 2005-06-16 David Ung <davidu@mips.com>
714 Nigel Stephens <nigel@mips.com>
716 * mips.igen: New mips16e model and include m16e.igen.
717 (check_u64): Add mips16e tag.
718 * m16e.igen: New file for MIPS16e instructions.
719 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
720 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
722 * configure: Regenerate.
724 2005-05-26 David Ung <davidu@mips.com>
726 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
727 tags to all instructions which are applicable to the new ISAs.
728 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
730 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
732 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
734 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
735 * configure: Regenerate.
737 2005-03-23 Mark Kettenis <kettenis@gnu.org>
739 * configure: Regenerate.
741 2005-01-14 Andrew Cagney <cagney@gnu.org>
743 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
744 explicit call to AC_CONFIG_HEADER.
745 * configure: Regenerate.
747 2005-01-12 Andrew Cagney <cagney@gnu.org>
749 * configure.ac: Update to use ../common/common.m4.
750 * configure: Re-generate.
752 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
754 * configure: Regenerated to track ../common/aclocal.m4 changes.
756 2005-01-07 Andrew Cagney <cagney@gnu.org>
758 * configure.ac: Rename configure.in, require autoconf 2.59.
759 * configure: Re-generate.
761 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
763 * configure: Regenerate for ../common/aclocal.m4 update.
765 2004-09-24 Monika Chaddha <monika@acmet.com>
767 Committed by Andrew Cagney.
768 * m16.igen (CMP, CMPI): Fix assembler.
770 2004-08-18 Chris Demetriou <cgd@broadcom.com>
772 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
773 * configure: Regenerate.
775 2004-06-25 Chris Demetriou <cgd@broadcom.com>
777 * configure.in (sim_m16_machine): Include mipsIII.
778 * configure: Regenerate.
780 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
782 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
784 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
786 2004-04-10 Chris Demetriou <cgd@broadcom.com>
788 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
790 2004-04-09 Chris Demetriou <cgd@broadcom.com>
792 * mips.igen (check_fmt): Remove.
793 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
794 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
795 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
796 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
797 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
798 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
799 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
800 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
801 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
802 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
804 2004-04-09 Chris Demetriou <cgd@broadcom.com>
806 * sb1.igen (check_sbx): New function.
807 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
809 2004-03-29 Chris Demetriou <cgd@broadcom.com>
810 Richard Sandiford <rsandifo@redhat.com>
812 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
813 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
814 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
815 separate implementations for mipsIV and mipsV. Use new macros to
816 determine whether the restrictions apply.
818 2004-01-19 Chris Demetriou <cgd@broadcom.com>
820 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
821 (check_mult_hilo): Improve comments.
822 (check_div_hilo): Likewise. Also, fork off a new version
823 to handle mips32/mips64 (since there are no hazards to check
826 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
828 * mips.igen (do_dmultx): Fix check for negative operands.
830 2003-05-16 Ian Lance Taylor <ian@airs.com>
832 * Makefile.in (SHELL): Make sure this is defined.
833 (various): Use $(SHELL) whenever we invoke move-if-change.
835 2003-05-03 Chris Demetriou <cgd@broadcom.com>
837 * cp1.c: Tweak attribution slightly.
840 * mdmx.igen: Likewise.
841 * mips3d.igen: Likewise.
842 * sb1.igen: Likewise.
844 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
846 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
849 2003-02-27 Andrew Cagney <cagney@redhat.com>
851 * interp.c (sim_open): Rename _bfd to bfd.
852 (sim_create_inferior): Ditto.
854 2003-01-14 Chris Demetriou <cgd@broadcom.com>
856 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
858 2003-01-14 Chris Demetriou <cgd@broadcom.com>
860 * mips.igen (EI, DI): Remove.
862 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
864 * Makefile.in (tmp-run-multi): Fix mips16 filter.
866 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
867 Andrew Cagney <ac131313@redhat.com>
868 Gavin Romig-Koch <gavin@redhat.com>
869 Graydon Hoare <graydon@redhat.com>
870 Aldy Hernandez <aldyh@redhat.com>
871 Dave Brolley <brolley@redhat.com>
872 Chris Demetriou <cgd@broadcom.com>
874 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
875 (sim_mach_default): New variable.
876 (mips64vr-*-*, mips64vrel-*-*): New configurations.
877 Add a new simulator generator, MULTI.
878 * configure: Regenerate.
879 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
880 (multi-run.o): New dependency.
881 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
882 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
883 (tmp-multi): Combine them.
884 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
885 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
886 (distclean-extra): New rule.
887 * sim-main.h: Include bfd.h.
888 (MIPS_MACH): New macro.
889 * mips.igen (vr4120, vr5400, vr5500): New models.
890 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
891 * vr.igen: Replace with new version.
893 2003-01-04 Chris Demetriou <cgd@broadcom.com>
895 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
896 * configure: Regenerate.
898 2002-12-31 Chris Demetriou <cgd@broadcom.com>
900 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
901 * mips.igen: Remove all invocations of check_branch_bug and
904 2002-12-16 Chris Demetriou <cgd@broadcom.com>
906 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
908 2002-07-30 Chris Demetriou <cgd@broadcom.com>
910 * mips.igen (do_load_double, do_store_double): New functions.
911 (LDC1, SDC1): Rename to...
912 (LDC1b, SDC1b): respectively.
913 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
915 2002-07-29 Michael Snyder <msnyder@redhat.com>
917 * cp1.c (fp_recip2): Modify initialization expression so that
918 GCC will recognize it as constant.
920 2002-06-18 Chris Demetriou <cgd@broadcom.com>
922 * mdmx.c (SD_): Delete.
923 (Unpredictable): Re-define, for now, to directly invoke
924 unpredictable_action().
925 (mdmx_acc_op): Fix error in .ob immediate handling.
927 2002-06-18 Andrew Cagney <cagney@redhat.com>
929 * interp.c (sim_firmware_command): Initialize `address'.
931 2002-06-16 Andrew Cagney <ac131313@redhat.com>
933 * configure: Regenerated to track ../common/aclocal.m4 changes.
935 2002-06-14 Chris Demetriou <cgd@broadcom.com>
936 Ed Satterthwaite <ehs@broadcom.com>
938 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
939 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
940 * mips.igen: Include mips3d.igen.
941 (mips3d): New model name for MIPS-3D ASE instructions.
942 (CVT.W.fmt): Don't use this instruction for word (source) format
944 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
945 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
946 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
947 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
948 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
949 (RSquareRoot1, RSquareRoot2): New macros.
950 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
951 (fp_rsqrt2): New functions.
952 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
953 * configure: Regenerate.
955 2002-06-13 Chris Demetriou <cgd@broadcom.com>
956 Ed Satterthwaite <ehs@broadcom.com>
958 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
959 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
960 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
961 (convert): Note that this function is not used for paired-single
963 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
964 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
965 (check_fmt_p): Enable paired-single support.
966 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
967 (PUU.PS): New instructions.
968 (CVT.S.fmt): Don't use this instruction for paired-single format
970 * sim-main.h (FP_formats): New value 'fmt_ps.'
971 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
972 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
974 2002-06-12 Chris Demetriou <cgd@broadcom.com>
976 * mips.igen: Fix formatting of function calls in
979 2002-06-12 Chris Demetriou <cgd@broadcom.com>
981 * mips.igen (MOVN, MOVZ): Trace result.
982 (TNEI): Print "tnei" as the opcode name in traces.
983 (CEIL.W): Add disassembly string for traces.
984 (RSQRT.fmt): Make location of disassembly string consistent
985 with other instructions.
987 2002-06-12 Chris Demetriou <cgd@broadcom.com>
989 * mips.igen (X): Delete unused function.
991 2002-06-08 Andrew Cagney <cagney@redhat.com>
993 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
995 2002-06-07 Chris Demetriou <cgd@broadcom.com>
996 Ed Satterthwaite <ehs@broadcom.com>
998 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
999 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1000 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1001 (fp_nmsub): New prototypes.
1002 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1003 (NegMultiplySub): New defines.
1004 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1005 (MADD.D, MADD.S): Replace with...
1006 (MADD.fmt): New instruction.
1007 (MSUB.D, MSUB.S): Replace with...
1008 (MSUB.fmt): New instruction.
1009 (NMADD.D, NMADD.S): Replace with...
1010 (NMADD.fmt): New instruction.
1011 (NMSUB.D, MSUB.S): Replace with...
1012 (NMSUB.fmt): New instruction.
1014 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1015 Ed Satterthwaite <ehs@broadcom.com>
1017 * cp1.c: Fix more comment spelling and formatting.
1018 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1019 (denorm_mode): New function.
1020 (fpu_unary, fpu_binary): Round results after operation, collect
1021 status from rounding operations, and update the FCSR.
1022 (convert): Collect status from integer conversions and rounding
1023 operations, and update the FCSR. Adjust NaN values that result
1024 from conversions. Convert to use sim_io_eprintf rather than
1025 fprintf, and remove some debugging code.
1026 * cp1.h (fenr_FS): New define.
1028 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1030 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1031 rounding mode to sim FP rounding mode flag conversion code into...
1032 (rounding_mode): New function.
1034 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1036 * cp1.c: Clean up formatting of a few comments.
1037 (value_fpr): Reformat switch statement.
1039 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1040 Ed Satterthwaite <ehs@broadcom.com>
1043 * sim-main.h: Include cp1.h.
1044 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1045 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1046 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1047 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1048 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1049 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1050 * cp1.c: Don't include sim-fpu.h; already included by
1051 sim-main.h. Clean up formatting of some comments.
1052 (NaN, Equal, Less): Remove.
1053 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1054 (fp_cmp): New functions.
1055 * mips.igen (do_c_cond_fmt): Remove.
1056 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1057 Compare. Add result tracing.
1058 (CxC1): Remove, replace with...
1059 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1060 (DMxC1): Remove, replace with...
1061 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1062 (MxC1): Remove, replace with...
1063 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1065 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1067 * sim-main.h (FGRIDX): Remove, replace all uses with...
1068 (FGR_BASE): New macro.
1069 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1070 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1071 (NR_FGR, FGR): Likewise.
1072 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1073 * mips.igen: Likewise.
1075 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1077 * cp1.c: Add an FSF Copyright notice to this file.
1079 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1080 Ed Satterthwaite <ehs@broadcom.com>
1082 * cp1.c (Infinity): Remove.
1083 * sim-main.h (Infinity): Likewise.
1085 * cp1.c (fp_unary, fp_binary): New functions.
1086 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1087 (fp_sqrt): New functions, implemented in terms of the above.
1088 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1089 (Recip, SquareRoot): Remove (replaced by functions above).
1090 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1091 (fp_recip, fp_sqrt): New prototypes.
1092 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1093 (Recip, SquareRoot): Replace prototypes with #defines which
1094 invoke the functions above.
1096 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1098 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1099 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1100 file, remove PARAMS from prototypes.
1101 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1102 simulator state arguments.
1103 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1104 pass simulator state arguments.
1105 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1106 (store_fpr, convert): Remove 'sd' argument.
1107 (value_fpr): Likewise. Convert to use 'SD' instead.
1109 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1111 * cp1.c (Min, Max): Remove #if 0'd functions.
1112 * sim-main.h (Min, Max): Remove.
1114 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1116 * cp1.c: fix formatting of switch case and default labels.
1117 * interp.c: Likewise.
1118 * sim-main.c: Likewise.
1120 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1122 * cp1.c: Clean up comments which describe FP formats.
1123 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1125 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1126 Ed Satterthwaite <ehs@broadcom.com>
1128 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1129 Broadcom SiByte SB-1 processor configurations.
1130 * configure: Regenerate.
1131 * sb1.igen: New file.
1132 * mips.igen: Include sb1.igen.
1134 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1135 * mdmx.igen: Add "sb1" model to all appropriate functions and
1137 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1138 (ob_func, ob_acc): Reference the above.
1139 (qh_acc): Adjust to keep the same size as ob_acc.
1140 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1141 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1143 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1145 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1147 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1148 Ed Satterthwaite <ehs@broadcom.com>
1150 * mips.igen (mdmx): New (pseudo-)model.
1151 * mdmx.c, mdmx.igen: New files.
1152 * Makefile.in (SIM_OBJS): Add mdmx.o.
1153 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1155 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1156 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1157 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1158 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1159 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1160 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1161 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1162 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1163 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1164 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1165 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1166 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1167 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1168 (qh_fmtsel): New macros.
1169 (_sim_cpu): New member "acc".
1170 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1171 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1173 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1175 * interp.c: Use 'deprecated' rather than 'depreciated.'
1176 * sim-main.h: Likewise.
1178 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1180 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1181 which wouldn't compile anyway.
1182 * sim-main.h (unpredictable_action): New function prototype.
1183 (Unpredictable): Define to call igen function unpredictable().
1184 (NotWordValue): New macro to call igen function not_word_value().
1185 (UndefinedResult): Remove.
1186 * interp.c (undefined_result): Remove.
1187 (unpredictable_action): New function.
1188 * mips.igen (not_word_value, unpredictable): New functions.
1189 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1190 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1191 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1192 NotWordValue() to check for unpredictable inputs, then
1193 Unpredictable() to handle them.
1195 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1197 * mips.igen: Fix formatting of calls to Unpredictable().
1199 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1201 * interp.c (sim_open): Revert previous change.
1203 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1205 * interp.c (sim_open): Disable chunk of code that wrote code in
1206 vector table entries.
1208 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1210 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1211 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1214 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1216 * cp1.c: Fix many formatting issues.
1218 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1220 * cp1.c (fpu_format_name): New function to replace...
1221 (DOFMT): This. Delete, and update all callers.
1222 (fpu_rounding_mode_name): New function to replace...
1223 (RMMODE): This. Delete, and update all callers.
1225 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1227 * interp.c: Move FPU support routines from here to...
1228 * cp1.c: Here. New file.
1229 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1230 (cp1.o): New target.
1232 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1234 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1235 * mips.igen (mips32, mips64): New models, add to all instructions
1236 and functions as appropriate.
1237 (loadstore_ea, check_u64): New variant for model mips64.
1238 (check_fmt_p): New variant for models mipsV and mips64, remove
1239 mipsV model marking fro other variant.
1242 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1243 for mips32 and mips64.
1244 (DCLO, DCLZ): New instructions for mips64.
1246 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1248 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1249 immediate or code as a hex value with the "%#lx" format.
1250 (ANDI): Likewise, and fix printed instruction name.
1252 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1254 * sim-main.h (UndefinedResult, Unpredictable): New macros
1255 which currently do nothing.
1257 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1259 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1260 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1261 (status_CU3): New definitions.
1263 * sim-main.h (ExceptionCause): Add new values for MIPS32
1264 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1265 for DebugBreakPoint and NMIReset to note their status in
1267 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1268 (SignalExceptionCacheErr): New exception macros.
1270 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1272 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1273 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1275 (SignalExceptionCoProcessorUnusable): Take as argument the
1276 unusable coprocessor number.
1278 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1280 * mips.igen: Fix formatting of all SignalException calls.
1282 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1284 * sim-main.h (SIGNEXTEND): Remove.
1286 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1288 * mips.igen: Remove gencode comment from top of file, fix
1289 spelling in another comment.
1291 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1293 * mips.igen (check_fmt, check_fmt_p): New functions to check
1294 whether specific floating point formats are usable.
1295 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1296 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1297 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1298 Use the new functions.
1299 (do_c_cond_fmt): Remove format checks...
1300 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1302 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1304 * mips.igen: Fix formatting of check_fpu calls.
1306 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1308 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1310 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1312 * mips.igen: Remove whitespace at end of lines.
1314 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1316 * mips.igen (loadstore_ea): New function to do effective
1317 address calculations.
1318 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1319 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1320 CACHE): Use loadstore_ea to do effective address computations.
1322 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1324 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1325 * mips.igen (LL, CxC1, MxC1): Likewise.
1327 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1329 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1330 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1331 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1332 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1333 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1334 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1335 Don't split opcode fields by hand, use the opcode field values
1338 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1340 * mips.igen (do_divu): Fix spacing.
1342 * mips.igen (do_dsllv): Move to be right before DSLLV,
1343 to match the rest of the do_<shift> functions.
1345 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1347 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1348 DSRL32, do_dsrlv): Trace inputs and results.
1350 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1352 * mips.igen (CACHE): Provide instruction-printing string.
1354 * interp.c (signal_exception): Comment tokens after #endif.
1356 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1358 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1359 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1360 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1361 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1362 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1363 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1364 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1365 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1367 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1369 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1370 instruction-printing string.
1371 (LWU): Use '64' as the filter flag.
1373 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1375 * mips.igen (SDXC1): Fix instruction-printing string.
1377 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1379 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1380 filter flags "32,f".
1382 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1384 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1387 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1389 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1390 add a comma) so that it more closely match the MIPS ISA
1391 documentation opcode partitioning.
1392 (PREF): Put useful names on opcode fields, and include
1393 instruction-printing string.
1395 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1397 * mips.igen (check_u64): New function which in the future will
1398 check whether 64-bit instructions are usable and signal an
1399 exception if not. Currently a no-op.
1400 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1401 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1402 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1403 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1405 * mips.igen (check_fpu): New function which in the future will
1406 check whether FPU instructions are usable and signal an exception
1407 if not. Currently a no-op.
1408 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1409 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1410 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1411 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1412 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1413 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1414 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1415 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1417 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1419 * mips.igen (do_load_left, do_load_right): Move to be immediately
1421 (do_store_left, do_store_right): Move to be immediately following
1424 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1426 * mips.igen (mipsV): New model name. Also, add it to
1427 all instructions and functions where it is appropriate.
1429 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1431 * mips.igen: For all functions and instructions, list model
1432 names that support that instruction one per line.
1434 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1436 * mips.igen: Add some additional comments about supported
1437 models, and about which instructions go where.
1438 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1439 order as is used in the rest of the file.
1441 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1443 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1444 indicating that ALU32_END or ALU64_END are there to check
1446 (DADD): Likewise, but also remove previous comment about
1449 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1451 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1452 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1453 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1454 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1455 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1456 fields (i.e., add and move commas) so that they more closely
1457 match the MIPS ISA documentation opcode partitioning.
1459 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1461 * mips.igen (ADDI): Print immediate value.
1462 (BREAK): Print code.
1463 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1464 (SLL): Print "nop" specially, and don't run the code
1465 that does the shift for the "nop" case.
1467 2001-11-17 Fred Fish <fnf@redhat.com>
1469 * sim-main.h (float_operation): Move enum declaration outside
1470 of _sim_cpu struct declaration.
1472 2001-04-12 Jim Blandy <jimb@redhat.com>
1474 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1475 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1477 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1478 PENDING_FILL, and you can get the intended effect gracefully by
1479 calling PENDING_SCHED directly.
1481 2001-02-23 Ben Elliston <bje@redhat.com>
1483 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1484 already defined elsewhere.
1486 2001-02-19 Ben Elliston <bje@redhat.com>
1488 * sim-main.h (sim_monitor): Return an int.
1489 * interp.c (sim_monitor): Add return values.
1490 (signal_exception): Handle error conditions from sim_monitor.
1492 2001-02-08 Ben Elliston <bje@redhat.com>
1494 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1495 (store_memory): Likewise, pass cia to sim_core_write*.
1497 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1499 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1500 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1502 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1504 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1505 * Makefile.in: Don't delete *.igen when cleaning directory.
1507 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1509 * m16.igen (break): Call SignalException not sim_engine_halt.
1511 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1513 From Jason Eckhardt:
1514 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1516 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1518 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1520 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1522 * mips.igen (do_dmultx): Fix typo.
1524 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1526 * configure: Regenerated to track ../common/aclocal.m4 changes.
1528 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1530 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1532 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1534 * sim-main.h (GPR_CLEAR): Define macro.
1536 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1538 * interp.c (decode_coproc): Output long using %lx and not %s.
1540 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1542 * interp.c (sim_open): Sort & extend dummy memory regions for
1543 --board=jmr3904 for eCos.
1545 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1547 * configure: Regenerated.
1549 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1551 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1552 calls, conditional on the simulator being in verbose mode.
1554 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1556 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1557 cache don't get ReservedInstruction traps.
1559 1999-11-29 Mark Salter <msalter@cygnus.com>
1561 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1562 to clear status bits in sdisr register. This is how the hardware works.
1564 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1565 being used by cygmon.
1567 1999-11-11 Andrew Haley <aph@cygnus.com>
1569 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1572 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1574 * mips.igen (MULT): Correct previous mis-applied patch.
1576 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1578 * mips.igen (delayslot32): Handle sequence like
1579 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1580 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1581 (MULT): Actually pass the third register...
1583 1999-09-03 Mark Salter <msalter@cygnus.com>
1585 * interp.c (sim_open): Added more memory aliases for additional
1586 hardware being touched by cygmon on jmr3904 board.
1588 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1590 * configure: Regenerated to track ../common/aclocal.m4 changes.
1592 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1594 * interp.c (sim_store_register): Handle case where client - GDB -
1595 specifies that a 4 byte register is 8 bytes in size.
1596 (sim_fetch_register): Ditto.
1598 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1600 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1601 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1602 (idt_monitor_base): Base address for IDT monitor traps.
1603 (pmon_monitor_base): Ditto for PMON.
1604 (lsipmon_monitor_base): Ditto for LSI PMON.
1605 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1606 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1607 (sim_firmware_command): New function.
1608 (mips_option_handler): Call it for OPTION_FIRMWARE.
1609 (sim_open): Allocate memory for idt_monitor region. If "--board"
1610 option was given, add no monitor by default. Add BREAK hooks only if
1611 monitors are also there.
1613 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1615 * interp.c (sim_monitor): Flush output before reading input.
1617 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1619 * tconfig.in (SIM_HANDLES_LMA): Always define.
1621 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1623 From Mark Salter <msalter@cygnus.com>:
1624 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1625 (sim_open): Add setup for BSP board.
1627 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1629 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1630 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1631 them as unimplemented.
1633 1999-05-08 Felix Lee <flee@cygnus.com>
1635 * configure: Regenerated to track ../common/aclocal.m4 changes.
1637 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1639 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1641 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1643 * configure.in: Any mips64vr5*-*-* target should have
1644 -DTARGET_ENABLE_FR=1.
1645 (default_endian): Any mips64vr*el-*-* target should default to
1647 * configure: Re-generate.
1649 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1651 * mips.igen (ldl): Extend from _16_, not 32.
1653 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1655 * interp.c (sim_store_register): Force registers written to by GDB
1656 into an un-interpreted state.
1658 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1660 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1661 CPU, start periodic background I/O polls.
1662 (tx3904sio_poll): New function: periodic I/O poller.
1664 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1666 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1668 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1670 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1673 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1675 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1676 (load_word): Call SIM_CORE_SIGNAL hook on error.
1677 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1678 starting. For exception dispatching, pass PC instead of NULL_CIA.
1679 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1680 * sim-main.h (COP0_BADVADDR): Define.
1681 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1682 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1683 (_sim_cpu): Add exc_* fields to store register value snapshots.
1684 * mips.igen (*): Replace memory-related SignalException* calls
1685 with references to SIM_CORE_SIGNAL hook.
1687 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1689 * sim-main.c (*): Minor warning cleanups.
1691 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1693 * m16.igen (DADDIU5): Correct type-o.
1695 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1697 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1700 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1702 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1704 (interp.o): Add dependency on itable.h
1705 (oengine.c, gencode): Delete remaining references.
1706 (BUILT_SRC_FROM_GEN): Clean up.
1708 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1711 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1712 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1713 tmp-run-hack) : New.
1714 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1715 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1716 Drop the "64" qualifier to get the HACK generator working.
1717 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1718 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1719 qualifier to get the hack generator working.
1720 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1721 (DSLL): Use do_dsll.
1722 (DSLLV): Use do_dsllv.
1723 (DSRA): Use do_dsra.
1724 (DSRL): Use do_dsrl.
1725 (DSRLV): Use do_dsrlv.
1726 (BC1): Move *vr4100 to get the HACK generator working.
1727 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1728 get the HACK generator working.
1729 (MACC) Rename to get the HACK generator working.
1730 (DMACC,MACCS,DMACCS): Add the 64.
1732 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1734 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1735 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1737 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1739 * mips/interp.c (DEBUG): Cleanups.
1741 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1743 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1744 (tx3904sio_tickle): fflush after a stdout character output.
1746 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1748 * interp.c (sim_close): Uninstall modules.
1750 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1752 * sim-main.h, interp.c (sim_monitor): Change to global
1755 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1757 * configure.in (vr4100): Only include vr4100 instructions in
1759 * configure: Re-generate.
1760 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1762 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1764 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1765 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1768 * configure.in (sim_default_gen, sim_use_gen): Replace with
1770 (--enable-sim-igen): Delete config option. Always using IGEN.
1771 * configure: Re-generate.
1773 * Makefile.in (gencode): Kill, kill, kill.
1776 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1778 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1779 bit mips16 igen simulator.
1780 * configure: Re-generate.
1782 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1783 as part of vr4100 ISA.
1784 * vr.igen: Mark all instructions as 64 bit only.
1786 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1788 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1791 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1793 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1794 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1795 * configure: Re-generate.
1797 * m16.igen (BREAK): Define breakpoint instruction.
1798 (JALX32): Mark instruction as mips16 and not r3900.
1799 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1801 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1803 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1805 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1806 insn as a debug breakpoint.
1808 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1810 (PENDING_SCHED): Clean up trace statement.
1811 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1812 (PENDING_FILL): Delay write by only one cycle.
1813 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1815 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1817 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1819 (pending_tick): Move incrementing of index to FOR statement.
1820 (pending_tick): Only update PENDING_OUT after a write has occured.
1822 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1824 * configure: Re-generate.
1826 * interp.c (sim_engine_run OLD): Delete explicit call to
1827 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1829 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1831 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1832 interrupt level number to match changed SignalExceptionInterrupt
1835 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1837 * interp.c: #include "itable.h" if WITH_IGEN.
1838 (get_insn_name): New function.
1839 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1840 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1842 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1844 * configure: Rebuilt to inhale new common/aclocal.m4.
1846 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1848 * dv-tx3904sio.c: Include sim-assert.h.
1850 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1852 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1853 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1854 Reorganize target-specific sim-hardware checks.
1855 * configure: rebuilt.
1856 * interp.c (sim_open): For tx39 target boards, set
1857 OPERATING_ENVIRONMENT, add tx3904sio devices.
1858 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1859 ROM executables. Install dv-sockser into sim-modules list.
1861 * dv-tx3904irc.c: Compiler warning clean-up.
1862 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1863 frequent hw-trace messages.
1865 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1867 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1869 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1871 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1873 * vr.igen: New file.
1874 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1875 * mips.igen: Define vr4100 model. Include vr.igen.
1876 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1878 * mips.igen (check_mf_hilo): Correct check.
1880 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1882 * sim-main.h (interrupt_event): Add prototype.
1884 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1885 register_ptr, register_value.
1886 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1888 * sim-main.h (tracefh): Make extern.
1890 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1892 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1893 Reduce unnecessarily high timer event frequency.
1894 * dv-tx3904cpu.c: Ditto for interrupt event.
1896 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1898 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1900 (interrupt_event): Made non-static.
1902 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1903 interchange of configuration values for external vs. internal
1906 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1908 * mips.igen (BREAK): Moved code to here for
1909 simulator-reserved break instructions.
1910 * gencode.c (build_instruction): Ditto.
1911 * interp.c (signal_exception): Code moved from here. Non-
1912 reserved instructions now use exception vector, rather
1914 * sim-main.h: Moved magic constants to here.
1916 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1918 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1919 register upon non-zero interrupt event level, clear upon zero
1921 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1922 by passing zero event value.
1923 (*_io_{read,write}_buffer): Endianness fixes.
1924 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1925 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1927 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1928 serial I/O and timer module at base address 0xFFFF0000.
1930 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1932 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1935 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1937 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1939 * configure: Update.
1941 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1943 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1944 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1945 * configure.in: Include tx3904tmr in hw_device list.
1946 * configure: Rebuilt.
1947 * interp.c (sim_open): Instantiate three timer instances.
1948 Fix address typo of tx3904irc instance.
1950 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1952 * interp.c (signal_exception): SystemCall exception now uses
1953 the exception vector.
1955 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1957 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1960 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1962 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1964 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1966 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1968 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1969 sim-main.h. Declare a struct hw_descriptor instead of struct
1970 hw_device_descriptor.
1972 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1974 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1975 right bits and then re-align left hand bytes to correct byte
1976 lanes. Fix incorrect computation in do_store_left when loading
1977 bytes from second word.
1979 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1981 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1982 * interp.c (sim_open): Only create a device tree when HW is
1985 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1986 * interp.c (signal_exception): Ditto.
1988 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1990 * gencode.c: Mark BEGEZALL as LIKELY.
1992 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1994 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1995 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1997 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1999 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2000 modules. Recognize TX39 target with "mips*tx39" pattern.
2001 * configure: Rebuilt.
2002 * sim-main.h (*): Added many macros defining bits in
2003 TX39 control registers.
2004 (SignalInterrupt): Send actual PC instead of NULL.
2005 (SignalNMIReset): New exception type.
2006 * interp.c (board): New variable for future use to identify
2007 a particular board being simulated.
2008 (mips_option_handler,mips_options): Added "--board" option.
2009 (interrupt_event): Send actual PC.
2010 (sim_open): Make memory layout conditional on board setting.
2011 (signal_exception): Initial implementation of hardware interrupt
2012 handling. Accept another break instruction variant for simulator
2014 (decode_coproc): Implement RFE instruction for TX39.
2015 (mips.igen): Decode RFE instruction as such.
2016 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2017 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2018 bbegin to implement memory map.
2019 * dv-tx3904cpu.c: New file.
2020 * dv-tx3904irc.c: New file.
2022 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2024 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2026 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2028 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2029 with calls to check_div_hilo.
2031 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2033 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2034 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2035 Add special r3900 version of do_mult_hilo.
2036 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2037 with calls to check_mult_hilo.
2038 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2039 with calls to check_div_hilo.
2041 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2043 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2044 Document a replacement.
2046 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2048 * interp.c (sim_monitor): Make mon_printf work.
2050 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2052 * sim-main.h (INSN_NAME): New arg `cpu'.
2054 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2056 * configure: Regenerated to track ../common/aclocal.m4 changes.
2058 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2060 * configure: Regenerated to track ../common/aclocal.m4 changes.
2063 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2065 * acconfig.h: New file.
2066 * configure.in: Reverted change of Apr 24; use sinclude again.
2068 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2070 * configure: Regenerated to track ../common/aclocal.m4 changes.
2073 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2075 * configure.in: Don't call sinclude.
2077 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2079 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2081 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2083 * mips.igen (ERET): Implement.
2085 * interp.c (decode_coproc): Return sign-extended EPC.
2087 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2089 * interp.c (signal_exception): Do not ignore Trap.
2090 (signal_exception): On TRAP, restart at exception address.
2091 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2092 (signal_exception): Update.
2093 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2094 so that TRAP instructions are caught.
2096 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2098 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2099 contains HI/LO access history.
2100 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2101 (HIACCESS, LOACCESS): Delete, replace with
2102 (HIHISTORY, LOHISTORY): New macros.
2103 (CHECKHILO): Delete all, moved to mips.igen
2105 * gencode.c (build_instruction): Do not generate checks for
2106 correct HI/LO register usage.
2108 * interp.c (old_engine_run): Delete checks for correct HI/LO
2111 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2112 check_mf_cycles): New functions.
2113 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2114 do_divu, domultx, do_mult, do_multu): Use.
2116 * tx.igen ("madd", "maddu"): Use.
2118 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2120 * mips.igen (DSRAV): Use function do_dsrav.
2121 (SRAV): Use new function do_srav.
2123 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2124 (B): Sign extend 11 bit immediate.
2125 (EXT-B*): Shift 16 bit immediate left by 1.
2126 (ADDIU*): Don't sign extend immediate value.
2128 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2130 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2132 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2135 * mips.igen (delayslot32, nullify_next_insn): New functions.
2136 (m16.igen): Always include.
2137 (do_*): Add more tracing.
2139 * m16.igen (delayslot16): Add NIA argument, could be called by a
2140 32 bit MIPS16 instruction.
2142 * interp.c (ifetch16): Move function from here.
2143 * sim-main.c (ifetch16): To here.
2145 * sim-main.c (ifetch16, ifetch32): Update to match current
2146 implementations of LH, LW.
2147 (signal_exception): Don't print out incorrect hex value of illegal
2150 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2152 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2155 * m16.igen: Implement MIPS16 instructions.
2157 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2158 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2159 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2160 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2161 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2162 bodies of corresponding code from 32 bit insn to these. Also used
2163 by MIPS16 versions of functions.
2165 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2166 (IMEM16): Drop NR argument from macro.
2168 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2170 * Makefile.in (SIM_OBJS): Add sim-main.o.
2172 * sim-main.h (address_translation, load_memory, store_memory,
2173 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2175 (pr_addr, pr_uword64): Declare.
2176 (sim-main.c): Include when H_REVEALS_MODULE_P.
2178 * interp.c (address_translation, load_memory, store_memory,
2179 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2181 * sim-main.c: To here. Fix compilation problems.
2183 * configure.in: Enable inlining.
2184 * configure: Re-config.
2186 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2188 * configure: Regenerated to track ../common/aclocal.m4 changes.
2190 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2192 * mips.igen: Include tx.igen.
2193 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2194 * tx.igen: New file, contains MADD and MADDU.
2196 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2197 the hardwired constant `7'.
2198 (store_memory): Ditto.
2199 (LOADDRMASK): Move definition to sim-main.h.
2201 mips.igen (MTC0): Enable for r3900.
2204 mips.igen (do_load_byte): Delete.
2205 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2206 do_store_right): New functions.
2207 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2209 configure.in: Let the tx39 use igen again.
2212 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2214 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2215 not an address sized quantity. Return zero for cache sizes.
2217 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2219 * mips.igen (r3900): r3900 does not support 64 bit integer
2222 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2224 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2226 * configure : Rebuild.
2228 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2230 * configure: Regenerated to track ../common/aclocal.m4 changes.
2232 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2234 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2236 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2238 * configure: Regenerated to track ../common/aclocal.m4 changes.
2239 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2241 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2243 * configure: Regenerated to track ../common/aclocal.m4 changes.
2245 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2247 * interp.c (Max, Min): Comment out functions. Not yet used.
2249 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2251 * configure: Regenerated to track ../common/aclocal.m4 changes.
2253 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2255 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2256 configurable settings for stand-alone simulator.
2258 * configure.in: Added X11 search, just in case.
2260 * configure: Regenerated.
2262 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2264 * interp.c (sim_write, sim_read, load_memory, store_memory):
2265 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2267 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2269 * sim-main.h (GETFCC): Return an unsigned value.
2271 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2273 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2274 (DADD): Result destination is RD not RT.
2276 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2278 * sim-main.h (HIACCESS, LOACCESS): Always define.
2280 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2282 * interp.c (sim_info): Delete.
2284 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2286 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2287 (mips_option_handler): New argument `cpu'.
2288 (sim_open): Update call to sim_add_option_table.
2290 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2292 * mips.igen (CxC1): Add tracing.
2294 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2296 * sim-main.h (Max, Min): Declare.
2298 * interp.c (Max, Min): New functions.
2300 * mips.igen (BC1): Add tracing.
2302 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2304 * interp.c Added memory map for stack in vr4100
2306 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2308 * interp.c (load_memory): Add missing "break"'s.
2310 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2312 * interp.c (sim_store_register, sim_fetch_register): Pass in
2313 length parameter. Return -1.
2315 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2317 * interp.c: Added hardware init hook, fixed warnings.
2319 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2321 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2323 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2325 * interp.c (ifetch16): New function.
2327 * sim-main.h (IMEM32): Rename IMEM.
2328 (IMEM16_IMMED): Define.
2330 (DELAY_SLOT): Update.
2332 * m16run.c (sim_engine_run): New file.
2334 * m16.igen: All instructions except LB.
2335 (LB): Call do_load_byte.
2336 * mips.igen (do_load_byte): New function.
2337 (LB): Call do_load_byte.
2339 * mips.igen: Move spec for insn bit size and high bit from here.
2340 * Makefile.in (tmp-igen, tmp-m16): To here.
2342 * m16.dc: New file, decode mips16 instructions.
2344 * Makefile.in (SIM_NO_ALL): Define.
2345 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2347 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2349 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2350 point unit to 32 bit registers.
2351 * configure: Re-generate.
2353 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2355 * configure.in (sim_use_gen): Make IGEN the default simulator
2356 generator for generic 32 and 64 bit mips targets.
2357 * configure: Re-generate.
2359 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2361 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2364 * interp.c (sim_fetch_register, sim_store_register): Read/write
2365 FGR from correct location.
2366 (sim_open): Set size of FGR's according to
2367 WITH_TARGET_FLOATING_POINT_BITSIZE.
2369 * sim-main.h (FGR): Store floating point registers in a separate
2372 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2374 * configure: Regenerated to track ../common/aclocal.m4 changes.
2376 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2378 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2380 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2382 * interp.c (pending_tick): New function. Deliver pending writes.
2384 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2385 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2386 it can handle mixed sized quantites and single bits.
2388 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2390 * interp.c (oengine.h): Do not include when building with IGEN.
2391 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2392 (sim_info): Ditto for PROCESSOR_64BIT.
2393 (sim_monitor): Replace ut_reg with unsigned_word.
2394 (*): Ditto for t_reg.
2395 (LOADDRMASK): Define.
2396 (sim_open): Remove defunct check that host FP is IEEE compliant,
2397 using software to emulate floating point.
2398 (value_fpr, ...): Always compile, was conditional on HASFPU.
2400 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2402 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2405 * interp.c (SD, CPU): Define.
2406 (mips_option_handler): Set flags in each CPU.
2407 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2408 (sim_close): Do not clear STATE, deleted anyway.
2409 (sim_write, sim_read): Assume CPU zero's vm should be used for
2411 (sim_create_inferior): Set the PC for all processors.
2412 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2414 (mips16_entry): Pass correct nr of args to store_word, load_word.
2415 (ColdReset): Cold reset all cpu's.
2416 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2417 (sim_monitor, load_memory, store_memory, signal_exception): Use
2418 `CPU' instead of STATE_CPU.
2421 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2424 * sim-main.h (signal_exception): Add sim_cpu arg.
2425 (SignalException*): Pass both SD and CPU to signal_exception.
2426 * interp.c (signal_exception): Update.
2428 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2430 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2431 address_translation): Ditto
2432 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2434 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2436 * configure: Regenerated to track ../common/aclocal.m4 changes.
2438 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2440 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2442 * mips.igen (model): Map processor names onto BFD name.
2444 * sim-main.h (CPU_CIA): Delete.
2445 (SET_CIA, GET_CIA): Define
2447 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2449 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2452 * configure.in (default_endian): Configure a big-endian simulator
2454 * configure: Re-generate.
2456 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2458 * configure: Regenerated to track ../common/aclocal.m4 changes.
2460 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2462 * interp.c (sim_monitor): Handle Densan monitor outbyte
2463 and inbyte functions.
2465 1997-12-29 Felix Lee <flee@cygnus.com>
2467 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2469 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2471 * Makefile.in (tmp-igen): Arrange for $zero to always be
2472 reset to zero after every instruction.
2474 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2476 * configure: Regenerated to track ../common/aclocal.m4 changes.
2479 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2481 * mips.igen (MSUB): Fix to work like MADD.
2482 * gencode.c (MSUB): Similarly.
2484 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2486 * configure: Regenerated to track ../common/aclocal.m4 changes.
2488 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2490 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2492 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2494 * sim-main.h (sim-fpu.h): Include.
2496 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2497 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2498 using host independant sim_fpu module.
2500 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2502 * interp.c (signal_exception): Report internal errors with SIGABRT
2505 * sim-main.h (C0_CONFIG): New register.
2506 (signal.h): No longer include.
2508 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2510 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2512 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2514 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2516 * mips.igen: Tag vr5000 instructions.
2517 (ANDI): Was missing mipsIV model, fix assembler syntax.
2518 (do_c_cond_fmt): New function.
2519 (C.cond.fmt): Handle mips I-III which do not support CC field
2521 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2522 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2524 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2525 vr5000 which saves LO in a GPR separatly.
2527 * configure.in (enable-sim-igen): For vr5000, select vr5000
2528 specific instructions.
2529 * configure: Re-generate.
2531 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2533 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2535 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2536 fmt_uninterpreted_64 bit cases to switch. Convert to
2539 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2541 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2542 as specified in IV3.2 spec.
2543 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2545 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2547 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2548 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2549 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2550 PENDING_FILL versions of instructions. Simplify.
2552 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2554 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2556 (MTHI, MFHI): Disable code checking HI-LO.
2558 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2560 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2562 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2564 * gencode.c (build_mips16_operands): Replace IPC with cia.
2566 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2567 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2569 (UndefinedResult): Replace function with macro/function
2571 (sim_engine_run): Don't save PC in IPC.
2573 * sim-main.h (IPC): Delete.
2576 * interp.c (signal_exception, store_word, load_word,
2577 address_translation, load_memory, store_memory, cache_op,
2578 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2579 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2580 current instruction address - cia - argument.
2581 (sim_read, sim_write): Call address_translation directly.
2582 (sim_engine_run): Rename variable vaddr to cia.
2583 (signal_exception): Pass cia to sim_monitor
2585 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2586 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2587 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2589 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2590 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2593 * interp.c (signal_exception): Pass restart address to
2596 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2597 idecode.o): Add dependency.
2599 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2601 (DELAY_SLOT): Update NIA not PC with branch address.
2602 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2604 * mips.igen: Use CIA not PC in branch calculations.
2605 (illegal): Call SignalException.
2606 (BEQ, ADDIU): Fix assembler.
2608 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2610 * m16.igen (JALX): Was missing.
2612 * configure.in (enable-sim-igen): New configuration option.
2613 * configure: Re-generate.
2615 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2617 * interp.c (load_memory, store_memory): Delete parameter RAW.
2618 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2619 bypassing {load,store}_memory.
2621 * sim-main.h (ByteSwapMem): Delete definition.
2623 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2625 * interp.c (sim_do_command, sim_commands): Delete mips specific
2626 commands. Handled by module sim-options.
2628 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2629 (WITH_MODULO_MEMORY): Define.
2631 * interp.c (sim_info): Delete code printing memory size.
2633 * interp.c (mips_size): Nee sim_size, delete function.
2635 (monitor, monitor_base, monitor_size): Delete global variables.
2636 (sim_open, sim_close): Delete code creating monitor and other
2637 memory regions. Use sim-memopts module, via sim_do_commandf, to
2638 manage memory regions.
2639 (load_memory, store_memory): Use sim-core for memory model.
2641 * interp.c (address_translation): Delete all memory map code
2642 except line forcing 32 bit addresses.
2644 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2646 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2649 * interp.c (logfh, logfile): Delete globals.
2650 (sim_open, sim_close): Delete code opening & closing log file.
2651 (mips_option_handler): Delete -l and -n options.
2652 (OPTION mips_options): Ditto.
2654 * interp.c (OPTION mips_options): Rename option trace to dinero.
2655 (mips_option_handler): Update.
2657 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2659 * interp.c (fetch_str): New function.
2660 (sim_monitor): Rewrite using sim_read & sim_write.
2661 (sim_open): Check magic number.
2662 (sim_open): Write monitor vectors into memory using sim_write.
2663 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2664 (sim_read, sim_write): Simplify - transfer data one byte at a
2666 (load_memory, store_memory): Clarify meaning of parameter RAW.
2668 * sim-main.h (isHOST): Defete definition.
2669 (isTARGET): Mark as depreciated.
2670 (address_translation): Delete parameter HOST.
2672 * interp.c (address_translation): Delete parameter HOST.
2674 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2678 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2679 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2681 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2683 * mips.igen: Add model filter field to records.
2685 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2687 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2689 interp.c (sim_engine_run): Do not compile function sim_engine_run
2690 when WITH_IGEN == 1.
2692 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2693 target architecture.
2695 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2696 igen. Replace with configuration variables sim_igen_flags /
2699 * m16.igen: New file. Copy mips16 insns here.
2700 * mips.igen: From here.
2702 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2704 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2706 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2708 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2710 * gencode.c (build_instruction): Follow sim_write's lead in using
2711 BigEndianMem instead of !ByteSwapMem.
2713 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2715 * configure.in (sim_gen): Dependent on target, select type of
2716 generator. Always select old style generator.
2718 configure: Re-generate.
2720 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2722 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2723 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2724 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2725 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2726 SIM_@sim_gen@_*, set by autoconf.
2728 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2732 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2733 CURRENT_FLOATING_POINT instead.
2735 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2736 (address_translation): Raise exception InstructionFetch when
2737 translation fails and isINSTRUCTION.
2739 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2740 sim_engine_run): Change type of of vaddr and paddr to
2742 (address_translation, prefetch, load_memory, store_memory,
2743 cache_op): Change type of vAddr and pAddr to address_word.
2745 * gencode.c (build_instruction): Change type of vaddr and paddr to
2748 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2750 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2751 macro to obtain result of ALU op.
2753 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2755 * interp.c (sim_info): Call profile_print.
2757 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2759 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2761 * sim-main.h (WITH_PROFILE): Do not define, defined in
2762 common/sim-config.h. Use sim-profile module.
2763 (simPROFILE): Delete defintion.
2765 * interp.c (PROFILE): Delete definition.
2766 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2767 (sim_close): Delete code writing profile histogram.
2768 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2770 (sim_engine_run): Delete code profiling the PC.
2772 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2774 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2776 * interp.c (sim_monitor): Make register pointers of type
2779 * sim-main.h: Make registers of type unsigned_word not
2782 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2784 * interp.c (sync_operation): Rename from SyncOperation, make
2785 global, add SD argument.
2786 (prefetch): Rename from Prefetch, make global, add SD argument.
2787 (decode_coproc): Make global.
2789 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2791 * gencode.c (build_instruction): Generate DecodeCoproc not
2792 decode_coproc calls.
2794 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2795 (SizeFGR): Move to sim-main.h
2796 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2797 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2798 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2800 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2801 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2802 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2803 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2804 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2805 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2807 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2809 (sim-alu.h): Include.
2810 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2811 (sim_cia): Typedef to instruction_address.
2813 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2815 * Makefile.in (interp.o): Rename generated file engine.c to
2820 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2822 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2824 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2826 * gencode.c (build_instruction): For "FPSQRT", output correct
2827 number of arguments to Recip.
2829 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2831 * Makefile.in (interp.o): Depends on sim-main.h
2833 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2835 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2836 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2837 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2838 STATE, DSSTATE): Define
2839 (GPR, FGRIDX, ..): Define.
2841 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2842 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2843 (GPR, FGRIDX, ...): Delete macros.
2845 * interp.c: Update names to match defines from sim-main.h
2847 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2849 * interp.c (sim_monitor): Add SD argument.
2850 (sim_warning): Delete. Replace calls with calls to
2852 (sim_error): Delete. Replace calls with sim_io_error.
2853 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2854 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2855 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2857 (mips_size): Rename from sim_size. Add SD argument.
2859 * interp.c (simulator): Delete global variable.
2860 (callback): Delete global variable.
2861 (mips_option_handler, sim_open, sim_write, sim_read,
2862 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2863 sim_size,sim_monitor): Use sim_io_* not callback->*.
2864 (sim_open): ZALLOC simulator struct.
2865 (PROFILE): Do not define.
2867 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2869 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2870 support.h with corresponding code.
2872 * sim-main.h (word64, uword64), support.h: Move definition to
2874 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2877 * Makefile.in: Update dependencies
2878 * interp.c: Do not include.
2880 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2882 * interp.c (address_translation, load_memory, store_memory,
2883 cache_op): Rename to from AddressTranslation et.al., make global,
2886 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2889 * interp.c (SignalException): Rename to signal_exception, make
2892 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2894 * sim-main.h (SignalException, SignalExceptionInterrupt,
2895 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2896 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2897 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2900 * interp.c, support.h: Use.
2902 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2904 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2905 to value_fpr / store_fpr. Add SD argument.
2906 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2907 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2909 * sim-main.h (ValueFPR, StoreFPR): Define.
2911 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2913 * interp.c (sim_engine_run): Check consistency between configure
2914 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2917 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2918 (mips_fpu): Configure WITH_FLOATING_POINT.
2919 (mips_endian): Configure WITH_TARGET_ENDIAN.
2920 * configure: Update.
2922 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2924 * configure: Regenerated to track ../common/aclocal.m4 changes.
2926 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2928 * configure: Regenerated.
2930 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2932 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2934 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2936 * gencode.c (print_igen_insn_models): Assume certain architectures
2937 include all mips* instructions.
2938 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2941 * Makefile.in (tmp.igen): Add target. Generate igen input from
2944 * gencode.c (FEATURE_IGEN): Define.
2945 (main): Add --igen option. Generate output in igen format.
2946 (process_instructions): Format output according to igen option.
2947 (print_igen_insn_format): New function.
2948 (print_igen_insn_models): New function.
2949 (process_instructions): Only issue warnings and ignore
2950 instructions when no FEATURE_IGEN.
2952 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2954 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2957 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2959 * configure: Regenerated to track ../common/aclocal.m4 changes.
2961 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2963 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2964 SIM_RESERVED_BITS): Delete, moved to common.
2965 (SIM_EXTRA_CFLAGS): Update.
2967 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2969 * configure.in: Configure non-strict memory alignment.
2970 * configure: Regenerated to track ../common/aclocal.m4 changes.
2972 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2974 * configure: Regenerated to track ../common/aclocal.m4 changes.
2976 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2978 * gencode.c (SDBBP,DERET): Added (3900) insns.
2979 (RFE): Turn on for 3900.
2980 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2981 (dsstate): Made global.
2982 (SUBTARGET_R3900): Added.
2983 (CANCELDELAYSLOT): New.
2984 (SignalException): Ignore SystemCall rather than ignore and
2985 terminate. Add DebugBreakPoint handling.
2986 (decode_coproc): New insns RFE, DERET; and new registers Debug
2987 and DEPC protected by SUBTARGET_R3900.
2988 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2990 * Makefile.in,configure.in: Add mips subtarget option.
2991 * configure: Update.
2993 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2995 * gencode.c: Add r3900 (tx39).
2998 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3000 * gencode.c (build_instruction): Don't need to subtract 4 for
3003 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3005 * interp.c: Correct some HASFPU problems.
3007 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3009 * configure: Regenerated to track ../common/aclocal.m4 changes.
3011 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3013 * interp.c (mips_options): Fix samples option short form, should
3016 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3018 * interp.c (sim_info): Enable info code. Was just returning.
3020 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3022 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3025 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3027 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3029 (build_instruction): Ditto for LL.
3031 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3033 * configure: Regenerated to track ../common/aclocal.m4 changes.
3035 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3037 * configure: Regenerated to track ../common/aclocal.m4 changes.
3040 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3042 * interp.c (sim_open): Add call to sim_analyze_program, update
3045 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3047 * interp.c (sim_kill): Delete.
3048 (sim_create_inferior): Add ABFD argument. Set PC from same.
3049 (sim_load): Move code initializing trap handlers from here.
3050 (sim_open): To here.
3051 (sim_load): Delete, use sim-hload.c.
3053 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3055 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3057 * configure: Regenerated to track ../common/aclocal.m4 changes.
3060 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3062 * interp.c (sim_open): Add ABFD argument.
3063 (sim_load): Move call to sim_config from here.
3064 (sim_open): To here. Check return status.
3066 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3068 * gencode.c (build_instruction): Two arg MADD should
3069 not assign result to $0.
3071 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3073 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3074 * sim/mips/configure.in: Regenerate.
3076 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3078 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3079 signed8, unsigned8 et.al. types.
3081 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3082 hosts when selecting subreg.
3084 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3086 * interp.c (sim_engine_run): Reset the ZERO register to zero
3087 regardless of FEATURE_WARN_ZERO.
3088 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3090 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3092 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3093 (SignalException): For BreakPoints ignore any mode bits and just
3095 (SignalException): Always set the CAUSE register.
3097 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3099 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3100 exception has been taken.
3102 * interp.c: Implement the ERET and mt/f sr instructions.
3104 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3106 * interp.c (SignalException): Don't bother restarting an
3109 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3111 * interp.c (SignalException): Really take an interrupt.
3112 (interrupt_event): Only deliver interrupts when enabled.
3114 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3116 * interp.c (sim_info): Only print info when verbose.
3117 (sim_info) Use sim_io_printf for output.
3119 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3121 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3124 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3126 * interp.c (sim_do_command): Check for common commands if a
3127 simulator specific command fails.
3129 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3131 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3132 and simBE when DEBUG is defined.
3134 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3136 * interp.c (interrupt_event): New function. Pass exception event
3137 onto exception handler.
3139 * configure.in: Check for stdlib.h.
3140 * configure: Regenerate.
3142 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3143 variable declaration.
3144 (build_instruction): Initialize memval1.
3145 (build_instruction): Add UNUSED attribute to byte, bigend,
3147 (build_operands): Ditto.
3149 * interp.c: Fix GCC warnings.
3150 (sim_get_quit_code): Delete.
3152 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3153 * Makefile.in: Ditto.
3154 * configure: Re-generate.
3156 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3158 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3160 * interp.c (mips_option_handler): New function parse argumes using
3162 (myname): Replace with STATE_MY_NAME.
3163 (sim_open): Delete check for host endianness - performed by
3165 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3166 (sim_open): Move much of the initialization from here.
3167 (sim_load): To here. After the image has been loaded and
3169 (sim_open): Move ColdReset from here.
3170 (sim_create_inferior): To here.
3171 (sim_open): Make FP check less dependant on host endianness.
3173 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3175 * interp.c (sim_set_callbacks): Delete.
3177 * interp.c (membank, membank_base, membank_size): Replace with
3178 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3179 (sim_open): Remove call to callback->init. gdb/run do this.
3183 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3185 * interp.c (big_endian_p): Delete, replaced by
3186 current_target_byte_order.
3188 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3190 * interp.c (host_read_long, host_read_word, host_swap_word,
3191 host_swap_long): Delete. Using common sim-endian.
3192 (sim_fetch_register, sim_store_register): Use H2T.
3193 (pipeline_ticks): Delete. Handled by sim-events.
3195 (sim_engine_run): Update.
3197 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3199 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3201 (SignalException): To here. Signal using sim_engine_halt.
3202 (sim_stop_reason): Delete, moved to common.
3204 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3206 * interp.c (sim_open): Add callback argument.
3207 (sim_set_callbacks): Delete SIM_DESC argument.
3210 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3212 * Makefile.in (SIM_OBJS): Add common modules.
3214 * interp.c (sim_set_callbacks): Also set SD callback.
3215 (set_endianness, xfer_*, swap_*): Delete.
3216 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3217 Change to functions using sim-endian macros.
3218 (control_c, sim_stop): Delete, use common version.
3219 (simulate): Convert into.
3220 (sim_engine_run): This function.
3221 (sim_resume): Delete.
3223 * interp.c (simulation): New variable - the simulator object.
3224 (sim_kind): Delete global - merged into simulation.
3225 (sim_load): Cleanup. Move PC assignment from here.
3226 (sim_create_inferior): To here.
3228 * sim-main.h: New file.
3229 * interp.c (sim-main.h): Include.
3231 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3233 * configure: Regenerated to track ../common/aclocal.m4 changes.
3235 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3237 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3239 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3241 * gencode.c (build_instruction): DIV instructions: check
3242 for division by zero and integer overflow before using
3243 host's division operation.
3245 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3247 * Makefile.in (SIM_OBJS): Add sim-load.o.
3248 * interp.c: #include bfd.h.
3249 (target_byte_order): Delete.
3250 (sim_kind, myname, big_endian_p): New static locals.
3251 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3252 after argument parsing. Recognize -E arg, set endianness accordingly.
3253 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3254 load file into simulator. Set PC from bfd.
3255 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3256 (set_endianness): Use big_endian_p instead of target_byte_order.
3258 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3260 * interp.c (sim_size): Delete prototype - conflicts with
3261 definition in remote-sim.h. Correct definition.
3263 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3265 * configure: Regenerated to track ../common/aclocal.m4 changes.
3268 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3270 * interp.c (sim_open): New arg `kind'.
3272 * configure: Regenerated to track ../common/aclocal.m4 changes.
3274 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3276 * configure: Regenerated to track ../common/aclocal.m4 changes.
3278 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3280 * interp.c (sim_open): Set optind to 0 before calling getopt.
3282 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3284 * configure: Regenerated to track ../common/aclocal.m4 changes.
3286 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3288 * interp.c : Replace uses of pr_addr with pr_uword64
3289 where the bit length is always 64 independent of SIM_ADDR.
3290 (pr_uword64) : added.
3292 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3294 * configure: Re-generate.
3296 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3298 * configure: Regenerate to track ../common/aclocal.m4 changes.
3300 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3302 * interp.c (sim_open): New SIM_DESC result. Argument is now
3304 (other sim_*): New SIM_DESC argument.
3306 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3308 * interp.c: Fix printing of addresses for non-64-bit targets.
3309 (pr_addr): Add function to print address based on size.
3311 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3313 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3315 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3317 * gencode.c (build_mips16_operands): Correct computation of base
3318 address for extended PC relative instruction.
3320 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3322 * interp.c (mips16_entry): Add support for floating point cases.
3323 (SignalException): Pass floating point cases to mips16_entry.
3324 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3326 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3328 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3329 and then set the state to fmt_uninterpreted.
3330 (COP_SW): Temporarily set the state to fmt_word while calling
3333 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3335 * gencode.c (build_instruction): The high order may be set in the
3336 comparison flags at any ISA level, not just ISA 4.
3338 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3340 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3341 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3342 * configure.in: sinclude ../common/aclocal.m4.
3343 * configure: Regenerated.
3345 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3347 * configure: Rebuild after change to aclocal.m4.
3349 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3351 * configure configure.in Makefile.in: Update to new configure
3352 scheme which is more compatible with WinGDB builds.
3353 * configure.in: Improve comment on how to run autoconf.
3354 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3355 * Makefile.in: Use autoconf substitution to install common
3358 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3360 * gencode.c (build_instruction): Use BigEndianCPU instead of
3363 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3365 * interp.c (sim_monitor): Make output to stdout visible in
3366 wingdb's I/O log window.
3368 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3370 * support.h: Undo previous change to SIGTRAP
3373 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3375 * interp.c (store_word, load_word): New static functions.
3376 (mips16_entry): New static function.
3377 (SignalException): Look for mips16 entry and exit instructions.
3378 (simulate): Use the correct index when setting fpr_state after
3379 doing a pending move.
3381 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3383 * interp.c: Fix byte-swapping code throughout to work on
3384 both little- and big-endian hosts.
3386 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3388 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3389 with gdb/config/i386/xm-windows.h.
3391 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3393 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3394 that messes up arithmetic shifts.
3396 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3398 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3399 SIGTRAP and SIGQUIT for _WIN32.
3401 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3403 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3404 force a 64 bit multiplication.
3405 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3406 destination register is 0, since that is the default mips16 nop
3409 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3411 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3412 (build_endian_shift): Don't check proc64.
3413 (build_instruction): Always set memval to uword64. Cast op2 to
3414 uword64 when shifting it left in memory instructions. Always use
3415 the same code for stores--don't special case proc64.
3417 * gencode.c (build_mips16_operands): Fix base PC value for PC
3419 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3421 * interp.c (simJALDELAYSLOT): Define.
3422 (JALDELAYSLOT): Define.
3423 (INDELAYSLOT, INJALDELAYSLOT): Define.
3424 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3426 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3428 * interp.c (sim_open): add flush_cache as a PMON routine
3429 (sim_monitor): handle flush_cache by ignoring it
3431 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3433 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3435 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3436 (BigEndianMem): Rename to ByteSwapMem and change sense.
3437 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3438 BigEndianMem references to !ByteSwapMem.
3439 (set_endianness): New function, with prototype.
3440 (sim_open): Call set_endianness.
3441 (sim_info): Use simBE instead of BigEndianMem.
3442 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3443 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3444 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3445 ifdefs, keeping the prototype declaration.
3446 (swap_word): Rewrite correctly.
3447 (ColdReset): Delete references to CONFIG. Delete endianness related
3448 code; moved to set_endianness.
3450 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3452 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3453 * interp.c (CHECKHILO): Define away.
3454 (simSIGINT): New macro.
3455 (membank_size): Increase from 1MB to 2MB.
3456 (control_c): New function.
3457 (sim_resume): Rename parameter signal to signal_number. Add local
3458 variable prev. Call signal before and after simulate.
3459 (sim_stop_reason): Add simSIGINT support.
3460 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3462 (sim_warning): Delete call to SignalException. Do call printf_filtered
3464 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3465 a call to sim_warning.
3467 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3469 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3470 16 bit instructions.
3472 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3474 Add support for mips16 (16 bit MIPS implementation):
3475 * gencode.c (inst_type): Add mips16 instruction encoding types.
3476 (GETDATASIZEINSN): Define.
3477 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3478 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3480 (MIPS16_DECODE): New table, for mips16 instructions.
3481 (bitmap_val): New static function.
3482 (struct mips16_op): Define.
3483 (mips16_op_table): New table, for mips16 operands.
3484 (build_mips16_operands): New static function.
3485 (process_instructions): If PC is odd, decode a mips16
3486 instruction. Break out instruction handling into new
3487 build_instruction function.
3488 (build_instruction): New static function, broken out of
3489 process_instructions. Check modifiers rather than flags for SHIFT
3490 bit count and m[ft]{hi,lo} direction.
3491 (usage): Pass program name to fprintf.
3492 (main): Remove unused variable this_option_optind. Change
3493 ``*loptarg++'' to ``loptarg++''.
3494 (my_strtoul): Parenthesize && within ||.
3495 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3496 (simulate): If PC is odd, fetch a 16 bit instruction, and
3497 increment PC by 2 rather than 4.
3498 * configure.in: Add case for mips16*-*-*.
3499 * configure: Rebuild.
3501 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3503 * interp.c: Allow -t to enable tracing in standalone simulator.
3504 Fix garbage output in trace file and error messages.
3506 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3508 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3509 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3510 * configure.in: Simplify using macros in ../common/aclocal.m4.
3511 * configure: Regenerated.
3512 * tconfig.in: New file.
3514 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3516 * interp.c: Fix bugs in 64-bit port.
3517 Use ansi function declarations for msvc compiler.
3518 Initialize and test file pointer in trace code.
3519 Prevent duplicate definition of LAST_EMED_REGNUM.
3521 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3523 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3525 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3527 * interp.c (SignalException): Check for explicit terminating
3529 * gencode.c: Pass instruction value through SignalException()
3530 calls for Trap, Breakpoint and Syscall.
3532 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3534 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3535 only used on those hosts that provide it.
3536 * configure.in: Add sqrt() to list of functions to be checked for.
3537 * config.in: Re-generated.
3538 * configure: Re-generated.
3540 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3542 * gencode.c (process_instructions): Call build_endian_shift when
3543 expanding STORE RIGHT, to fix swr.
3544 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3545 clear the high bits.
3546 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3547 Fix float to int conversions to produce signed values.
3549 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3551 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3552 (process_instructions): Correct handling of nor instruction.
3553 Correct shift count for 32 bit shift instructions. Correct sign
3554 extension for arithmetic shifts to not shift the number of bits in
3555 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3556 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3558 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3559 It's OK to have a mult follow a mult. What's not OK is to have a
3560 mult follow an mfhi.
3561 (Convert): Comment out incorrect rounding code.
3563 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3565 * interp.c (sim_monitor): Improved monitor printf
3566 simulation. Tidied up simulator warnings, and added "--log" option
3567 for directing warning message output.
3568 * gencode.c: Use sim_warning() rather than WARNING macro.
3570 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3572 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3573 getopt1.o, rather than on gencode.c. Link objects together.
3574 Don't link against -liberty.
3575 (gencode.o, getopt.o, getopt1.o): New targets.
3576 * gencode.c: Include <ctype.h> and "ansidecl.h".
3577 (AND): Undefine after including "ansidecl.h".
3578 (ULONG_MAX): Define if not defined.
3579 (OP_*): Don't define macros; now defined in opcode/mips.h.
3580 (main): Call my_strtoul rather than strtoul.
3581 (my_strtoul): New static function.
3583 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3585 * gencode.c (process_instructions): Generate word64 and uword64
3586 instead of `long long' and `unsigned long long' data types.
3587 * interp.c: #include sysdep.h to get signals, and define default
3589 * (Convert): Work around for Visual-C++ compiler bug with type
3591 * support.h: Make things compile under Visual-C++ by using
3592 __int64 instead of `long long'. Change many refs to long long
3593 into word64/uword64 typedefs.
3595 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3597 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3598 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3600 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3601 (AC_PROG_INSTALL): Added.
3602 (AC_PROG_CC): Moved to before configure.host call.
3603 * configure: Rebuilt.
3605 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3607 * configure.in: Define @SIMCONF@ depending on mips target.
3608 * configure: Rebuild.
3609 * Makefile.in (run): Add @SIMCONF@ to control simulator
3611 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3612 * interp.c: Remove some debugging, provide more detailed error
3613 messages, update memory accesses to use LOADDRMASK.
3615 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3617 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3618 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3620 * configure: Rebuild.
3621 * config.in: New file, generated by autoheader.
3622 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3623 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3624 HAVE_ANINT and HAVE_AINT, as appropriate.
3625 * Makefile.in (run): Use @LIBS@ rather than -lm.
3626 (interp.o): Depend upon config.h.
3627 (Makefile): Just rebuild Makefile.
3628 (clean): Remove stamp-h.
3629 (mostlyclean): Make the same as clean, not as distclean.
3630 (config.h, stamp-h): New targets.
3632 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3634 * interp.c (ColdReset): Fix boolean test. Make all simulator
3637 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3639 * interp.c (xfer_direct_word, xfer_direct_long,
3640 swap_direct_word, swap_direct_long, xfer_big_word,
3641 xfer_big_long, xfer_little_word, xfer_little_long,
3642 swap_word,swap_long): Added.
3643 * interp.c (ColdReset): Provide function indirection to
3644 host<->simulated_target transfer routines.
3645 * interp.c (sim_store_register, sim_fetch_register): Updated to
3646 make use of indirected transfer routines.
3648 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3650 * gencode.c (process_instructions): Ensure FP ABS instruction
3652 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3653 system call support.
3655 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3657 * interp.c (sim_do_command): Complain if callback structure not
3660 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3662 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3663 support for Sun hosts.
3664 * Makefile.in (gencode): Ensure the host compiler and libraries
3665 used for cross-hosted build.
3667 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3669 * interp.c, gencode.c: Some more (TODO) tidying.
3671 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3673 * gencode.c, interp.c: Replaced explicit long long references with
3674 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3675 * support.h (SET64LO, SET64HI): Macros added.
3677 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3679 * configure: Regenerate with autoconf 2.7.
3681 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3683 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3684 * support.h: Remove superfluous "1" from #if.
3685 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3687 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3689 * interp.c (StoreFPR): Control UndefinedResult() call on
3690 WARN_RESULT manifest.
3692 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3694 * gencode.c: Tidied instruction decoding, and added FP instruction
3697 * interp.c: Added dineroIII, and BSD profiling support. Also
3698 run-time FP handling.
3700 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3702 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3703 gencode.c, interp.c, support.h: created.
projects / thirdparty / binutils-gdb.git / blob