sim/mips/ChangeLog

   1 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
   4         and SD to sd.
   5
   6 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
   7
   8         * mips.igen (check_u64): Enable for `r3900'.
   9
  10 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
  11
  12         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
  13         STATE_PROG_BFD (sd).
  14         * configure: Regenerate.
  15
  16 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
  17             Maciej W. Rozycki  <macro@imgtec.com>
  18
  19         PR sim/19441
  20         * micromips.igen (delayslot_micromips): Enable for `micromips32',
  21         `micromips64' and `micromipsdsp' only.
  22         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
  23         (do_micromips_jalr, do_micromips_jal): Likewise.
  24         (compute_movep_src_reg): Likewise.
  25         (compute_andi16_imm): Likewise.
  26         (convert_fmt_micromips): Likewise.
  27         (convert_fmt_micromips_cvt_d): Likewise.
  28         (convert_fmt_micromips_cvt_s): Likewise.
  29         (FMT_MICROMIPS): Likewise.
  30         (FMT_MICROMIPS_CVT_D): Likewise.
  31         (FMT_MICROMIPS_CVT_S): Likewise.
  32
  33 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
  34
  35         * interp.c: Include elf-bfd.h.
  36         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
  37         ELFCLASS32.
  38
  39 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  40
  41         * config.in, configure: Regenerate.
  42
  43 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  44
  45         * configure: Regenerate.
  46
  47 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  48
  49         * configure: Regenerate.
  50
  51 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  52
  53         * configure: Regenerate.
  54
  55 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  56
  57         * configure: Regenerate.
  58
  59 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  60
  61         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
  62         * configure: Regenerate.
  63
  64 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  65
  66         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
  67         * configure: Regenerate.
  68
  69 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  70
  71         * configure: Regenerate.
  72
  73 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  74
  75         * configure: Regenerate.
  76
  77 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
  78
  79         * config.in, configure: Regenerate.
  80
  81 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
  82
  83         * interp.c (sim_open): Mark argv const.
  84         (sim_create_inferior): Mark argv and env const.
  85
  86 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
  87
  88         * configure: Regenerate.
  89
  90 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
  91
  92         * interp.c (sim_open): Update sim_parse_args comment.
  93
  94 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
  95
  96         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
  97         * configure: Regenerate.
  98
  99 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 100
 101         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 102         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 103         * configure: Regenerate.
 104         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 105
 106 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 107
 108         * dv-tx3904cpu.c (CPU, SD): Delete.
 109
 110 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 111
 112         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 113         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 114         (sim_store_register): Rename to ...
 115         (mips_reg_store): ... this.  Delete local cpu var.
 116         Update sim_io_eprintf calls.
 117         (sim_fetch_register): Rename to ...
 118         (mips_reg_fetch): ... this.  Delete local cpu var.
 119         Update sim_io_eprintf calls.
 120
 121 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 122
 123         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 124
 125 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 126
 127         * config.in, configure: Regenerate.
 128
 129 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 130
 131         * interp.c (sim_write, sim_read): Delete.
 132         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 133         (load_word): Likewise.
 134         * micromips.igen (cache): Likewise.
 135         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 136         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 137         do_store_left, do_store_right, do_load_double, do_store_double):
 138         Likewise.
 139         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 140         (do_prefx): Likewise.
 141         * sim-main.c (address_translation, prefetch): Delete.
 142         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 143         paddr=vaddr.
 144         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 145         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 146         (LoadMemory, StoreMemory): Delete CCA arg.
 147
 148 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 149
 150         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 151         * configure: Regenerated.
 152
 153 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 154
 155         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 156         * tconfig.h: Delete.
 157
 158 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 159
 160         * tconfig.h (SIM_HANDLES_LMA): Delete.
 161
 162 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 163
 164         * sim-main.h (WITH_WATCHPOINTS): Delete.
 165
 166 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 167
 168         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 169
 170 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 171
 172         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 173
 174 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 175
 176         * micromips.igen (process_isa_mode): Fix left shift of negative
 177         value.
 178
 179 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 180
 181         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 182
 183 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 184
 185         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 186
 187 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 188
 189         * interp.c (sim_close): Rename to ...
 190         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 191         sim_io_shutdown.
 192         * sim-main.h (mips_sim_close): Declare.
 193         (SIM_CLOSE_HOOK): Define.
 194
 195 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 196             Ali Lown  <ali.lown@imgtec.com>
 197
 198         * Makefile.in (tmp-micromips): New rule.
 199         (tmp-mach-multi): Add support for micromips.
 200         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 201         that works for both mips64 and micromips64.
 202         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 203         micromips32.
 204         Add build support for micromips.
 205         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 206         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 207         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 208         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 209         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 210         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 211         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 212         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 213         Refactored instruction code to use these functions.
 214         * dsp2.igen: Refactored instruction code to use the new functions.
 215         * interp.c (decode_coproc): Refactored to work with any instruction
 216         encoding.
 217         (isa_mode): New variable
 218         (RSVD_INSTRUCTION): Changed to 0x00000039.
 219         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 220         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 221         * micromips.dc: New file.
 222         * micromips.igen: New file.
 223         * micromips16.dc: New file.
 224         * micromipsdsp.igen: New file.
 225         * micromipsrun.c: New file.
 226         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 227         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 228         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 229         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 230         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 231         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 232         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 233         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 234         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 235         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 236         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 237         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 238         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 239         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 240         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 241         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 242         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 243         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 244         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 245         instructions.
 246         Refactored instruction code to use these functions.
 247         (RSVD): Changed to use new reserved instruction.
 248         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 249         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 250         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 251         do_store_double):  Added micromips32 and micromips64 models.
 252         Added include for micromips.igen and micromipsdsp.igen
 253         Add micromips32 and micromips64 models.
 254         (DecodeCoproc): Updated to use new macro definition.
 255         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 256         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 257         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 258         Refactored instruction code to use these functions.
 259         * sim-main.h (CP0_operation): New enum.
 260         (DecodeCoproc): Updated macro.
 261         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 262         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 263         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 264         ISA_MODE_MICROMIPS): New defines.
 265         (sim_state): Add isa_mode field.
 266
 267 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 268
 269         * configure: Regenerate.
 270
 271 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 272
 273         * configure.ac: Change configure.in to configure.ac.
 274         * configure: Regenerate.
 275
 276 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 277
 278         * configure: Regenerate.
 279
 280 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 281
 282         * interp.c [TRACE]: Delete.
 283         (TRACE): Change to WITH_TRACE_ANY_P.
 284         [!WITH_TRACE_ANY_P] (open_trace): Define.
 285         (mips_option_handler, open_trace, sim_close, dotrace):
 286         Change defined(TRACE) to WITH_TRACE_ANY_P.
 287         (sim_open): Delete TRACE ifdef check.
 288         * sim-main.c (load_memory): Delete TRACE ifdef check.
 289         (store_memory): Likewise.
 290         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 291         [!WITH_TRACE_ANY_P] (dotrace): Define.
 292
 293 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 294
 295         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 296         comments.
 297
 298 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 299
 300         * sim-main.h (SIM_CPU): Delete.
 301
 302 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 303
 304         * sim-main.h (sim_cia): Delete.
 305
 306 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 307
 308         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 309         PU_PC_GET.
 310         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 311         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 312         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 313         CIA_SET to CPU_PC_SET.
 314         * sim-main.h (CIA_GET, CIA_SET): Delete.
 315
 316 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 317
 318         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 319         * sim-main.h (STATE_CPU): Delete.
 320
 321 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 322
 323         * configure: Regenerate.
 324
 325 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 326
 327         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 328         * interp.c (mips_pc_get, mips_pc_set): New functions.
 329         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 330         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 331         (sim_pc_get): Delete.
 332         * sim-main.h (SIM_CPU): Define.
 333         (struct sim_state): Change cpu to an array of pointers.
 334         (STATE_CPU): Drop &.
 335
 336 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 337
 338         * interp.c (mips_option_handler, open_trace, sim_close,
 339         sim_write, sim_read, sim_store_register, sim_fetch_register,
 340         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 341         prototypes.
 342         (sim_open): Convert old style prototype.  Change casts with
 343         sim_write to unsigned char *.
 344         (fetch_str): Change null to unsigned char, and change cast to
 345         unsigned char *.
 346         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 347         unsigned char *.
 348
 349 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 350
 351         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 352
 353 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 354
 355         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 356
 357 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 358
 359         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 360
 361 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 362
 363         * config.in, configure: Regenerate.
 364
 365 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 366
 367         * interp.c (sim_pc_get): New function.
 368
 369 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 370
 371         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 372         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 373
 374 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 375
 376         * configure: Regenerate.
 377
 378 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 379
 380         * configure: Regenerate.
 381
 382 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 383
 384         * configure: Regenerate.
 385         * configure.ac (mips_extra_objs): Delete.
 386         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 387         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 388
 389 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 390
 391         * configure: Regenerate.
 392         * configure.ac: Delete sim_hw checks for dv-sockser.
 393
 394 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 395
 396         * config.in, configure: Regenerate.
 397         * tconfig.in: Rename file ...
 398         * tconfig.h: ... here.
 399
 400 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 401
 402         * tconfig.in: Delete includes.
 403         [HAVE_DV_SOCKSER]: Delete.
 404
 405 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 406
 407         * Makefile.in (SIM_RUN_OBJS): Delete.
 408
 409 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 410
 411         * configure.ac (AC_CHECK_HEADERS): Delete.
 412         * aclocal.m4, configure: Regenerate.
 413
 414 2014-08-19  Alan Modra  <amodra@gmail.com>
 415
 416         * configure: Regenerate.
 417
 418 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 419
 420         * configure: Regenerate.
 421         * config.in: Regenerate.
 422
 423 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 424
 425         * configure: Regenerate.
 426
 427 2013-09-23  Alan Modra  <amodra@gmail.com>
 428
 429         * configure: Regenerate.
 430
 431 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 432
 433         * aclocal.m4, configure: Regenerate.
 434
 435 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 436
 437         * configure: Rebuild.
 438
 439 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 440
 441         * configure: Regenerate.
 442
 443 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 444
 445         * configure.ac: Address use of dv-sockser.o.
 446         * tconfig.in: Conditionalize use of dv_sockser_install.
 447         * configure: Regenerated.
 448         * config.in: Regenerated.
 449
 450 2012-10-04  Chao-ying Fu  <fu@mips.com>
 451             Steve Ellcey  <sellcey@mips.com>
 452
 453         * mips/mips3264r2.igen (rdhwr): New.
 454
 455 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 456
 457         * configure.ac: Always link against dv-sockser.o.
 458         * configure: Regenerate.
 459
 460 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 461
 462         * config.in, configure: Regenerate.
 463
 464 2012-05-18  Nick Clifton  <nickc@redhat.com>
 465
 466         PR 14072
 467         * interp.c: Include config.h before system header files.
 468
 469 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 470
 471         * aclocal.m4, config.in, configure: Regenerate.
 472
 473 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 474
 475         * aclocal.m4: New file.
 476         * configure: Regenerate.
 477
 478 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 479
 480         * configure: Regenerate after common/acinclude.m4 update.
 481
 482 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 483
 484         * configure.ac: Change include to common/acinclude.m4.
 485
 486 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 487
 488         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 489         call.  Replace common.m4 include with SIM_AC_COMMON.
 490         * configure: Regenerate.
 491
 492 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 493
 494         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 495         $(SIM_EXTRA_DEPS).
 496         (tmp-mach-multi): Exit early when igen fails.
 497
 498 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 499
 500         * interp.c (sim_do_command): Delete.
 501
 502 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 503
 504         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 505         (tx3904sio_fifo_reset): Likewise.
 506         * interp.c (sim_monitor): Likewise.
 507
 508 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 509
 510         * interp.c (sim_write): Add const to buffer arg.
 511
 512 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 513
 514         * interp.c: Don't include sysdep.h
 515
 516 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 517
 518         * configure: Regenerate.
 519
 520 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 521
 522         * config.in: Regenerate.
 523         * configure: Likewise.
 524
 525         * configure: Regenerate.
 526
 527 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 528
 529         * configure: Regenerate to track ../common/common.m4 changes.
 530         * config.in: Ditto.
 531
 532 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 533             Daniel Jacobowitz  <dan@codesourcery.com>
 534             Joseph Myers  <joseph@codesourcery.com>
 535
 536         * configure: Regenerate.
 537
 538 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 539
 540         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 541         that unconditionally allows fmt_ps.
 542         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 543         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 544         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 545         filter from 64,f to 32,f.
 546         (PREFX): Change filter from 64 to 32.
 547         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 548         that use do_load_double instead of do_load.  Make both LUXC1
 549         versions unpredictable if SizeFGR () != 64.
 550         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 551         instead of do_store.  Remove unused variable.  Make both SUXC1
 552         versions unpredictable if SizeFGR () != 64.
 553
 554 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 555
 556         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 557         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 558         shifts for that case.
 559
 560 2007-09-04  Nick Clifton  <nickc@redhat.com>
 561
 562         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 563         (display_mem_info): New static variable.
 564         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 565         (mips_options): Add info-memory and memory-info.
 566         (sim_open): After processing the command line and board
 567         specification, check display_mem_info.  If it is set then
 568         call the real handler for the --memory-info command line
 569         switch.
 570
 571 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 572
 573         * configure.ac: Change license of multi-run.c to GPL version 3.
 574         * configure: Regenerate.
 575
 576 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 577
 578         * configure.ac, configure: Revert last patch.
 579
 580 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 581
 582         * configure.ac (sim_mipsisa3264_configs): New variable.
 583         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 584         every configuration support all four targets, using the triplet to
 585         determine the default.
 586         * configure: Regenerate.
 587
 588 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 589
 590         * Makefile.in (m16run.o): New rule.
 591
 592 2007-05-15  Thiemo Seufer  <ths@mips.com>
 593
 594         * mips3264r2.igen (DSHD): Fix compile warning.
 595
 596 2007-05-14  Thiemo Seufer  <ths@mips.com>
 597
 598         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 599         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 600         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 601         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 602         for mips32r2.
 603
 604 2007-03-01  Thiemo Seufer  <ths@mips.com>
 605
 606         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 607         and mips64.
 608
 609 2007-02-20  Thiemo Seufer  <ths@mips.com>
 610
 611         * dsp.igen: Update copyright notice.
 612         * dsp2.igen: Fix copyright notice.
 613
 614 2007-02-20  Thiemo Seufer  <ths@mips.com>
 615             Chao-Ying Fu  <fu@mips.com>
 616
 617         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 618         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 619         Add dsp2 to sim_igen_machine.
 620         * configure: Regenerate.
 621         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 622         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 623         (mulq_rs.ph): Use do_ph_mulq.
 624         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 625         * mips.igen: Add dsp2 model and include dsp2.igen.
 626         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 627         for *mips32r2, *mips64r2, *dsp.
 628         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 629         for *mips32r2, *mips64r2, *dsp2.
 630         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 631
 632 2007-02-19  Thiemo Seufer  <ths@mips.com>
 633             Nigel Stephens  <nigel@mips.com>
 634
 635         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 636         jumps with hazard barrier.
 637
 638 2007-02-19  Thiemo Seufer  <ths@mips.com>
 639             Nigel Stephens  <nigel@mips.com>
 640
 641         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 642         after each call to sim_io_write.
 643
 644 2007-02-19  Thiemo Seufer  <ths@mips.com>
 645             Nigel Stephens  <nigel@mips.com>
 646
 647         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 648         supported by this simulator.
 649         (decode_coproc): Recognise additional CP0 Config registers
 650         correctly.
 651
 652 2007-02-19  Thiemo Seufer  <ths@mips.com>
 653             Nigel Stephens  <nigel@mips.com>
 654             David Ung  <davidu@mips.com>
 655
 656         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 657         uninterpreted formats. If fmt is one of the uninterpreted types
 658         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 659         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 660         (store_fpr): When writing an invalid odd register, set the
 661         matching even register to fmt_unknown, not the following register.
 662         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 663         the the memory window at offset 0 set by --memory-size command
 664         line option.
 665         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 666         point register.
 667         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 668         register.
 669         (sim_monitor): When returning the memory size to the MIPS
 670         application, use the value in STATE_MEM_SIZE, not an arbitrary
 671         hardcoded value.
 672         (cop_lw): Don' mess around with FPR_STATE, just pass
 673         fmt_uninterpreted_32 to StoreFPR.
 674         (cop_sw): Similarly.
 675         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 676         (cop_sd): Similarly.
 677         * mips.igen (not_word_value): Single version for mips32, mips64
 678         and mips16.
 679
 680 2007-02-19  Thiemo Seufer <ths@mips.com>
 681             Nigel Stephens  <nigel@mips.com>
 682
 683         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 684         MBytes.
 685
 686 2007-02-17  Thiemo Seufer  <ths@mips.com>
 687
 688         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 689         configuration.
 690         * configure: Regenerate.
 691
 692 2007-02-17  Thiemo Seufer  <ths@mips.com>
 693
 694         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 695         Add mdmx to sim_igen_machine.
 696         (mipsisa64*-*-*): Likewise. Remove dsp.
 697         (mipsisa32*-*-*): Remove dsp.
 698         * configure: Regenerate.
 699
 700 2007-02-13  Thiemo Seufer  <ths@mips.com>
 701
 702         * configure.ac: Add mips*-sde-elf* target.
 703         * configure: Regenerate.
 704
 705 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 706
 707         * acconfig.h: Remove.
 708         * config.in, configure: Regenerate.
 709
 710 2006-11-07  Thiemo Seufer  <ths@mips.com>
 711
 712         * dsp.igen (do_w_op): Fix compiler warning.
 713
 714 2006-08-29  Thiemo Seufer  <ths@mips.com>
 715             David Ung  <davidu@mips.com>
 716
 717         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 718         sim_igen_machine.
 719         * configure: Regenerate.
 720         * mips.igen (model): Add smartmips.
 721         (MADDU): Increment ACX if carry.
 722         (do_mult): Clear ACX.
 723         (ROR,RORV): Add smartmips.
 724         (include): Include smartmips.igen.
 725         * sim-main.h (ACX): Set to REGISTERS[89].
 726         * smartmips.igen: New file.
 727
 728 2006-08-29  Thiemo Seufer  <ths@mips.com>
 729             David Ung  <davidu@mips.com>
 730
 731         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 732         mips3264r2.igen. Add missing dependency rules.
 733         * m16e.igen: Support for mips16e save/restore instructions.
 734
 735 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 736
 737         * configure: Regenerated.
 738
 739 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 740
 741         * configure: Regenerated.
 742
 743 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 744
 745         * configure: Regenerated.
 746
 747 2006-05-15 Chao-ying Fu  <fu@mips.com>
 748
 749         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 750
 751 2006-04-18  Nick Clifton  <nickc@redhat.com>
 752
 753         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 754         statement.
 755
 756 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 757
 758         * configure: Regenerate.
 759
 760 2005-12-14  Chao-ying Fu  <fu@mips.com>
 761
 762         * Makefile.in (SIM_OBJS): Add dsp.o.
 763         (dsp.o): New dependency.
 764         (IGEN_INCLUDE): Add dsp.igen.
 765         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 766         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 767         * configure: Regenerate.
 768         * mips.igen: Add dsp model and include dsp.igen.
 769         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 770         because these instructions are extended in DSP ASE.
 771         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 772         adding 6 DSP accumulator registers and 1 DSP control register.
 773         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 774         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 775         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 776         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 777         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 778         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 779         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 780         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 781         DSPCR_CCOND_SMASK): New define.
 782         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 783         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 784
 785 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 786
 787         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 788
 789 2005-06-16  David Ung  <davidu@mips.com>
 790             Nigel Stephens  <nigel@mips.com>
 791
 792         * mips.igen: New mips16e model and include m16e.igen.
 793         (check_u64): Add mips16e tag.
 794         * m16e.igen: New file for MIPS16e instructions.
 795         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 796         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 797         models.
 798         * configure: Regenerate.
 799
 800 2005-05-26  David Ung  <davidu@mips.com>
 801
 802         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 803         tags to all instructions which are applicable to the new ISAs.
 804         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 805         vr.igen.
 806         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 807         instructions.
 808         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 809         to mips.igen.
 810         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 811         * configure: Regenerate.
 812
 813 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 814
 815         * configure: Regenerate.
 816
 817 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 818
 819         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 820         explicit call to AC_CONFIG_HEADER.
 821         * configure: Regenerate.
 822
 823 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 824
 825         * configure.ac: Update to use ../common/common.m4.
 826         * configure: Re-generate.
 827
 828 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 829
 830         * configure: Regenerated to track ../common/aclocal.m4 changes.
 831
 832 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 833
 834         * configure.ac: Rename configure.in, require autoconf 2.59.
 835         * configure: Re-generate.
 836
 837 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 838
 839         * configure: Regenerate for ../common/aclocal.m4 update.
 840
 841 2004-09-24  Monika Chaddha  <monika@acmet.com>
 842
 843         Committed by Andrew Cagney.
 844         * m16.igen (CMP, CMPI): Fix assembler.
 845
 846 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 847
 848         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 849         * configure: Regenerate.
 850
 851 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 852
 853         * configure.in (sim_m16_machine): Include mipsIII.
 854         * configure: Regenerate.
 855
 856 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 857
 858         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 859         from COP0_BADVADDR.
 860         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 861
 862 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 863
 864         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 865
 866 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 867
 868         * mips.igen (check_fmt): Remove.
 869         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 870         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 871         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 872         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 873         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 874         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 875         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 876         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 877         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 878         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 879
 880 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 881
 882         * sb1.igen (check_sbx): New function.
 883         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 884
 885 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 886             Richard Sandiford  <rsandifo@redhat.com>
 887
 888         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 889         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 890         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 891         separate implementations for mipsIV and mipsV.  Use new macros to
 892         determine whether the restrictions apply.
 893
 894 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 895
 896         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 897         (check_mult_hilo): Improve comments.
 898         (check_div_hilo): Likewise.  Also, fork off a new version
 899         to handle mips32/mips64 (since there are no hazards to check
 900         in MIPS32/MIPS64).
 901
 902 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 903
 904         * mips.igen (do_dmultx): Fix check for negative operands.
 905
 906 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 907
 908         * Makefile.in (SHELL): Make sure this is defined.
 909         (various): Use $(SHELL) whenever we invoke move-if-change.
 910
 911 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 912
 913         * cp1.c: Tweak attribution slightly.
 914         * cp1.h: Likewise.
 915         * mdmx.c: Likewise.
 916         * mdmx.igen: Likewise.
 917         * mips3d.igen: Likewise.
 918         * sb1.igen: Likewise.
 919
 920 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 921
 922         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 923         unsigned operands.
 924
 925 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 926
 927         * interp.c (sim_open): Rename _bfd to bfd.
 928         (sim_create_inferior): Ditto.
 929
 930 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 931
 932         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 933
 934 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 935
 936         * mips.igen (EI, DI): Remove.
 937
 938 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 939
 940         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 941
 942 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 943             Andrew Cagney  <ac131313@redhat.com>
 944             Gavin Romig-Koch  <gavin@redhat.com>
 945             Graydon Hoare  <graydon@redhat.com>
 946             Aldy Hernandez  <aldyh@redhat.com>
 947             Dave Brolley  <brolley@redhat.com>
 948             Chris Demetriou  <cgd@broadcom.com>
 949
 950         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 951         (sim_mach_default): New variable.
 952         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 953         Add a new simulator generator, MULTI.
 954         * configure: Regenerate.
 955         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 956         (multi-run.o): New dependency.
 957         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 958         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 959         (tmp-multi): Combine them.
 960         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 961         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 962         (distclean-extra): New rule.
 963         * sim-main.h: Include bfd.h.
 964         (MIPS_MACH): New macro.
 965         * mips.igen (vr4120, vr5400, vr5500): New models.
 966         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 967         * vr.igen: Replace with new version.
 968
 969 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 970
 971         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 972         * configure: Regenerate.
 973
 974 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 975
 976         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 977         * mips.igen: Remove all invocations of check_branch_bug and
 978         mark_branch_bug.
 979
 980 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 981
 982         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 983
 984 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 985
 986         * mips.igen (do_load_double, do_store_double): New functions.
 987         (LDC1, SDC1): Rename to...
 988         (LDC1b, SDC1b): respectively.
 989         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 990
 991 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 992
 993         * cp1.c (fp_recip2): Modify initialization expression so that
 994         GCC will recognize it as constant.
 995
 996 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 997
 998         * mdmx.c (SD_): Delete.
 999         (Unpredictable): Re-define, for now, to directly invoke
1000         unpredictable_action().
1001         (mdmx_acc_op): Fix error in .ob immediate handling.
1002
1003 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1004
1005         * interp.c (sim_firmware_command): Initialize `address'.
1006
1007 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1008
1009         * configure: Regenerated to track ../common/aclocal.m4 changes.
1010
1011 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1012             Ed Satterthwaite  <ehs@broadcom.com>
1013
1014         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1015         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1016         * mips.igen: Include mips3d.igen.
1017         (mips3d): New model name for MIPS-3D ASE instructions.
1018         (CVT.W.fmt): Don't use this instruction for word (source) format
1019         instructions.
1020         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1021         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1022         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1023         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1024         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1025         (RSquareRoot1, RSquareRoot2): New macros.
1026         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1027         (fp_rsqrt2): New functions.
1028         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1029         * configure: Regenerate.
1030
1031 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1032             Ed Satterthwaite  <ehs@broadcom.com>
1033
1034         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1035         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1036         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1037         (convert): Note that this function is not used for paired-single
1038         format conversions.
1039         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1040         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1041         (check_fmt_p): Enable paired-single support.
1042         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1043         (PUU.PS): New instructions.
1044         (CVT.S.fmt): Don't use this instruction for paired-single format
1045         destinations.
1046         * sim-main.h (FP_formats): New value 'fmt_ps.'
1047         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1048         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1049
1050 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1051
1052         * mips.igen: Fix formatting of function calls in
1053         many FP operations.
1054
1055 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1056
1057         * mips.igen (MOVN, MOVZ): Trace result.
1058         (TNEI): Print "tnei" as the opcode name in traces.
1059         (CEIL.W): Add disassembly string for traces.
1060         (RSQRT.fmt): Make location of disassembly string consistent
1061         with other instructions.
1062
1063 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1064
1065         * mips.igen (X): Delete unused function.
1066
1067 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1068
1069         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1070
1071 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1072             Ed Satterthwaite  <ehs@broadcom.com>
1073
1074         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1075         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1076         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1077         (fp_nmsub): New prototypes.
1078         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1079         (NegMultiplySub): New defines.
1080         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1081         (MADD.D, MADD.S): Replace with...
1082         (MADD.fmt): New instruction.
1083         (MSUB.D, MSUB.S): Replace with...
1084         (MSUB.fmt): New instruction.
1085         (NMADD.D, NMADD.S): Replace with...
1086         (NMADD.fmt): New instruction.
1087         (NMSUB.D, MSUB.S): Replace with...
1088         (NMSUB.fmt): New instruction.
1089
1090 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1091             Ed Satterthwaite  <ehs@broadcom.com>
1092
1093         * cp1.c: Fix more comment spelling and formatting.
1094         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1095         (denorm_mode): New function.
1096         (fpu_unary, fpu_binary): Round results after operation, collect
1097         status from rounding operations, and update the FCSR.
1098         (convert): Collect status from integer conversions and rounding
1099         operations, and update the FCSR.  Adjust NaN values that result
1100         from conversions.  Convert to use sim_io_eprintf rather than
1101         fprintf, and remove some debugging code.
1102         * cp1.h (fenr_FS): New define.
1103
1104 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1105
1106         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1107         rounding mode to sim FP rounding mode flag conversion code into...
1108         (rounding_mode): New function.
1109
1110 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1111
1112         * cp1.c: Clean up formatting of a few comments.
1113         (value_fpr): Reformat switch statement.
1114
1115 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1116             Ed Satterthwaite  <ehs@broadcom.com>
1117
1118         * cp1.h: New file.
1119         * sim-main.h: Include cp1.h.
1120         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1121         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1122         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1123         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1124         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1125         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1126         * cp1.c: Don't include sim-fpu.h; already included by
1127         sim-main.h.  Clean up formatting of some comments.
1128         (NaN, Equal, Less): Remove.
1129         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1130         (fp_cmp): New functions.
1131         * mips.igen (do_c_cond_fmt): Remove.
1132         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1133         Compare.  Add result tracing.
1134         (CxC1): Remove, replace with...
1135         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1136         (DMxC1): Remove, replace with...
1137         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1138         (MxC1): Remove, replace with...
1139         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1140
1141 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1142
1143         * sim-main.h (FGRIDX): Remove, replace all uses with...
1144         (FGR_BASE): New macro.
1145         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1146         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1147         (NR_FGR, FGR): Likewise.
1148         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1149         * mips.igen: Likewise.
1150
1151 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1152
1153         * cp1.c: Add an FSF Copyright notice to this file.
1154
1155 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1156             Ed Satterthwaite  <ehs@broadcom.com>
1157
1158         * cp1.c (Infinity): Remove.
1159         * sim-main.h (Infinity): Likewise.
1160
1161         * cp1.c (fp_unary, fp_binary): New functions.
1162         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1163         (fp_sqrt): New functions, implemented in terms of the above.
1164         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1165         (Recip, SquareRoot): Remove (replaced by functions above).
1166         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1167         (fp_recip, fp_sqrt): New prototypes.
1168         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1169         (Recip, SquareRoot): Replace prototypes with #defines which
1170         invoke the functions above.
1171
1172 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1173
1174         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1175         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1176         file, remove PARAMS from prototypes.
1177         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1178         simulator state arguments.
1179         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1180         pass simulator state arguments.
1181         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1182         (store_fpr, convert): Remove 'sd' argument.
1183         (value_fpr): Likewise.  Convert to use 'SD' instead.
1184
1185 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1186
1187         * cp1.c (Min, Max): Remove #if 0'd functions.
1188         * sim-main.h (Min, Max): Remove.
1189
1190 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1191
1192         * cp1.c: fix formatting of switch case and default labels.
1193         * interp.c: Likewise.
1194         * sim-main.c: Likewise.
1195
1196 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1197
1198         * cp1.c: Clean up comments which describe FP formats.
1199          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1200
1201 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1202             Ed Satterthwaite  <ehs@broadcom.com>
1203
1204         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1205         Broadcom SiByte SB-1 processor configurations.
1206         * configure: Regenerate.
1207         * sb1.igen: New file.
1208         * mips.igen: Include sb1.igen.
1209         (sb1): New model.
1210         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1211         * mdmx.igen: Add "sb1" model to all appropriate functions and
1212         instructions.
1213         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1214         (ob_func, ob_acc): Reference the above.
1215         (qh_acc): Adjust to keep the same size as ob_acc.
1216         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1217         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1218
1219 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1220
1221         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1222
1223 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1224             Ed Satterthwaite  <ehs@broadcom.com>
1225
1226         * mips.igen (mdmx): New (pseudo-)model.
1227         * mdmx.c, mdmx.igen: New files.
1228         * Makefile.in (SIM_OBJS): Add mdmx.o.
1229         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1230         New typedefs.
1231         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1232         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1233         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1234         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1235         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1236         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1237         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1238         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1239         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1240         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1241         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1242         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1243         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1244         (qh_fmtsel): New macros.
1245         (_sim_cpu): New member "acc".
1246         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1247         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1248
1249 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1250
1251         * interp.c: Use 'deprecated' rather than 'depreciated.'
1252         * sim-main.h: Likewise.
1253
1254 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1255
1256         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1257         which wouldn't compile anyway.
1258         * sim-main.h (unpredictable_action): New function prototype.
1259         (Unpredictable): Define to call igen function unpredictable().
1260         (NotWordValue): New macro to call igen function not_word_value().
1261         (UndefinedResult): Remove.
1262         * interp.c (undefined_result): Remove.
1263         (unpredictable_action): New function.
1264         * mips.igen (not_word_value, unpredictable): New functions.
1265         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1266         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1267         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1268         NotWordValue() to check for unpredictable inputs, then
1269         Unpredictable() to handle them.
1270
1271 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1272
1273         * mips.igen: Fix formatting of calls to Unpredictable().
1274
1275 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1276
1277         * interp.c (sim_open): Revert previous change.
1278
1279 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1280
1281         * interp.c (sim_open): Disable chunk of code that wrote code in
1282         vector table entries.
1283
1284 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1285
1286         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1287         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1288         unused definitions.
1289
1290 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1291
1292         * cp1.c: Fix many formatting issues.
1293
1294 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1295
1296         * cp1.c (fpu_format_name): New function to replace...
1297         (DOFMT): This.  Delete, and update all callers.
1298         (fpu_rounding_mode_name): New function to replace...
1299         (RMMODE): This.  Delete, and update all callers.
1300
1301 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1302
1303         * interp.c: Move FPU support routines from here to...
1304         * cp1.c: Here.  New file.
1305         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1306         (cp1.o): New target.
1307
1308 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1309
1310         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1311         * mips.igen (mips32, mips64): New models, add to all instructions
1312         and functions as appropriate.
1313         (loadstore_ea, check_u64): New variant for model mips64.
1314         (check_fmt_p): New variant for models mipsV and mips64, remove
1315         mipsV model marking fro other variant.
1316         (SLL) Rename to...
1317         (SLLa) this.
1318         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1319         for mips32 and mips64.
1320         (DCLO, DCLZ): New instructions for mips64.
1321
1322 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1323
1324         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1325         immediate or code as a hex value with the "%#lx" format.
1326         (ANDI): Likewise, and fix printed instruction name.
1327
1328 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1329
1330         * sim-main.h (UndefinedResult, Unpredictable): New macros
1331         which currently do nothing.
1332
1333 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1334
1335         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1336         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1337         (status_CU3): New definitions.
1338
1339         * sim-main.h (ExceptionCause): Add new values for MIPS32
1340         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1341         for DebugBreakPoint and NMIReset to note their status in
1342         MIPS32 and MIPS64.
1343         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1344         (SignalExceptionCacheErr): New exception macros.
1345
1346 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1347
1348         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1349         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1350         is always enabled.
1351         (SignalExceptionCoProcessorUnusable): Take as argument the
1352         unusable coprocessor number.
1353
1354 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1355
1356         * mips.igen: Fix formatting of all SignalException calls.
1357
1358 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1359
1360         * sim-main.h (SIGNEXTEND): Remove.
1361
1362 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1363
1364         * mips.igen: Remove gencode comment from top of file, fix
1365         spelling in another comment.
1366
1367 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1368
1369         * mips.igen (check_fmt, check_fmt_p): New functions to check
1370         whether specific floating point formats are usable.
1371         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1372         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1373         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1374         Use the new functions.
1375         (do_c_cond_fmt): Remove format checks...
1376         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1377
1378 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1379
1380         * mips.igen: Fix formatting of check_fpu calls.
1381
1382 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1383
1384         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1385
1386 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1387
1388         * mips.igen: Remove whitespace at end of lines.
1389
1390 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1391
1392         * mips.igen (loadstore_ea): New function to do effective
1393         address calculations.
1394         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1395         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1396         CACHE): Use loadstore_ea to do effective address computations.
1397
1398 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1399
1400         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1401         * mips.igen (LL, CxC1, MxC1): Likewise.
1402
1403 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1404
1405         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1406         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1407         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1408         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1409         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1410         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1411         Don't split opcode fields by hand, use the opcode field values
1412         provided by igen.
1413
1414 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1415
1416         * mips.igen (do_divu): Fix spacing.
1417
1418         * mips.igen (do_dsllv): Move to be right before DSLLV,
1419         to match the rest of the do_<shift> functions.
1420
1421 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1422
1423         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1424         DSRL32, do_dsrlv): Trace inputs and results.
1425
1426 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1427
1428         * mips.igen (CACHE): Provide instruction-printing string.
1429
1430         * interp.c (signal_exception): Comment tokens after #endif.
1431
1432 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1433
1434         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1435         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1436         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1437         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1438         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1439         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1440         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1441         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1442
1443 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1444
1445         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1446         instruction-printing string.
1447         (LWU): Use '64' as the filter flag.
1448
1449 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1450
1451         * mips.igen (SDXC1): Fix instruction-printing string.
1452
1453 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1454
1455         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1456         filter flags "32,f".
1457
1458 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1459
1460         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1461         as the filter flag.
1462
1463 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1464
1465         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1466         add a comma) so that it more closely match the MIPS ISA
1467         documentation opcode partitioning.
1468         (PREF): Put useful names on opcode fields, and include
1469         instruction-printing string.
1470
1471 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1472
1473         * mips.igen (check_u64): New function which in the future will
1474         check whether 64-bit instructions are usable and signal an
1475         exception if not.  Currently a no-op.
1476         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1477         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1478         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1479         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1480
1481         * mips.igen (check_fpu): New function which in the future will
1482         check whether FPU instructions are usable and signal an exception
1483         if not.  Currently a no-op.
1484         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1485         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1486         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1487         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1488         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1489         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1490         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1491         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1492
1493 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1494
1495         * mips.igen (do_load_left, do_load_right): Move to be immediately
1496         following do_load.
1497         (do_store_left, do_store_right): Move to be immediately following
1498         do_store.
1499
1500 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1501
1502         * mips.igen (mipsV): New model name.  Also, add it to
1503         all instructions and functions where it is appropriate.
1504
1505 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1506
1507         * mips.igen: For all functions and instructions, list model
1508         names that support that instruction one per line.
1509
1510 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1511
1512         * mips.igen: Add some additional comments about supported
1513         models, and about which instructions go where.
1514         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1515         order as is used in the rest of the file.
1516
1517 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1518
1519         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1520         indicating that ALU32_END or ALU64_END are there to check
1521         for overflow.
1522         (DADD): Likewise, but also remove previous comment about
1523         overflow checking.
1524
1525 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1526
1527         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1528         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1529         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1530         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1531         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1532         fields (i.e., add and move commas) so that they more closely
1533         match the MIPS ISA documentation opcode partitioning.
1534
1535 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1536
1537         * mips.igen (ADDI): Print immediate value.
1538         (BREAK): Print code.
1539         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1540         (SLL): Print "nop" specially, and don't run the code
1541         that does the shift for the "nop" case.
1542
1543 2001-11-17  Fred Fish  <fnf@redhat.com>
1544
1545         * sim-main.h (float_operation): Move enum declaration outside
1546         of _sim_cpu struct declaration.
1547
1548 2001-04-12  Jim Blandy  <jimb@redhat.com>
1549
1550         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1551         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1552         set of the FCSR.
1553         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1554         PENDING_FILL, and you can get the intended effect gracefully by
1555         calling PENDING_SCHED directly.
1556
1557 2001-02-23  Ben Elliston  <bje@redhat.com>
1558
1559         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1560         already defined elsewhere.
1561
1562 2001-02-19  Ben Elliston  <bje@redhat.com>
1563
1564         * sim-main.h (sim_monitor): Return an int.
1565         * interp.c (sim_monitor): Add return values.
1566         (signal_exception): Handle error conditions from sim_monitor.
1567
1568 2001-02-08  Ben Elliston  <bje@redhat.com>
1569
1570         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1571         (store_memory): Likewise, pass cia to sim_core_write*.
1572
1573 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1574
1575         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1576         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1577
1578 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1579
1580         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1581         * Makefile.in: Don't delete *.igen when cleaning directory.
1582
1583 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1584
1585         * m16.igen (break): Call SignalException not sim_engine_halt.
1586
1587 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1588
1589         From Jason Eckhardt:
1590         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1591
1592 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1593
1594         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1595
1596 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1597
1598         * mips.igen (do_dmultx): Fix typo.
1599
1600 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1601
1602         * configure: Regenerated to track ../common/aclocal.m4 changes.
1603
1604 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1605
1606         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1607
1608 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1609
1610         * sim-main.h (GPR_CLEAR): Define macro.
1611
1612 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1613
1614         * interp.c (decode_coproc): Output long using %lx and not %s.
1615
1616 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1617
1618         * interp.c (sim_open): Sort & extend dummy memory regions for
1619         --board=jmr3904 for eCos.
1620
1621 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1622
1623         * configure: Regenerated.
1624
1625 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1626
1627         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1628         calls, conditional on the simulator being in verbose mode.
1629
1630 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1631
1632         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1633         cache don't get ReservedInstruction traps.
1634
1635 1999-11-29  Mark Salter  <msalter@cygnus.com>
1636
1637         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1638         to clear status bits in sdisr register. This is how the hardware works.
1639
1640         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1641         being used by cygmon.
1642
1643 1999-11-11  Andrew Haley  <aph@cygnus.com>
1644
1645         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1646         instructions.
1647
1648 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1649
1650         * mips.igen (MULT): Correct previous mis-applied patch.
1651
1652 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1653
1654         * mips.igen (delayslot32): Handle sequence like
1655         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1656         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1657         (MULT): Actually pass the third register...
1658
1659 1999-09-03  Mark Salter  <msalter@cygnus.com>
1660
1661         * interp.c (sim_open): Added more memory aliases for additional
1662         hardware being touched by cygmon on jmr3904 board.
1663
1664 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1665
1666         * configure: Regenerated to track ../common/aclocal.m4 changes.
1667
1668 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1669
1670         * interp.c (sim_store_register): Handle case where client - GDB -
1671         specifies that a 4 byte register is 8 bytes in size.
1672         (sim_fetch_register): Ditto.
1673
1674 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1675
1676         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1677         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1678         (idt_monitor_base): Base address for IDT monitor traps.
1679         (pmon_monitor_base): Ditto for PMON.
1680         (lsipmon_monitor_base): Ditto for LSI PMON.
1681         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1682         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1683         (sim_firmware_command): New function.
1684         (mips_option_handler): Call it for OPTION_FIRMWARE.
1685         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1686         option was given, add no monitor by default.  Add BREAK hooks only if
1687         monitors are also there.
1688
1689 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1690
1691         * interp.c (sim_monitor): Flush output before reading input.
1692
1693 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1694
1695         * tconfig.in (SIM_HANDLES_LMA): Always define.
1696
1697 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1698
1699         From Mark Salter <msalter@cygnus.com>:
1700         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1701         (sim_open): Add setup for BSP board.
1702
1703 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1704
1705         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1706         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1707         them as unimplemented.
1708
1709 1999-05-08  Felix Lee  <flee@cygnus.com>
1710
1711         * configure: Regenerated to track ../common/aclocal.m4 changes.
1712
1713 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1714
1715         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1716
1717 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1718
1719         * configure.in: Any mips64vr5*-*-* target should have
1720         -DTARGET_ENABLE_FR=1.
1721         (default_endian): Any mips64vr*el-*-* target should default to
1722         LITTLE_ENDIAN.
1723         * configure: Re-generate.
1724
1725 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1726
1727         * mips.igen (ldl): Extend from _16_, not 32.
1728
1729 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1730
1731         * interp.c (sim_store_register): Force registers written to by GDB
1732         into an un-interpreted state.
1733
1734 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1735
1736         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1737         CPU, start periodic background I/O polls.
1738         (tx3904sio_poll): New function: periodic I/O poller.
1739
1740 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1741
1742         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1743
1744 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1745
1746         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1747         case statement.
1748
1749 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1750
1751         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1752         (load_word): Call SIM_CORE_SIGNAL hook on error.
1753         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1754         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1755         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1756         * sim-main.h (COP0_BADVADDR): Define.
1757         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1758         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1759         (_sim_cpu): Add exc_* fields to store register value snapshots.
1760         * mips.igen (*): Replace memory-related SignalException* calls
1761         with references to SIM_CORE_SIGNAL hook.
1762
1763         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1764         fix.
1765         * sim-main.c (*): Minor warning cleanups.
1766
1767 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1768
1769         * m16.igen (DADDIU5): Correct type-o.
1770
1771 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1772
1773         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1774         variables.
1775
1776 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1777
1778         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1779         to include path.
1780         (interp.o): Add dependency on itable.h
1781         (oengine.c, gencode): Delete remaining references.
1782         (BUILT_SRC_FROM_GEN): Clean up.
1783
1784 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1785
1786         * vr4run.c: New.
1787         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1788         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1789         tmp-run-hack) : New.
1790         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1791         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1792         Drop the "64" qualifier to get the HACK generator working.
1793         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1794         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1795         qualifier to get the hack generator working.
1796         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1797         (DSLL): Use do_dsll.
1798         (DSLLV): Use do_dsllv.
1799         (DSRA): Use do_dsra.
1800         (DSRL): Use do_dsrl.
1801         (DSRLV): Use do_dsrlv.
1802         (BC1): Move *vr4100 to get the HACK generator working.
1803         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1804         get the HACK generator working.
1805         (MACC) Rename to get the HACK generator working.
1806         (DMACC,MACCS,DMACCS): Add the 64.
1807
1808 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1809
1810         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1811         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1812
1813 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1814
1815     * mips/interp.c (DEBUG): Cleanups.
1816
1817 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1818
1819         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1820         (tx3904sio_tickle): fflush after a stdout character output.
1821
1822 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1823
1824         * interp.c (sim_close): Uninstall modules.
1825
1826 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1827
1828         * sim-main.h, interp.c (sim_monitor): Change to global
1829         function.
1830
1831 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1832
1833         * configure.in (vr4100): Only include vr4100 instructions in
1834         simulator.
1835         * configure: Re-generate.
1836         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1837
1838 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1839
1840         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1841         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1842         true alternative.
1843
1844         * configure.in (sim_default_gen, sim_use_gen): Replace with
1845         sim_gen.
1846         (--enable-sim-igen): Delete config option. Always using IGEN.
1847         * configure: Re-generate.
1848
1849         * Makefile.in (gencode): Kill, kill, kill.
1850         * gencode.c: Ditto.
1851
1852 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1853
1854         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1855         bit mips16 igen simulator.
1856         * configure: Re-generate.
1857
1858         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1859         as part of vr4100 ISA.
1860         * vr.igen: Mark all instructions as 64 bit only.
1861
1862 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1863
1864         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1865         Pacify GCC.
1866
1867 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1868
1869         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1870         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1871         * configure: Re-generate.
1872
1873         * m16.igen (BREAK): Define breakpoint instruction.
1874         (JALX32): Mark instruction as mips16 and not r3900.
1875         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1876
1877         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1878
1879 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1880
1881         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1882         insn as a debug breakpoint.
1883
1884         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1885         pending.slot_size.
1886         (PENDING_SCHED): Clean up trace statement.
1887         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1888         (PENDING_FILL): Delay write by only one cycle.
1889         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1890
1891         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1892         of pending writes.
1893         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1894         32 & 64.
1895         (pending_tick): Move incrementing of index to FOR statement.
1896         (pending_tick): Only update PENDING_OUT after a write has occured.
1897
1898         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1899         build simulator.
1900         * configure: Re-generate.
1901
1902         * interp.c (sim_engine_run OLD): Delete explicit call to
1903         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1904
1905 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1906
1907         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1908         interrupt level number to match changed SignalExceptionInterrupt
1909         macro.
1910
1911 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1912
1913         * interp.c: #include "itable.h" if WITH_IGEN.
1914         (get_insn_name): New function.
1915         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1916         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1917
1918 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1919
1920         * configure: Rebuilt to inhale new common/aclocal.m4.
1921
1922 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1923
1924         * dv-tx3904sio.c: Include sim-assert.h.
1925
1926 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1927
1928         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1929         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1930         Reorganize target-specific sim-hardware checks.
1931         * configure: rebuilt.
1932         * interp.c (sim_open): For tx39 target boards, set
1933         OPERATING_ENVIRONMENT, add tx3904sio devices.
1934         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1935         ROM executables.  Install dv-sockser into sim-modules list.
1936
1937         * dv-tx3904irc.c: Compiler warning clean-up.
1938         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1939         frequent hw-trace messages.
1940
1941 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1942
1943         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1944
1945 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1946
1947         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1948
1949         * vr.igen: New file.
1950         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1951         * mips.igen: Define vr4100 model. Include vr.igen.
1952 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1953
1954         * mips.igen (check_mf_hilo): Correct check.
1955
1956 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1957
1958         * sim-main.h (interrupt_event): Add prototype.
1959
1960         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1961         register_ptr, register_value.
1962         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1963
1964         * sim-main.h (tracefh): Make extern.
1965
1966 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1967
1968         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1969         Reduce unnecessarily high timer event frequency.
1970         * dv-tx3904cpu.c: Ditto for interrupt event.
1971
1972 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1973
1974         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1975         to allay warnings.
1976         (interrupt_event): Made non-static.
1977
1978         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1979         interchange of configuration values for external vs. internal
1980         clock dividers.
1981
1982 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1983
1984         * mips.igen (BREAK): Moved code to here for
1985         simulator-reserved break instructions.
1986         * gencode.c (build_instruction): Ditto.
1987         * interp.c (signal_exception): Code moved from here.  Non-
1988         reserved instructions now use exception vector, rather
1989         than halting sim.
1990         * sim-main.h: Moved magic constants to here.
1991
1992 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1993
1994         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1995         register upon non-zero interrupt event level, clear upon zero
1996         event value.
1997         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1998         by passing zero event value.
1999         (*_io_{read,write}_buffer): Endianness fixes.
2000         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2001         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2002
2003         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2004         serial I/O and timer module at base address 0xFFFF0000.
2005
2006 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2007
2008         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2009         and BigEndianCPU.
2010
2011 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2012
2013         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2014         parts.
2015         * configure: Update.
2016
2017 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2018
2019         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2020         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2021         * configure.in: Include tx3904tmr in hw_device list.
2022         * configure: Rebuilt.
2023         * interp.c (sim_open): Instantiate three timer instances.
2024         Fix address typo of tx3904irc instance.
2025
2026 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2027
2028         * interp.c (signal_exception): SystemCall exception now uses
2029         the exception vector.
2030
2031 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2032
2033         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2034         to allay warnings.
2035
2036 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2037
2038         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2039
2040 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2041
2042         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2043
2044         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2045         sim-main.h. Declare a struct hw_descriptor instead of struct
2046         hw_device_descriptor.
2047
2048 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2049
2050         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2051         right bits and then re-align left hand bytes to correct byte
2052         lanes.  Fix incorrect computation in do_store_left when loading
2053         bytes from second word.
2054
2055 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2056
2057         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2058         * interp.c (sim_open): Only create a device tree when HW is
2059         enabled.
2060
2061         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2062         * interp.c (signal_exception): Ditto.
2063
2064 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2065
2066         * gencode.c: Mark BEGEZALL as LIKELY.
2067
2068 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2069
2070         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2071         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2072
2073 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2074
2075         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2076         modules.  Recognize TX39 target with "mips*tx39" pattern.
2077         * configure: Rebuilt.
2078         * sim-main.h (*): Added many macros defining bits in
2079         TX39 control registers.
2080         (SignalInterrupt): Send actual PC instead of NULL.
2081         (SignalNMIReset): New exception type.
2082         * interp.c (board): New variable for future use to identify
2083         a particular board being simulated.
2084         (mips_option_handler,mips_options): Added "--board" option.
2085         (interrupt_event): Send actual PC.
2086         (sim_open): Make memory layout conditional on board setting.
2087         (signal_exception): Initial implementation of hardware interrupt
2088         handling.  Accept another break instruction variant for simulator
2089         exit.
2090         (decode_coproc): Implement RFE instruction for TX39.
2091         (mips.igen): Decode RFE instruction as such.
2092         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2093         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2094         bbegin to implement memory map.
2095         * dv-tx3904cpu.c: New file.
2096         * dv-tx3904irc.c: New file.
2097
2098 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2099
2100         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2101
2102 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2103
2104         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2105         with calls to check_div_hilo.
2106
2107 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2108
2109         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2110         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2111         Add special r3900 version of do_mult_hilo.
2112         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2113         with calls to check_mult_hilo.
2114         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2115         with calls to check_div_hilo.
2116
2117 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2118
2119         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2120         Document a replacement.
2121
2122 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2123
2124         * interp.c (sim_monitor): Make mon_printf work.
2125
2126 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2127
2128         * sim-main.h (INSN_NAME): New arg `cpu'.
2129
2130 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2131
2132         * configure: Regenerated to track ../common/aclocal.m4 changes.
2133
2134 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2135
2136         * configure: Regenerated to track ../common/aclocal.m4 changes.
2137         * config.in: Ditto.
2138
2139 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2140
2141         * acconfig.h: New file.
2142         * configure.in: Reverted change of Apr 24; use sinclude again.
2143
2144 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2145
2146         * configure: Regenerated to track ../common/aclocal.m4 changes.
2147         * config.in: Ditto.
2148
2149 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2150
2151         * configure.in: Don't call sinclude.
2152
2153 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2154
2155         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2156
2157 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2158
2159         * mips.igen (ERET): Implement.
2160
2161         * interp.c (decode_coproc): Return sign-extended EPC.
2162
2163         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2164
2165         * interp.c (signal_exception): Do not ignore Trap.
2166         (signal_exception): On TRAP, restart at exception address.
2167         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2168         (signal_exception): Update.
2169         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2170         so that TRAP instructions are caught.
2171
2172 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2173
2174         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2175         contains HI/LO access history.
2176         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2177         (HIACCESS, LOACCESS): Delete, replace with
2178         (HIHISTORY, LOHISTORY): New macros.
2179         (CHECKHILO): Delete all, moved to mips.igen
2180
2181         * gencode.c (build_instruction): Do not generate checks for
2182         correct HI/LO register usage.
2183
2184         * interp.c (old_engine_run): Delete checks for correct HI/LO
2185         register usage.
2186
2187         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2188         check_mf_cycles): New functions.
2189         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2190         do_divu, domultx, do_mult, do_multu): Use.
2191
2192         * tx.igen ("madd", "maddu"): Use.
2193
2194 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2195
2196         * mips.igen (DSRAV): Use function do_dsrav.
2197         (SRAV): Use new function do_srav.
2198
2199         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2200         (B): Sign extend 11 bit immediate.
2201         (EXT-B*): Shift 16 bit immediate left by 1.
2202         (ADDIU*): Don't sign extend immediate value.
2203
2204 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2205
2206         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2207
2208         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2209         functions.
2210
2211         * mips.igen (delayslot32, nullify_next_insn): New functions.
2212         (m16.igen): Always include.
2213         (do_*): Add more tracing.
2214
2215         * m16.igen (delayslot16): Add NIA argument, could be called by a
2216         32 bit MIPS16 instruction.
2217
2218         * interp.c (ifetch16): Move function from here.
2219         * sim-main.c (ifetch16): To here.
2220
2221         * sim-main.c (ifetch16, ifetch32): Update to match current
2222         implementations of LH, LW.
2223         (signal_exception): Don't print out incorrect hex value of illegal
2224         instruction.
2225
2226 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2227
2228         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2229         instruction.
2230
2231         * m16.igen: Implement MIPS16 instructions.
2232
2233         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2234         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2235         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2236         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2237         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2238         bodies of corresponding code from 32 bit insn to these.  Also used
2239         by MIPS16 versions of functions.
2240
2241         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2242         (IMEM16): Drop NR argument from macro.
2243
2244 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2245
2246         * Makefile.in (SIM_OBJS): Add sim-main.o.
2247
2248         * sim-main.h (address_translation, load_memory, store_memory,
2249         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2250         as INLINE_SIM_MAIN.
2251         (pr_addr, pr_uword64): Declare.
2252         (sim-main.c): Include when H_REVEALS_MODULE_P.
2253
2254         * interp.c (address_translation, load_memory, store_memory,
2255         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2256         from here.
2257         * sim-main.c: To here. Fix compilation problems.
2258
2259         * configure.in: Enable inlining.
2260         * configure: Re-config.
2261
2262 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2263
2264         * configure: Regenerated to track ../common/aclocal.m4 changes.
2265
2266 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2267
2268         * mips.igen: Include tx.igen.
2269         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2270         * tx.igen: New file, contains MADD and MADDU.
2271
2272         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2273         the hardwired constant `7'.
2274         (store_memory): Ditto.
2275         (LOADDRMASK): Move definition to sim-main.h.
2276
2277         mips.igen (MTC0): Enable for r3900.
2278         (ADDU): Add trace.
2279
2280         mips.igen (do_load_byte): Delete.
2281         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2282         do_store_right): New functions.
2283         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2284
2285         configure.in: Let the tx39 use igen again.
2286         configure: Update.
2287
2288 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2289
2290         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2291         not an address sized quantity.  Return zero for cache sizes.
2292
2293 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2294
2295         * mips.igen (r3900): r3900 does not support 64 bit integer
2296         operations.
2297
2298 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2299
2300         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2301         than igen one.
2302         * configure : Rebuild.
2303
2304 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2305
2306         * configure: Regenerated to track ../common/aclocal.m4 changes.
2307
2308 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2309
2310         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2311
2312 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2313
2314         * configure: Regenerated to track ../common/aclocal.m4 changes.
2315         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2316
2317 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2318
2319         * configure: Regenerated to track ../common/aclocal.m4 changes.
2320
2321 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2322
2323         * interp.c (Max, Min): Comment out functions. Not yet used.
2324
2325 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2326
2327         * configure: Regenerated to track ../common/aclocal.m4 changes.
2328
2329 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2330
2331         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2332         configurable settings for stand-alone simulator.
2333
2334         * configure.in: Added X11 search, just in case.
2335
2336         * configure: Regenerated.
2337
2338 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2339
2340         * interp.c (sim_write, sim_read, load_memory, store_memory):
2341         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2342
2343 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2344
2345         * sim-main.h (GETFCC): Return an unsigned value.
2346
2347 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2348
2349         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2350         (DADD): Result destination is RD not RT.
2351
2352 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2353
2354         * sim-main.h (HIACCESS, LOACCESS): Always define.
2355
2356         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2357
2358         * interp.c (sim_info): Delete.
2359
2360 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2361
2362         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2363         (mips_option_handler): New argument `cpu'.
2364         (sim_open): Update call to sim_add_option_table.
2365
2366 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2367
2368         * mips.igen (CxC1): Add tracing.
2369
2370 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2371
2372         * sim-main.h (Max, Min): Declare.
2373
2374         * interp.c (Max, Min): New functions.
2375
2376         * mips.igen (BC1): Add tracing.
2377
2378 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2379
2380         * interp.c Added memory map for stack in vr4100
2381
2382 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2383
2384         * interp.c (load_memory): Add missing "break"'s.
2385
2386 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2387
2388         * interp.c (sim_store_register, sim_fetch_register): Pass in
2389         length parameter.  Return -1.
2390
2391 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2392
2393         * interp.c: Added hardware init hook, fixed warnings.
2394
2395 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2396
2397         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2398
2399 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2400
2401         * interp.c (ifetch16): New function.
2402
2403         * sim-main.h (IMEM32): Rename IMEM.
2404         (IMEM16_IMMED): Define.
2405         (IMEM16): Define.
2406         (DELAY_SLOT): Update.
2407
2408         * m16run.c (sim_engine_run): New file.
2409
2410         * m16.igen: All instructions except LB.
2411         (LB): Call do_load_byte.
2412         * mips.igen (do_load_byte): New function.
2413         (LB): Call do_load_byte.
2414
2415         * mips.igen: Move spec for insn bit size and high bit from here.
2416         * Makefile.in (tmp-igen, tmp-m16): To here.
2417
2418         * m16.dc: New file, decode mips16 instructions.
2419
2420         * Makefile.in (SIM_NO_ALL): Define.
2421         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2422
2423 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2424
2425         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2426         point unit to 32 bit registers.
2427         * configure: Re-generate.
2428
2429 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2430
2431         * configure.in (sim_use_gen): Make IGEN the default simulator
2432         generator for generic 32 and 64 bit mips targets.
2433         * configure: Re-generate.
2434
2435 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2436
2437         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2438         bitsize.
2439
2440         * interp.c (sim_fetch_register, sim_store_register): Read/write
2441         FGR from correct location.
2442         (sim_open): Set size of FGR's according to
2443         WITH_TARGET_FLOATING_POINT_BITSIZE.
2444
2445         * sim-main.h (FGR): Store floating point registers in a separate
2446         array.
2447
2448 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2449
2450         * configure: Regenerated to track ../common/aclocal.m4 changes.
2451
2452 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2453
2454         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2455
2456         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2457
2458         * interp.c (pending_tick): New function.  Deliver pending writes.
2459
2460         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2461         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2462         it can handle mixed sized quantites and single bits.
2463
2464 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2465
2466         * interp.c (oengine.h): Do not include when building with IGEN.
2467         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2468         (sim_info): Ditto for PROCESSOR_64BIT.
2469         (sim_monitor): Replace ut_reg with unsigned_word.
2470         (*): Ditto for t_reg.
2471         (LOADDRMASK): Define.
2472         (sim_open): Remove defunct check that host FP is IEEE compliant,
2473         using software to emulate floating point.
2474         (value_fpr, ...): Always compile, was conditional on HASFPU.
2475
2476 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2477
2478         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2479         size.
2480
2481         * interp.c (SD, CPU): Define.
2482         (mips_option_handler): Set flags in each CPU.
2483         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2484         (sim_close): Do not clear STATE, deleted anyway.
2485         (sim_write, sim_read): Assume CPU zero's vm should be used for
2486         data transfers.
2487         (sim_create_inferior): Set the PC for all processors.
2488         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2489         argument.
2490         (mips16_entry): Pass correct nr of args to store_word, load_word.
2491         (ColdReset): Cold reset all cpu's.
2492         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2493         (sim_monitor, load_memory, store_memory, signal_exception): Use
2494         `CPU' instead of STATE_CPU.
2495
2496
2497         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2498         SD or CPU_.
2499
2500         * sim-main.h (signal_exception): Add sim_cpu arg.
2501         (SignalException*): Pass both SD and CPU to signal_exception.
2502         * interp.c (signal_exception): Update.
2503
2504         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2505         Ditto
2506         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2507         address_translation): Ditto
2508         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2509
2510 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2511
2512         * configure: Regenerated to track ../common/aclocal.m4 changes.
2513
2514 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2515
2516         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2517
2518         * mips.igen (model): Map processor names onto BFD name.
2519
2520         * sim-main.h (CPU_CIA): Delete.
2521         (SET_CIA, GET_CIA): Define
2522
2523 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2524
2525         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2526         regiser.
2527
2528         * configure.in (default_endian): Configure a big-endian simulator
2529         by default.
2530         * configure: Re-generate.
2531
2532 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2533
2534         * configure: Regenerated to track ../common/aclocal.m4 changes.
2535
2536 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2537
2538         * interp.c (sim_monitor): Handle Densan monitor outbyte
2539         and inbyte functions.
2540
2541 1997-12-29  Felix Lee  <flee@cygnus.com>
2542
2543         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2544
2545 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2546
2547         * Makefile.in (tmp-igen): Arrange for $zero to always be
2548         reset to zero after every instruction.
2549
2550 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2551
2552         * configure: Regenerated to track ../common/aclocal.m4 changes.
2553         * config.in: Ditto.
2554
2555 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2556
2557         * mips.igen (MSUB): Fix to work like MADD.
2558         * gencode.c (MSUB): Similarly.
2559
2560 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2561
2562         * configure: Regenerated to track ../common/aclocal.m4 changes.
2563
2564 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2565
2566         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2567
2568 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2569
2570         * sim-main.h (sim-fpu.h): Include.
2571
2572         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2573         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2574         using host independant sim_fpu module.
2575
2576 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2577
2578         * interp.c (signal_exception): Report internal errors with SIGABRT
2579         not SIGQUIT.
2580
2581         * sim-main.h (C0_CONFIG): New register.
2582         (signal.h): No longer include.
2583
2584         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2585
2586 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2587
2588         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2589
2590 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2591
2592         * mips.igen: Tag vr5000 instructions.
2593         (ANDI): Was missing mipsIV model, fix assembler syntax.
2594         (do_c_cond_fmt): New function.
2595         (C.cond.fmt): Handle mips I-III which do not support CC field
2596         separatly.
2597         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2598         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2599         in IV3.2 spec.
2600         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2601         vr5000 which saves LO in a GPR separatly.
2602
2603         * configure.in (enable-sim-igen): For vr5000, select vr5000
2604         specific instructions.
2605         * configure: Re-generate.
2606
2607 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2608
2609         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2610
2611         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2612         fmt_uninterpreted_64 bit cases to switch.  Convert to
2613         fmt_formatted,
2614
2615         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2616
2617         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2618         as specified in IV3.2 spec.
2619         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2620
2621 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2622
2623         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2624         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2625         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2626         PENDING_FILL versions of instructions.  Simplify.
2627         (X): New function.
2628         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2629         instructions.
2630         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2631         a signed value.
2632         (MTHI, MFHI): Disable code checking HI-LO.
2633
2634         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2635         global.
2636         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2637
2638 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2639
2640         * gencode.c (build_mips16_operands): Replace IPC with cia.
2641
2642         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2643         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2644         IPC to `cia'.
2645         (UndefinedResult): Replace function with macro/function
2646         combination.
2647         (sim_engine_run): Don't save PC in IPC.
2648
2649         * sim-main.h (IPC): Delete.
2650
2651
2652         * interp.c (signal_exception, store_word, load_word,
2653         address_translation, load_memory, store_memory, cache_op,
2654         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2655         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2656         current instruction address - cia - argument.
2657         (sim_read, sim_write): Call address_translation directly.
2658         (sim_engine_run): Rename variable vaddr to cia.
2659         (signal_exception): Pass cia to sim_monitor
2660
2661         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2662         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2663         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2664
2665         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2666         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2667         SIM_ASSERT.
2668
2669         * interp.c (signal_exception): Pass restart address to
2670         sim_engine_restart.
2671
2672         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2673         idecode.o): Add dependency.
2674
2675         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2676         Delete definitions
2677         (DELAY_SLOT): Update NIA not PC with branch address.
2678         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2679
2680         * mips.igen: Use CIA not PC in branch calculations.
2681         (illegal): Call SignalException.
2682         (BEQ, ADDIU): Fix assembler.
2683
2684 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2685
2686         * m16.igen (JALX): Was missing.
2687
2688         * configure.in (enable-sim-igen): New configuration option.
2689         * configure: Re-generate.
2690
2691         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2692
2693         * interp.c (load_memory, store_memory): Delete parameter RAW.
2694         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2695         bypassing {load,store}_memory.
2696
2697         * sim-main.h (ByteSwapMem): Delete definition.
2698
2699         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2700
2701         * interp.c (sim_do_command, sim_commands): Delete mips specific
2702         commands.  Handled by module sim-options.
2703
2704         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2705         (WITH_MODULO_MEMORY): Define.
2706
2707         * interp.c (sim_info): Delete code printing memory size.
2708
2709         * interp.c (mips_size): Nee sim_size, delete function.
2710         (power2): Delete.
2711         (monitor, monitor_base, monitor_size): Delete global variables.
2712         (sim_open, sim_close): Delete code creating monitor and other
2713         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2714         manage memory regions.
2715         (load_memory, store_memory): Use sim-core for memory model.
2716
2717         * interp.c (address_translation): Delete all memory map code
2718         except line forcing 32 bit addresses.
2719
2720 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2721
2722         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2723         trace options.
2724
2725         * interp.c (logfh, logfile): Delete globals.
2726         (sim_open, sim_close): Delete code opening & closing log file.
2727         (mips_option_handler): Delete -l and -n options.
2728         (OPTION mips_options): Ditto.
2729
2730         * interp.c (OPTION mips_options): Rename option trace to dinero.
2731         (mips_option_handler): Update.
2732
2733 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2734
2735         * interp.c (fetch_str): New function.
2736         (sim_monitor): Rewrite using sim_read & sim_write.
2737         (sim_open): Check magic number.
2738         (sim_open): Write monitor vectors into memory using sim_write.
2739         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2740         (sim_read, sim_write): Simplify - transfer data one byte at a
2741         time.
2742         (load_memory, store_memory): Clarify meaning of parameter RAW.
2743
2744         * sim-main.h (isHOST): Defete definition.
2745         (isTARGET): Mark as depreciated.
2746         (address_translation): Delete parameter HOST.
2747
2748         * interp.c (address_translation): Delete parameter HOST.
2749
2750 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2751
2752         * mips.igen:
2753
2754         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2755         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2756
2757 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2758
2759         * mips.igen: Add model filter field to records.
2760
2761 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2762
2763         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2764
2765         interp.c (sim_engine_run): Do not compile function sim_engine_run
2766         when WITH_IGEN == 1.
2767
2768         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2769         target architecture.
2770
2771         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2772         igen. Replace with configuration variables sim_igen_flags /
2773         sim_m16_flags.
2774
2775         * m16.igen: New file.  Copy mips16 insns here.
2776         * mips.igen: From here.
2777
2778 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2779
2780         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2781         to top.
2782         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2783
2784 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2785
2786         * gencode.c (build_instruction): Follow sim_write's lead in using
2787         BigEndianMem instead of !ByteSwapMem.
2788
2789 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2790
2791         * configure.in (sim_gen): Dependent on target, select type of
2792         generator.  Always select old style generator.
2793
2794         configure: Re-generate.
2795
2796         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2797         targets.
2798         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2799         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2800         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2801         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2802         SIM_@sim_gen@_*, set by autoconf.
2803
2804 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2805
2806         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2807
2808         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2809         CURRENT_FLOATING_POINT instead.
2810
2811         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2812         (address_translation): Raise exception InstructionFetch when
2813         translation fails and isINSTRUCTION.
2814
2815         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2816         sim_engine_run): Change type of of vaddr and paddr to
2817         address_word.
2818         (address_translation, prefetch, load_memory, store_memory,
2819         cache_op): Change type of vAddr and pAddr to address_word.
2820
2821         * gencode.c (build_instruction): Change type of vaddr and paddr to
2822         address_word.
2823
2824 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2825
2826         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2827         macro to obtain result of ALU op.
2828
2829 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2830
2831         * interp.c (sim_info): Call profile_print.
2832
2833 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2834
2835         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2836
2837         * sim-main.h (WITH_PROFILE): Do not define, defined in
2838         common/sim-config.h.  Use sim-profile module.
2839         (simPROFILE): Delete defintion.
2840
2841         * interp.c (PROFILE): Delete definition.
2842         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2843         (sim_close): Delete code writing profile histogram.
2844         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2845         Delete.
2846         (sim_engine_run): Delete code profiling the PC.
2847
2848 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2849
2850         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2851
2852         * interp.c (sim_monitor): Make register pointers of type
2853         unsigned_word*.
2854
2855         * sim-main.h: Make registers of type unsigned_word not
2856         signed_word.
2857
2858 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2859
2860         * interp.c (sync_operation): Rename from SyncOperation, make
2861         global, add SD argument.
2862         (prefetch): Rename from Prefetch, make global, add SD argument.
2863         (decode_coproc): Make global.
2864
2865         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2866
2867         * gencode.c (build_instruction): Generate DecodeCoproc not
2868         decode_coproc calls.
2869
2870         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2871         (SizeFGR): Move to sim-main.h
2872         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2873         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2874         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2875         sim-main.h.
2876         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2877         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2878         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2879         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2880         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2881         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2882
2883         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2884         exception.
2885         (sim-alu.h): Include.
2886         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2887         (sim_cia): Typedef to instruction_address.
2888
2889 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2890
2891         * Makefile.in (interp.o): Rename generated file engine.c to
2892         oengine.c.
2893
2894         * interp.c: Update.
2895
2896 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2897
2898         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2899
2900 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2901
2902         * gencode.c (build_instruction): For "FPSQRT", output correct
2903         number of arguments to Recip.
2904
2905 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2906
2907         * Makefile.in (interp.o): Depends on sim-main.h
2908
2909         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2910
2911         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2912         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2913         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2914         STATE, DSSTATE): Define
2915         (GPR, FGRIDX, ..): Define.
2916
2917         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2918         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2919         (GPR, FGRIDX, ...): Delete macros.
2920
2921         * interp.c: Update names to match defines from sim-main.h
2922
2923 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2924
2925         * interp.c (sim_monitor): Add SD argument.
2926         (sim_warning): Delete.  Replace calls with calls to
2927         sim_io_eprintf.
2928         (sim_error): Delete. Replace calls with sim_io_error.
2929         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2930         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2931         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2932         argument.
2933         (mips_size): Rename from sim_size. Add SD argument.
2934
2935         * interp.c (simulator): Delete global variable.
2936         (callback): Delete global variable.
2937         (mips_option_handler, sim_open, sim_write, sim_read,
2938         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2939         sim_size,sim_monitor): Use sim_io_* not callback->*.
2940         (sim_open): ZALLOC simulator struct.
2941         (PROFILE): Do not define.
2942
2943 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2944
2945         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2946         support.h with corresponding code.
2947
2948         * sim-main.h (word64, uword64), support.h: Move definition to
2949         sim-main.h.
2950         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2951
2952         * support.h: Delete
2953         * Makefile.in: Update dependencies
2954         * interp.c: Do not include.
2955
2956 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2957
2958         * interp.c (address_translation, load_memory, store_memory,
2959         cache_op): Rename to from AddressTranslation et.al., make global,
2960         add SD argument
2961
2962         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2963         CacheOp): Define.
2964
2965         * interp.c (SignalException): Rename to signal_exception, make
2966         global.
2967
2968         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2969
2970         * sim-main.h (SignalException, SignalExceptionInterrupt,
2971         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2972         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2973         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2974         Define.
2975
2976         * interp.c, support.h: Use.
2977
2978 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2979
2980         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2981         to value_fpr / store_fpr. Add SD argument.
2982         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2983         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2984
2985         * sim-main.h (ValueFPR, StoreFPR): Define.
2986
2987 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2988
2989         * interp.c (sim_engine_run): Check consistency between configure
2990         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2991         and HASFPU.
2992
2993         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2994         (mips_fpu): Configure WITH_FLOATING_POINT.
2995         (mips_endian): Configure WITH_TARGET_ENDIAN.
2996         * configure: Update.
2997
2998 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2999
3000         * configure: Regenerated to track ../common/aclocal.m4 changes.
3001
3002 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3003
3004         * configure: Regenerated.
3005
3006 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3007
3008         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3009
3010 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3011
3012         * gencode.c (print_igen_insn_models): Assume certain architectures
3013         include all mips* instructions.
3014         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3015         instruction.
3016
3017         * Makefile.in (tmp.igen): Add target. Generate igen input from
3018         gencode file.
3019
3020         * gencode.c (FEATURE_IGEN): Define.
3021         (main): Add --igen option.  Generate output in igen format.
3022         (process_instructions): Format output according to igen option.
3023         (print_igen_insn_format): New function.
3024         (print_igen_insn_models): New function.
3025         (process_instructions): Only issue warnings and ignore
3026         instructions when no FEATURE_IGEN.
3027
3028 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3029
3030         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3031         MIPS targets.
3032
3033 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3034
3035         * configure: Regenerated to track ../common/aclocal.m4 changes.
3036
3037 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3038
3039         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3040         SIM_RESERVED_BITS): Delete, moved to common.
3041         (SIM_EXTRA_CFLAGS): Update.
3042
3043 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3044
3045         * configure.in: Configure non-strict memory alignment.
3046         * configure: Regenerated to track ../common/aclocal.m4 changes.
3047
3048 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3049
3050         * configure: Regenerated to track ../common/aclocal.m4 changes.
3051
3052 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3053
3054         * gencode.c (SDBBP,DERET): Added (3900) insns.
3055         (RFE): Turn on for 3900.
3056         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3057         (dsstate): Made global.
3058         (SUBTARGET_R3900): Added.
3059         (CANCELDELAYSLOT): New.
3060         (SignalException): Ignore SystemCall rather than ignore and
3061         terminate.  Add DebugBreakPoint handling.
3062         (decode_coproc): New insns RFE, DERET; and new registers Debug
3063         and DEPC protected by SUBTARGET_R3900.
3064         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3065         bits explicitly.
3066         * Makefile.in,configure.in: Add mips subtarget option.
3067         * configure: Update.
3068
3069 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3070
3071         * gencode.c: Add r3900 (tx39).
3072
3073
3074 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3075
3076         * gencode.c (build_instruction): Don't need to subtract 4 for
3077         JALR, just 2.
3078
3079 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3080
3081         * interp.c: Correct some HASFPU problems.
3082
3083 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3084
3085         * configure: Regenerated to track ../common/aclocal.m4 changes.
3086
3087 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3088
3089         * interp.c (mips_options): Fix samples option short form, should
3090         be `x'.
3091
3092 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3093
3094         * interp.c (sim_info): Enable info code.  Was just returning.
3095
3096 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3097
3098         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3099         MFC0.
3100
3101 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3102
3103         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3104         constants.
3105         (build_instruction): Ditto for LL.
3106
3107 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3108
3109         * configure: Regenerated to track ../common/aclocal.m4 changes.
3110
3111 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3112
3113         * configure: Regenerated to track ../common/aclocal.m4 changes.
3114         * config.in: Ditto.
3115
3116 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3117
3118         * interp.c (sim_open): Add call to sim_analyze_program, update
3119         call to sim_config.
3120
3121 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3122
3123         * interp.c (sim_kill): Delete.
3124         (sim_create_inferior): Add ABFD argument. Set PC from same.
3125         (sim_load): Move code initializing trap handlers from here.
3126         (sim_open): To here.
3127         (sim_load): Delete, use sim-hload.c.
3128
3129         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3130
3131 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3132
3133         * configure: Regenerated to track ../common/aclocal.m4 changes.
3134         * config.in: Ditto.
3135
3136 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3137
3138         * interp.c (sim_open): Add ABFD argument.
3139         (sim_load): Move call to sim_config from here.
3140         (sim_open): To here.  Check return status.
3141
3142 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3143
3144         * gencode.c (build_instruction): Two arg MADD should
3145         not assign result to $0.
3146
3147 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3148
3149         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3150         * sim/mips/configure.in: Regenerate.
3151
3152 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3153
3154         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3155         signed8, unsigned8 et.al. types.
3156
3157         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3158         hosts when selecting subreg.
3159
3160 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3161
3162         * interp.c (sim_engine_run): Reset the ZERO register to zero
3163         regardless of FEATURE_WARN_ZERO.
3164         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3165
3166 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3167
3168         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3169         (SignalException): For BreakPoints ignore any mode bits and just
3170         save the PC.
3171         (SignalException): Always set the CAUSE register.
3172
3173 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3174
3175         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3176         exception has been taken.
3177
3178         * interp.c: Implement the ERET and mt/f sr instructions.
3179
3180 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3181
3182         * interp.c (SignalException): Don't bother restarting an
3183         interrupt.
3184
3185 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3186
3187         * interp.c (SignalException): Really take an interrupt.
3188         (interrupt_event): Only deliver interrupts when enabled.
3189
3190 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3191
3192         * interp.c (sim_info): Only print info when verbose.
3193         (sim_info) Use sim_io_printf for output.
3194
3195 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3196
3197         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3198         mips architectures.
3199
3200 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3201
3202         * interp.c (sim_do_command): Check for common commands if a
3203         simulator specific command fails.
3204
3205 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3206
3207         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3208         and simBE when DEBUG is defined.
3209
3210 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3211
3212         * interp.c (interrupt_event): New function.  Pass exception event
3213         onto exception handler.
3214
3215         * configure.in: Check for stdlib.h.
3216         * configure: Regenerate.
3217
3218         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3219         variable declaration.
3220         (build_instruction): Initialize memval1.
3221         (build_instruction): Add UNUSED attribute to byte, bigend,
3222         reverse.
3223         (build_operands): Ditto.
3224
3225         * interp.c: Fix GCC warnings.
3226         (sim_get_quit_code): Delete.
3227
3228         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3229         * Makefile.in: Ditto.
3230         * configure: Re-generate.
3231
3232         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3233
3234 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3235
3236         * interp.c (mips_option_handler): New function parse argumes using
3237         sim-options.
3238         (myname): Replace with STATE_MY_NAME.
3239         (sim_open): Delete check for host endianness - performed by
3240         sim_config.
3241         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3242         (sim_open): Move much of the initialization from here.
3243         (sim_load): To here.  After the image has been loaded and
3244         endianness set.
3245         (sim_open): Move ColdReset from here.
3246         (sim_create_inferior): To here.
3247         (sim_open): Make FP check less dependant on host endianness.
3248
3249         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3250         run.
3251         * interp.c (sim_set_callbacks): Delete.
3252
3253         * interp.c (membank, membank_base, membank_size): Replace with
3254         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3255         (sim_open): Remove call to callback->init. gdb/run do this.
3256
3257         * interp.c: Update
3258
3259         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3260
3261         * interp.c (big_endian_p): Delete, replaced by
3262         current_target_byte_order.
3263
3264 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3265
3266         * interp.c (host_read_long, host_read_word, host_swap_word,
3267         host_swap_long): Delete. Using common sim-endian.
3268         (sim_fetch_register, sim_store_register): Use H2T.
3269         (pipeline_ticks): Delete.  Handled by sim-events.
3270         (sim_info): Update.
3271         (sim_engine_run): Update.
3272
3273 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3274
3275         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3276         reason from here.
3277         (SignalException): To here. Signal using sim_engine_halt.
3278         (sim_stop_reason): Delete, moved to common.
3279
3280 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3281
3282         * interp.c (sim_open): Add callback argument.
3283         (sim_set_callbacks): Delete SIM_DESC argument.
3284         (sim_size): Ditto.
3285
3286 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3287
3288         * Makefile.in (SIM_OBJS): Add common modules.
3289
3290         * interp.c (sim_set_callbacks): Also set SD callback.
3291         (set_endianness, xfer_*, swap_*): Delete.
3292         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3293         Change to functions using sim-endian macros.
3294         (control_c, sim_stop): Delete, use common version.
3295         (simulate): Convert into.
3296         (sim_engine_run): This function.
3297         (sim_resume): Delete.
3298
3299         * interp.c (simulation): New variable - the simulator object.
3300         (sim_kind): Delete global - merged into simulation.
3301         (sim_load): Cleanup.  Move PC assignment from here.
3302         (sim_create_inferior): To here.
3303
3304         * sim-main.h: New file.
3305         * interp.c (sim-main.h): Include.
3306
3307 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3308
3309         * configure: Regenerated to track ../common/aclocal.m4 changes.
3310
3311 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3312
3313         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3314
3315 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3316
3317         * gencode.c (build_instruction): DIV instructions: check
3318         for division by zero and integer overflow before using
3319         host's division operation.
3320
3321 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3322
3323         * Makefile.in (SIM_OBJS): Add sim-load.o.
3324         * interp.c: #include bfd.h.
3325         (target_byte_order): Delete.
3326         (sim_kind, myname, big_endian_p): New static locals.
3327         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3328         after argument parsing.  Recognize -E arg, set endianness accordingly.
3329         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3330         load file into simulator.  Set PC from bfd.
3331         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3332         (set_endianness): Use big_endian_p instead of target_byte_order.
3333
3334 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3335
3336         * interp.c (sim_size): Delete prototype - conflicts with
3337         definition in remote-sim.h.  Correct definition.
3338
3339 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3340
3341         * configure: Regenerated to track ../common/aclocal.m4 changes.
3342         * config.in: Ditto.
3343
3344 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3345
3346         * interp.c (sim_open): New arg `kind'.
3347
3348         * configure: Regenerated to track ../common/aclocal.m4 changes.
3349
3350 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3351
3352         * configure: Regenerated to track ../common/aclocal.m4 changes.
3353
3354 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3355
3356         * interp.c (sim_open): Set optind to 0 before calling getopt.
3357
3358 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3359
3360         * configure: Regenerated to track ../common/aclocal.m4 changes.
3361
3362 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3363
3364         * interp.c : Replace uses of pr_addr with pr_uword64
3365         where the bit length is always 64 independent of SIM_ADDR.
3366         (pr_uword64) : added.
3367
3368 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3369
3370         * configure: Re-generate.
3371
3372 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3373
3374         * configure: Regenerate to track ../common/aclocal.m4 changes.
3375
3376 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3377
3378         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3379         in argv form.
3380         (other sim_*): New SIM_DESC argument.
3381
3382 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3383
3384         * interp.c: Fix printing of addresses for non-64-bit targets.
3385         (pr_addr): Add function to print address based on size.
3386
3387 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3388
3389         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3390
3391 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3392
3393         * gencode.c (build_mips16_operands): Correct computation of base
3394         address for extended PC relative instruction.
3395
3396 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3397
3398         * interp.c (mips16_entry): Add support for floating point cases.
3399         (SignalException): Pass floating point cases to mips16_entry.
3400         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3401         registers.
3402         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3403         or fmt_word.
3404         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3405         and then set the state to fmt_uninterpreted.
3406         (COP_SW): Temporarily set the state to fmt_word while calling
3407         ValueFPR.
3408
3409 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3410
3411         * gencode.c (build_instruction): The high order may be set in the
3412         comparison flags at any ISA level, not just ISA 4.
3413
3414 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3415
3416         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3417         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3418         * configure.in: sinclude ../common/aclocal.m4.
3419         * configure: Regenerated.
3420
3421 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3422
3423         * configure: Rebuild after change to aclocal.m4.
3424
3425 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3426
3427         * configure configure.in Makefile.in:  Update to new configure
3428         scheme which is more compatible with WinGDB builds.
3429         * configure.in:  Improve comment on how to run autoconf.
3430         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3431         * Makefile.in:  Use autoconf substitution to install common
3432         makefile fragment.
3433
3434 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3435
3436         * gencode.c (build_instruction): Use BigEndianCPU instead of
3437         ByteSwapMem.
3438
3439 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3440
3441         * interp.c (sim_monitor): Make output to stdout visible in
3442         wingdb's I/O log window.
3443
3444 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3445
3446         * support.h: Undo previous change to SIGTRAP
3447         and SIGQUIT values.
3448
3449 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3450
3451         * interp.c (store_word, load_word): New static functions.
3452         (mips16_entry): New static function.
3453         (SignalException): Look for mips16 entry and exit instructions.
3454         (simulate): Use the correct index when setting fpr_state after
3455         doing a pending move.
3456
3457 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3458
3459         * interp.c: Fix byte-swapping code throughout to work on
3460         both little- and big-endian hosts.
3461
3462 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3463
3464         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3465         with gdb/config/i386/xm-windows.h.
3466
3467 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3468
3469         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3470         that messes up arithmetic shifts.
3471
3472 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3473
3474         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3475         SIGTRAP and SIGQUIT for _WIN32.
3476
3477 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3478
3479         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3480         force a 64 bit multiplication.
3481         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3482         destination register is 0, since that is the default mips16 nop
3483         instruction.
3484
3485 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3486
3487         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3488         (build_endian_shift): Don't check proc64.
3489         (build_instruction): Always set memval to uword64.  Cast op2 to
3490         uword64 when shifting it left in memory instructions.  Always use
3491         the same code for stores--don't special case proc64.
3492
3493         * gencode.c (build_mips16_operands): Fix base PC value for PC
3494         relative operands.
3495         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3496         jal instruction.
3497         * interp.c (simJALDELAYSLOT): Define.
3498         (JALDELAYSLOT): Define.
3499         (INDELAYSLOT, INJALDELAYSLOT): Define.
3500         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3501
3502 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3503
3504         * interp.c (sim_open): add flush_cache as a PMON routine
3505         (sim_monitor): handle flush_cache by ignoring it
3506
3507 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3508
3509         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3510         BigEndianMem.
3511         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3512         (BigEndianMem): Rename to ByteSwapMem and change sense.
3513         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3514         BigEndianMem references to !ByteSwapMem.
3515         (set_endianness): New function, with prototype.
3516         (sim_open): Call set_endianness.
3517         (sim_info): Use simBE instead of BigEndianMem.
3518         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3519         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3520         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3521         ifdefs, keeping the prototype declaration.
3522         (swap_word): Rewrite correctly.
3523         (ColdReset): Delete references to CONFIG.  Delete endianness related
3524         code; moved to set_endianness.
3525
3526 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3527
3528         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3529         * interp.c (CHECKHILO): Define away.
3530         (simSIGINT): New macro.
3531         (membank_size): Increase from 1MB to 2MB.
3532         (control_c): New function.
3533         (sim_resume): Rename parameter signal to signal_number.  Add local
3534         variable prev.  Call signal before and after simulate.
3535         (sim_stop_reason): Add simSIGINT support.
3536         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3537         functions always.
3538         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3539         if logfh is NULL.
3540         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3541         a call to sim_warning.
3542
3543 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3544
3545         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3546         16 bit instructions.
3547
3548 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3549
3550         Add support for mips16 (16 bit MIPS implementation):
3551         * gencode.c (inst_type): Add mips16 instruction encoding types.
3552         (GETDATASIZEINSN): Define.
3553         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3554         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3555         mtlo.
3556         (MIPS16_DECODE): New table, for mips16 instructions.
3557         (bitmap_val): New static function.
3558         (struct mips16_op): Define.
3559         (mips16_op_table): New table, for mips16 operands.
3560         (build_mips16_operands): New static function.
3561         (process_instructions): If PC is odd, decode a mips16
3562         instruction.  Break out instruction handling into new
3563         build_instruction function.
3564         (build_instruction): New static function, broken out of
3565         process_instructions.  Check modifiers rather than flags for SHIFT
3566         bit count and m[ft]{hi,lo} direction.
3567         (usage): Pass program name to fprintf.
3568         (main): Remove unused variable this_option_optind.  Change
3569         ``*loptarg++'' to ``loptarg++''.
3570         (my_strtoul): Parenthesize && within ||.
3571         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3572         (simulate): If PC is odd, fetch a 16 bit instruction, and
3573         increment PC by 2 rather than 4.
3574         * configure.in: Add case for mips16*-*-*.
3575         * configure: Rebuild.
3576
3577 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3578
3579         * interp.c: Allow -t to enable tracing in standalone simulator.
3580         Fix garbage output in trace file and error messages.
3581
3582 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3583
3584         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3585         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3586         * configure.in: Simplify using macros in ../common/aclocal.m4.
3587         * configure: Regenerated.
3588         * tconfig.in: New file.
3589
3590 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3591
3592         * interp.c: Fix bugs in 64-bit port.
3593         Use ansi function declarations for msvc compiler.
3594         Initialize and test file pointer in trace code.
3595         Prevent duplicate definition of LAST_EMED_REGNUM.
3596
3597 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3598
3599         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3600
3601 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3602
3603         * interp.c (SignalException): Check for explicit terminating
3604         breakpoint value.
3605         * gencode.c: Pass instruction value through SignalException()
3606         calls for Trap, Breakpoint and Syscall.
3607
3608 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3609
3610         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3611         only used on those hosts that provide it.
3612         * configure.in: Add sqrt() to list of functions to be checked for.
3613         * config.in: Re-generated.
3614         * configure: Re-generated.
3615
3616 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3617
3618         * gencode.c (process_instructions): Call build_endian_shift when
3619         expanding STORE RIGHT, to fix swr.
3620         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3621         clear the high bits.
3622         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3623         Fix float to int conversions to produce signed values.
3624
3625 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3626
3627         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3628         (process_instructions): Correct handling of nor instruction.
3629         Correct shift count for 32 bit shift instructions. Correct sign
3630         extension for arithmetic shifts to not shift the number of bits in
3631         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3632         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3633         Fix madd.
3634         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3635         It's OK to have a mult follow a mult.  What's not OK is to have a
3636         mult follow an mfhi.
3637         (Convert): Comment out incorrect rounding code.
3638
3639 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3640
3641         * interp.c (sim_monitor): Improved monitor printf
3642         simulation. Tidied up simulator warnings, and added "--log" option
3643         for directing warning message output.
3644         * gencode.c: Use sim_warning() rather than WARNING macro.
3645
3646 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3647
3648         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3649         getopt1.o, rather than on gencode.c.  Link objects together.
3650         Don't link against -liberty.
3651         (gencode.o, getopt.o, getopt1.o): New targets.
3652         * gencode.c: Include <ctype.h> and "ansidecl.h".
3653         (AND): Undefine after including "ansidecl.h".
3654         (ULONG_MAX): Define if not defined.
3655         (OP_*): Don't define macros; now defined in opcode/mips.h.
3656         (main): Call my_strtoul rather than strtoul.
3657         (my_strtoul): New static function.
3658
3659 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3660
3661         * gencode.c (process_instructions):  Generate word64 and uword64
3662         instead of `long long' and `unsigned long long' data types.
3663         * interp.c:  #include sysdep.h to get signals, and define default
3664         for SIGBUS.
3665         * (Convert):  Work around for Visual-C++ compiler bug with type
3666         conversion.
3667         * support.h:  Make things compile under Visual-C++ by using
3668         __int64 instead of `long long'.  Change many refs to long long
3669         into word64/uword64 typedefs.
3670
3671 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3672
3673         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3674         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3675         (docdir): Removed.
3676         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3677         (AC_PROG_INSTALL): Added.
3678         (AC_PROG_CC): Moved to before configure.host call.
3679         * configure: Rebuilt.
3680
3681 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3682
3683         * configure.in: Define @SIMCONF@ depending on mips target.
3684         * configure: Rebuild.
3685         * Makefile.in (run): Add @SIMCONF@ to control simulator
3686         construction.
3687         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3688         * interp.c: Remove some debugging, provide more detailed error
3689         messages, update memory accesses to use LOADDRMASK.
3690
3691 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3692
3693         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3694         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3695         stamp-h.
3696         * configure: Rebuild.
3697         * config.in: New file, generated by autoheader.
3698         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3699         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3700         HAVE_ANINT and HAVE_AINT, as appropriate.
3701         * Makefile.in (run): Use @LIBS@ rather than -lm.
3702         (interp.o): Depend upon config.h.
3703         (Makefile): Just rebuild Makefile.
3704         (clean): Remove stamp-h.
3705         (mostlyclean): Make the same as clean, not as distclean.
3706         (config.h, stamp-h): New targets.
3707
3708 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3709
3710         * interp.c (ColdReset): Fix boolean test. Make all simulator
3711         globals static.
3712
3713 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3714
3715         * interp.c (xfer_direct_word, xfer_direct_long,
3716         swap_direct_word, swap_direct_long, xfer_big_word,
3717         xfer_big_long, xfer_little_word, xfer_little_long,
3718         swap_word,swap_long): Added.
3719         * interp.c (ColdReset): Provide function indirection to
3720         host<->simulated_target transfer routines.
3721         * interp.c (sim_store_register, sim_fetch_register): Updated to
3722         make use of indirected transfer routines.
3723
3724 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3725
3726         * gencode.c (process_instructions): Ensure FP ABS instruction
3727         recognised.
3728         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3729         system call support.
3730
3731 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3732
3733         * interp.c (sim_do_command): Complain if callback structure not
3734         initialised.
3735
3736 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3737
3738         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3739         support for Sun hosts.
3740         * Makefile.in (gencode): Ensure the host compiler and libraries
3741         used for cross-hosted build.
3742
3743 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3744
3745         * interp.c, gencode.c: Some more (TODO) tidying.
3746
3747 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3748
3749         * gencode.c, interp.c: Replaced explicit long long references with
3750         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3751         * support.h (SET64LO, SET64HI): Macros added.
3752
3753 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3754
3755         * configure: Regenerate with autoconf 2.7.
3756
3757 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3758
3759         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3760         * support.h: Remove superfluous "1" from #if.
3761         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3762
3763 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3764
3765         * interp.c (StoreFPR): Control UndefinedResult() call on
3766         WARN_RESULT manifest.
3767
3768 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3769
3770         * gencode.c: Tidied instruction decoding, and added FP instruction
3771         support.
3772
3773         * interp.c: Added dineroIII, and BSD profiling support. Also
3774         run-time FP handling.
3775
3776 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3777
3778         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3779         gencode.c, interp.c, support.h: created.