sim/mips/ChangeLog

   1 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * Makefile.in (../igen/igen): Delete rule.
   4         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
   5
   6 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
   7
   8         * aclocal.m4, configure: Regenerate.
   9
  10 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
  11
  12         * configure: Regenerate.
  13
  14 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
  15
  16         * Makefile.in (SIM_EXTRA_ALL): Delete.
  17         (all): New target.
  18
  19 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
  20
  21         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
  22         * aclocal.m4, configure: Regenerate.
  23
  24 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
  27         * aclocal.m4, configure: Regenerate.
  28
  29 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  30
  31         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
  32
  33 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  34
  35         * configure: Regenerate.
  36
  37 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  38
  39         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  40
  41 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  42
  43         * config.in, configure: Regenerate.
  44         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  45         and strings.h include.
  46
  47 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  48
  49         * configure: Regenerate.
  50
  51 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  52
  53         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  54         * configure: Regenerate.
  55
  56 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  57
  58         * configure: Regenerate.
  59
  60 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
  61
  62         * configure: Regenerate.
  63
  64 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  65
  66         *  sim-main.c: Include <stdlib.h>.
  67
  68 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  69
  70         * cp1.c: Include <stdlib.h>.
  71
  72 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
  73
  74         * configure: Re-generate.
  75
  76 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
  77
  78         * configure: Regenerate.
  79
  80 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  81
  82         PR sim/20808
  83         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
  84         and SD to sd.
  85
  86 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  87
  88         PR sim/20809
  89         * mips.igen (check_u64): Enable for `r3900'.
  90
  91 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
  92
  93         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
  94         STATE_PROG_BFD (sd).
  95         * configure: Regenerate.
  96
  97 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
  98             Maciej W. Rozycki  <macro@imgtec.com>
  99
 100         PR sim/19441
 101         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 102         `micromips64' and `micromipsdsp' only.
 103         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 104         (do_micromips_jalr, do_micromips_jal): Likewise.
 105         (compute_movep_src_reg): Likewise.
 106         (compute_andi16_imm): Likewise.
 107         (convert_fmt_micromips): Likewise.
 108         (convert_fmt_micromips_cvt_d): Likewise.
 109         (convert_fmt_micromips_cvt_s): Likewise.
 110         (FMT_MICROMIPS): Likewise.
 111         (FMT_MICROMIPS_CVT_D): Likewise.
 112         (FMT_MICROMIPS_CVT_S): Likewise.
 113
 114 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 115
 116         * interp.c: Include elf-bfd.h.
 117         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 118         ELFCLASS32.
 119
 120 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 121
 122         * config.in, configure: Regenerate.
 123
 124 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 125
 126         * configure: Regenerate.
 127
 128 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 129
 130         * configure: Regenerate.
 131
 132 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 133
 134         * configure: Regenerate.
 135
 136 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 137
 138         * configure: Regenerate.
 139
 140 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 141
 142         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 143         * configure: Regenerate.
 144
 145 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 146
 147         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 148         * configure: Regenerate.
 149
 150 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 151
 152         * configure: Regenerate.
 153
 154 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * configure: Regenerate.
 157
 158 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 159
 160         * config.in, configure: Regenerate.
 161
 162 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 163
 164         * interp.c (sim_open): Mark argv const.
 165         (sim_create_inferior): Mark argv and env const.
 166
 167 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 168
 169         * configure: Regenerate.
 170
 171 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 172
 173         * interp.c (sim_open): Update sim_parse_args comment.
 174
 175 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 176
 177         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 178         * configure: Regenerate.
 179
 180 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 181
 182         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 183         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 184         * configure: Regenerate.
 185         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 186
 187 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 188
 189         * dv-tx3904cpu.c (CPU, SD): Delete.
 190
 191 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 192
 193         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 194         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 195         (sim_store_register): Rename to ...
 196         (mips_reg_store): ... this.  Delete local cpu var.
 197         Update sim_io_eprintf calls.
 198         (sim_fetch_register): Rename to ...
 199         (mips_reg_fetch): ... this.  Delete local cpu var.
 200         Update sim_io_eprintf calls.
 201
 202 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 203
 204         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 205
 206 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 207
 208         * config.in, configure: Regenerate.
 209
 210 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 211
 212         * interp.c (sim_write, sim_read): Delete.
 213         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 214         (load_word): Likewise.
 215         * micromips.igen (cache): Likewise.
 216         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 217         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 218         do_store_left, do_store_right, do_load_double, do_store_double):
 219         Likewise.
 220         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 221         (do_prefx): Likewise.
 222         * sim-main.c (address_translation, prefetch): Delete.
 223         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 224         paddr=vaddr.
 225         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 226         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 227         (LoadMemory, StoreMemory): Delete CCA arg.
 228
 229 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 230
 231         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 232         * configure: Regenerated.
 233
 234 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 235
 236         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 237         * tconfig.h: Delete.
 238
 239 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 240
 241         * tconfig.h (SIM_HANDLES_LMA): Delete.
 242
 243 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 244
 245         * sim-main.h (WITH_WATCHPOINTS): Delete.
 246
 247 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 248
 249         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 250
 251 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 252
 253         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 254
 255 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 256
 257         * micromips.igen (process_isa_mode): Fix left shift of negative
 258         value.
 259
 260 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 261
 262         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 263
 264 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 265
 266         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 267
 268 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 269
 270         * interp.c (sim_close): Rename to ...
 271         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 272         sim_io_shutdown.
 273         * sim-main.h (mips_sim_close): Declare.
 274         (SIM_CLOSE_HOOK): Define.
 275
 276 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 277             Ali Lown  <ali.lown@imgtec.com>
 278
 279         * Makefile.in (tmp-micromips): New rule.
 280         (tmp-mach-multi): Add support for micromips.
 281         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 282         that works for both mips64 and micromips64.
 283         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 284         micromips32.
 285         Add build support for micromips.
 286         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 287         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 288         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 289         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 290         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 291         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 292         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 293         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 294         Refactored instruction code to use these functions.
 295         * dsp2.igen: Refactored instruction code to use the new functions.
 296         * interp.c (decode_coproc): Refactored to work with any instruction
 297         encoding.
 298         (isa_mode): New variable
 299         (RSVD_INSTRUCTION): Changed to 0x00000039.
 300         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 301         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 302         * micromips.dc: New file.
 303         * micromips.igen: New file.
 304         * micromips16.dc: New file.
 305         * micromipsdsp.igen: New file.
 306         * micromipsrun.c: New file.
 307         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 308         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 309         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 310         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 311         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 312         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 313         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 314         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 315         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 316         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 317         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 318         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 319         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 320         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 321         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 322         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 323         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 324         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 325         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 326         instructions.
 327         Refactored instruction code to use these functions.
 328         (RSVD): Changed to use new reserved instruction.
 329         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 330         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 331         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 332         do_store_double):  Added micromips32 and micromips64 models.
 333         Added include for micromips.igen and micromipsdsp.igen
 334         Add micromips32 and micromips64 models.
 335         (DecodeCoproc): Updated to use new macro definition.
 336         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 337         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 338         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 339         Refactored instruction code to use these functions.
 340         * sim-main.h (CP0_operation): New enum.
 341         (DecodeCoproc): Updated macro.
 342         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 343         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 344         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 345         ISA_MODE_MICROMIPS): New defines.
 346         (sim_state): Add isa_mode field.
 347
 348 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 349
 350         * configure: Regenerate.
 351
 352 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 353
 354         * configure.ac: Change configure.in to configure.ac.
 355         * configure: Regenerate.
 356
 357 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 358
 359         * configure: Regenerate.
 360
 361 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 362
 363         * interp.c [TRACE]: Delete.
 364         (TRACE): Change to WITH_TRACE_ANY_P.
 365         [!WITH_TRACE_ANY_P] (open_trace): Define.
 366         (mips_option_handler, open_trace, sim_close, dotrace):
 367         Change defined(TRACE) to WITH_TRACE_ANY_P.
 368         (sim_open): Delete TRACE ifdef check.
 369         * sim-main.c (load_memory): Delete TRACE ifdef check.
 370         (store_memory): Likewise.
 371         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 372         [!WITH_TRACE_ANY_P] (dotrace): Define.
 373
 374 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 375
 376         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 377         comments.
 378
 379 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 380
 381         * sim-main.h (SIM_CPU): Delete.
 382
 383 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 384
 385         * sim-main.h (sim_cia): Delete.
 386
 387 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 388
 389         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 390         PU_PC_GET.
 391         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 392         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 393         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 394         CIA_SET to CPU_PC_SET.
 395         * sim-main.h (CIA_GET, CIA_SET): Delete.
 396
 397 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 398
 399         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 400         * sim-main.h (STATE_CPU): Delete.
 401
 402 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 403
 404         * configure: Regenerate.
 405
 406 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 407
 408         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 409         * interp.c (mips_pc_get, mips_pc_set): New functions.
 410         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 411         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 412         (sim_pc_get): Delete.
 413         * sim-main.h (SIM_CPU): Define.
 414         (struct sim_state): Change cpu to an array of pointers.
 415         (STATE_CPU): Drop &.
 416
 417 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 418
 419         * interp.c (mips_option_handler, open_trace, sim_close,
 420         sim_write, sim_read, sim_store_register, sim_fetch_register,
 421         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 422         prototypes.
 423         (sim_open): Convert old style prototype.  Change casts with
 424         sim_write to unsigned char *.
 425         (fetch_str): Change null to unsigned char, and change cast to
 426         unsigned char *.
 427         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 428         unsigned char *.
 429
 430 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 431
 432         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 433
 434 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 435
 436         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 437
 438 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 439
 440         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 441
 442 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 443
 444         * config.in, configure: Regenerate.
 445
 446 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 447
 448         * interp.c (sim_pc_get): New function.
 449
 450 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 451
 452         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 453         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 454
 455 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 456
 457         * configure: Regenerate.
 458
 459 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 460
 461         * configure: Regenerate.
 462
 463 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 464
 465         * configure: Regenerate.
 466         * configure.ac (mips_extra_objs): Delete.
 467         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 468         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 469
 470 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 471
 472         * configure: Regenerate.
 473         * configure.ac: Delete sim_hw checks for dv-sockser.
 474
 475 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 476
 477         * config.in, configure: Regenerate.
 478         * tconfig.in: Rename file ...
 479         * tconfig.h: ... here.
 480
 481 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 482
 483         * tconfig.in: Delete includes.
 484         [HAVE_DV_SOCKSER]: Delete.
 485
 486 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 487
 488         * Makefile.in (SIM_RUN_OBJS): Delete.
 489
 490 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 491
 492         * configure.ac (AC_CHECK_HEADERS): Delete.
 493         * aclocal.m4, configure: Regenerate.
 494
 495 2014-08-19  Alan Modra  <amodra@gmail.com>
 496
 497         * configure: Regenerate.
 498
 499 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 500
 501         * configure: Regenerate.
 502         * config.in: Regenerate.
 503
 504 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 505
 506         * configure: Regenerate.
 507
 508 2013-09-23  Alan Modra  <amodra@gmail.com>
 509
 510         * configure: Regenerate.
 511
 512 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 513
 514         * aclocal.m4, configure: Regenerate.
 515
 516 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 517
 518         * configure: Rebuild.
 519
 520 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 521
 522         * configure: Regenerate.
 523
 524 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 525
 526         * configure.ac: Address use of dv-sockser.o.
 527         * tconfig.in: Conditionalize use of dv_sockser_install.
 528         * configure: Regenerated.
 529         * config.in: Regenerated.
 530
 531 2012-10-04  Chao-ying Fu  <fu@mips.com>
 532             Steve Ellcey  <sellcey@mips.com>
 533
 534         * mips/mips3264r2.igen (rdhwr): New.
 535
 536 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 537
 538         * configure.ac: Always link against dv-sockser.o.
 539         * configure: Regenerate.
 540
 541 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 542
 543         * config.in, configure: Regenerate.
 544
 545 2012-05-18  Nick Clifton  <nickc@redhat.com>
 546
 547         PR 14072
 548         * interp.c: Include config.h before system header files.
 549
 550 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 551
 552         * aclocal.m4, config.in, configure: Regenerate.
 553
 554 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 555
 556         * aclocal.m4: New file.
 557         * configure: Regenerate.
 558
 559 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 560
 561         * configure: Regenerate after common/acinclude.m4 update.
 562
 563 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 564
 565         * configure.ac: Change include to common/acinclude.m4.
 566
 567 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 568
 569         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 570         call.  Replace common.m4 include with SIM_AC_COMMON.
 571         * configure: Regenerate.
 572
 573 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 574
 575         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 576         $(SIM_EXTRA_DEPS).
 577         (tmp-mach-multi): Exit early when igen fails.
 578
 579 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 580
 581         * interp.c (sim_do_command): Delete.
 582
 583 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 584
 585         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 586         (tx3904sio_fifo_reset): Likewise.
 587         * interp.c (sim_monitor): Likewise.
 588
 589 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 590
 591         * interp.c (sim_write): Add const to buffer arg.
 592
 593 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 594
 595         * interp.c: Don't include sysdep.h
 596
 597 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 598
 599         * configure: Regenerate.
 600
 601 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 602
 603         * config.in: Regenerate.
 604         * configure: Likewise.
 605
 606         * configure: Regenerate.
 607
 608 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 609
 610         * configure: Regenerate to track ../common/common.m4 changes.
 611         * config.in: Ditto.
 612
 613 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 614             Daniel Jacobowitz  <dan@codesourcery.com>
 615             Joseph Myers  <joseph@codesourcery.com>
 616
 617         * configure: Regenerate.
 618
 619 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 620
 621         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 622         that unconditionally allows fmt_ps.
 623         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 624         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 625         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 626         filter from 64,f to 32,f.
 627         (PREFX): Change filter from 64 to 32.
 628         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 629         that use do_load_double instead of do_load.  Make both LUXC1
 630         versions unpredictable if SizeFGR () != 64.
 631         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 632         instead of do_store.  Remove unused variable.  Make both SUXC1
 633         versions unpredictable if SizeFGR () != 64.
 634
 635 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 636
 637         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 638         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 639         shifts for that case.
 640
 641 2007-09-04  Nick Clifton  <nickc@redhat.com>
 642
 643         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 644         (display_mem_info): New static variable.
 645         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 646         (mips_options): Add info-memory and memory-info.
 647         (sim_open): After processing the command line and board
 648         specification, check display_mem_info.  If it is set then
 649         call the real handler for the --memory-info command line
 650         switch.
 651
 652 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 653
 654         * configure.ac: Change license of multi-run.c to GPL version 3.
 655         * configure: Regenerate.
 656
 657 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 658
 659         * configure.ac, configure: Revert last patch.
 660
 661 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 662
 663         * configure.ac (sim_mipsisa3264_configs): New variable.
 664         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 665         every configuration support all four targets, using the triplet to
 666         determine the default.
 667         * configure: Regenerate.
 668
 669 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 670
 671         * Makefile.in (m16run.o): New rule.
 672
 673 2007-05-15  Thiemo Seufer  <ths@mips.com>
 674
 675         * mips3264r2.igen (DSHD): Fix compile warning.
 676
 677 2007-05-14  Thiemo Seufer  <ths@mips.com>
 678
 679         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 680         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 681         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 682         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 683         for mips32r2.
 684
 685 2007-03-01  Thiemo Seufer  <ths@mips.com>
 686
 687         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 688         and mips64.
 689
 690 2007-02-20  Thiemo Seufer  <ths@mips.com>
 691
 692         * dsp.igen: Update copyright notice.
 693         * dsp2.igen: Fix copyright notice.
 694
 695 2007-02-20  Thiemo Seufer  <ths@mips.com>
 696             Chao-Ying Fu  <fu@mips.com>
 697
 698         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 699         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 700         Add dsp2 to sim_igen_machine.
 701         * configure: Regenerate.
 702         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 703         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 704         (mulq_rs.ph): Use do_ph_mulq.
 705         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 706         * mips.igen: Add dsp2 model and include dsp2.igen.
 707         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 708         for *mips32r2, *mips64r2, *dsp.
 709         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 710         for *mips32r2, *mips64r2, *dsp2.
 711         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 712
 713 2007-02-19  Thiemo Seufer  <ths@mips.com>
 714             Nigel Stephens  <nigel@mips.com>
 715
 716         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 717         jumps with hazard barrier.
 718
 719 2007-02-19  Thiemo Seufer  <ths@mips.com>
 720             Nigel Stephens  <nigel@mips.com>
 721
 722         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 723         after each call to sim_io_write.
 724
 725 2007-02-19  Thiemo Seufer  <ths@mips.com>
 726             Nigel Stephens  <nigel@mips.com>
 727
 728         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 729         supported by this simulator.
 730         (decode_coproc): Recognise additional CP0 Config registers
 731         correctly.
 732
 733 2007-02-19  Thiemo Seufer  <ths@mips.com>
 734             Nigel Stephens  <nigel@mips.com>
 735             David Ung  <davidu@mips.com>
 736
 737         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 738         uninterpreted formats. If fmt is one of the uninterpreted types
 739         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 740         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 741         (store_fpr): When writing an invalid odd register, set the
 742         matching even register to fmt_unknown, not the following register.
 743         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 744         the the memory window at offset 0 set by --memory-size command
 745         line option.
 746         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 747         point register.
 748         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 749         register.
 750         (sim_monitor): When returning the memory size to the MIPS
 751         application, use the value in STATE_MEM_SIZE, not an arbitrary
 752         hardcoded value.
 753         (cop_lw): Don' mess around with FPR_STATE, just pass
 754         fmt_uninterpreted_32 to StoreFPR.
 755         (cop_sw): Similarly.
 756         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 757         (cop_sd): Similarly.
 758         * mips.igen (not_word_value): Single version for mips32, mips64
 759         and mips16.
 760
 761 2007-02-19  Thiemo Seufer <ths@mips.com>
 762             Nigel Stephens  <nigel@mips.com>
 763
 764         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 765         MBytes.
 766
 767 2007-02-17  Thiemo Seufer  <ths@mips.com>
 768
 769         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 770         configuration.
 771         * configure: Regenerate.
 772
 773 2007-02-17  Thiemo Seufer  <ths@mips.com>
 774
 775         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 776         Add mdmx to sim_igen_machine.
 777         (mipsisa64*-*-*): Likewise. Remove dsp.
 778         (mipsisa32*-*-*): Remove dsp.
 779         * configure: Regenerate.
 780
 781 2007-02-13  Thiemo Seufer  <ths@mips.com>
 782
 783         * configure.ac: Add mips*-sde-elf* target.
 784         * configure: Regenerate.
 785
 786 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 787
 788         * acconfig.h: Remove.
 789         * config.in, configure: Regenerate.
 790
 791 2006-11-07  Thiemo Seufer  <ths@mips.com>
 792
 793         * dsp.igen (do_w_op): Fix compiler warning.
 794
 795 2006-08-29  Thiemo Seufer  <ths@mips.com>
 796             David Ung  <davidu@mips.com>
 797
 798         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 799         sim_igen_machine.
 800         * configure: Regenerate.
 801         * mips.igen (model): Add smartmips.
 802         (MADDU): Increment ACX if carry.
 803         (do_mult): Clear ACX.
 804         (ROR,RORV): Add smartmips.
 805         (include): Include smartmips.igen.
 806         * sim-main.h (ACX): Set to REGISTERS[89].
 807         * smartmips.igen: New file.
 808
 809 2006-08-29  Thiemo Seufer  <ths@mips.com>
 810             David Ung  <davidu@mips.com>
 811
 812         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 813         mips3264r2.igen. Add missing dependency rules.
 814         * m16e.igen: Support for mips16e save/restore instructions.
 815
 816 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 817
 818         * configure: Regenerated.
 819
 820 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 821
 822         * configure: Regenerated.
 823
 824 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 825
 826         * configure: Regenerated.
 827
 828 2006-05-15 Chao-ying Fu  <fu@mips.com>
 829
 830         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 831
 832 2006-04-18  Nick Clifton  <nickc@redhat.com>
 833
 834         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 835         statement.
 836
 837 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 838
 839         * configure: Regenerate.
 840
 841 2005-12-14  Chao-ying Fu  <fu@mips.com>
 842
 843         * Makefile.in (SIM_OBJS): Add dsp.o.
 844         (dsp.o): New dependency.
 845         (IGEN_INCLUDE): Add dsp.igen.
 846         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 847         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 848         * configure: Regenerate.
 849         * mips.igen: Add dsp model and include dsp.igen.
 850         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 851         because these instructions are extended in DSP ASE.
 852         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 853         adding 6 DSP accumulator registers and 1 DSP control register.
 854         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 855         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 856         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 857         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 858         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 859         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 860         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 861         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 862         DSPCR_CCOND_SMASK): New define.
 863         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 864         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 865
 866 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 867
 868         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 869
 870 2005-06-16  David Ung  <davidu@mips.com>
 871             Nigel Stephens  <nigel@mips.com>
 872
 873         * mips.igen: New mips16e model and include m16e.igen.
 874         (check_u64): Add mips16e tag.
 875         * m16e.igen: New file for MIPS16e instructions.
 876         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 877         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 878         models.
 879         * configure: Regenerate.
 880
 881 2005-05-26  David Ung  <davidu@mips.com>
 882
 883         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 884         tags to all instructions which are applicable to the new ISAs.
 885         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 886         vr.igen.
 887         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 888         instructions.
 889         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 890         to mips.igen.
 891         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 892         * configure: Regenerate.
 893
 894 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 895
 896         * configure: Regenerate.
 897
 898 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 899
 900         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 901         explicit call to AC_CONFIG_HEADER.
 902         * configure: Regenerate.
 903
 904 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 905
 906         * configure.ac: Update to use ../common/common.m4.
 907         * configure: Re-generate.
 908
 909 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 910
 911         * configure: Regenerated to track ../common/aclocal.m4 changes.
 912
 913 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 914
 915         * configure.ac: Rename configure.in, require autoconf 2.59.
 916         * configure: Re-generate.
 917
 918 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 919
 920         * configure: Regenerate for ../common/aclocal.m4 update.
 921
 922 2004-09-24  Monika Chaddha  <monika@acmet.com>
 923
 924         Committed by Andrew Cagney.
 925         * m16.igen (CMP, CMPI): Fix assembler.
 926
 927 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 928
 929         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 930         * configure: Regenerate.
 931
 932 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 933
 934         * configure.in (sim_m16_machine): Include mipsIII.
 935         * configure: Regenerate.
 936
 937 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 938
 939         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 940         from COP0_BADVADDR.
 941         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 942
 943 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 944
 945         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 946
 947 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 948
 949         * mips.igen (check_fmt): Remove.
 950         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 951         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 952         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 953         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 954         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 955         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 956         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 957         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 958         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 959         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 960
 961 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 962
 963         * sb1.igen (check_sbx): New function.
 964         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 965
 966 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 967             Richard Sandiford  <rsandifo@redhat.com>
 968
 969         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 970         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 971         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 972         separate implementations for mipsIV and mipsV.  Use new macros to
 973         determine whether the restrictions apply.
 974
 975 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 976
 977         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 978         (check_mult_hilo): Improve comments.
 979         (check_div_hilo): Likewise.  Also, fork off a new version
 980         to handle mips32/mips64 (since there are no hazards to check
 981         in MIPS32/MIPS64).
 982
 983 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 984
 985         * mips.igen (do_dmultx): Fix check for negative operands.
 986
 987 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 988
 989         * Makefile.in (SHELL): Make sure this is defined.
 990         (various): Use $(SHELL) whenever we invoke move-if-change.
 991
 992 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 993
 994         * cp1.c: Tweak attribution slightly.
 995         * cp1.h: Likewise.
 996         * mdmx.c: Likewise.
 997         * mdmx.igen: Likewise.
 998         * mips3d.igen: Likewise.
 999         * sb1.igen: Likewise.
1000
1001 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1002
1003         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1004         unsigned operands.
1005
1006 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1007
1008         * interp.c (sim_open): Rename _bfd to bfd.
1009         (sim_create_inferior): Ditto.
1010
1011 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1012
1013         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1014
1015 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1016
1017         * mips.igen (EI, DI): Remove.
1018
1019 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1020
1021         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1022
1023 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1024             Andrew Cagney  <ac131313@redhat.com>
1025             Gavin Romig-Koch  <gavin@redhat.com>
1026             Graydon Hoare  <graydon@redhat.com>
1027             Aldy Hernandez  <aldyh@redhat.com>
1028             Dave Brolley  <brolley@redhat.com>
1029             Chris Demetriou  <cgd@broadcom.com>
1030
1031         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1032         (sim_mach_default): New variable.
1033         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1034         Add a new simulator generator, MULTI.
1035         * configure: Regenerate.
1036         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1037         (multi-run.o): New dependency.
1038         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1039         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1040         (tmp-multi): Combine them.
1041         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1042         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1043         (distclean-extra): New rule.
1044         * sim-main.h: Include bfd.h.
1045         (MIPS_MACH): New macro.
1046         * mips.igen (vr4120, vr5400, vr5500): New models.
1047         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1048         * vr.igen: Replace with new version.
1049
1050 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1051
1052         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1053         * configure: Regenerate.
1054
1055 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1056
1057         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1058         * mips.igen: Remove all invocations of check_branch_bug and
1059         mark_branch_bug.
1060
1061 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1062
1063         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1064
1065 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1066
1067         * mips.igen (do_load_double, do_store_double): New functions.
1068         (LDC1, SDC1): Rename to...
1069         (LDC1b, SDC1b): respectively.
1070         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1071
1072 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1073
1074         * cp1.c (fp_recip2): Modify initialization expression so that
1075         GCC will recognize it as constant.
1076
1077 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1078
1079         * mdmx.c (SD_): Delete.
1080         (Unpredictable): Re-define, for now, to directly invoke
1081         unpredictable_action().
1082         (mdmx_acc_op): Fix error in .ob immediate handling.
1083
1084 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1085
1086         * interp.c (sim_firmware_command): Initialize `address'.
1087
1088 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1089
1090         * configure: Regenerated to track ../common/aclocal.m4 changes.
1091
1092 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1093             Ed Satterthwaite  <ehs@broadcom.com>
1094
1095         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1096         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1097         * mips.igen: Include mips3d.igen.
1098         (mips3d): New model name for MIPS-3D ASE instructions.
1099         (CVT.W.fmt): Don't use this instruction for word (source) format
1100         instructions.
1101         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1102         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1103         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1104         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1105         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1106         (RSquareRoot1, RSquareRoot2): New macros.
1107         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1108         (fp_rsqrt2): New functions.
1109         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1110         * configure: Regenerate.
1111
1112 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1113             Ed Satterthwaite  <ehs@broadcom.com>
1114
1115         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1116         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1117         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1118         (convert): Note that this function is not used for paired-single
1119         format conversions.
1120         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1121         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1122         (check_fmt_p): Enable paired-single support.
1123         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1124         (PUU.PS): New instructions.
1125         (CVT.S.fmt): Don't use this instruction for paired-single format
1126         destinations.
1127         * sim-main.h (FP_formats): New value 'fmt_ps.'
1128         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1129         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1130
1131 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1132
1133         * mips.igen: Fix formatting of function calls in
1134         many FP operations.
1135
1136 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1137
1138         * mips.igen (MOVN, MOVZ): Trace result.
1139         (TNEI): Print "tnei" as the opcode name in traces.
1140         (CEIL.W): Add disassembly string for traces.
1141         (RSQRT.fmt): Make location of disassembly string consistent
1142         with other instructions.
1143
1144 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1145
1146         * mips.igen (X): Delete unused function.
1147
1148 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1149
1150         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1151
1152 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1153             Ed Satterthwaite  <ehs@broadcom.com>
1154
1155         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1156         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1157         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1158         (fp_nmsub): New prototypes.
1159         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1160         (NegMultiplySub): New defines.
1161         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1162         (MADD.D, MADD.S): Replace with...
1163         (MADD.fmt): New instruction.
1164         (MSUB.D, MSUB.S): Replace with...
1165         (MSUB.fmt): New instruction.
1166         (NMADD.D, NMADD.S): Replace with...
1167         (NMADD.fmt): New instruction.
1168         (NMSUB.D, MSUB.S): Replace with...
1169         (NMSUB.fmt): New instruction.
1170
1171 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1172             Ed Satterthwaite  <ehs@broadcom.com>
1173
1174         * cp1.c: Fix more comment spelling and formatting.
1175         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1176         (denorm_mode): New function.
1177         (fpu_unary, fpu_binary): Round results after operation, collect
1178         status from rounding operations, and update the FCSR.
1179         (convert): Collect status from integer conversions and rounding
1180         operations, and update the FCSR.  Adjust NaN values that result
1181         from conversions.  Convert to use sim_io_eprintf rather than
1182         fprintf, and remove some debugging code.
1183         * cp1.h (fenr_FS): New define.
1184
1185 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1186
1187         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1188         rounding mode to sim FP rounding mode flag conversion code into...
1189         (rounding_mode): New function.
1190
1191 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1192
1193         * cp1.c: Clean up formatting of a few comments.
1194         (value_fpr): Reformat switch statement.
1195
1196 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1197             Ed Satterthwaite  <ehs@broadcom.com>
1198
1199         * cp1.h: New file.
1200         * sim-main.h: Include cp1.h.
1201         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1202         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1203         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1204         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1205         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1206         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1207         * cp1.c: Don't include sim-fpu.h; already included by
1208         sim-main.h.  Clean up formatting of some comments.
1209         (NaN, Equal, Less): Remove.
1210         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1211         (fp_cmp): New functions.
1212         * mips.igen (do_c_cond_fmt): Remove.
1213         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1214         Compare.  Add result tracing.
1215         (CxC1): Remove, replace with...
1216         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1217         (DMxC1): Remove, replace with...
1218         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1219         (MxC1): Remove, replace with...
1220         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1221
1222 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1223
1224         * sim-main.h (FGRIDX): Remove, replace all uses with...
1225         (FGR_BASE): New macro.
1226         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1227         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1228         (NR_FGR, FGR): Likewise.
1229         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1230         * mips.igen: Likewise.
1231
1232 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1233
1234         * cp1.c: Add an FSF Copyright notice to this file.
1235
1236 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1237             Ed Satterthwaite  <ehs@broadcom.com>
1238
1239         * cp1.c (Infinity): Remove.
1240         * sim-main.h (Infinity): Likewise.
1241
1242         * cp1.c (fp_unary, fp_binary): New functions.
1243         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1244         (fp_sqrt): New functions, implemented in terms of the above.
1245         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1246         (Recip, SquareRoot): Remove (replaced by functions above).
1247         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1248         (fp_recip, fp_sqrt): New prototypes.
1249         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1250         (Recip, SquareRoot): Replace prototypes with #defines which
1251         invoke the functions above.
1252
1253 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1254
1255         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1256         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1257         file, remove PARAMS from prototypes.
1258         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1259         simulator state arguments.
1260         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1261         pass simulator state arguments.
1262         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1263         (store_fpr, convert): Remove 'sd' argument.
1264         (value_fpr): Likewise.  Convert to use 'SD' instead.
1265
1266 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1267
1268         * cp1.c (Min, Max): Remove #if 0'd functions.
1269         * sim-main.h (Min, Max): Remove.
1270
1271 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1272
1273         * cp1.c: fix formatting of switch case and default labels.
1274         * interp.c: Likewise.
1275         * sim-main.c: Likewise.
1276
1277 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1278
1279         * cp1.c: Clean up comments which describe FP formats.
1280          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1281
1282 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1283             Ed Satterthwaite  <ehs@broadcom.com>
1284
1285         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1286         Broadcom SiByte SB-1 processor configurations.
1287         * configure: Regenerate.
1288         * sb1.igen: New file.
1289         * mips.igen: Include sb1.igen.
1290         (sb1): New model.
1291         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1292         * mdmx.igen: Add "sb1" model to all appropriate functions and
1293         instructions.
1294         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1295         (ob_func, ob_acc): Reference the above.
1296         (qh_acc): Adjust to keep the same size as ob_acc.
1297         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1298         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1299
1300 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1301
1302         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1303
1304 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1305             Ed Satterthwaite  <ehs@broadcom.com>
1306
1307         * mips.igen (mdmx): New (pseudo-)model.
1308         * mdmx.c, mdmx.igen: New files.
1309         * Makefile.in (SIM_OBJS): Add mdmx.o.
1310         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1311         New typedefs.
1312         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1313         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1314         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1315         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1316         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1317         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1318         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1319         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1320         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1321         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1322         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1323         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1324         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1325         (qh_fmtsel): New macros.
1326         (_sim_cpu): New member "acc".
1327         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1328         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1329
1330 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1331
1332         * interp.c: Use 'deprecated' rather than 'depreciated.'
1333         * sim-main.h: Likewise.
1334
1335 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1336
1337         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1338         which wouldn't compile anyway.
1339         * sim-main.h (unpredictable_action): New function prototype.
1340         (Unpredictable): Define to call igen function unpredictable().
1341         (NotWordValue): New macro to call igen function not_word_value().
1342         (UndefinedResult): Remove.
1343         * interp.c (undefined_result): Remove.
1344         (unpredictable_action): New function.
1345         * mips.igen (not_word_value, unpredictable): New functions.
1346         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1347         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1348         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1349         NotWordValue() to check for unpredictable inputs, then
1350         Unpredictable() to handle them.
1351
1352 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1353
1354         * mips.igen: Fix formatting of calls to Unpredictable().
1355
1356 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1357
1358         * interp.c (sim_open): Revert previous change.
1359
1360 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1361
1362         * interp.c (sim_open): Disable chunk of code that wrote code in
1363         vector table entries.
1364
1365 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1366
1367         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1368         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1369         unused definitions.
1370
1371 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1372
1373         * cp1.c: Fix many formatting issues.
1374
1375 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1376
1377         * cp1.c (fpu_format_name): New function to replace...
1378         (DOFMT): This.  Delete, and update all callers.
1379         (fpu_rounding_mode_name): New function to replace...
1380         (RMMODE): This.  Delete, and update all callers.
1381
1382 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1383
1384         * interp.c: Move FPU support routines from here to...
1385         * cp1.c: Here.  New file.
1386         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1387         (cp1.o): New target.
1388
1389 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1390
1391         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1392         * mips.igen (mips32, mips64): New models, add to all instructions
1393         and functions as appropriate.
1394         (loadstore_ea, check_u64): New variant for model mips64.
1395         (check_fmt_p): New variant for models mipsV and mips64, remove
1396         mipsV model marking fro other variant.
1397         (SLL) Rename to...
1398         (SLLa) this.
1399         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1400         for mips32 and mips64.
1401         (DCLO, DCLZ): New instructions for mips64.
1402
1403 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1404
1405         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1406         immediate or code as a hex value with the "%#lx" format.
1407         (ANDI): Likewise, and fix printed instruction name.
1408
1409 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1410
1411         * sim-main.h (UndefinedResult, Unpredictable): New macros
1412         which currently do nothing.
1413
1414 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1415
1416         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1417         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1418         (status_CU3): New definitions.
1419
1420         * sim-main.h (ExceptionCause): Add new values for MIPS32
1421         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1422         for DebugBreakPoint and NMIReset to note their status in
1423         MIPS32 and MIPS64.
1424         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1425         (SignalExceptionCacheErr): New exception macros.
1426
1427 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1428
1429         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1430         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1431         is always enabled.
1432         (SignalExceptionCoProcessorUnusable): Take as argument the
1433         unusable coprocessor number.
1434
1435 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1436
1437         * mips.igen: Fix formatting of all SignalException calls.
1438
1439 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1440
1441         * sim-main.h (SIGNEXTEND): Remove.
1442
1443 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1444
1445         * mips.igen: Remove gencode comment from top of file, fix
1446         spelling in another comment.
1447
1448 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1449
1450         * mips.igen (check_fmt, check_fmt_p): New functions to check
1451         whether specific floating point formats are usable.
1452         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1453         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1454         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1455         Use the new functions.
1456         (do_c_cond_fmt): Remove format checks...
1457         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1458
1459 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1460
1461         * mips.igen: Fix formatting of check_fpu calls.
1462
1463 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1464
1465         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1466
1467 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1468
1469         * mips.igen: Remove whitespace at end of lines.
1470
1471 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1472
1473         * mips.igen (loadstore_ea): New function to do effective
1474         address calculations.
1475         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1476         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1477         CACHE): Use loadstore_ea to do effective address computations.
1478
1479 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1480
1481         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1482         * mips.igen (LL, CxC1, MxC1): Likewise.
1483
1484 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1485
1486         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1487         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1488         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1489         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1490         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1491         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1492         Don't split opcode fields by hand, use the opcode field values
1493         provided by igen.
1494
1495 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1496
1497         * mips.igen (do_divu): Fix spacing.
1498
1499         * mips.igen (do_dsllv): Move to be right before DSLLV,
1500         to match the rest of the do_<shift> functions.
1501
1502 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1503
1504         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1505         DSRL32, do_dsrlv): Trace inputs and results.
1506
1507 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1508
1509         * mips.igen (CACHE): Provide instruction-printing string.
1510
1511         * interp.c (signal_exception): Comment tokens after #endif.
1512
1513 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1514
1515         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1516         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1517         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1518         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1519         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1520         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1521         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1522         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1523
1524 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1525
1526         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1527         instruction-printing string.
1528         (LWU): Use '64' as the filter flag.
1529
1530 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1531
1532         * mips.igen (SDXC1): Fix instruction-printing string.
1533
1534 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1535
1536         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1537         filter flags "32,f".
1538
1539 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1540
1541         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1542         as the filter flag.
1543
1544 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1545
1546         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1547         add a comma) so that it more closely match the MIPS ISA
1548         documentation opcode partitioning.
1549         (PREF): Put useful names on opcode fields, and include
1550         instruction-printing string.
1551
1552 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1553
1554         * mips.igen (check_u64): New function which in the future will
1555         check whether 64-bit instructions are usable and signal an
1556         exception if not.  Currently a no-op.
1557         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1558         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1559         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1560         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1561
1562         * mips.igen (check_fpu): New function which in the future will
1563         check whether FPU instructions are usable and signal an exception
1564         if not.  Currently a no-op.
1565         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1566         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1567         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1568         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1569         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1570         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1571         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1572         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1573
1574 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1575
1576         * mips.igen (do_load_left, do_load_right): Move to be immediately
1577         following do_load.
1578         (do_store_left, do_store_right): Move to be immediately following
1579         do_store.
1580
1581 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1582
1583         * mips.igen (mipsV): New model name.  Also, add it to
1584         all instructions and functions where it is appropriate.
1585
1586 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1587
1588         * mips.igen: For all functions and instructions, list model
1589         names that support that instruction one per line.
1590
1591 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1592
1593         * mips.igen: Add some additional comments about supported
1594         models, and about which instructions go where.
1595         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1596         order as is used in the rest of the file.
1597
1598 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1599
1600         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1601         indicating that ALU32_END or ALU64_END are there to check
1602         for overflow.
1603         (DADD): Likewise, but also remove previous comment about
1604         overflow checking.
1605
1606 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1607
1608         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1609         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1610         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1611         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1612         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1613         fields (i.e., add and move commas) so that they more closely
1614         match the MIPS ISA documentation opcode partitioning.
1615
1616 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1617
1618         * mips.igen (ADDI): Print immediate value.
1619         (BREAK): Print code.
1620         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1621         (SLL): Print "nop" specially, and don't run the code
1622         that does the shift for the "nop" case.
1623
1624 2001-11-17  Fred Fish  <fnf@redhat.com>
1625
1626         * sim-main.h (float_operation): Move enum declaration outside
1627         of _sim_cpu struct declaration.
1628
1629 2001-04-12  Jim Blandy  <jimb@redhat.com>
1630
1631         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1632         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1633         set of the FCSR.
1634         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1635         PENDING_FILL, and you can get the intended effect gracefully by
1636         calling PENDING_SCHED directly.
1637
1638 2001-02-23  Ben Elliston  <bje@redhat.com>
1639
1640         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1641         already defined elsewhere.
1642
1643 2001-02-19  Ben Elliston  <bje@redhat.com>
1644
1645         * sim-main.h (sim_monitor): Return an int.
1646         * interp.c (sim_monitor): Add return values.
1647         (signal_exception): Handle error conditions from sim_monitor.
1648
1649 2001-02-08  Ben Elliston  <bje@redhat.com>
1650
1651         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1652         (store_memory): Likewise, pass cia to sim_core_write*.
1653
1654 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1655
1656         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1657         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1658
1659 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1660
1661         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1662         * Makefile.in: Don't delete *.igen when cleaning directory.
1663
1664 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1665
1666         * m16.igen (break): Call SignalException not sim_engine_halt.
1667
1668 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1669
1670         From Jason Eckhardt:
1671         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1672
1673 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1674
1675         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1676
1677 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1678
1679         * mips.igen (do_dmultx): Fix typo.
1680
1681 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1682
1683         * configure: Regenerated to track ../common/aclocal.m4 changes.
1684
1685 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1686
1687         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1688
1689 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1690
1691         * sim-main.h (GPR_CLEAR): Define macro.
1692
1693 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1694
1695         * interp.c (decode_coproc): Output long using %lx and not %s.
1696
1697 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1698
1699         * interp.c (sim_open): Sort & extend dummy memory regions for
1700         --board=jmr3904 for eCos.
1701
1702 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1703
1704         * configure: Regenerated.
1705
1706 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1707
1708         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1709         calls, conditional on the simulator being in verbose mode.
1710
1711 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1712
1713         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1714         cache don't get ReservedInstruction traps.
1715
1716 1999-11-29  Mark Salter  <msalter@cygnus.com>
1717
1718         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1719         to clear status bits in sdisr register. This is how the hardware works.
1720
1721         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1722         being used by cygmon.
1723
1724 1999-11-11  Andrew Haley  <aph@cygnus.com>
1725
1726         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1727         instructions.
1728
1729 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1730
1731         * mips.igen (MULT): Correct previous mis-applied patch.
1732
1733 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1734
1735         * mips.igen (delayslot32): Handle sequence like
1736         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1737         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1738         (MULT): Actually pass the third register...
1739
1740 1999-09-03  Mark Salter  <msalter@cygnus.com>
1741
1742         * interp.c (sim_open): Added more memory aliases for additional
1743         hardware being touched by cygmon on jmr3904 board.
1744
1745 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1746
1747         * configure: Regenerated to track ../common/aclocal.m4 changes.
1748
1749 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1750
1751         * interp.c (sim_store_register): Handle case where client - GDB -
1752         specifies that a 4 byte register is 8 bytes in size.
1753         (sim_fetch_register): Ditto.
1754
1755 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1756
1757         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1758         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1759         (idt_monitor_base): Base address for IDT monitor traps.
1760         (pmon_monitor_base): Ditto for PMON.
1761         (lsipmon_monitor_base): Ditto for LSI PMON.
1762         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1763         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1764         (sim_firmware_command): New function.
1765         (mips_option_handler): Call it for OPTION_FIRMWARE.
1766         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1767         option was given, add no monitor by default.  Add BREAK hooks only if
1768         monitors are also there.
1769
1770 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1771
1772         * interp.c (sim_monitor): Flush output before reading input.
1773
1774 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1775
1776         * tconfig.in (SIM_HANDLES_LMA): Always define.
1777
1778 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1779
1780         From Mark Salter <msalter@cygnus.com>:
1781         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1782         (sim_open): Add setup for BSP board.
1783
1784 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1785
1786         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1787         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1788         them as unimplemented.
1789
1790 1999-05-08  Felix Lee  <flee@cygnus.com>
1791
1792         * configure: Regenerated to track ../common/aclocal.m4 changes.
1793
1794 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1795
1796         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1797
1798 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1799
1800         * configure.in: Any mips64vr5*-*-* target should have
1801         -DTARGET_ENABLE_FR=1.
1802         (default_endian): Any mips64vr*el-*-* target should default to
1803         LITTLE_ENDIAN.
1804         * configure: Re-generate.
1805
1806 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1807
1808         * mips.igen (ldl): Extend from _16_, not 32.
1809
1810 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1811
1812         * interp.c (sim_store_register): Force registers written to by GDB
1813         into an un-interpreted state.
1814
1815 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1816
1817         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1818         CPU, start periodic background I/O polls.
1819         (tx3904sio_poll): New function: periodic I/O poller.
1820
1821 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1822
1823         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1824
1825 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1826
1827         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1828         case statement.
1829
1830 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1831
1832         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1833         (load_word): Call SIM_CORE_SIGNAL hook on error.
1834         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1835         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1836         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1837         * sim-main.h (COP0_BADVADDR): Define.
1838         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1839         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1840         (_sim_cpu): Add exc_* fields to store register value snapshots.
1841         * mips.igen (*): Replace memory-related SignalException* calls
1842         with references to SIM_CORE_SIGNAL hook.
1843
1844         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1845         fix.
1846         * sim-main.c (*): Minor warning cleanups.
1847
1848 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1849
1850         * m16.igen (DADDIU5): Correct type-o.
1851
1852 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1853
1854         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1855         variables.
1856
1857 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1858
1859         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1860         to include path.
1861         (interp.o): Add dependency on itable.h
1862         (oengine.c, gencode): Delete remaining references.
1863         (BUILT_SRC_FROM_GEN): Clean up.
1864
1865 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1866
1867         * vr4run.c: New.
1868         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1869         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1870         tmp-run-hack) : New.
1871         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1872         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1873         Drop the "64" qualifier to get the HACK generator working.
1874         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1875         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1876         qualifier to get the hack generator working.
1877         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1878         (DSLL): Use do_dsll.
1879         (DSLLV): Use do_dsllv.
1880         (DSRA): Use do_dsra.
1881         (DSRL): Use do_dsrl.
1882         (DSRLV): Use do_dsrlv.
1883         (BC1): Move *vr4100 to get the HACK generator working.
1884         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1885         get the HACK generator working.
1886         (MACC) Rename to get the HACK generator working.
1887         (DMACC,MACCS,DMACCS): Add the 64.
1888
1889 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1890
1891         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1892         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1893
1894 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1895
1896     * mips/interp.c (DEBUG): Cleanups.
1897
1898 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1899
1900         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1901         (tx3904sio_tickle): fflush after a stdout character output.
1902
1903 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1904
1905         * interp.c (sim_close): Uninstall modules.
1906
1907 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1908
1909         * sim-main.h, interp.c (sim_monitor): Change to global
1910         function.
1911
1912 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1913
1914         * configure.in (vr4100): Only include vr4100 instructions in
1915         simulator.
1916         * configure: Re-generate.
1917         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1918
1919 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1920
1921         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1922         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1923         true alternative.
1924
1925         * configure.in (sim_default_gen, sim_use_gen): Replace with
1926         sim_gen.
1927         (--enable-sim-igen): Delete config option. Always using IGEN.
1928         * configure: Re-generate.
1929
1930         * Makefile.in (gencode): Kill, kill, kill.
1931         * gencode.c: Ditto.
1932
1933 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1934
1935         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1936         bit mips16 igen simulator.
1937         * configure: Re-generate.
1938
1939         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1940         as part of vr4100 ISA.
1941         * vr.igen: Mark all instructions as 64 bit only.
1942
1943 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1944
1945         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1946         Pacify GCC.
1947
1948 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1949
1950         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1951         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1952         * configure: Re-generate.
1953
1954         * m16.igen (BREAK): Define breakpoint instruction.
1955         (JALX32): Mark instruction as mips16 and not r3900.
1956         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1957
1958         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1959
1960 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1961
1962         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1963         insn as a debug breakpoint.
1964
1965         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1966         pending.slot_size.
1967         (PENDING_SCHED): Clean up trace statement.
1968         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1969         (PENDING_FILL): Delay write by only one cycle.
1970         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1971
1972         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1973         of pending writes.
1974         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1975         32 & 64.
1976         (pending_tick): Move incrementing of index to FOR statement.
1977         (pending_tick): Only update PENDING_OUT after a write has occured.
1978
1979         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1980         build simulator.
1981         * configure: Re-generate.
1982
1983         * interp.c (sim_engine_run OLD): Delete explicit call to
1984         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1985
1986 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1987
1988         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1989         interrupt level number to match changed SignalExceptionInterrupt
1990         macro.
1991
1992 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1993
1994         * interp.c: #include "itable.h" if WITH_IGEN.
1995         (get_insn_name): New function.
1996         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1997         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1998
1999 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2000
2001         * configure: Rebuilt to inhale new common/aclocal.m4.
2002
2003 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2004
2005         * dv-tx3904sio.c: Include sim-assert.h.
2006
2007 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2008
2009         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2010         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2011         Reorganize target-specific sim-hardware checks.
2012         * configure: rebuilt.
2013         * interp.c (sim_open): For tx39 target boards, set
2014         OPERATING_ENVIRONMENT, add tx3904sio devices.
2015         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2016         ROM executables.  Install dv-sockser into sim-modules list.
2017
2018         * dv-tx3904irc.c: Compiler warning clean-up.
2019         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2020         frequent hw-trace messages.
2021
2022 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2023
2024         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2025
2026 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2027
2028         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2029
2030         * vr.igen: New file.
2031         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2032         * mips.igen: Define vr4100 model. Include vr.igen.
2033 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2034
2035         * mips.igen (check_mf_hilo): Correct check.
2036
2037 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2038
2039         * sim-main.h (interrupt_event): Add prototype.
2040
2041         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2042         register_ptr, register_value.
2043         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2044
2045         * sim-main.h (tracefh): Make extern.
2046
2047 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2048
2049         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2050         Reduce unnecessarily high timer event frequency.
2051         * dv-tx3904cpu.c: Ditto for interrupt event.
2052
2053 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2054
2055         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2056         to allay warnings.
2057         (interrupt_event): Made non-static.
2058
2059         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2060         interchange of configuration values for external vs. internal
2061         clock dividers.
2062
2063 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2064
2065         * mips.igen (BREAK): Moved code to here for
2066         simulator-reserved break instructions.
2067         * gencode.c (build_instruction): Ditto.
2068         * interp.c (signal_exception): Code moved from here.  Non-
2069         reserved instructions now use exception vector, rather
2070         than halting sim.
2071         * sim-main.h: Moved magic constants to here.
2072
2073 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2074
2075         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2076         register upon non-zero interrupt event level, clear upon zero
2077         event value.
2078         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2079         by passing zero event value.
2080         (*_io_{read,write}_buffer): Endianness fixes.
2081         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2082         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2083
2084         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2085         serial I/O and timer module at base address 0xFFFF0000.
2086
2087 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2088
2089         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2090         and BigEndianCPU.
2091
2092 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2093
2094         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2095         parts.
2096         * configure: Update.
2097
2098 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2099
2100         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2101         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2102         * configure.in: Include tx3904tmr in hw_device list.
2103         * configure: Rebuilt.
2104         * interp.c (sim_open): Instantiate three timer instances.
2105         Fix address typo of tx3904irc instance.
2106
2107 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2108
2109         * interp.c (signal_exception): SystemCall exception now uses
2110         the exception vector.
2111
2112 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2113
2114         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2115         to allay warnings.
2116
2117 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2118
2119         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2120
2121 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2122
2123         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2124
2125         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2126         sim-main.h. Declare a struct hw_descriptor instead of struct
2127         hw_device_descriptor.
2128
2129 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2130
2131         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2132         right bits and then re-align left hand bytes to correct byte
2133         lanes.  Fix incorrect computation in do_store_left when loading
2134         bytes from second word.
2135
2136 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2137
2138         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2139         * interp.c (sim_open): Only create a device tree when HW is
2140         enabled.
2141
2142         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2143         * interp.c (signal_exception): Ditto.
2144
2145 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2146
2147         * gencode.c: Mark BEGEZALL as LIKELY.
2148
2149 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2150
2151         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2152         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2153
2154 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2155
2156         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2157         modules.  Recognize TX39 target with "mips*tx39" pattern.
2158         * configure: Rebuilt.
2159         * sim-main.h (*): Added many macros defining bits in
2160         TX39 control registers.
2161         (SignalInterrupt): Send actual PC instead of NULL.
2162         (SignalNMIReset): New exception type.
2163         * interp.c (board): New variable for future use to identify
2164         a particular board being simulated.
2165         (mips_option_handler,mips_options): Added "--board" option.
2166         (interrupt_event): Send actual PC.
2167         (sim_open): Make memory layout conditional on board setting.
2168         (signal_exception): Initial implementation of hardware interrupt
2169         handling.  Accept another break instruction variant for simulator
2170         exit.
2171         (decode_coproc): Implement RFE instruction for TX39.
2172         (mips.igen): Decode RFE instruction as such.
2173         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2174         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2175         bbegin to implement memory map.
2176         * dv-tx3904cpu.c: New file.
2177         * dv-tx3904irc.c: New file.
2178
2179 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2180
2181         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2182
2183 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2184
2185         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2186         with calls to check_div_hilo.
2187
2188 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2189
2190         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2191         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2192         Add special r3900 version of do_mult_hilo.
2193         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2194         with calls to check_mult_hilo.
2195         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2196         with calls to check_div_hilo.
2197
2198 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2199
2200         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2201         Document a replacement.
2202
2203 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2204
2205         * interp.c (sim_monitor): Make mon_printf work.
2206
2207 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2208
2209         * sim-main.h (INSN_NAME): New arg `cpu'.
2210
2211 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2212
2213         * configure: Regenerated to track ../common/aclocal.m4 changes.
2214
2215 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2216
2217         * configure: Regenerated to track ../common/aclocal.m4 changes.
2218         * config.in: Ditto.
2219
2220 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2221
2222         * acconfig.h: New file.
2223         * configure.in: Reverted change of Apr 24; use sinclude again.
2224
2225 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2226
2227         * configure: Regenerated to track ../common/aclocal.m4 changes.
2228         * config.in: Ditto.
2229
2230 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2231
2232         * configure.in: Don't call sinclude.
2233
2234 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2235
2236         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2237
2238 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2239
2240         * mips.igen (ERET): Implement.
2241
2242         * interp.c (decode_coproc): Return sign-extended EPC.
2243
2244         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2245
2246         * interp.c (signal_exception): Do not ignore Trap.
2247         (signal_exception): On TRAP, restart at exception address.
2248         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2249         (signal_exception): Update.
2250         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2251         so that TRAP instructions are caught.
2252
2253 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2254
2255         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2256         contains HI/LO access history.
2257         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2258         (HIACCESS, LOACCESS): Delete, replace with
2259         (HIHISTORY, LOHISTORY): New macros.
2260         (CHECKHILO): Delete all, moved to mips.igen
2261
2262         * gencode.c (build_instruction): Do not generate checks for
2263         correct HI/LO register usage.
2264
2265         * interp.c (old_engine_run): Delete checks for correct HI/LO
2266         register usage.
2267
2268         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2269         check_mf_cycles): New functions.
2270         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2271         do_divu, domultx, do_mult, do_multu): Use.
2272
2273         * tx.igen ("madd", "maddu"): Use.
2274
2275 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2276
2277         * mips.igen (DSRAV): Use function do_dsrav.
2278         (SRAV): Use new function do_srav.
2279
2280         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2281         (B): Sign extend 11 bit immediate.
2282         (EXT-B*): Shift 16 bit immediate left by 1.
2283         (ADDIU*): Don't sign extend immediate value.
2284
2285 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2286
2287         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2288
2289         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2290         functions.
2291
2292         * mips.igen (delayslot32, nullify_next_insn): New functions.
2293         (m16.igen): Always include.
2294         (do_*): Add more tracing.
2295
2296         * m16.igen (delayslot16): Add NIA argument, could be called by a
2297         32 bit MIPS16 instruction.
2298
2299         * interp.c (ifetch16): Move function from here.
2300         * sim-main.c (ifetch16): To here.
2301
2302         * sim-main.c (ifetch16, ifetch32): Update to match current
2303         implementations of LH, LW.
2304         (signal_exception): Don't print out incorrect hex value of illegal
2305         instruction.
2306
2307 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2308
2309         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2310         instruction.
2311
2312         * m16.igen: Implement MIPS16 instructions.
2313
2314         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2315         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2316         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2317         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2318         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2319         bodies of corresponding code from 32 bit insn to these.  Also used
2320         by MIPS16 versions of functions.
2321
2322         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2323         (IMEM16): Drop NR argument from macro.
2324
2325 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2326
2327         * Makefile.in (SIM_OBJS): Add sim-main.o.
2328
2329         * sim-main.h (address_translation, load_memory, store_memory,
2330         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2331         as INLINE_SIM_MAIN.
2332         (pr_addr, pr_uword64): Declare.
2333         (sim-main.c): Include when H_REVEALS_MODULE_P.
2334
2335         * interp.c (address_translation, load_memory, store_memory,
2336         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2337         from here.
2338         * sim-main.c: To here. Fix compilation problems.
2339
2340         * configure.in: Enable inlining.
2341         * configure: Re-config.
2342
2343 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2344
2345         * configure: Regenerated to track ../common/aclocal.m4 changes.
2346
2347 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2348
2349         * mips.igen: Include tx.igen.
2350         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2351         * tx.igen: New file, contains MADD and MADDU.
2352
2353         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2354         the hardwired constant `7'.
2355         (store_memory): Ditto.
2356         (LOADDRMASK): Move definition to sim-main.h.
2357
2358         mips.igen (MTC0): Enable for r3900.
2359         (ADDU): Add trace.
2360
2361         mips.igen (do_load_byte): Delete.
2362         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2363         do_store_right): New functions.
2364         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2365
2366         configure.in: Let the tx39 use igen again.
2367         configure: Update.
2368
2369 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2370
2371         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2372         not an address sized quantity.  Return zero for cache sizes.
2373
2374 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2375
2376         * mips.igen (r3900): r3900 does not support 64 bit integer
2377         operations.
2378
2379 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2380
2381         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2382         than igen one.
2383         * configure : Rebuild.
2384
2385 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2386
2387         * configure: Regenerated to track ../common/aclocal.m4 changes.
2388
2389 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2390
2391         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2392
2393 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2394
2395         * configure: Regenerated to track ../common/aclocal.m4 changes.
2396         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2397
2398 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2399
2400         * configure: Regenerated to track ../common/aclocal.m4 changes.
2401
2402 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2403
2404         * interp.c (Max, Min): Comment out functions. Not yet used.
2405
2406 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2407
2408         * configure: Regenerated to track ../common/aclocal.m4 changes.
2409
2410 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2411
2412         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2413         configurable settings for stand-alone simulator.
2414
2415         * configure.in: Added X11 search, just in case.
2416
2417         * configure: Regenerated.
2418
2419 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2420
2421         * interp.c (sim_write, sim_read, load_memory, store_memory):
2422         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2423
2424 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2425
2426         * sim-main.h (GETFCC): Return an unsigned value.
2427
2428 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2429
2430         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2431         (DADD): Result destination is RD not RT.
2432
2433 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2434
2435         * sim-main.h (HIACCESS, LOACCESS): Always define.
2436
2437         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2438
2439         * interp.c (sim_info): Delete.
2440
2441 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2442
2443         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2444         (mips_option_handler): New argument `cpu'.
2445         (sim_open): Update call to sim_add_option_table.
2446
2447 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2448
2449         * mips.igen (CxC1): Add tracing.
2450
2451 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2452
2453         * sim-main.h (Max, Min): Declare.
2454
2455         * interp.c (Max, Min): New functions.
2456
2457         * mips.igen (BC1): Add tracing.
2458
2459 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2460
2461         * interp.c Added memory map for stack in vr4100
2462
2463 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2464
2465         * interp.c (load_memory): Add missing "break"'s.
2466
2467 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2468
2469         * interp.c (sim_store_register, sim_fetch_register): Pass in
2470         length parameter.  Return -1.
2471
2472 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2473
2474         * interp.c: Added hardware init hook, fixed warnings.
2475
2476 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2477
2478         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2479
2480 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2481
2482         * interp.c (ifetch16): New function.
2483
2484         * sim-main.h (IMEM32): Rename IMEM.
2485         (IMEM16_IMMED): Define.
2486         (IMEM16): Define.
2487         (DELAY_SLOT): Update.
2488
2489         * m16run.c (sim_engine_run): New file.
2490
2491         * m16.igen: All instructions except LB.
2492         (LB): Call do_load_byte.
2493         * mips.igen (do_load_byte): New function.
2494         (LB): Call do_load_byte.
2495
2496         * mips.igen: Move spec for insn bit size and high bit from here.
2497         * Makefile.in (tmp-igen, tmp-m16): To here.
2498
2499         * m16.dc: New file, decode mips16 instructions.
2500
2501         * Makefile.in (SIM_NO_ALL): Define.
2502         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2503
2504 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2505
2506         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2507         point unit to 32 bit registers.
2508         * configure: Re-generate.
2509
2510 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2511
2512         * configure.in (sim_use_gen): Make IGEN the default simulator
2513         generator for generic 32 and 64 bit mips targets.
2514         * configure: Re-generate.
2515
2516 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2517
2518         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2519         bitsize.
2520
2521         * interp.c (sim_fetch_register, sim_store_register): Read/write
2522         FGR from correct location.
2523         (sim_open): Set size of FGR's according to
2524         WITH_TARGET_FLOATING_POINT_BITSIZE.
2525
2526         * sim-main.h (FGR): Store floating point registers in a separate
2527         array.
2528
2529 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2530
2531         * configure: Regenerated to track ../common/aclocal.m4 changes.
2532
2533 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2534
2535         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2536
2537         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2538
2539         * interp.c (pending_tick): New function.  Deliver pending writes.
2540
2541         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2542         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2543         it can handle mixed sized quantites and single bits.
2544
2545 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2546
2547         * interp.c (oengine.h): Do not include when building with IGEN.
2548         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2549         (sim_info): Ditto for PROCESSOR_64BIT.
2550         (sim_monitor): Replace ut_reg with unsigned_word.
2551         (*): Ditto for t_reg.
2552         (LOADDRMASK): Define.
2553         (sim_open): Remove defunct check that host FP is IEEE compliant,
2554         using software to emulate floating point.
2555         (value_fpr, ...): Always compile, was conditional on HASFPU.
2556
2557 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2558
2559         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2560         size.
2561
2562         * interp.c (SD, CPU): Define.
2563         (mips_option_handler): Set flags in each CPU.
2564         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2565         (sim_close): Do not clear STATE, deleted anyway.
2566         (sim_write, sim_read): Assume CPU zero's vm should be used for
2567         data transfers.
2568         (sim_create_inferior): Set the PC for all processors.
2569         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2570         argument.
2571         (mips16_entry): Pass correct nr of args to store_word, load_word.
2572         (ColdReset): Cold reset all cpu's.
2573         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2574         (sim_monitor, load_memory, store_memory, signal_exception): Use
2575         `CPU' instead of STATE_CPU.
2576
2577
2578         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2579         SD or CPU_.
2580
2581         * sim-main.h (signal_exception): Add sim_cpu arg.
2582         (SignalException*): Pass both SD and CPU to signal_exception.
2583         * interp.c (signal_exception): Update.
2584
2585         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2586         Ditto
2587         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2588         address_translation): Ditto
2589         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2590
2591 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2592
2593         * configure: Regenerated to track ../common/aclocal.m4 changes.
2594
2595 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2596
2597         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2598
2599         * mips.igen (model): Map processor names onto BFD name.
2600
2601         * sim-main.h (CPU_CIA): Delete.
2602         (SET_CIA, GET_CIA): Define
2603
2604 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2605
2606         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2607         regiser.
2608
2609         * configure.in (default_endian): Configure a big-endian simulator
2610         by default.
2611         * configure: Re-generate.
2612
2613 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2614
2615         * configure: Regenerated to track ../common/aclocal.m4 changes.
2616
2617 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2618
2619         * interp.c (sim_monitor): Handle Densan monitor outbyte
2620         and inbyte functions.
2621
2622 1997-12-29  Felix Lee  <flee@cygnus.com>
2623
2624         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2625
2626 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2627
2628         * Makefile.in (tmp-igen): Arrange for $zero to always be
2629         reset to zero after every instruction.
2630
2631 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2632
2633         * configure: Regenerated to track ../common/aclocal.m4 changes.
2634         * config.in: Ditto.
2635
2636 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2637
2638         * mips.igen (MSUB): Fix to work like MADD.
2639         * gencode.c (MSUB): Similarly.
2640
2641 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2642
2643         * configure: Regenerated to track ../common/aclocal.m4 changes.
2644
2645 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2646
2647         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2648
2649 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2650
2651         * sim-main.h (sim-fpu.h): Include.
2652
2653         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2654         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2655         using host independant sim_fpu module.
2656
2657 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2658
2659         * interp.c (signal_exception): Report internal errors with SIGABRT
2660         not SIGQUIT.
2661
2662         * sim-main.h (C0_CONFIG): New register.
2663         (signal.h): No longer include.
2664
2665         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2666
2667 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2668
2669         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2670
2671 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2672
2673         * mips.igen: Tag vr5000 instructions.
2674         (ANDI): Was missing mipsIV model, fix assembler syntax.
2675         (do_c_cond_fmt): New function.
2676         (C.cond.fmt): Handle mips I-III which do not support CC field
2677         separatly.
2678         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2679         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2680         in IV3.2 spec.
2681         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2682         vr5000 which saves LO in a GPR separatly.
2683
2684         * configure.in (enable-sim-igen): For vr5000, select vr5000
2685         specific instructions.
2686         * configure: Re-generate.
2687
2688 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2689
2690         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2691
2692         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2693         fmt_uninterpreted_64 bit cases to switch.  Convert to
2694         fmt_formatted,
2695
2696         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2697
2698         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2699         as specified in IV3.2 spec.
2700         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2701
2702 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2703
2704         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2705         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2706         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2707         PENDING_FILL versions of instructions.  Simplify.
2708         (X): New function.
2709         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2710         instructions.
2711         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2712         a signed value.
2713         (MTHI, MFHI): Disable code checking HI-LO.
2714
2715         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2716         global.
2717         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2718
2719 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2720
2721         * gencode.c (build_mips16_operands): Replace IPC with cia.
2722
2723         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2724         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2725         IPC to `cia'.
2726         (UndefinedResult): Replace function with macro/function
2727         combination.
2728         (sim_engine_run): Don't save PC in IPC.
2729
2730         * sim-main.h (IPC): Delete.
2731
2732
2733         * interp.c (signal_exception, store_word, load_word,
2734         address_translation, load_memory, store_memory, cache_op,
2735         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2736         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2737         current instruction address - cia - argument.
2738         (sim_read, sim_write): Call address_translation directly.
2739         (sim_engine_run): Rename variable vaddr to cia.
2740         (signal_exception): Pass cia to sim_monitor
2741
2742         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2743         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2744         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2745
2746         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2747         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2748         SIM_ASSERT.
2749
2750         * interp.c (signal_exception): Pass restart address to
2751         sim_engine_restart.
2752
2753         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2754         idecode.o): Add dependency.
2755
2756         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2757         Delete definitions
2758         (DELAY_SLOT): Update NIA not PC with branch address.
2759         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2760
2761         * mips.igen: Use CIA not PC in branch calculations.
2762         (illegal): Call SignalException.
2763         (BEQ, ADDIU): Fix assembler.
2764
2765 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2766
2767         * m16.igen (JALX): Was missing.
2768
2769         * configure.in (enable-sim-igen): New configuration option.
2770         * configure: Re-generate.
2771
2772         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2773
2774         * interp.c (load_memory, store_memory): Delete parameter RAW.
2775         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2776         bypassing {load,store}_memory.
2777
2778         * sim-main.h (ByteSwapMem): Delete definition.
2779
2780         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2781
2782         * interp.c (sim_do_command, sim_commands): Delete mips specific
2783         commands.  Handled by module sim-options.
2784
2785         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2786         (WITH_MODULO_MEMORY): Define.
2787
2788         * interp.c (sim_info): Delete code printing memory size.
2789
2790         * interp.c (mips_size): Nee sim_size, delete function.
2791         (power2): Delete.
2792         (monitor, monitor_base, monitor_size): Delete global variables.
2793         (sim_open, sim_close): Delete code creating monitor and other
2794         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2795         manage memory regions.
2796         (load_memory, store_memory): Use sim-core for memory model.
2797
2798         * interp.c (address_translation): Delete all memory map code
2799         except line forcing 32 bit addresses.
2800
2801 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2802
2803         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2804         trace options.
2805
2806         * interp.c (logfh, logfile): Delete globals.
2807         (sim_open, sim_close): Delete code opening & closing log file.
2808         (mips_option_handler): Delete -l and -n options.
2809         (OPTION mips_options): Ditto.
2810
2811         * interp.c (OPTION mips_options): Rename option trace to dinero.
2812         (mips_option_handler): Update.
2813
2814 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2815
2816         * interp.c (fetch_str): New function.
2817         (sim_monitor): Rewrite using sim_read & sim_write.
2818         (sim_open): Check magic number.
2819         (sim_open): Write monitor vectors into memory using sim_write.
2820         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2821         (sim_read, sim_write): Simplify - transfer data one byte at a
2822         time.
2823         (load_memory, store_memory): Clarify meaning of parameter RAW.
2824
2825         * sim-main.h (isHOST): Defete definition.
2826         (isTARGET): Mark as depreciated.
2827         (address_translation): Delete parameter HOST.
2828
2829         * interp.c (address_translation): Delete parameter HOST.
2830
2831 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2832
2833         * mips.igen:
2834
2835         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2836         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2837
2838 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2839
2840         * mips.igen: Add model filter field to records.
2841
2842 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2843
2844         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2845
2846         interp.c (sim_engine_run): Do not compile function sim_engine_run
2847         when WITH_IGEN == 1.
2848
2849         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2850         target architecture.
2851
2852         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2853         igen. Replace with configuration variables sim_igen_flags /
2854         sim_m16_flags.
2855
2856         * m16.igen: New file.  Copy mips16 insns here.
2857         * mips.igen: From here.
2858
2859 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2860
2861         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2862         to top.
2863         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2864
2865 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2866
2867         * gencode.c (build_instruction): Follow sim_write's lead in using
2868         BigEndianMem instead of !ByteSwapMem.
2869
2870 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2871
2872         * configure.in (sim_gen): Dependent on target, select type of
2873         generator.  Always select old style generator.
2874
2875         configure: Re-generate.
2876
2877         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2878         targets.
2879         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2880         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2881         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2882         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2883         SIM_@sim_gen@_*, set by autoconf.
2884
2885 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2886
2887         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2888
2889         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2890         CURRENT_FLOATING_POINT instead.
2891
2892         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2893         (address_translation): Raise exception InstructionFetch when
2894         translation fails and isINSTRUCTION.
2895
2896         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2897         sim_engine_run): Change type of of vaddr and paddr to
2898         address_word.
2899         (address_translation, prefetch, load_memory, store_memory,
2900         cache_op): Change type of vAddr and pAddr to address_word.
2901
2902         * gencode.c (build_instruction): Change type of vaddr and paddr to
2903         address_word.
2904
2905 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2906
2907         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2908         macro to obtain result of ALU op.
2909
2910 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2911
2912         * interp.c (sim_info): Call profile_print.
2913
2914 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2915
2916         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2917
2918         * sim-main.h (WITH_PROFILE): Do not define, defined in
2919         common/sim-config.h.  Use sim-profile module.
2920         (simPROFILE): Delete defintion.
2921
2922         * interp.c (PROFILE): Delete definition.
2923         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2924         (sim_close): Delete code writing profile histogram.
2925         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2926         Delete.
2927         (sim_engine_run): Delete code profiling the PC.
2928
2929 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2930
2931         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2932
2933         * interp.c (sim_monitor): Make register pointers of type
2934         unsigned_word*.
2935
2936         * sim-main.h: Make registers of type unsigned_word not
2937         signed_word.
2938
2939 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2940
2941         * interp.c (sync_operation): Rename from SyncOperation, make
2942         global, add SD argument.
2943         (prefetch): Rename from Prefetch, make global, add SD argument.
2944         (decode_coproc): Make global.
2945
2946         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2947
2948         * gencode.c (build_instruction): Generate DecodeCoproc not
2949         decode_coproc calls.
2950
2951         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2952         (SizeFGR): Move to sim-main.h
2953         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2954         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2955         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2956         sim-main.h.
2957         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2958         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2959         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2960         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2961         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2962         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2963
2964         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2965         exception.
2966         (sim-alu.h): Include.
2967         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2968         (sim_cia): Typedef to instruction_address.
2969
2970 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2971
2972         * Makefile.in (interp.o): Rename generated file engine.c to
2973         oengine.c.
2974
2975         * interp.c: Update.
2976
2977 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2978
2979         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2980
2981 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2982
2983         * gencode.c (build_instruction): For "FPSQRT", output correct
2984         number of arguments to Recip.
2985
2986 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2987
2988         * Makefile.in (interp.o): Depends on sim-main.h
2989
2990         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2991
2992         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2993         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2994         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2995         STATE, DSSTATE): Define
2996         (GPR, FGRIDX, ..): Define.
2997
2998         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2999         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3000         (GPR, FGRIDX, ...): Delete macros.
3001
3002         * interp.c: Update names to match defines from sim-main.h
3003
3004 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3005
3006         * interp.c (sim_monitor): Add SD argument.
3007         (sim_warning): Delete.  Replace calls with calls to
3008         sim_io_eprintf.
3009         (sim_error): Delete. Replace calls with sim_io_error.
3010         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3011         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3012         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3013         argument.
3014         (mips_size): Rename from sim_size. Add SD argument.
3015
3016         * interp.c (simulator): Delete global variable.
3017         (callback): Delete global variable.
3018         (mips_option_handler, sim_open, sim_write, sim_read,
3019         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3020         sim_size,sim_monitor): Use sim_io_* not callback->*.
3021         (sim_open): ZALLOC simulator struct.
3022         (PROFILE): Do not define.
3023
3024 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3025
3026         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3027         support.h with corresponding code.
3028
3029         * sim-main.h (word64, uword64), support.h: Move definition to
3030         sim-main.h.
3031         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3032
3033         * support.h: Delete
3034         * Makefile.in: Update dependencies
3035         * interp.c: Do not include.
3036
3037 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3038
3039         * interp.c (address_translation, load_memory, store_memory,
3040         cache_op): Rename to from AddressTranslation et.al., make global,
3041         add SD argument
3042
3043         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3044         CacheOp): Define.
3045
3046         * interp.c (SignalException): Rename to signal_exception, make
3047         global.
3048
3049         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3050
3051         * sim-main.h (SignalException, SignalExceptionInterrupt,
3052         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3053         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3054         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3055         Define.
3056
3057         * interp.c, support.h: Use.
3058
3059 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3060
3061         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3062         to value_fpr / store_fpr. Add SD argument.
3063         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3064         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3065
3066         * sim-main.h (ValueFPR, StoreFPR): Define.
3067
3068 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3069
3070         * interp.c (sim_engine_run): Check consistency between configure
3071         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3072         and HASFPU.
3073
3074         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3075         (mips_fpu): Configure WITH_FLOATING_POINT.
3076         (mips_endian): Configure WITH_TARGET_ENDIAN.
3077         * configure: Update.
3078
3079 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3080
3081         * configure: Regenerated to track ../common/aclocal.m4 changes.
3082
3083 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3084
3085         * configure: Regenerated.
3086
3087 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3088
3089         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3090
3091 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3092
3093         * gencode.c (print_igen_insn_models): Assume certain architectures
3094         include all mips* instructions.
3095         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3096         instruction.
3097
3098         * Makefile.in (tmp.igen): Add target. Generate igen input from
3099         gencode file.
3100
3101         * gencode.c (FEATURE_IGEN): Define.
3102         (main): Add --igen option.  Generate output in igen format.
3103         (process_instructions): Format output according to igen option.
3104         (print_igen_insn_format): New function.
3105         (print_igen_insn_models): New function.
3106         (process_instructions): Only issue warnings and ignore
3107         instructions when no FEATURE_IGEN.
3108
3109 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3110
3111         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3112         MIPS targets.
3113
3114 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3115
3116         * configure: Regenerated to track ../common/aclocal.m4 changes.
3117
3118 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3119
3120         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3121         SIM_RESERVED_BITS): Delete, moved to common.
3122         (SIM_EXTRA_CFLAGS): Update.
3123
3124 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3125
3126         * configure.in: Configure non-strict memory alignment.
3127         * configure: Regenerated to track ../common/aclocal.m4 changes.
3128
3129 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3130
3131         * configure: Regenerated to track ../common/aclocal.m4 changes.
3132
3133 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3134
3135         * gencode.c (SDBBP,DERET): Added (3900) insns.
3136         (RFE): Turn on for 3900.
3137         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3138         (dsstate): Made global.
3139         (SUBTARGET_R3900): Added.
3140         (CANCELDELAYSLOT): New.
3141         (SignalException): Ignore SystemCall rather than ignore and
3142         terminate.  Add DebugBreakPoint handling.
3143         (decode_coproc): New insns RFE, DERET; and new registers Debug
3144         and DEPC protected by SUBTARGET_R3900.
3145         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3146         bits explicitly.
3147         * Makefile.in,configure.in: Add mips subtarget option.
3148         * configure: Update.
3149
3150 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3151
3152         * gencode.c: Add r3900 (tx39).
3153
3154
3155 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3156
3157         * gencode.c (build_instruction): Don't need to subtract 4 for
3158         JALR, just 2.
3159
3160 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3161
3162         * interp.c: Correct some HASFPU problems.
3163
3164 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3165
3166         * configure: Regenerated to track ../common/aclocal.m4 changes.
3167
3168 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3169
3170         * interp.c (mips_options): Fix samples option short form, should
3171         be `x'.
3172
3173 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3174
3175         * interp.c (sim_info): Enable info code.  Was just returning.
3176
3177 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3178
3179         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3180         MFC0.
3181
3182 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3183
3184         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3185         constants.
3186         (build_instruction): Ditto for LL.
3187
3188 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3189
3190         * configure: Regenerated to track ../common/aclocal.m4 changes.
3191
3192 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3193
3194         * configure: Regenerated to track ../common/aclocal.m4 changes.
3195         * config.in: Ditto.
3196
3197 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3198
3199         * interp.c (sim_open): Add call to sim_analyze_program, update
3200         call to sim_config.
3201
3202 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3203
3204         * interp.c (sim_kill): Delete.
3205         (sim_create_inferior): Add ABFD argument. Set PC from same.
3206         (sim_load): Move code initializing trap handlers from here.
3207         (sim_open): To here.
3208         (sim_load): Delete, use sim-hload.c.
3209
3210         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3211
3212 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3213
3214         * configure: Regenerated to track ../common/aclocal.m4 changes.
3215         * config.in: Ditto.
3216
3217 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3218
3219         * interp.c (sim_open): Add ABFD argument.
3220         (sim_load): Move call to sim_config from here.
3221         (sim_open): To here.  Check return status.
3222
3223 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3224
3225         * gencode.c (build_instruction): Two arg MADD should
3226         not assign result to $0.
3227
3228 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3229
3230         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3231         * sim/mips/configure.in: Regenerate.
3232
3233 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3234
3235         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3236         signed8, unsigned8 et.al. types.
3237
3238         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3239         hosts when selecting subreg.
3240
3241 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3242
3243         * interp.c (sim_engine_run): Reset the ZERO register to zero
3244         regardless of FEATURE_WARN_ZERO.
3245         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3246
3247 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3248
3249         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3250         (SignalException): For BreakPoints ignore any mode bits and just
3251         save the PC.
3252         (SignalException): Always set the CAUSE register.
3253
3254 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3255
3256         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3257         exception has been taken.
3258
3259         * interp.c: Implement the ERET and mt/f sr instructions.
3260
3261 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3262
3263         * interp.c (SignalException): Don't bother restarting an
3264         interrupt.
3265
3266 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3267
3268         * interp.c (SignalException): Really take an interrupt.
3269         (interrupt_event): Only deliver interrupts when enabled.
3270
3271 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3272
3273         * interp.c (sim_info): Only print info when verbose.
3274         (sim_info) Use sim_io_printf for output.
3275
3276 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3277
3278         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3279         mips architectures.
3280
3281 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3282
3283         * interp.c (sim_do_command): Check for common commands if a
3284         simulator specific command fails.
3285
3286 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3287
3288         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3289         and simBE when DEBUG is defined.
3290
3291 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3292
3293         * interp.c (interrupt_event): New function.  Pass exception event
3294         onto exception handler.
3295
3296         * configure.in: Check for stdlib.h.
3297         * configure: Regenerate.
3298
3299         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3300         variable declaration.
3301         (build_instruction): Initialize memval1.
3302         (build_instruction): Add UNUSED attribute to byte, bigend,
3303         reverse.
3304         (build_operands): Ditto.
3305
3306         * interp.c: Fix GCC warnings.
3307         (sim_get_quit_code): Delete.
3308
3309         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3310         * Makefile.in: Ditto.
3311         * configure: Re-generate.
3312
3313         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3314
3315 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3316
3317         * interp.c (mips_option_handler): New function parse argumes using
3318         sim-options.
3319         (myname): Replace with STATE_MY_NAME.
3320         (sim_open): Delete check for host endianness - performed by
3321         sim_config.
3322         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3323         (sim_open): Move much of the initialization from here.
3324         (sim_load): To here.  After the image has been loaded and
3325         endianness set.
3326         (sim_open): Move ColdReset from here.
3327         (sim_create_inferior): To here.
3328         (sim_open): Make FP check less dependant on host endianness.
3329
3330         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3331         run.
3332         * interp.c (sim_set_callbacks): Delete.
3333
3334         * interp.c (membank, membank_base, membank_size): Replace with
3335         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3336         (sim_open): Remove call to callback->init. gdb/run do this.
3337
3338         * interp.c: Update
3339
3340         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3341
3342         * interp.c (big_endian_p): Delete, replaced by
3343         current_target_byte_order.
3344
3345 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3346
3347         * interp.c (host_read_long, host_read_word, host_swap_word,
3348         host_swap_long): Delete. Using common sim-endian.
3349         (sim_fetch_register, sim_store_register): Use H2T.
3350         (pipeline_ticks): Delete.  Handled by sim-events.
3351         (sim_info): Update.
3352         (sim_engine_run): Update.
3353
3354 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3355
3356         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3357         reason from here.
3358         (SignalException): To here. Signal using sim_engine_halt.
3359         (sim_stop_reason): Delete, moved to common.
3360
3361 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3362
3363         * interp.c (sim_open): Add callback argument.
3364         (sim_set_callbacks): Delete SIM_DESC argument.
3365         (sim_size): Ditto.
3366
3367 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3368
3369         * Makefile.in (SIM_OBJS): Add common modules.
3370
3371         * interp.c (sim_set_callbacks): Also set SD callback.
3372         (set_endianness, xfer_*, swap_*): Delete.
3373         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3374         Change to functions using sim-endian macros.
3375         (control_c, sim_stop): Delete, use common version.
3376         (simulate): Convert into.
3377         (sim_engine_run): This function.
3378         (sim_resume): Delete.
3379
3380         * interp.c (simulation): New variable - the simulator object.
3381         (sim_kind): Delete global - merged into simulation.
3382         (sim_load): Cleanup.  Move PC assignment from here.
3383         (sim_create_inferior): To here.
3384
3385         * sim-main.h: New file.
3386         * interp.c (sim-main.h): Include.
3387
3388 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3389
3390         * configure: Regenerated to track ../common/aclocal.m4 changes.
3391
3392 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3393
3394         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3395
3396 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3397
3398         * gencode.c (build_instruction): DIV instructions: check
3399         for division by zero and integer overflow before using
3400         host's division operation.
3401
3402 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3403
3404         * Makefile.in (SIM_OBJS): Add sim-load.o.
3405         * interp.c: #include bfd.h.
3406         (target_byte_order): Delete.
3407         (sim_kind, myname, big_endian_p): New static locals.
3408         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3409         after argument parsing.  Recognize -E arg, set endianness accordingly.
3410         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3411         load file into simulator.  Set PC from bfd.
3412         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3413         (set_endianness): Use big_endian_p instead of target_byte_order.
3414
3415 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3416
3417         * interp.c (sim_size): Delete prototype - conflicts with
3418         definition in remote-sim.h.  Correct definition.
3419
3420 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3421
3422         * configure: Regenerated to track ../common/aclocal.m4 changes.
3423         * config.in: Ditto.
3424
3425 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3426
3427         * interp.c (sim_open): New arg `kind'.
3428
3429         * configure: Regenerated to track ../common/aclocal.m4 changes.
3430
3431 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3432
3433         * configure: Regenerated to track ../common/aclocal.m4 changes.
3434
3435 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3436
3437         * interp.c (sim_open): Set optind to 0 before calling getopt.
3438
3439 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3440
3441         * configure: Regenerated to track ../common/aclocal.m4 changes.
3442
3443 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3444
3445         * interp.c : Replace uses of pr_addr with pr_uword64
3446         where the bit length is always 64 independent of SIM_ADDR.
3447         (pr_uword64) : added.
3448
3449 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3450
3451         * configure: Re-generate.
3452
3453 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3454
3455         * configure: Regenerate to track ../common/aclocal.m4 changes.
3456
3457 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3458
3459         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3460         in argv form.
3461         (other sim_*): New SIM_DESC argument.
3462
3463 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3464
3465         * interp.c: Fix printing of addresses for non-64-bit targets.
3466         (pr_addr): Add function to print address based on size.
3467
3468 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3469
3470         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3471
3472 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3473
3474         * gencode.c (build_mips16_operands): Correct computation of base
3475         address for extended PC relative instruction.
3476
3477 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3478
3479         * interp.c (mips16_entry): Add support for floating point cases.
3480         (SignalException): Pass floating point cases to mips16_entry.
3481         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3482         registers.
3483         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3484         or fmt_word.
3485         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3486         and then set the state to fmt_uninterpreted.
3487         (COP_SW): Temporarily set the state to fmt_word while calling
3488         ValueFPR.
3489
3490 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3491
3492         * gencode.c (build_instruction): The high order may be set in the
3493         comparison flags at any ISA level, not just ISA 4.
3494
3495 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3496
3497         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3498         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3499         * configure.in: sinclude ../common/aclocal.m4.
3500         * configure: Regenerated.
3501
3502 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3503
3504         * configure: Rebuild after change to aclocal.m4.
3505
3506 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3507
3508         * configure configure.in Makefile.in:  Update to new configure
3509         scheme which is more compatible with WinGDB builds.
3510         * configure.in:  Improve comment on how to run autoconf.
3511         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3512         * Makefile.in:  Use autoconf substitution to install common
3513         makefile fragment.
3514
3515 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3516
3517         * gencode.c (build_instruction): Use BigEndianCPU instead of
3518         ByteSwapMem.
3519
3520 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3521
3522         * interp.c (sim_monitor): Make output to stdout visible in
3523         wingdb's I/O log window.
3524
3525 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3526
3527         * support.h: Undo previous change to SIGTRAP
3528         and SIGQUIT values.
3529
3530 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3531
3532         * interp.c (store_word, load_word): New static functions.
3533         (mips16_entry): New static function.
3534         (SignalException): Look for mips16 entry and exit instructions.
3535         (simulate): Use the correct index when setting fpr_state after
3536         doing a pending move.
3537
3538 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3539
3540         * interp.c: Fix byte-swapping code throughout to work on
3541         both little- and big-endian hosts.
3542
3543 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3544
3545         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3546         with gdb/config/i386/xm-windows.h.
3547
3548 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3549
3550         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3551         that messes up arithmetic shifts.
3552
3553 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3554
3555         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3556         SIGTRAP and SIGQUIT for _WIN32.
3557
3558 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3559
3560         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3561         force a 64 bit multiplication.
3562         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3563         destination register is 0, since that is the default mips16 nop
3564         instruction.
3565
3566 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3567
3568         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3569         (build_endian_shift): Don't check proc64.
3570         (build_instruction): Always set memval to uword64.  Cast op2 to
3571         uword64 when shifting it left in memory instructions.  Always use
3572         the same code for stores--don't special case proc64.
3573
3574         * gencode.c (build_mips16_operands): Fix base PC value for PC
3575         relative operands.
3576         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3577         jal instruction.
3578         * interp.c (simJALDELAYSLOT): Define.
3579         (JALDELAYSLOT): Define.
3580         (INDELAYSLOT, INJALDELAYSLOT): Define.
3581         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3582
3583 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3584
3585         * interp.c (sim_open): add flush_cache as a PMON routine
3586         (sim_monitor): handle flush_cache by ignoring it
3587
3588 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3589
3590         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3591         BigEndianMem.
3592         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3593         (BigEndianMem): Rename to ByteSwapMem and change sense.
3594         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3595         BigEndianMem references to !ByteSwapMem.
3596         (set_endianness): New function, with prototype.
3597         (sim_open): Call set_endianness.
3598         (sim_info): Use simBE instead of BigEndianMem.
3599         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3600         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3601         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3602         ifdefs, keeping the prototype declaration.
3603         (swap_word): Rewrite correctly.
3604         (ColdReset): Delete references to CONFIG.  Delete endianness related
3605         code; moved to set_endianness.
3606
3607 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3608
3609         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3610         * interp.c (CHECKHILO): Define away.
3611         (simSIGINT): New macro.
3612         (membank_size): Increase from 1MB to 2MB.
3613         (control_c): New function.
3614         (sim_resume): Rename parameter signal to signal_number.  Add local
3615         variable prev.  Call signal before and after simulate.
3616         (sim_stop_reason): Add simSIGINT support.
3617         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3618         functions always.
3619         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3620         if logfh is NULL.
3621         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3622         a call to sim_warning.
3623
3624 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3625
3626         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3627         16 bit instructions.
3628
3629 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3630
3631         Add support for mips16 (16 bit MIPS implementation):
3632         * gencode.c (inst_type): Add mips16 instruction encoding types.
3633         (GETDATASIZEINSN): Define.
3634         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3635         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3636         mtlo.
3637         (MIPS16_DECODE): New table, for mips16 instructions.
3638         (bitmap_val): New static function.
3639         (struct mips16_op): Define.
3640         (mips16_op_table): New table, for mips16 operands.
3641         (build_mips16_operands): New static function.
3642         (process_instructions): If PC is odd, decode a mips16
3643         instruction.  Break out instruction handling into new
3644         build_instruction function.
3645         (build_instruction): New static function, broken out of
3646         process_instructions.  Check modifiers rather than flags for SHIFT
3647         bit count and m[ft]{hi,lo} direction.
3648         (usage): Pass program name to fprintf.
3649         (main): Remove unused variable this_option_optind.  Change
3650         ``*loptarg++'' to ``loptarg++''.
3651         (my_strtoul): Parenthesize && within ||.
3652         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3653         (simulate): If PC is odd, fetch a 16 bit instruction, and
3654         increment PC by 2 rather than 4.
3655         * configure.in: Add case for mips16*-*-*.
3656         * configure: Rebuild.
3657
3658 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3659
3660         * interp.c: Allow -t to enable tracing in standalone simulator.
3661         Fix garbage output in trace file and error messages.
3662
3663 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3664
3665         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3666         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3667         * configure.in: Simplify using macros in ../common/aclocal.m4.
3668         * configure: Regenerated.
3669         * tconfig.in: New file.
3670
3671 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3672
3673         * interp.c: Fix bugs in 64-bit port.
3674         Use ansi function declarations for msvc compiler.
3675         Initialize and test file pointer in trace code.
3676         Prevent duplicate definition of LAST_EMED_REGNUM.
3677
3678 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3679
3680         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3681
3682 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3683
3684         * interp.c (SignalException): Check for explicit terminating
3685         breakpoint value.
3686         * gencode.c: Pass instruction value through SignalException()
3687         calls for Trap, Breakpoint and Syscall.
3688
3689 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3690
3691         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3692         only used on those hosts that provide it.
3693         * configure.in: Add sqrt() to list of functions to be checked for.
3694         * config.in: Re-generated.
3695         * configure: Re-generated.
3696
3697 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3698
3699         * gencode.c (process_instructions): Call build_endian_shift when
3700         expanding STORE RIGHT, to fix swr.
3701         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3702         clear the high bits.
3703         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3704         Fix float to int conversions to produce signed values.
3705
3706 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3707
3708         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3709         (process_instructions): Correct handling of nor instruction.
3710         Correct shift count for 32 bit shift instructions. Correct sign
3711         extension for arithmetic shifts to not shift the number of bits in
3712         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3713         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3714         Fix madd.
3715         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3716         It's OK to have a mult follow a mult.  What's not OK is to have a
3717         mult follow an mfhi.
3718         (Convert): Comment out incorrect rounding code.
3719
3720 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3721
3722         * interp.c (sim_monitor): Improved monitor printf
3723         simulation. Tidied up simulator warnings, and added "--log" option
3724         for directing warning message output.
3725         * gencode.c: Use sim_warning() rather than WARNING macro.
3726
3727 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3728
3729         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3730         getopt1.o, rather than on gencode.c.  Link objects together.
3731         Don't link against -liberty.
3732         (gencode.o, getopt.o, getopt1.o): New targets.
3733         * gencode.c: Include <ctype.h> and "ansidecl.h".
3734         (AND): Undefine after including "ansidecl.h".
3735         (ULONG_MAX): Define if not defined.
3736         (OP_*): Don't define macros; now defined in opcode/mips.h.
3737         (main): Call my_strtoul rather than strtoul.
3738         (my_strtoul): New static function.
3739
3740 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3741
3742         * gencode.c (process_instructions):  Generate word64 and uword64
3743         instead of `long long' and `unsigned long long' data types.
3744         * interp.c:  #include sysdep.h to get signals, and define default
3745         for SIGBUS.
3746         * (Convert):  Work around for Visual-C++ compiler bug with type
3747         conversion.
3748         * support.h:  Make things compile under Visual-C++ by using
3749         __int64 instead of `long long'.  Change many refs to long long
3750         into word64/uword64 typedefs.
3751
3752 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3753
3754         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3755         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3756         (docdir): Removed.
3757         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3758         (AC_PROG_INSTALL): Added.
3759         (AC_PROG_CC): Moved to before configure.host call.
3760         * configure: Rebuilt.
3761
3762 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3763
3764         * configure.in: Define @SIMCONF@ depending on mips target.
3765         * configure: Rebuild.
3766         * Makefile.in (run): Add @SIMCONF@ to control simulator
3767         construction.
3768         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3769         * interp.c: Remove some debugging, provide more detailed error
3770         messages, update memory accesses to use LOADDRMASK.
3771
3772 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3773
3774         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3775         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3776         stamp-h.
3777         * configure: Rebuild.
3778         * config.in: New file, generated by autoheader.
3779         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3780         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3781         HAVE_ANINT and HAVE_AINT, as appropriate.
3782         * Makefile.in (run): Use @LIBS@ rather than -lm.
3783         (interp.o): Depend upon config.h.
3784         (Makefile): Just rebuild Makefile.
3785         (clean): Remove stamp-h.
3786         (mostlyclean): Make the same as clean, not as distclean.
3787         (config.h, stamp-h): New targets.
3788
3789 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3790
3791         * interp.c (ColdReset): Fix boolean test. Make all simulator
3792         globals static.
3793
3794 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3795
3796         * interp.c (xfer_direct_word, xfer_direct_long,
3797         swap_direct_word, swap_direct_long, xfer_big_word,
3798         xfer_big_long, xfer_little_word, xfer_little_long,
3799         swap_word,swap_long): Added.
3800         * interp.c (ColdReset): Provide function indirection to
3801         host<->simulated_target transfer routines.
3802         * interp.c (sim_store_register, sim_fetch_register): Updated to
3803         make use of indirected transfer routines.
3804
3805 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3806
3807         * gencode.c (process_instructions): Ensure FP ABS instruction
3808         recognised.
3809         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3810         system call support.
3811
3812 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3813
3814         * interp.c (sim_do_command): Complain if callback structure not
3815         initialised.
3816
3817 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3818
3819         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3820         support for Sun hosts.
3821         * Makefile.in (gencode): Ensure the host compiler and libraries
3822         used for cross-hosted build.
3823
3824 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3825
3826         * interp.c, gencode.c: Some more (TODO) tidying.
3827
3828 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3829
3830         * gencode.c, interp.c: Replaced explicit long long references with
3831         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3832         * support.h (SET64LO, SET64HI): Macros added.
3833
3834 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3835
3836         * configure: Regenerate with autoconf 2.7.
3837
3838 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3839
3840         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3841         * support.h: Remove superfluous "1" from #if.
3842         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3843
3844 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3845
3846         * interp.c (StoreFPR): Control UndefinedResult() call on
3847         WARN_RESULT manifest.
3848
3849 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3850
3851         * gencode.c: Tidied instruction decoding, and added FP instruction
3852         support.
3853
3854         * interp.c: Added dineroIII, and BSD profiling support. Also
3855         run-time FP handling.
3856
3857 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3858
3859         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3860         gencode.c, interp.c, support.h: created.