1 2001-04-12 Jim Blandy <jimb@redhat.com>
3 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
4 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
6 * sim-main.h (COCIDX): Remove definition; this isn't supported by
7 PENDING_FILL, and you can get the intended effect gracefully by
8 calling PENDING_SCHED directly.
10 2001-02-23 Ben Elliston <bje@redhat.com>
12 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
13 already defined elsewhere.
15 2001-02-19 Ben Elliston <bje@redhat.com>
17 * sim-main.h (sim_monitor): Return an int.
18 * interp.c (sim_monitor): Add return values.
19 (signal_exception): Handle error conditions from sim_monitor.
21 2001-02-08 Ben Elliston <bje@redhat.com>
23 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
24 (store_memory): Likewise, pass cia to sim_core_write*.
26 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
28 On advice from Chris G. Demetriou <cgd@sibyte.com>:
29 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
31 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
33 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
34 * Makefile.in: Don't delete *.igen when cleaning directory.
36 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
38 * m16.igen (break): Call SignalException not sim_engine_halt.
40 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
43 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
45 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
47 * mips.igen (MxC1, DMxC1): Fix printf formatting.
49 2000-05-24 Michael Hayes <mhayes@cygnus.com>
51 * mips.igen (do_dmultx): Fix typo.
53 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
55 * configure: Regenerated to track ../common/aclocal.m4 changes.
57 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
59 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
61 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
63 * sim-main.h (GPR_CLEAR): Define macro.
65 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
67 * interp.c (decode_coproc): Output long using %lx and not %s.
69 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
71 * interp.c (sim_open): Sort & extend dummy memory regions for
72 --board=jmr3904 for eCos.
74 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
76 * configure: Regenerated.
78 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
80 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
81 calls, conditional on the simulator being in verbose mode.
83 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
85 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
86 cache don't get ReservedInstruction traps.
88 1999-11-29 Mark Salter <msalter@cygnus.com>
90 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
91 to clear status bits in sdisr register. This is how the hardware works.
93 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
96 1999-11-11 Andrew Haley <aph@cygnus.com>
98 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
101 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
103 * mips.igen (MULT): Correct previous mis-applied patch.
105 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
107 * mips.igen (delayslot32): Handle sequence like
108 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
109 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
110 (MULT): Actually pass the third register...
112 1999-09-03 Mark Salter <msalter@cygnus.com>
114 * interp.c (sim_open): Added more memory aliases for additional
115 hardware being touched by cygmon on jmr3904 board.
117 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
119 * configure: Regenerated to track ../common/aclocal.m4 changes.
121 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
123 * interp.c (sim_store_register): Handle case where client - GDB -
124 specifies that a 4 byte register is 8 bytes in size.
125 (sim_fetch_register): Ditto.
127 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
129 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
130 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
131 (idt_monitor_base): Base address for IDT monitor traps.
132 (pmon_monitor_base): Ditto for PMON.
133 (lsipmon_monitor_base): Ditto for LSI PMON.
134 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
135 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
136 (sim_firmware_command): New function.
137 (mips_option_handler): Call it for OPTION_FIRMWARE.
138 (sim_open): Allocate memory for idt_monitor region. If "--board"
139 option was given, add no monitor by default. Add BREAK hooks only if
140 monitors are also there.
142 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
144 * interp.c (sim_monitor): Flush output before reading input.
146 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
148 * tconfig.in (SIM_HANDLES_LMA): Always define.
150 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
152 From Mark Salter <msalter@cygnus.com>:
153 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
154 (sim_open): Add setup for BSP board.
156 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
158 * mips.igen (MULT, MULTU): Add syntax for two operand version.
159 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
160 them as unimplemented.
162 1999-05-08 Felix Lee <flee@cygnus.com>
164 * configure: Regenerated to track ../common/aclocal.m4 changes.
166 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
168 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
170 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
172 * configure.in: Any mips64vr5*-*-* target should have
173 -DTARGET_ENABLE_FR=1.
174 (default_endian): Any mips64vr*el-*-* target should default to
176 * configure: Re-generate.
178 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
180 * mips.igen (ldl): Extend from _16_, not 32.
182 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
184 * interp.c (sim_store_register): Force registers written to by GDB
185 into an un-interpreted state.
187 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
189 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
190 CPU, start periodic background I/O polls.
191 (tx3904sio_poll): New function: periodic I/O poller.
193 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
195 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
197 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
199 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
202 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
204 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
205 (load_word): Call SIM_CORE_SIGNAL hook on error.
206 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
207 starting. For exception dispatching, pass PC instead of NULL_CIA.
208 (decode_coproc): Use COP0_BADVADDR to store faulting address.
209 * sim-main.h (COP0_BADVADDR): Define.
210 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
211 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
212 (_sim_cpu): Add exc_* fields to store register value snapshots.
213 * mips.igen (*): Replace memory-related SignalException* calls
214 with references to SIM_CORE_SIGNAL hook.
216 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
218 * sim-main.c (*): Minor warning cleanups.
220 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
222 * m16.igen (DADDIU5): Correct type-o.
224 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
226 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
229 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
231 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
233 (interp.o): Add dependency on itable.h
234 (oengine.c, gencode): Delete remaining references.
235 (BUILT_SRC_FROM_GEN): Clean up.
237 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
240 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
241 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
243 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
244 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
245 Drop the "64" qualifier to get the HACK generator working.
246 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
247 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
248 qualifier to get the hack generator working.
249 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
251 (DSLLV): Use do_dsllv.
254 (DSRLV): Use do_dsrlv.
255 (BC1): Move *vr4100 to get the HACK generator working.
256 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
257 get the HACK generator working.
258 (MACC) Rename to get the HACK generator working.
259 (DMACC,MACCS,DMACCS): Add the 64.
261 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
263 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
264 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
266 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
268 * mips/interp.c (DEBUG): Cleanups.
270 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
272 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
273 (tx3904sio_tickle): fflush after a stdout character output.
275 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
277 * interp.c (sim_close): Uninstall modules.
279 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
281 * sim-main.h, interp.c (sim_monitor): Change to global
284 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
286 * configure.in (vr4100): Only include vr4100 instructions in
288 * configure: Re-generate.
289 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
291 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
293 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
294 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
297 * configure.in (sim_default_gen, sim_use_gen): Replace with
299 (--enable-sim-igen): Delete config option. Always using IGEN.
300 * configure: Re-generate.
302 * Makefile.in (gencode): Kill, kill, kill.
305 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
307 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
308 bit mips16 igen simulator.
309 * configure: Re-generate.
311 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
312 as part of vr4100 ISA.
313 * vr.igen: Mark all instructions as 64 bit only.
315 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
317 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
320 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
322 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
323 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
324 * configure: Re-generate.
326 * m16.igen (BREAK): Define breakpoint instruction.
327 (JALX32): Mark instruction as mips16 and not r3900.
328 * mips.igen (C.cond.fmt): Fix typo in instruction format.
330 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
332 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
334 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
335 insn as a debug breakpoint.
337 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
339 (PENDING_SCHED): Clean up trace statement.
340 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
341 (PENDING_FILL): Delay write by only one cycle.
342 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
344 * sim-main.c (pending_tick): Clean up trace statements. Add trace
346 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
348 (pending_tick): Move incrementing of index to FOR statement.
349 (pending_tick): Only update PENDING_OUT after a write has occured.
351 * configure.in: Add explicit mips-lsi-* target. Use gencode to
353 * configure: Re-generate.
355 * interp.c (sim_engine_run OLD): Delete explicit call to
356 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
358 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
360 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
361 interrupt level number to match changed SignalExceptionInterrupt
364 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
366 * interp.c: #include "itable.h" if WITH_IGEN.
367 (get_insn_name): New function.
368 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
369 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
371 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
373 * configure: Rebuilt to inhale new common/aclocal.m4.
375 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
377 * dv-tx3904sio.c: Include sim-assert.h.
379 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
381 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
382 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
383 Reorganize target-specific sim-hardware checks.
384 * configure: rebuilt.
385 * interp.c (sim_open): For tx39 target boards, set
386 OPERATING_ENVIRONMENT, add tx3904sio devices.
387 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
388 ROM executables. Install dv-sockser into sim-modules list.
390 * dv-tx3904irc.c: Compiler warning clean-up.
391 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
392 frequent hw-trace messages.
394 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
396 * vr.igen (MulAcc): Identify as a vr4100 specific function.
398 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
400 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
403 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
404 * mips.igen: Define vr4100 model. Include vr.igen.
405 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
407 * mips.igen (check_mf_hilo): Correct check.
409 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
411 * sim-main.h (interrupt_event): Add prototype.
413 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
414 register_ptr, register_value.
415 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
417 * sim-main.h (tracefh): Make extern.
419 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
421 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
422 Reduce unnecessarily high timer event frequency.
423 * dv-tx3904cpu.c: Ditto for interrupt event.
425 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
427 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
429 (interrupt_event): Made non-static.
431 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
432 interchange of configuration values for external vs. internal
435 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
437 * mips.igen (BREAK): Moved code to here for
438 simulator-reserved break instructions.
439 * gencode.c (build_instruction): Ditto.
440 * interp.c (signal_exception): Code moved from here. Non-
441 reserved instructions now use exception vector, rather
443 * sim-main.h: Moved magic constants to here.
445 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
447 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
448 register upon non-zero interrupt event level, clear upon zero
450 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
451 by passing zero event value.
452 (*_io_{read,write}_buffer): Endianness fixes.
453 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
454 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
456 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
457 serial I/O and timer module at base address 0xFFFF0000.
459 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
461 * mips.igen (SWC1) : Correct the handling of ReverseEndian
464 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
466 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
470 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
472 * dv-tx3904tmr.c: New file - implements tx3904 timer.
473 * dv-tx3904{irc,cpu}.c: Mild reformatting.
474 * configure.in: Include tx3904tmr in hw_device list.
475 * configure: Rebuilt.
476 * interp.c (sim_open): Instantiate three timer instances.
477 Fix address typo of tx3904irc instance.
479 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
481 * interp.c (signal_exception): SystemCall exception now uses
482 the exception vector.
484 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
486 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
489 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
491 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
493 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
495 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
497 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
498 sim-main.h. Declare a struct hw_descriptor instead of struct
499 hw_device_descriptor.
501 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
503 * mips.igen (do_store_left, do_load_left): Compute nr of left and
504 right bits and then re-align left hand bytes to correct byte
505 lanes. Fix incorrect computation in do_store_left when loading
506 bytes from second word.
508 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
510 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
511 * interp.c (sim_open): Only create a device tree when HW is
514 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
515 * interp.c (signal_exception): Ditto.
517 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
519 * gencode.c: Mark BEGEZALL as LIKELY.
521 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
523 * sim-main.h (ALU32_END): Sign extend 32 bit results.
524 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
526 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
528 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
529 modules. Recognize TX39 target with "mips*tx39" pattern.
530 * configure: Rebuilt.
531 * sim-main.h (*): Added many macros defining bits in
532 TX39 control registers.
533 (SignalInterrupt): Send actual PC instead of NULL.
534 (SignalNMIReset): New exception type.
535 * interp.c (board): New variable for future use to identify
536 a particular board being simulated.
537 (mips_option_handler,mips_options): Added "--board" option.
538 (interrupt_event): Send actual PC.
539 (sim_open): Make memory layout conditional on board setting.
540 (signal_exception): Initial implementation of hardware interrupt
541 handling. Accept another break instruction variant for simulator
543 (decode_coproc): Implement RFE instruction for TX39.
544 (mips.igen): Decode RFE instruction as such.
545 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
546 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
547 bbegin to implement memory map.
548 * dv-tx3904cpu.c: New file.
549 * dv-tx3904irc.c: New file.
551 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
553 * mips.igen (check_mt_hilo): Create a separate r3900 version.
555 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
557 * tx.igen (madd,maddu): Replace calls to check_op_hilo
558 with calls to check_div_hilo.
560 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
562 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
563 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
564 Add special r3900 version of do_mult_hilo.
565 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
566 with calls to check_mult_hilo.
567 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
568 with calls to check_div_hilo.
570 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
572 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
573 Document a replacement.
575 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
577 * interp.c (sim_monitor): Make mon_printf work.
579 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
581 * sim-main.h (INSN_NAME): New arg `cpu'.
583 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
585 * configure: Regenerated to track ../common/aclocal.m4 changes.
587 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
589 * configure: Regenerated to track ../common/aclocal.m4 changes.
592 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
594 * acconfig.h: New file.
595 * configure.in: Reverted change of Apr 24; use sinclude again.
597 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
599 * configure: Regenerated to track ../common/aclocal.m4 changes.
602 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
604 * configure.in: Don't call sinclude.
606 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
608 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
610 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
612 * mips.igen (ERET): Implement.
614 * interp.c (decode_coproc): Return sign-extended EPC.
616 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
618 * interp.c (signal_exception): Do not ignore Trap.
619 (signal_exception): On TRAP, restart at exception address.
620 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
621 (signal_exception): Update.
622 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
623 so that TRAP instructions are caught.
625 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
627 * sim-main.h (struct hilo_access, struct hilo_history): Define,
628 contains HI/LO access history.
629 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
630 (HIACCESS, LOACCESS): Delete, replace with
631 (HIHISTORY, LOHISTORY): New macros.
632 (CHECKHILO): Delete all, moved to mips.igen
634 * gencode.c (build_instruction): Do not generate checks for
635 correct HI/LO register usage.
637 * interp.c (old_engine_run): Delete checks for correct HI/LO
640 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
641 check_mf_cycles): New functions.
642 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
643 do_divu, domultx, do_mult, do_multu): Use.
645 * tx.igen ("madd", "maddu"): Use.
647 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
649 * mips.igen (DSRAV): Use function do_dsrav.
650 (SRAV): Use new function do_srav.
652 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
653 (B): Sign extend 11 bit immediate.
654 (EXT-B*): Shift 16 bit immediate left by 1.
655 (ADDIU*): Don't sign extend immediate value.
657 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
659 * m16run.c (sim_engine_run): Restore CIA after handling an event.
661 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
664 * mips.igen (delayslot32, nullify_next_insn): New functions.
665 (m16.igen): Always include.
666 (do_*): Add more tracing.
668 * m16.igen (delayslot16): Add NIA argument, could be called by a
669 32 bit MIPS16 instruction.
671 * interp.c (ifetch16): Move function from here.
672 * sim-main.c (ifetch16): To here.
674 * sim-main.c (ifetch16, ifetch32): Update to match current
675 implementations of LH, LW.
676 (signal_exception): Don't print out incorrect hex value of illegal
679 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
681 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
684 * m16.igen: Implement MIPS16 instructions.
686 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
687 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
688 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
689 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
690 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
691 bodies of corresponding code from 32 bit insn to these. Also used
692 by MIPS16 versions of functions.
694 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
695 (IMEM16): Drop NR argument from macro.
697 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
699 * Makefile.in (SIM_OBJS): Add sim-main.o.
701 * sim-main.h (address_translation, load_memory, store_memory,
702 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
704 (pr_addr, pr_uword64): Declare.
705 (sim-main.c): Include when H_REVEALS_MODULE_P.
707 * interp.c (address_translation, load_memory, store_memory,
708 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
710 * sim-main.c: To here. Fix compilation problems.
712 * configure.in: Enable inlining.
713 * configure: Re-config.
715 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
717 * configure: Regenerated to track ../common/aclocal.m4 changes.
719 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
721 * mips.igen: Include tx.igen.
722 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
723 * tx.igen: New file, contains MADD and MADDU.
725 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
726 the hardwired constant `7'.
727 (store_memory): Ditto.
728 (LOADDRMASK): Move definition to sim-main.h.
730 mips.igen (MTC0): Enable for r3900.
733 mips.igen (do_load_byte): Delete.
734 (do_load, do_store, do_load_left, do_load_write, do_store_left,
735 do_store_right): New functions.
736 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
738 configure.in: Let the tx39 use igen again.
741 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
743 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
744 not an address sized quantity. Return zero for cache sizes.
746 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
748 * mips.igen (r3900): r3900 does not support 64 bit integer
751 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
753 * configure.in (mipstx39*-*-*): Use gencode simulator rather
755 * configure : Rebuild.
757 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
759 * configure: Regenerated to track ../common/aclocal.m4 changes.
761 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
763 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
765 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
767 * configure: Regenerated to track ../common/aclocal.m4 changes.
768 * config.in: Regenerated to track ../common/aclocal.m4 changes.
770 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
772 * configure: Regenerated to track ../common/aclocal.m4 changes.
774 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
776 * interp.c (Max, Min): Comment out functions. Not yet used.
778 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
780 * configure: Regenerated to track ../common/aclocal.m4 changes.
782 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
784 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
785 configurable settings for stand-alone simulator.
787 * configure.in: Added X11 search, just in case.
789 * configure: Regenerated.
791 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
793 * interp.c (sim_write, sim_read, load_memory, store_memory):
794 Replace sim_core_*_map with read_map, write_map, exec_map resp.
796 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
798 * sim-main.h (GETFCC): Return an unsigned value.
800 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
802 * mips.igen (DIV): Fix check for -1 / MIN_INT.
803 (DADD): Result destination is RD not RT.
805 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
807 * sim-main.h (HIACCESS, LOACCESS): Always define.
809 * mdmx.igen (Maxi, Mini): Rename Max, Min.
811 * interp.c (sim_info): Delete.
813 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
815 * interp.c (DECLARE_OPTION_HANDLER): Use it.
816 (mips_option_handler): New argument `cpu'.
817 (sim_open): Update call to sim_add_option_table.
819 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
821 * mips.igen (CxC1): Add tracing.
823 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
825 * sim-main.h (Max, Min): Declare.
827 * interp.c (Max, Min): New functions.
829 * mips.igen (BC1): Add tracing.
831 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
833 * interp.c Added memory map for stack in vr4100
835 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
837 * interp.c (load_memory): Add missing "break"'s.
839 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
841 * interp.c (sim_store_register, sim_fetch_register): Pass in
842 length parameter. Return -1.
844 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
846 * interp.c: Added hardware init hook, fixed warnings.
848 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
850 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
852 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
854 * interp.c (ifetch16): New function.
856 * sim-main.h (IMEM32): Rename IMEM.
857 (IMEM16_IMMED): Define.
859 (DELAY_SLOT): Update.
861 * m16run.c (sim_engine_run): New file.
863 * m16.igen: All instructions except LB.
864 (LB): Call do_load_byte.
865 * mips.igen (do_load_byte): New function.
866 (LB): Call do_load_byte.
868 * mips.igen: Move spec for insn bit size and high bit from here.
869 * Makefile.in (tmp-igen, tmp-m16): To here.
871 * m16.dc: New file, decode mips16 instructions.
873 * Makefile.in (SIM_NO_ALL): Define.
874 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
876 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
878 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
879 point unit to 32 bit registers.
880 * configure: Re-generate.
882 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
884 * configure.in (sim_use_gen): Make IGEN the default simulator
885 generator for generic 32 and 64 bit mips targets.
886 * configure: Re-generate.
888 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
890 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
893 * interp.c (sim_fetch_register, sim_store_register): Read/write
894 FGR from correct location.
895 (sim_open): Set size of FGR's according to
896 WITH_TARGET_FLOATING_POINT_BITSIZE.
898 * sim-main.h (FGR): Store floating point registers in a separate
901 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
903 * configure: Regenerated to track ../common/aclocal.m4 changes.
905 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
907 * interp.c (ColdReset): Call PENDING_INVALIDATE.
909 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
911 * interp.c (pending_tick): New function. Deliver pending writes.
913 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
914 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
915 it can handle mixed sized quantites and single bits.
917 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
919 * interp.c (oengine.h): Do not include when building with IGEN.
920 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
921 (sim_info): Ditto for PROCESSOR_64BIT.
922 (sim_monitor): Replace ut_reg with unsigned_word.
923 (*): Ditto for t_reg.
924 (LOADDRMASK): Define.
925 (sim_open): Remove defunct check that host FP is IEEE compliant,
926 using software to emulate floating point.
927 (value_fpr, ...): Always compile, was conditional on HASFPU.
929 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
931 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
934 * interp.c (SD, CPU): Define.
935 (mips_option_handler): Set flags in each CPU.
936 (interrupt_event): Assume CPU 0 is the one being iterrupted.
937 (sim_close): Do not clear STATE, deleted anyway.
938 (sim_write, sim_read): Assume CPU zero's vm should be used for
940 (sim_create_inferior): Set the PC for all processors.
941 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
943 (mips16_entry): Pass correct nr of args to store_word, load_word.
944 (ColdReset): Cold reset all cpu's.
945 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
946 (sim_monitor, load_memory, store_memory, signal_exception): Use
947 `CPU' instead of STATE_CPU.
950 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
953 * sim-main.h (signal_exception): Add sim_cpu arg.
954 (SignalException*): Pass both SD and CPU to signal_exception.
955 * interp.c (signal_exception): Update.
957 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
959 (sync_operation, prefetch, cache_op, store_memory, load_memory,
960 address_translation): Ditto
961 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
963 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
965 * configure: Regenerated to track ../common/aclocal.m4 changes.
967 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
969 * interp.c (sim_engine_run): Add `nr_cpus' argument.
971 * mips.igen (model): Map processor names onto BFD name.
973 * sim-main.h (CPU_CIA): Delete.
974 (SET_CIA, GET_CIA): Define
976 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
978 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
981 * configure.in (default_endian): Configure a big-endian simulator
983 * configure: Re-generate.
985 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
987 * configure: Regenerated to track ../common/aclocal.m4 changes.
989 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
991 * interp.c (sim_monitor): Handle Densan monitor outbyte
992 and inbyte functions.
994 1997-12-29 Felix Lee <flee@cygnus.com>
996 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
998 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
1000 * Makefile.in (tmp-igen): Arrange for $zero to always be
1001 reset to zero after every instruction.
1003 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1005 * configure: Regenerated to track ../common/aclocal.m4 changes.
1008 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1010 * mips.igen (MSUB): Fix to work like MADD.
1011 * gencode.c (MSUB): Similarly.
1013 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1015 * configure: Regenerated to track ../common/aclocal.m4 changes.
1017 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1019 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1021 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1023 * sim-main.h (sim-fpu.h): Include.
1025 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1026 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1027 using host independant sim_fpu module.
1029 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1031 * interp.c (signal_exception): Report internal errors with SIGABRT
1034 * sim-main.h (C0_CONFIG): New register.
1035 (signal.h): No longer include.
1037 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1039 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
1041 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1043 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1045 * mips.igen: Tag vr5000 instructions.
1046 (ANDI): Was missing mipsIV model, fix assembler syntax.
1047 (do_c_cond_fmt): New function.
1048 (C.cond.fmt): Handle mips I-III which do not support CC field
1050 (bc1): Handle mips IV which do not have a delaed FCC separatly.
1051 (SDR): Mask paddr when BigEndianMem, not the converse as specified
1053 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
1054 vr5000 which saves LO in a GPR separatly.
1056 * configure.in (enable-sim-igen): For vr5000, select vr5000
1057 specific instructions.
1058 * configure: Re-generate.
1060 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1062 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1064 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1065 fmt_uninterpreted_64 bit cases to switch. Convert to
1068 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1070 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1071 as specified in IV3.2 spec.
1072 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1074 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1076 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1077 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1078 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1079 PENDING_FILL versions of instructions. Simplify.
1081 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1083 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1085 (MTHI, MFHI): Disable code checking HI-LO.
1087 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1089 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1091 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1093 * gencode.c (build_mips16_operands): Replace IPC with cia.
1095 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1096 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1098 (UndefinedResult): Replace function with macro/function
1100 (sim_engine_run): Don't save PC in IPC.
1102 * sim-main.h (IPC): Delete.
1105 * interp.c (signal_exception, store_word, load_word,
1106 address_translation, load_memory, store_memory, cache_op,
1107 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1108 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1109 current instruction address - cia - argument.
1110 (sim_read, sim_write): Call address_translation directly.
1111 (sim_engine_run): Rename variable vaddr to cia.
1112 (signal_exception): Pass cia to sim_monitor
1114 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1115 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1116 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1118 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1119 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1122 * interp.c (signal_exception): Pass restart address to
1125 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1126 idecode.o): Add dependency.
1128 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1130 (DELAY_SLOT): Update NIA not PC with branch address.
1131 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1133 * mips.igen: Use CIA not PC in branch calculations.
1134 (illegal): Call SignalException.
1135 (BEQ, ADDIU): Fix assembler.
1137 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1139 * m16.igen (JALX): Was missing.
1141 * configure.in (enable-sim-igen): New configuration option.
1142 * configure: Re-generate.
1144 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1146 * interp.c (load_memory, store_memory): Delete parameter RAW.
1147 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1148 bypassing {load,store}_memory.
1150 * sim-main.h (ByteSwapMem): Delete definition.
1152 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1154 * interp.c (sim_do_command, sim_commands): Delete mips specific
1155 commands. Handled by module sim-options.
1157 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1158 (WITH_MODULO_MEMORY): Define.
1160 * interp.c (sim_info): Delete code printing memory size.
1162 * interp.c (mips_size): Nee sim_size, delete function.
1164 (monitor, monitor_base, monitor_size): Delete global variables.
1165 (sim_open, sim_close): Delete code creating monitor and other
1166 memory regions. Use sim-memopts module, via sim_do_commandf, to
1167 manage memory regions.
1168 (load_memory, store_memory): Use sim-core for memory model.
1170 * interp.c (address_translation): Delete all memory map code
1171 except line forcing 32 bit addresses.
1173 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1175 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1178 * interp.c (logfh, logfile): Delete globals.
1179 (sim_open, sim_close): Delete code opening & closing log file.
1180 (mips_option_handler): Delete -l and -n options.
1181 (OPTION mips_options): Ditto.
1183 * interp.c (OPTION mips_options): Rename option trace to dinero.
1184 (mips_option_handler): Update.
1186 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1188 * interp.c (fetch_str): New function.
1189 (sim_monitor): Rewrite using sim_read & sim_write.
1190 (sim_open): Check magic number.
1191 (sim_open): Write monitor vectors into memory using sim_write.
1192 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1193 (sim_read, sim_write): Simplify - transfer data one byte at a
1195 (load_memory, store_memory): Clarify meaning of parameter RAW.
1197 * sim-main.h (isHOST): Defete definition.
1198 (isTARGET): Mark as depreciated.
1199 (address_translation): Delete parameter HOST.
1201 * interp.c (address_translation): Delete parameter HOST.
1203 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1207 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1208 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1210 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1212 * mips.igen: Add model filter field to records.
1214 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1216 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1218 interp.c (sim_engine_run): Do not compile function sim_engine_run
1219 when WITH_IGEN == 1.
1221 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1222 target architecture.
1224 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1225 igen. Replace with configuration variables sim_igen_flags /
1228 * m16.igen: New file. Copy mips16 insns here.
1229 * mips.igen: From here.
1231 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1233 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1235 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1237 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1239 * gencode.c (build_instruction): Follow sim_write's lead in using
1240 BigEndianMem instead of !ByteSwapMem.
1242 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1244 * configure.in (sim_gen): Dependent on target, select type of
1245 generator. Always select old style generator.
1247 configure: Re-generate.
1249 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1251 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1252 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1253 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1254 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1255 SIM_@sim_gen@_*, set by autoconf.
1257 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1259 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1261 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1262 CURRENT_FLOATING_POINT instead.
1264 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1265 (address_translation): Raise exception InstructionFetch when
1266 translation fails and isINSTRUCTION.
1268 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1269 sim_engine_run): Change type of of vaddr and paddr to
1271 (address_translation, prefetch, load_memory, store_memory,
1272 cache_op): Change type of vAddr and pAddr to address_word.
1274 * gencode.c (build_instruction): Change type of vaddr and paddr to
1277 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1279 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1280 macro to obtain result of ALU op.
1282 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1284 * interp.c (sim_info): Call profile_print.
1286 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1288 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1290 * sim-main.h (WITH_PROFILE): Do not define, defined in
1291 common/sim-config.h. Use sim-profile module.
1292 (simPROFILE): Delete defintion.
1294 * interp.c (PROFILE): Delete definition.
1295 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1296 (sim_close): Delete code writing profile histogram.
1297 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1299 (sim_engine_run): Delete code profiling the PC.
1301 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1303 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1305 * interp.c (sim_monitor): Make register pointers of type
1308 * sim-main.h: Make registers of type unsigned_word not
1311 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1313 * interp.c (sync_operation): Rename from SyncOperation, make
1314 global, add SD argument.
1315 (prefetch): Rename from Prefetch, make global, add SD argument.
1316 (decode_coproc): Make global.
1318 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1320 * gencode.c (build_instruction): Generate DecodeCoproc not
1321 decode_coproc calls.
1323 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1324 (SizeFGR): Move to sim-main.h
1325 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1326 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1327 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1329 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1330 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1331 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1332 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1333 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1334 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1336 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1338 (sim-alu.h): Include.
1339 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1340 (sim_cia): Typedef to instruction_address.
1342 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1344 * Makefile.in (interp.o): Rename generated file engine.c to
1349 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
1351 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1353 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1355 * gencode.c (build_instruction): For "FPSQRT", output correct
1356 number of arguments to Recip.
1358 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
1360 * Makefile.in (interp.o): Depends on sim-main.h
1362 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1364 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1365 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1366 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1367 STATE, DSSTATE): Define
1368 (GPR, FGRIDX, ..): Define.
1370 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1371 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1372 (GPR, FGRIDX, ...): Delete macros.
1374 * interp.c: Update names to match defines from sim-main.h
1376 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
1378 * interp.c (sim_monitor): Add SD argument.
1379 (sim_warning): Delete. Replace calls with calls to
1381 (sim_error): Delete. Replace calls with sim_io_error.
1382 (open_trace, writeout32, writeout16, getnum): Add SD argument.
1383 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1384 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1386 (mips_size): Rename from sim_size. Add SD argument.
1388 * interp.c (simulator): Delete global variable.
1389 (callback): Delete global variable.
1390 (mips_option_handler, sim_open, sim_write, sim_read,
1391 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1392 sim_size,sim_monitor): Use sim_io_* not callback->*.
1393 (sim_open): ZALLOC simulator struct.
1394 (PROFILE): Do not define.
1396 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1398 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1399 support.h with corresponding code.
1401 * sim-main.h (word64, uword64), support.h: Move definition to
1403 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1406 * Makefile.in: Update dependencies
1407 * interp.c: Do not include.
1409 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1411 * interp.c (address_translation, load_memory, store_memory,
1412 cache_op): Rename to from AddressTranslation et.al., make global,
1415 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1418 * interp.c (SignalException): Rename to signal_exception, make
1421 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1423 * sim-main.h (SignalException, SignalExceptionInterrupt,
1424 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1425 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1426 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1429 * interp.c, support.h: Use.
1431 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1433 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1434 to value_fpr / store_fpr. Add SD argument.
1435 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1436 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1438 * sim-main.h (ValueFPR, StoreFPR): Define.
1440 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1442 * interp.c (sim_engine_run): Check consistency between configure
1443 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1446 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1447 (mips_fpu): Configure WITH_FLOATING_POINT.
1448 (mips_endian): Configure WITH_TARGET_ENDIAN.
1449 * configure: Update.
1451 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1453 * configure: Regenerated to track ../common/aclocal.m4 changes.
1455 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
1457 * configure: Regenerated.
1459 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
1461 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1463 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1465 * gencode.c (print_igen_insn_models): Assume certain architectures
1466 include all mips* instructions.
1467 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1470 * Makefile.in (tmp.igen): Add target. Generate igen input from
1473 * gencode.c (FEATURE_IGEN): Define.
1474 (main): Add --igen option. Generate output in igen format.
1475 (process_instructions): Format output according to igen option.
1476 (print_igen_insn_format): New function.
1477 (print_igen_insn_models): New function.
1478 (process_instructions): Only issue warnings and ignore
1479 instructions when no FEATURE_IGEN.
1481 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1483 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1486 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1488 * configure: Regenerated to track ../common/aclocal.m4 changes.
1490 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1492 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1493 SIM_RESERVED_BITS): Delete, moved to common.
1494 (SIM_EXTRA_CFLAGS): Update.
1496 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1498 * configure.in: Configure non-strict memory alignment.
1499 * configure: Regenerated to track ../common/aclocal.m4 changes.
1501 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
1503 * configure: Regenerated to track ../common/aclocal.m4 changes.
1505 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
1507 * gencode.c (SDBBP,DERET): Added (3900) insns.
1508 (RFE): Turn on for 3900.
1509 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1510 (dsstate): Made global.
1511 (SUBTARGET_R3900): Added.
1512 (CANCELDELAYSLOT): New.
1513 (SignalException): Ignore SystemCall rather than ignore and
1514 terminate. Add DebugBreakPoint handling.
1515 (decode_coproc): New insns RFE, DERET; and new registers Debug
1516 and DEPC protected by SUBTARGET_R3900.
1517 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1519 * Makefile.in,configure.in: Add mips subtarget option.
1520 * configure: Update.
1522 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1524 * gencode.c: Add r3900 (tx39).
1527 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1529 * gencode.c (build_instruction): Don't need to subtract 4 for
1532 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1534 * interp.c: Correct some HASFPU problems.
1536 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1538 * configure: Regenerated to track ../common/aclocal.m4 changes.
1540 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1542 * interp.c (mips_options): Fix samples option short form, should
1545 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1547 * interp.c (sim_info): Enable info code. Was just returning.
1549 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1551 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1554 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1556 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1558 (build_instruction): Ditto for LL.
1560 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1562 * configure: Regenerated to track ../common/aclocal.m4 changes.
1564 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1566 * configure: Regenerated to track ../common/aclocal.m4 changes.
1569 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1571 * interp.c (sim_open): Add call to sim_analyze_program, update
1574 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1576 * interp.c (sim_kill): Delete.
1577 (sim_create_inferior): Add ABFD argument. Set PC from same.
1578 (sim_load): Move code initializing trap handlers from here.
1579 (sim_open): To here.
1580 (sim_load): Delete, use sim-hload.c.
1582 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1584 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1586 * configure: Regenerated to track ../common/aclocal.m4 changes.
1589 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1591 * interp.c (sim_open): Add ABFD argument.
1592 (sim_load): Move call to sim_config from here.
1593 (sim_open): To here. Check return status.
1595 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1597 * gencode.c (build_instruction): Two arg MADD should
1598 not assign result to $0.
1600 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1602 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1603 * sim/mips/configure.in: Regenerate.
1605 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1607 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1608 signed8, unsigned8 et.al. types.
1610 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1611 hosts when selecting subreg.
1613 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1615 * interp.c (sim_engine_run): Reset the ZERO register to zero
1616 regardless of FEATURE_WARN_ZERO.
1617 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1619 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1621 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1622 (SignalException): For BreakPoints ignore any mode bits and just
1624 (SignalException): Always set the CAUSE register.
1626 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1628 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1629 exception has been taken.
1631 * interp.c: Implement the ERET and mt/f sr instructions.
1633 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1635 * interp.c (SignalException): Don't bother restarting an
1638 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1640 * interp.c (SignalException): Really take an interrupt.
1641 (interrupt_event): Only deliver interrupts when enabled.
1643 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1645 * interp.c (sim_info): Only print info when verbose.
1646 (sim_info) Use sim_io_printf for output.
1648 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1650 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1653 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1655 * interp.c (sim_do_command): Check for common commands if a
1656 simulator specific command fails.
1658 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1660 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1661 and simBE when DEBUG is defined.
1663 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1665 * interp.c (interrupt_event): New function. Pass exception event
1666 onto exception handler.
1668 * configure.in: Check for stdlib.h.
1669 * configure: Regenerate.
1671 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1672 variable declaration.
1673 (build_instruction): Initialize memval1.
1674 (build_instruction): Add UNUSED attribute to byte, bigend,
1676 (build_operands): Ditto.
1678 * interp.c: Fix GCC warnings.
1679 (sim_get_quit_code): Delete.
1681 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1682 * Makefile.in: Ditto.
1683 * configure: Re-generate.
1685 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1687 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1689 * interp.c (mips_option_handler): New function parse argumes using
1691 (myname): Replace with STATE_MY_NAME.
1692 (sim_open): Delete check for host endianness - performed by
1694 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1695 (sim_open): Move much of the initialization from here.
1696 (sim_load): To here. After the image has been loaded and
1698 (sim_open): Move ColdReset from here.
1699 (sim_create_inferior): To here.
1700 (sim_open): Make FP check less dependant on host endianness.
1702 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1704 * interp.c (sim_set_callbacks): Delete.
1706 * interp.c (membank, membank_base, membank_size): Replace with
1707 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1708 (sim_open): Remove call to callback->init. gdb/run do this.
1712 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1714 * interp.c (big_endian_p): Delete, replaced by
1715 current_target_byte_order.
1717 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1719 * interp.c (host_read_long, host_read_word, host_swap_word,
1720 host_swap_long): Delete. Using common sim-endian.
1721 (sim_fetch_register, sim_store_register): Use H2T.
1722 (pipeline_ticks): Delete. Handled by sim-events.
1724 (sim_engine_run): Update.
1726 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1728 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1730 (SignalException): To here. Signal using sim_engine_halt.
1731 (sim_stop_reason): Delete, moved to common.
1733 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1735 * interp.c (sim_open): Add callback argument.
1736 (sim_set_callbacks): Delete SIM_DESC argument.
1739 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1741 * Makefile.in (SIM_OBJS): Add common modules.
1743 * interp.c (sim_set_callbacks): Also set SD callback.
1744 (set_endianness, xfer_*, swap_*): Delete.
1745 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1746 Change to functions using sim-endian macros.
1747 (control_c, sim_stop): Delete, use common version.
1748 (simulate): Convert into.
1749 (sim_engine_run): This function.
1750 (sim_resume): Delete.
1752 * interp.c (simulation): New variable - the simulator object.
1753 (sim_kind): Delete global - merged into simulation.
1754 (sim_load): Cleanup. Move PC assignment from here.
1755 (sim_create_inferior): To here.
1757 * sim-main.h: New file.
1758 * interp.c (sim-main.h): Include.
1760 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1762 * configure: Regenerated to track ../common/aclocal.m4 changes.
1764 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1766 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1768 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1770 * gencode.c (build_instruction): DIV instructions: check
1771 for division by zero and integer overflow before using
1772 host's division operation.
1774 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1776 * Makefile.in (SIM_OBJS): Add sim-load.o.
1777 * interp.c: #include bfd.h.
1778 (target_byte_order): Delete.
1779 (sim_kind, myname, big_endian_p): New static locals.
1780 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1781 after argument parsing. Recognize -E arg, set endianness accordingly.
1782 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1783 load file into simulator. Set PC from bfd.
1784 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1785 (set_endianness): Use big_endian_p instead of target_byte_order.
1787 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1789 * interp.c (sim_size): Delete prototype - conflicts with
1790 definition in remote-sim.h. Correct definition.
1792 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1794 * configure: Regenerated to track ../common/aclocal.m4 changes.
1797 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1799 * interp.c (sim_open): New arg `kind'.
1801 * configure: Regenerated to track ../common/aclocal.m4 changes.
1803 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1805 * configure: Regenerated to track ../common/aclocal.m4 changes.
1807 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1809 * interp.c (sim_open): Set optind to 0 before calling getopt.
1811 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1813 * configure: Regenerated to track ../common/aclocal.m4 changes.
1815 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1817 * interp.c : Replace uses of pr_addr with pr_uword64
1818 where the bit length is always 64 independent of SIM_ADDR.
1819 (pr_uword64) : added.
1821 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1823 * configure: Re-generate.
1825 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1827 * configure: Regenerate to track ../common/aclocal.m4 changes.
1829 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1831 * interp.c (sim_open): New SIM_DESC result. Argument is now
1833 (other sim_*): New SIM_DESC argument.
1835 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1837 * interp.c: Fix printing of addresses for non-64-bit targets.
1838 (pr_addr): Add function to print address based on size.
1840 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1842 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1844 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1846 * gencode.c (build_mips16_operands): Correct computation of base
1847 address for extended PC relative instruction.
1849 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1851 * interp.c (mips16_entry): Add support for floating point cases.
1852 (SignalException): Pass floating point cases to mips16_entry.
1853 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1855 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1857 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1858 and then set the state to fmt_uninterpreted.
1859 (COP_SW): Temporarily set the state to fmt_word while calling
1862 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1864 * gencode.c (build_instruction): The high order may be set in the
1865 comparison flags at any ISA level, not just ISA 4.
1867 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1869 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1870 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1871 * configure.in: sinclude ../common/aclocal.m4.
1872 * configure: Regenerated.
1874 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1876 * configure: Rebuild after change to aclocal.m4.
1878 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1880 * configure configure.in Makefile.in: Update to new configure
1881 scheme which is more compatible with WinGDB builds.
1882 * configure.in: Improve comment on how to run autoconf.
1883 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1884 * Makefile.in: Use autoconf substitution to install common
1887 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1889 * gencode.c (build_instruction): Use BigEndianCPU instead of
1892 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1894 * interp.c (sim_monitor): Make output to stdout visible in
1895 wingdb's I/O log window.
1897 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1899 * support.h: Undo previous change to SIGTRAP
1902 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1904 * interp.c (store_word, load_word): New static functions.
1905 (mips16_entry): New static function.
1906 (SignalException): Look for mips16 entry and exit instructions.
1907 (simulate): Use the correct index when setting fpr_state after
1908 doing a pending move.
1910 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1912 * interp.c: Fix byte-swapping code throughout to work on
1913 both little- and big-endian hosts.
1915 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1917 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1918 with gdb/config/i386/xm-windows.h.
1920 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1922 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1923 that messes up arithmetic shifts.
1925 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1927 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1928 SIGTRAP and SIGQUIT for _WIN32.
1930 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1932 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1933 force a 64 bit multiplication.
1934 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1935 destination register is 0, since that is the default mips16 nop
1938 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1940 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1941 (build_endian_shift): Don't check proc64.
1942 (build_instruction): Always set memval to uword64. Cast op2 to
1943 uword64 when shifting it left in memory instructions. Always use
1944 the same code for stores--don't special case proc64.
1946 * gencode.c (build_mips16_operands): Fix base PC value for PC
1948 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1950 * interp.c (simJALDELAYSLOT): Define.
1951 (JALDELAYSLOT): Define.
1952 (INDELAYSLOT, INJALDELAYSLOT): Define.
1953 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1955 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1957 * interp.c (sim_open): add flush_cache as a PMON routine
1958 (sim_monitor): handle flush_cache by ignoring it
1960 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1962 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1964 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1965 (BigEndianMem): Rename to ByteSwapMem and change sense.
1966 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1967 BigEndianMem references to !ByteSwapMem.
1968 (set_endianness): New function, with prototype.
1969 (sim_open): Call set_endianness.
1970 (sim_info): Use simBE instead of BigEndianMem.
1971 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1972 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1973 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1974 ifdefs, keeping the prototype declaration.
1975 (swap_word): Rewrite correctly.
1976 (ColdReset): Delete references to CONFIG. Delete endianness related
1977 code; moved to set_endianness.
1979 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1981 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1982 * interp.c (CHECKHILO): Define away.
1983 (simSIGINT): New macro.
1984 (membank_size): Increase from 1MB to 2MB.
1985 (control_c): New function.
1986 (sim_resume): Rename parameter signal to signal_number. Add local
1987 variable prev. Call signal before and after simulate.
1988 (sim_stop_reason): Add simSIGINT support.
1989 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1991 (sim_warning): Delete call to SignalException. Do call printf_filtered
1993 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1994 a call to sim_warning.
1996 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1998 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1999 16 bit instructions.
2001 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
2003 Add support for mips16 (16 bit MIPS implementation):
2004 * gencode.c (inst_type): Add mips16 instruction encoding types.
2005 (GETDATASIZEINSN): Define.
2006 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
2007 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2009 (MIPS16_DECODE): New table, for mips16 instructions.
2010 (bitmap_val): New static function.
2011 (struct mips16_op): Define.
2012 (mips16_op_table): New table, for mips16 operands.
2013 (build_mips16_operands): New static function.
2014 (process_instructions): If PC is odd, decode a mips16
2015 instruction. Break out instruction handling into new
2016 build_instruction function.
2017 (build_instruction): New static function, broken out of
2018 process_instructions. Check modifiers rather than flags for SHIFT
2019 bit count and m[ft]{hi,lo} direction.
2020 (usage): Pass program name to fprintf.
2021 (main): Remove unused variable this_option_optind. Change
2022 ``*loptarg++'' to ``loptarg++''.
2023 (my_strtoul): Parenthesize && within ||.
2024 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2025 (simulate): If PC is odd, fetch a 16 bit instruction, and
2026 increment PC by 2 rather than 4.
2027 * configure.in: Add case for mips16*-*-*.
2028 * configure: Rebuild.
2030 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
2032 * interp.c: Allow -t to enable tracing in standalone simulator.
2033 Fix garbage output in trace file and error messages.
2035 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
2037 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2038 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2039 * configure.in: Simplify using macros in ../common/aclocal.m4.
2040 * configure: Regenerated.
2041 * tconfig.in: New file.
2043 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
2045 * interp.c: Fix bugs in 64-bit port.
2046 Use ansi function declarations for msvc compiler.
2047 Initialize and test file pointer in trace code.
2048 Prevent duplicate definition of LAST_EMED_REGNUM.
2050 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
2052 * interp.c (xfer_big_long): Prevent unwanted sign extension.
2054 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2056 * interp.c (SignalException): Check for explicit terminating
2058 * gencode.c: Pass instruction value through SignalException()
2059 calls for Trap, Breakpoint and Syscall.
2061 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2063 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2064 only used on those hosts that provide it.
2065 * configure.in: Add sqrt() to list of functions to be checked for.
2066 * config.in: Re-generated.
2067 * configure: Re-generated.
2069 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2071 * gencode.c (process_instructions): Call build_endian_shift when
2072 expanding STORE RIGHT, to fix swr.
2073 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2074 clear the high bits.
2075 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2076 Fix float to int conversions to produce signed values.
2078 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2080 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2081 (process_instructions): Correct handling of nor instruction.
2082 Correct shift count for 32 bit shift instructions. Correct sign
2083 extension for arithmetic shifts to not shift the number of bits in
2084 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2085 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2087 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2088 It's OK to have a mult follow a mult. What's not OK is to have a
2089 mult follow an mfhi.
2090 (Convert): Comment out incorrect rounding code.
2092 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2094 * interp.c (sim_monitor): Improved monitor printf
2095 simulation. Tidied up simulator warnings, and added "--log" option
2096 for directing warning message output.
2097 * gencode.c: Use sim_warning() rather than WARNING macro.
2099 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2101 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2102 getopt1.o, rather than on gencode.c. Link objects together.
2103 Don't link against -liberty.
2104 (gencode.o, getopt.o, getopt1.o): New targets.
2105 * gencode.c: Include <ctype.h> and "ansidecl.h".
2106 (AND): Undefine after including "ansidecl.h".
2107 (ULONG_MAX): Define if not defined.
2108 (OP_*): Don't define macros; now defined in opcode/mips.h.
2109 (main): Call my_strtoul rather than strtoul.
2110 (my_strtoul): New static function.
2112 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2114 * gencode.c (process_instructions): Generate word64 and uword64
2115 instead of `long long' and `unsigned long long' data types.
2116 * interp.c: #include sysdep.h to get signals, and define default
2118 * (Convert): Work around for Visual-C++ compiler bug with type
2120 * support.h: Make things compile under Visual-C++ by using
2121 __int64 instead of `long long'. Change many refs to long long
2122 into word64/uword64 typedefs.
2124 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2126 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2127 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2129 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2130 (AC_PROG_INSTALL): Added.
2131 (AC_PROG_CC): Moved to before configure.host call.
2132 * configure: Rebuilt.
2134 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2136 * configure.in: Define @SIMCONF@ depending on mips target.
2137 * configure: Rebuild.
2138 * Makefile.in (run): Add @SIMCONF@ to control simulator
2140 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2141 * interp.c: Remove some debugging, provide more detailed error
2142 messages, update memory accesses to use LOADDRMASK.
2144 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2146 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2147 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2149 * configure: Rebuild.
2150 * config.in: New file, generated by autoheader.
2151 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2152 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2153 HAVE_ANINT and HAVE_AINT, as appropriate.
2154 * Makefile.in (run): Use @LIBS@ rather than -lm.
2155 (interp.o): Depend upon config.h.
2156 (Makefile): Just rebuild Makefile.
2157 (clean): Remove stamp-h.
2158 (mostlyclean): Make the same as clean, not as distclean.
2159 (config.h, stamp-h): New targets.
2161 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2163 * interp.c (ColdReset): Fix boolean test. Make all simulator
2166 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2168 * interp.c (xfer_direct_word, xfer_direct_long,
2169 swap_direct_word, swap_direct_long, xfer_big_word,
2170 xfer_big_long, xfer_little_word, xfer_little_long,
2171 swap_word,swap_long): Added.
2172 * interp.c (ColdReset): Provide function indirection to
2173 host<->simulated_target transfer routines.
2174 * interp.c (sim_store_register, sim_fetch_register): Updated to
2175 make use of indirected transfer routines.
2177 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2179 * gencode.c (process_instructions): Ensure FP ABS instruction
2181 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2182 system call support.
2184 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2186 * interp.c (sim_do_command): Complain if callback structure not
2189 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2191 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2192 support for Sun hosts.
2193 * Makefile.in (gencode): Ensure the host compiler and libraries
2194 used for cross-hosted build.
2196 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2198 * interp.c, gencode.c: Some more (TODO) tidying.
2200 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2202 * gencode.c, interp.c: Replaced explicit long long references with
2203 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2204 * support.h (SET64LO, SET64HI): Macros added.
2206 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2208 * configure: Regenerate with autoconf 2.7.
2210 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2212 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2213 * support.h: Remove superfluous "1" from #if.
2214 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2216 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2218 * interp.c (StoreFPR): Control UndefinedResult() call on
2219 WARN_RESULT manifest.
2221 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2223 * gencode.c: Tidied instruction decoding, and added FP instruction
2226 * interp.c: Added dineroIII, and BSD profiling support. Also
2227 run-time FP handling.
2229 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2231 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2232 gencode.c, interp.c, support.h: created.