sim/mips/ChangeLog

   1 start-sanitize-sky
   2 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
   3
   4         * interp.c (*): Adapt code to merged VU device & state structs.
   5         (decode_coproc): Execute COP2 each macroinstruction without
   6         pipelining, by stepping VU to completion state.  Adapted to
   7         read_vu_*_reg style of register access.
   8
   9         * mips.igen ([SL]QC2): Removed these COP2 instructions.
  10
  11         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
  12
  13         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
  14
  15 end-sanitize-sky
  16
  17 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  18
  19         * Makefile.in (SIM_OBJS): Add sim-main.o.
  20
  21         * sim-main.h (address_translation, load_memory, store_memory,
  22         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
  23         as INLINE_SIM_MAIN.
  24         (pr_addr, pr_uword64): Declare.
  25         (sim-main.c): Include when H_REVEALS_MODULE_P.
  26
  27         * interp.c (address_translation, load_memory, store_memory,
  28         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
  29         from here.
  30         * sim-main.c: To here. Fix compilation problems.
  31
  32         * configure.in: Enable inlining.
  33         * configure: Re-config.
  34
  35 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  36
  37         * configure: Regenerated to track ../common/aclocal.m4 changes.
  38
  39 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  40
  41         * mips.igen: Include tx.igen.
  42         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
  43         * tx.igen: New file, contains MADD and MADDU.
  44
  45         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
  46         the hardwired constant `7'.
  47         (store_memory): Ditto.
  48         (LOADDRMASK): Move definition to sim-main.h.
  49
  50         mips.igen (MTC0): Enable for r3900.
  51         (ADDU): Add trace.
  52
  53         mips.igen (do_load_byte): Delete.
  54         (do_load, do_store, do_load_left, do_load_write, do_store_left,
  55         do_store_right): New functions.
  56         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
  57
  58         configure.in: Let the tx39 use igen again.
  59         configure: Update.
  60
  61 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  62
  63         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
  64         not an address sized quantity.  Return zero for cache sizes.
  65
  66 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  67
  68         * mips.igen (r3900): r3900 does not support 64 bit integer
  69         operations.
  70
  71 start-sanitize-sky
  72 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
  73
  74         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
  75
  76 end-sanitize-sky
  77 start-sanitize-sky
  78 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
  79
  80         * interp.c (decode_coproc): Continuing COP2 work.
  81         (cop_[ls]q): Make sky-target-only.
  82
  83         * sim-main.h (COP_[LS]Q): Make sky-target-only.
  84 end-sanitize-sky
  85
  86 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
  87
  88         * configure.in (mipstx39*-*-*): Use gencode simulator rather
  89         than igen one.
  90         * configure : Rebuild.
  91
  92 start-sanitize-sky
  93 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
  94
  95         * interp.c (decode_coproc): Added a missing TARGET_SKY check
  96         around COP2 implementation skeleton.
  97
  98 end-sanitize-sky
  99
 100 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 101
 102 start-sanitize-sky
 103         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 104
 105         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 106         static to access VU registers.
 107         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 108         decoding.  Work in progress.
 109
 110         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 111         overlapping/redundant bit pattern.
 112         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 113         progress.
 114
 115         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 116         status register.
 117
 118         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 119         access to coprocessor registers.
 120
 121         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 122 end-sanitize-sky
 123
 124 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 125
 126         * configure: Regenerated to track ../common/aclocal.m4 changes.
 127
 128 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 129
 130         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 131
 132 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 133
 134         * configure: Regenerated to track ../common/aclocal.m4 changes.
 135         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 136
 137 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 138
 139         * configure: Regenerated to track ../common/aclocal.m4 changes.
 140
 141 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 142
 143         * interp.c (Max, Min): Comment out functions. Not yet used.
 144
 145 start-sanitize-vr4320
 146 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 147
 148         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 149
 150 end-sanitize-vr4320
 151 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 152
 153         * configure: Regenerated to track ../common/aclocal.m4 changes.
 154
 155 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 156
 157         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 158         configurable settings for stand-alone simulator.
 159
 160 start-sanitize-sky
 161         * configure.in: Added --with-sim-gpu2 option to specify path of
 162         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 163         links/compiles stand-alone simulator with this library.
 164
 165         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 166 end-sanitize-sky
 167
 168         * configure.in: Added X11 search, just in case.
 169
 170         * configure: Regenerated.
 171
 172 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 173
 174         * interp.c (sim_write, sim_read, load_memory, store_memory):
 175         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 176
 177 start-sanitize-vr4320
 178 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 179
 180         * vr4320.igen (clz,dclz) : Added.
 181         (dmac): Replaced 99, with LO.
 182
 183 end-sanitize-vr4320
 184 start-sanitize-vr5400
 185 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 186
 187         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 188
 189 end-sanitize-vr5400
 190 start-sanitize-vr4320
 191 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 192
 193         * vr4320.igen: New file.
 194         * Makefile.in (vr4320.igen) : Added.
 195         * configure.in (mips64vr4320-*-*): Added.
 196         * configure : Rebuilt.
 197         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 198         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 199
 200 end-sanitize-vr4320
 201 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 202
 203         * sim-main.h (GETFCC): Return an unsigned value.
 204
 205 start-sanitize-r5900
 206         * r5900.igen: Use an unsigned array index variable `i'.
 207         (QFSRV): Ditto for variable bytes.
 208
 209 end-sanitize-r5900
 210 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 211
 212         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 213         (DADD): Result destination is RD not RT.
 214
 215 start-sanitize-r5900
 216         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 217         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 218         divide.
 219
 220 end-sanitize-r5900
 221 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 222
 223         * sim-main.h (HIACCESS, LOACCESS): Always define.
 224
 225         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 226
 227         * interp.c (sim_info): Delete.
 228
 229 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 230
 231         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 232         (mips_option_handler): New argument `cpu'.
 233         (sim_open): Update call to sim_add_option_table.
 234
 235 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 236
 237         * mips.igen (CxC1): Add tracing.
 238
 239 start-sanitize-r5900
 240 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 241
 242         * r5900.igen (StoreFP): Delete.
 243         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 244         New functions.
 245         (rsqrt.s, sqrt.s): Implement.
 246         (r59cond): New function.
 247         (C.COND.S): Call r59cond in assembler line.
 248         (cvt.w.s, cvt.s.w): Implement.
 249
 250         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 251         instruction set.
 252
 253         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 254
 255 end-sanitize-r5900
 256 start-sanitize-r5900
 257 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 258
 259         * r5900.igen: Add tracing to all p* instructions.
 260
 261 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 262
 263         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 264         to get gdb talking to re-aranged sim_cpu register structure.
 265
 266 end-sanitize-r5900
 267 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 268
 269         * sim-main.h (Max, Min): Declare.
 270
 271         * interp.c (Max, Min): New functions.
 272
 273         * mips.igen (BC1): Add tracing.
 274
 275 start-sanitize-vr5400
 276 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 277
 278         * mdmx.igen: Tag all functions as requiring either with mdmx or
 279         vr5400 processor.
 280
 281 end-sanitize-vr5400
 282 start-sanitize-r5900
 283 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 284
 285         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 286         to 32.
 287         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 288
 289         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 290
 291         * r5900.igen: Rewrite.
 292
 293         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 294         struct.
 295         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 296         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 297
 298 end-sanitize-r5900
 299 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 300
 301         * interp.c Added memory map for stack in vr4100
 302
 303 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 304
 305         * interp.c (load_memory): Add missing "break"'s.
 306
 307 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 308
 309         * interp.c (sim_store_register, sim_fetch_register): Pass in
 310         length parameter.  Return -1.
 311
 312 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 313
 314         * interp.c: Added hardware init hook, fixed warnings.
 315
 316 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 317
 318         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 319
 320 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 321
 322         * interp.c (ifetch16): New function.
 323
 324         * sim-main.h (IMEM32): Rename IMEM.
 325         (IMEM16_IMMED): Define.
 326         (IMEM16): Define.
 327         (DELAY_SLOT): Update.
 328
 329         * m16run.c (sim_engine_run): New file.
 330
 331         * m16.igen: All instructions except LB.
 332         (LB): Call do_load_byte.
 333         * mips.igen (do_load_byte): New function.
 334         (LB): Call do_load_byte.
 335
 336         * mips.igen: Move spec for insn bit size and high bit from here.
 337         * Makefile.in (tmp-igen, tmp-m16): To here.
 338
 339         * m16.dc: New file, decode mips16 instructions.
 340
 341         * Makefile.in (SIM_NO_ALL): Define.
 342         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 343
 344 start-sanitize-tx19
 345         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 346         set.
 347
 348 end-sanitize-tx19
 349 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 350
 351         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 352         point unit to 32 bit registers.
 353         * configure: Re-generate.
 354
 355 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 356
 357         * configure.in (sim_use_gen): Make IGEN the default simulator
 358         generator for generic 32 and 64 bit mips targets.
 359         * configure: Re-generate.
 360
 361 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 362
 363         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 364         bitsize.
 365
 366         * interp.c (sim_fetch_register, sim_store_register): Read/write
 367         FGR from correct location.
 368         (sim_open): Set size of FGR's according to
 369         WITH_TARGET_FLOATING_POINT_BITSIZE.
 370
 371         * sim-main.h (FGR): Store floating point registers in a separate
 372         array.
 373
 374 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 375
 376         * configure: Regenerated to track ../common/aclocal.m4 changes.
 377
 378 start-sanitize-vr5400
 379         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 380
 381 end-sanitize-vr5400
 382 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 383
 384         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 385
 386         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 387
 388         * interp.c (pending_tick): New function.  Deliver pending writes.
 389
 390         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 391         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 392         it can handle mixed sized quantites and single bits.
 393
 394 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 395
 396         * interp.c (oengine.h): Do not include when building with IGEN.
 397         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 398         (sim_info): Ditto for PROCESSOR_64BIT.
 399         (sim_monitor): Replace ut_reg with unsigned_word.
 400         (*): Ditto for t_reg.
 401         (LOADDRMASK): Define.
 402         (sim_open): Remove defunct check that host FP is IEEE compliant,
 403         using software to emulate floating point.
 404         (value_fpr, ...): Always compile, was conditional on HASFPU.
 405
 406 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 407
 408         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 409         size.
 410
 411         * interp.c (SD, CPU): Define.
 412         (mips_option_handler): Set flags in each CPU.
 413         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 414         (sim_close): Do not clear STATE, deleted anyway.
 415         (sim_write, sim_read): Assume CPU zero's vm should be used for
 416         data transfers.
 417         (sim_create_inferior): Set the PC for all processors.
 418         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 419         argument.
 420         (mips16_entry): Pass correct nr of args to store_word, load_word.
 421         (ColdReset): Cold reset all cpu's.
 422         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 423         (sim_monitor, load_memory, store_memory, signal_exception): Use
 424         `CPU' instead of STATE_CPU.
 425
 426
 427         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 428         SD or CPU_.
 429
 430         * sim-main.h (signal_exception): Add sim_cpu arg.
 431         (SignalException*): Pass both SD and CPU to signal_exception.
 432         * interp.c (signal_exception): Update.
 433
 434         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 435         Ditto
 436         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 437         address_translation): Ditto
 438         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 439
 440 start-sanitize-vr5400
 441         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 442         `sd'.
 443         (ByteAlign): Use StoreFPR, pass args in correct order.
 444
 445 end-sanitize-vr5400
 446 start-sanitize-r5900
 447 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 448
 449         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 450
 451 end-sanitize-r5900
 452 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 453
 454         * configure: Regenerated to track ../common/aclocal.m4 changes.
 455
 456 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 457
 458 start-sanitize-r5900
 459         * configure.in (sim_igen_filter): For r5900, use igen.
 460         * configure: Re-generate.
 461
 462 end-sanitize-r5900
 463         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 464
 465         * mips.igen (model): Map processor names onto BFD name.
 466
 467         * sim-main.h (CPU_CIA): Delete.
 468         (SET_CIA, GET_CIA): Define
 469
 470 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 471
 472         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 473         regiser.
 474
 475         * configure.in (default_endian): Configure a big-endian simulator
 476         by default.
 477         * configure: Re-generate.
 478
 479 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 480
 481         * configure: Regenerated to track ../common/aclocal.m4 changes.
 482
 483 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 484
 485         * interp.c (sim_monitor): Handle Densan monitor outbyte
 486         and inbyte functions.
 487
 488 1997-12-29  Felix Lee  <flee@cygnus.com>
 489
 490         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 491
 492 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 493
 494         * Makefile.in (tmp-igen): Arrange for $zero to always be
 495         reset to zero after every instruction.
 496
 497 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 498
 499         * configure: Regenerated to track ../common/aclocal.m4 changes.
 500         * config.in: Ditto.
 501
 502 start-sanitize-vr5400
 503 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 504
 505         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 506         bit values.
 507
 508 end-sanitize-vr5400
 509 start-sanitize-vr5400
 510 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 511
 512         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 513         vr5400 with the vr5000 as the default.
 514
 515 end-sanitize-vr5400
 516 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 517
 518         * mips.igen (MSUB): Fix to work like MADD.
 519         * gencode.c (MSUB): Similarly.
 520
 521 start-sanitize-vr5400
 522 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 523
 524         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 525         vr5400.
 526
 527 end-sanitize-vr5400
 528 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 529
 530         * configure: Regenerated to track ../common/aclocal.m4 changes.
 531
 532 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 533
 534         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 535
 536 start-sanitize-vr5400
 537         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 538         (value_cc, store_cc): Implement.
 539
 540         * sim-main.h: Add 8*3*8 bit accumulator.
 541
 542         * vr5400.igen: Move mdmx instructins from here
 543         * mdmx.igen: To here - new file. Add/fix missing instructions.
 544         * mips.igen: Include mdmx.igen.
 545         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 546
 547 end-sanitize-vr5400
 548 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 549
 550         * sim-main.h (sim-fpu.h): Include.
 551
 552         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 553         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 554         using host independant sim_fpu module.
 555
 556 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 557
 558         * interp.c (signal_exception): Report internal errors with SIGABRT
 559         not SIGQUIT.
 560
 561         * sim-main.h (C0_CONFIG): New register.
 562         (signal.h): No longer include.
 563
 564         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 565
 566 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 567
 568         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 569
 570 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 571
 572         * mips.igen: Tag vr5000 instructions.
 573         (ANDI): Was missing mipsIV model, fix assembler syntax.
 574         (do_c_cond_fmt): New function.
 575         (C.cond.fmt): Handle mips I-III which do not support CC field
 576         separatly.
 577         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 578         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 579         in IV3.2 spec.
 580         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 581         vr5000 which saves LO in a GPR separatly.
 582
 583         * configure.in (enable-sim-igen): For vr5000, select vr5000
 584         specific instructions.
 585         * configure: Re-generate.
 586
 587 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 588
 589         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 590
 591         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 592         fmt_uninterpreted_64 bit cases to switch.  Convert to
 593         fmt_formatted,
 594
 595         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 596
 597         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 598         as specified in IV3.2 spec.
 599         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 600
 601 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 602
 603         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 604         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 605         (start-sanitize-r5900):
 606         (LWXC1, SWXC1): Delete from r5900 instruction set.
 607         (end-sanitize-r5900):
 608         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 609         PENDING_FILL versions of instructions.  Simplify.
 610         (X): New function.
 611         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 612         instructions.
 613         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 614         a signed value.
 615         (MTHI, MFHI): Disable code checking HI-LO.
 616
 617         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 618         global.
 619         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 620
 621 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 622
 623         * gencode.c (build_mips16_operands): Replace IPC with cia.
 624
 625         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 626         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 627         IPC to `cia'.
 628         (UndefinedResult): Replace function with macro/function
 629         combination.
 630         (sim_engine_run): Don't save PC in IPC.
 631
 632         * sim-main.h (IPC): Delete.
 633
 634         start-sanitize-vr5400
 635         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 636         (do_select): Rename function select.
 637         end-sanitize-vr5400
 638
 639         * interp.c (signal_exception, store_word, load_word,
 640         address_translation, load_memory, store_memory, cache_op,
 641         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 642         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 643         current instruction address - cia - argument.
 644         (sim_read, sim_write): Call address_translation directly.
 645         (sim_engine_run): Rename variable vaddr to cia.
 646         (signal_exception): Pass cia to sim_monitor
 647
 648         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 649         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 650         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 651
 652         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 653         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 654         SIM_ASSERT.
 655
 656         * interp.c (signal_exception): Pass restart address to
 657         sim_engine_restart.
 658
 659         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 660         idecode.o): Add dependency.
 661
 662         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 663         Delete definitions
 664         (DELAY_SLOT): Update NIA not PC with branch address.
 665         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 666
 667         * mips.igen: Use CIA not PC in branch calculations.
 668         (illegal): Call SignalException.
 669         (BEQ, ADDIU): Fix assembler.
 670
 671 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 672
 673         * m16.igen (JALX): Was missing.
 674
 675         * configure.in (enable-sim-igen): New configuration option.
 676         * configure: Re-generate.
 677
 678         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 679
 680         * interp.c (load_memory, store_memory): Delete parameter RAW.
 681         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 682         bypassing {load,store}_memory.
 683
 684         * sim-main.h (ByteSwapMem): Delete definition.
 685
 686         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 687
 688         * interp.c (sim_do_command, sim_commands): Delete mips specific
 689         commands.  Handled by module sim-options.
 690
 691         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 692         (WITH_MODULO_MEMORY): Define.
 693
 694         * interp.c (sim_info): Delete code printing memory size.
 695
 696         * interp.c (mips_size): Nee sim_size, delete function.
 697         (power2): Delete.
 698         (monitor, monitor_base, monitor_size): Delete global variables.
 699         (sim_open, sim_close): Delete code creating monitor and other
 700         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 701         manage memory regions.
 702         (load_memory, store_memory): Use sim-core for memory model.
 703
 704         * interp.c (address_translation): Delete all memory map code
 705         except line forcing 32 bit addresses.
 706
 707 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 708
 709         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 710         trace options.
 711
 712         * interp.c (logfh, logfile): Delete globals.
 713         (sim_open, sim_close): Delete code opening & closing log file.
 714         (mips_option_handler): Delete -l and -n options.
 715         (OPTION mips_options): Ditto.
 716
 717         * interp.c (OPTION mips_options): Rename option trace to dinero.
 718         (mips_option_handler): Update.
 719
 720 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 721
 722         * interp.c (fetch_str): New function.
 723         (sim_monitor): Rewrite using sim_read & sim_write.
 724         (sim_open): Check magic number.
 725         (sim_open): Write monitor vectors into memory using sim_write.
 726         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 727         (sim_read, sim_write): Simplify - transfer data one byte at a
 728         time.
 729         (load_memory, store_memory): Clarify meaning of parameter RAW.
 730
 731         * sim-main.h (isHOST): Defete definition.
 732         (isTARGET): Mark as depreciated.
 733         (address_translation): Delete parameter HOST.
 734
 735         * interp.c (address_translation): Delete parameter HOST.
 736
 737 start-sanitize-tx49
 738 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 739
 740         * gencode.c: Add tx49 configury and insns.
 741         * configure.in: Add tx49 configury.
 742         * configure: Update.
 743
 744 end-sanitize-tx49
 745 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 746
 747         * mips.igen:
 748
 749         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 750         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 751
 752 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 753
 754         * mips.igen: Add model filter field to records.
 755
 756 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 757
 758         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 759
 760         interp.c (sim_engine_run): Do not compile function sim_engine_run
 761         when WITH_IGEN == 1.
 762
 763         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 764         target architecture.
 765
 766         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 767         igen. Replace with configuration variables sim_igen_flags /
 768         sim_m16_flags.
 769
 770         start-sanitize-r5900
 771         * r5900.igen: New file. Copy r5900 insns here.
 772         end-sanitize-r5900
 773         start-sanitize-vr5400
 774         * vr5400.igen: New file.
 775         end-sanitize-vr5400
 776         * m16.igen: New file.  Copy mips16 insns here.
 777         * mips.igen: From here.
 778
 779 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 780
 781         start-sanitize-vr5400
 782         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 783
 784         * configure.in: Add mips64vr5400 target.
 785         * configure: Re-generate.
 786
 787         end-sanitize-vr5400
 788         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 789         to top.
 790         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 791
 792 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 793
 794         * gencode.c (build_instruction): Follow sim_write's lead in using
 795         BigEndianMem instead of !ByteSwapMem.
 796
 797 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 798
 799         * configure.in (sim_gen): Dependent on target, select type of
 800         generator.  Always select old style generator.
 801
 802         configure: Re-generate.
 803
 804         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 805         targets.
 806         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 807         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 808         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 809         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 810         SIM_@sim_gen@_*, set by autoconf.
 811
 812 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 813
 814         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 815
 816         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 817         CURRENT_FLOATING_POINT instead.
 818
 819         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 820         (address_translation): Raise exception InstructionFetch when
 821         translation fails and isINSTRUCTION.
 822
 823         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 824         sim_engine_run): Change type of of vaddr and paddr to
 825         address_word.
 826         (address_translation, prefetch, load_memory, store_memory,
 827         cache_op): Change type of vAddr and pAddr to address_word.
 828
 829         * gencode.c (build_instruction): Change type of vaddr and paddr to
 830         address_word.
 831
 832 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 833
 834         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 835         macro to obtain result of ALU op.
 836
 837 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 838
 839         * interp.c (sim_info): Call profile_print.
 840
 841 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 842
 843         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 844
 845         * sim-main.h (WITH_PROFILE): Do not define, defined in
 846         common/sim-config.h.  Use sim-profile module.
 847         (simPROFILE): Delete defintion.
 848
 849         * interp.c (PROFILE): Delete definition.
 850         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 851         (sim_close): Delete code writing profile histogram.
 852         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 853         Delete.
 854         (sim_engine_run): Delete code profiling the PC.
 855
 856 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 857
 858         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 859
 860         * interp.c (sim_monitor): Make register pointers of type
 861         unsigned_word*.
 862
 863         * sim-main.h: Make registers of type unsigned_word not
 864         signed_word.
 865
 866 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 867
 868 start-sanitize-r5900
 869         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 870         ...): Move to sim-main.h
 871
 872 end-sanitize-r5900
 873         * interp.c (sync_operation): Rename from SyncOperation, make
 874         global, add SD argument.
 875         (prefetch): Rename from Prefetch, make global, add SD argument.
 876         (decode_coproc): Make global.
 877
 878         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 879
 880         * gencode.c (build_instruction): Generate DecodeCoproc not
 881         decode_coproc calls.
 882
 883         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 884         (SizeFGR): Move to sim-main.h
 885         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 886         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 887         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 888         sim-main.h.
 889         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 890         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 891         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 892         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 893         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 894         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 895
 896         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 897         exception.
 898         (sim-alu.h): Include.
 899         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 900         (sim_cia): Typedef to instruction_address.
 901
 902 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 903
 904         * Makefile.in (interp.o): Rename generated file engine.c to
 905         oengine.c.
 906
 907         * interp.c: Update.
 908
 909 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 910
 911         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 912
 913 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 914
 915         * gencode.c (build_instruction): For "FPSQRT", output correct
 916         number of arguments to Recip.
 917
 918 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 919
 920         * Makefile.in (interp.o): Depends on sim-main.h
 921
 922         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 923
 924         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 925         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 926         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 927         STATE, DSSTATE): Define
 928         (GPR, FGRIDX, ..): Define.
 929
 930         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 931         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 932         (GPR, FGRIDX, ...): Delete macros.
 933
 934         * interp.c: Update names to match defines from sim-main.h
 935
 936 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 937
 938         * interp.c (sim_monitor): Add SD argument.
 939         (sim_warning): Delete.  Replace calls with calls to
 940         sim_io_eprintf.
 941         (sim_error): Delete. Replace calls with sim_io_error.
 942         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 943         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 944         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 945         argument.
 946         (mips_size): Rename from sim_size. Add SD argument.
 947
 948         * interp.c (simulator): Delete global variable.
 949         (callback): Delete global variable.
 950         (mips_option_handler, sim_open, sim_write, sim_read,
 951         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 952         sim_size,sim_monitor): Use sim_io_* not callback->*.
 953         (sim_open): ZALLOC simulator struct.
 954         (PROFILE): Do not define.
 955
 956 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 957
 958         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 959         support.h with corresponding code.
 960
 961         * sim-main.h (word64, uword64), support.h: Move definition to
 962         sim-main.h.
 963         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 964
 965         * support.h: Delete
 966         * Makefile.in: Update dependencies
 967         * interp.c: Do not include.
 968
 969 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 970
 971         * interp.c (address_translation, load_memory, store_memory,
 972         cache_op): Rename to from AddressTranslation et.al., make global,
 973         add SD argument
 974
 975         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 976         CacheOp): Define.
 977
 978         * interp.c (SignalException): Rename to signal_exception, make
 979         global.
 980
 981         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 982
 983         * sim-main.h (SignalException, SignalExceptionInterrupt,
 984         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 985         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 986         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 987         Define.
 988
 989         * interp.c, support.h: Use.
 990
 991 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 992
 993         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 994         to value_fpr / store_fpr. Add SD argument.
 995         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 996         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 997
 998         * sim-main.h (ValueFPR, StoreFPR): Define.
 999
1000 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1001
1002         * interp.c (sim_engine_run): Check consistency between configure
1003         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1004         and HASFPU.
1005
1006         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1007         (mips_fpu): Configure WITH_FLOATING_POINT.
1008         (mips_endian): Configure WITH_TARGET_ENDIAN.
1009         * configure: Update.
1010
1011 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1012
1013         * configure: Regenerated to track ../common/aclocal.m4 changes.
1014
1015 start-sanitize-r5900
1016 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1017
1018         * interp.c (MAX_REG): Allow up-to 128 registers.
1019         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1020         (REGISTER_SA): Ditto.
1021         (sim_open): Initialize register_widths for r5900 specific
1022         registers.
1023         (sim_fetch_register, sim_store_register): Check for request of
1024         r5900 specific SA register.  Check for request for hi 64 bits of
1025         r5900 specific registers.
1026
1027 end-sanitize-r5900
1028 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1029
1030         * configure: Regenerated.
1031
1032 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1033
1034         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1035
1036 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1037
1038         * gencode.c (print_igen_insn_models): Assume certain architectures
1039         include all mips* instructions.
1040         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1041         instruction.
1042
1043         * Makefile.in (tmp.igen): Add target. Generate igen input from
1044         gencode file.
1045
1046         * gencode.c (FEATURE_IGEN): Define.
1047         (main): Add --igen option.  Generate output in igen format.
1048         (process_instructions): Format output according to igen option.
1049         (print_igen_insn_format): New function.
1050         (print_igen_insn_models): New function.
1051         (process_instructions): Only issue warnings and ignore
1052         instructions when no FEATURE_IGEN.
1053
1054 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1055
1056         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1057         MIPS targets.
1058
1059 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1060
1061         * configure: Regenerated to track ../common/aclocal.m4 changes.
1062
1063 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1064
1065         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1066         SIM_RESERVED_BITS): Delete, moved to common.
1067         (SIM_EXTRA_CFLAGS): Update.
1068
1069 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1070
1071         * configure.in: Configure non-strict memory alignment.
1072         * configure: Regenerated to track ../common/aclocal.m4 changes.
1073
1074 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1075
1076         * configure: Regenerated to track ../common/aclocal.m4 changes.
1077
1078 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1079
1080         * gencode.c (SDBBP,DERET): Added (3900) insns.
1081         (RFE): Turn on for 3900.
1082         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1083         (dsstate): Made global.
1084         (SUBTARGET_R3900): Added.
1085         (CANCELDELAYSLOT): New.
1086         (SignalException): Ignore SystemCall rather than ignore and
1087         terminate.  Add DebugBreakPoint handling.
1088         (decode_coproc): New insns RFE, DERET; and new registers Debug
1089         and DEPC protected by SUBTARGET_R3900.
1090         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1091         bits explicitly.
1092         * Makefile.in,configure.in: Add mips subtarget option.
1093         * configure: Update.
1094
1095 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1096
1097         * gencode.c: Add r3900 (tx39).
1098
1099 start-sanitize-tx19
1100         * gencode.c: Fix some configuration problems by improving
1101         the relationship between tx19 and tx39.
1102 end-sanitize-tx19
1103
1104 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1105
1106         * gencode.c (build_instruction): Don't need to subtract 4 for
1107         JALR, just 2.
1108
1109 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1110
1111         * interp.c: Correct some HASFPU problems.
1112
1113 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1114
1115         * configure: Regenerated to track ../common/aclocal.m4 changes.
1116
1117 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1118
1119         * interp.c (mips_options): Fix samples option short form, should
1120         be `x'.
1121
1122 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1123
1124         * interp.c (sim_info): Enable info code.  Was just returning.
1125
1126 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1127
1128         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1129         MFC0.
1130
1131 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1132
1133         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1134         constants.
1135         (build_instruction): Ditto for LL.
1136
1137 start-sanitize-tx19
1138 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1139
1140         * mips/configure.in, mips/gencode: Add tx19/r1900.
1141
1142 end-sanitize-tx19
1143 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1144
1145         * configure: Regenerated to track ../common/aclocal.m4 changes.
1146
1147 start-sanitize-r5900
1148 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1149
1150         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1151         for overflow due to ABS of MININT, set result to MAXINT.
1152         (build_instruction): For "psrlvw", signextend bit 31.
1153
1154 end-sanitize-r5900
1155 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1156
1157         * configure: Regenerated to track ../common/aclocal.m4 changes.
1158         * config.in: Ditto.
1159
1160 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1161
1162         * interp.c (sim_open): Add call to sim_analyze_program, update
1163         call to sim_config.
1164
1165 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1166
1167         * interp.c (sim_kill): Delete.
1168         (sim_create_inferior): Add ABFD argument. Set PC from same.
1169         (sim_load): Move code initializing trap handlers from here.
1170         (sim_open): To here.
1171         (sim_load): Delete, use sim-hload.c.
1172
1173         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1174
1175 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1176
1177         * configure: Regenerated to track ../common/aclocal.m4 changes.
1178         * config.in: Ditto.
1179
1180 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1181
1182         * interp.c (sim_open): Add ABFD argument.
1183         (sim_load): Move call to sim_config from here.
1184         (sim_open): To here.  Check return status.
1185
1186 start-sanitize-r5900
1187         * gencode.c (build_instruction): Do not define x8000000000000000,
1188         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1189
1190 end-sanitize-r5900
1191 start-sanitize-r5900
1192 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1193
1194         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1195         "pdivuw" check for overflow due to signed divide by -1.
1196
1197 end-sanitize-r5900
1198 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1199
1200         * gencode.c (build_instruction): Two arg MADD should
1201         not assign result to $0.
1202
1203 start-sanitize-r5900
1204 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1205
1206         * gencode.c (build_instruction): For "ppac5" use unsigned
1207         arrithmetic so that the sign bit doesn't smear when right shifted.
1208         (build_instruction): For "pdiv" perform sign extension when
1209         storing results in HI and LO.
1210         (build_instructions): For "pdiv" and "pdivbw" check for
1211         divide-by-zero.
1212         (build_instruction): For "pmfhl.slw" update hi part of dest
1213         register as well as low part.
1214         (build_instruction): For "pmfhl" portably handle long long values.
1215         (build_instruction): For "pmfhl.sh" correctly negative values.
1216         Store half words 2 and three in the correct place.
1217         (build_instruction): For "psllvw", sign extend value after shift.
1218
1219 end-sanitize-r5900
1220 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1221
1222         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1223         * sim/mips/configure.in: Regenerate.
1224
1225 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1226
1227         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1228         signed8, unsigned8 et.al. types.
1229
1230 start-sanitize-r5900
1231         * gencode.c (build_instruction): For PMULTU* do not sign extend
1232         registers.  Make generated code easier to debug.
1233
1234 end-sanitize-r5900
1235         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1236         hosts when selecting subreg.
1237
1238 start-sanitize-r5900
1239 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1240
1241         * gencode.c (type_for_data_len): For 32bit operations concerned
1242         with overflow, perform op using 64bits.
1243         (build_instruction): For PADD, always compute operation using type
1244         returned by type_for_data_len.
1245         (build_instruction): For PSUBU, when overflow, saturate to zero as
1246         actually underflow.
1247
1248 end-sanitize-r5900
1249 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1250
1251 start-sanitize-r5900
1252         * gencode.c (build_instruction): Handle "pext5" according to
1253         version 1.95 of the r5900 ISA.
1254
1255         * gencode.c (build_instruction): Handle "ppac5" according to
1256         version 1.95 of the r5900 ISA.
1257
1258 end-sanitize-r5900
1259         * interp.c (sim_engine_run): Reset the ZERO register to zero
1260         regardless of FEATURE_WARN_ZERO.
1261         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1262
1263 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1264
1265         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1266         (SignalException): For BreakPoints ignore any mode bits and just
1267         save the PC.
1268         (SignalException): Always set the CAUSE register.
1269
1270 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1271
1272         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1273         exception has been taken.
1274
1275         * interp.c: Implement the ERET and mt/f sr instructions.
1276
1277 start-sanitize-r5900
1278 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1279
1280         * gencode.c (build_instruction): For paddu, extract unsigned
1281         sub-fields.
1282
1283         * gencode.c (build_instruction): Saturate padds instead of padd
1284         instructions.
1285
1286 end-sanitize-r5900
1287 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1288
1289         * interp.c (SignalException): Don't bother restarting an
1290         interrupt.
1291
1292 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1293
1294         * interp.c (SignalException): Really take an interrupt.
1295         (interrupt_event): Only deliver interrupts when enabled.
1296
1297 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1298
1299         * interp.c (sim_info): Only print info when verbose.
1300         (sim_info) Use sim_io_printf for output.
1301
1302 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1303
1304         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1305         mips architectures.
1306
1307 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1308
1309         * interp.c (sim_do_command): Check for common commands if a
1310         simulator specific command fails.
1311
1312 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1313
1314         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1315         and simBE when DEBUG is defined.
1316
1317 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1318
1319         * interp.c (interrupt_event): New function.  Pass exception event
1320         onto exception handler.
1321
1322         * configure.in: Check for stdlib.h.
1323         * configure: Regenerate.
1324
1325         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1326         variable declaration.
1327         (build_instruction): Initialize memval1.
1328         (build_instruction): Add UNUSED attribute to byte, bigend,
1329         reverse.
1330         (build_operands): Ditto.
1331
1332         * interp.c: Fix GCC warnings.
1333         (sim_get_quit_code): Delete.
1334
1335         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1336         * Makefile.in: Ditto.
1337         * configure: Re-generate.
1338
1339         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1340
1341 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1342
1343         * interp.c (mips_option_handler): New function parse argumes using
1344         sim-options.
1345         (myname): Replace with STATE_MY_NAME.
1346         (sim_open): Delete check for host endianness - performed by
1347         sim_config.
1348         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1349         (sim_open): Move much of the initialization from here.
1350         (sim_load): To here.  After the image has been loaded and
1351         endianness set.
1352         (sim_open): Move ColdReset from here.
1353         (sim_create_inferior): To here.
1354         (sim_open): Make FP check less dependant on host endianness.
1355
1356         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1357         run.
1358         * interp.c (sim_set_callbacks): Delete.
1359
1360         * interp.c (membank, membank_base, membank_size): Replace with
1361         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1362         (sim_open): Remove call to callback->init. gdb/run do this.
1363
1364         * interp.c: Update
1365
1366         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1367
1368         * interp.c (big_endian_p): Delete, replaced by
1369         current_target_byte_order.
1370
1371 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1372
1373         * interp.c (host_read_long, host_read_word, host_swap_word,
1374         host_swap_long): Delete. Using common sim-endian.
1375         (sim_fetch_register, sim_store_register): Use H2T.
1376         (pipeline_ticks): Delete.  Handled by sim-events.
1377         (sim_info): Update.
1378         (sim_engine_run): Update.
1379
1380 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1381
1382         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1383         reason from here.
1384         (SignalException): To here. Signal using sim_engine_halt.
1385         (sim_stop_reason): Delete, moved to common.
1386
1387 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1388
1389         * interp.c (sim_open): Add callback argument.
1390         (sim_set_callbacks): Delete SIM_DESC argument.
1391         (sim_size): Ditto.
1392
1393 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1394
1395         * Makefile.in (SIM_OBJS): Add common modules.
1396
1397         * interp.c (sim_set_callbacks): Also set SD callback.
1398         (set_endianness, xfer_*, swap_*): Delete.
1399         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1400         Change to functions using sim-endian macros.
1401         (control_c, sim_stop): Delete, use common version.
1402         (simulate): Convert into.
1403         (sim_engine_run): This function.
1404         (sim_resume): Delete.
1405
1406         * interp.c (simulation): New variable - the simulator object.
1407         (sim_kind): Delete global - merged into simulation.
1408         (sim_load): Cleanup.  Move PC assignment from here.
1409         (sim_create_inferior): To here.
1410
1411         * sim-main.h: New file.
1412         * interp.c (sim-main.h): Include.
1413
1414 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1415
1416         * configure: Regenerated to track ../common/aclocal.m4 changes.
1417
1418 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1419
1420         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1421
1422 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1423
1424         * gencode.c (build_instruction): DIV instructions: check
1425         for division by zero and integer overflow before using
1426         host's division operation.
1427
1428 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1429
1430         * Makefile.in (SIM_OBJS): Add sim-load.o.
1431         * interp.c: #include bfd.h.
1432         (target_byte_order): Delete.
1433         (sim_kind, myname, big_endian_p): New static locals.
1434         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1435         after argument parsing.  Recognize -E arg, set endianness accordingly.
1436         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1437         load file into simulator.  Set PC from bfd.
1438         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1439         (set_endianness): Use big_endian_p instead of target_byte_order.
1440
1441 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1442
1443         * interp.c (sim_size): Delete prototype - conflicts with
1444         definition in remote-sim.h.  Correct definition.
1445
1446 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1447
1448         * configure: Regenerated to track ../common/aclocal.m4 changes.
1449         * config.in: Ditto.
1450
1451 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1452
1453         * interp.c (sim_open): New arg `kind'.
1454
1455         * configure: Regenerated to track ../common/aclocal.m4 changes.
1456
1457 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1458
1459         * configure: Regenerated to track ../common/aclocal.m4 changes.
1460
1461 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1462
1463         * interp.c (sim_open): Set optind to 0 before calling getopt.
1464
1465 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1466
1467         * configure: Regenerated to track ../common/aclocal.m4 changes.
1468
1469 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1470
1471         * interp.c : Replace uses of pr_addr with pr_uword64
1472         where the bit length is always 64 independent of SIM_ADDR.
1473         (pr_uword64) : added.
1474
1475 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1476
1477         * configure: Re-generate.
1478
1479 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1480
1481         * configure: Regenerate to track ../common/aclocal.m4 changes.
1482
1483 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1484
1485         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1486         in argv form.
1487         (other sim_*): New SIM_DESC argument.
1488
1489 start-sanitize-r5900
1490 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1491
1492         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1493         Change values to avoid overloading DOUBLEWORD which is tested
1494         for all insns.
1495         * gencode.c: reinstate "offending code".
1496
1497 end-sanitize-r5900
1498 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1499
1500         * interp.c: Fix printing of addresses for non-64-bit targets.
1501         (pr_addr): Add function to print address based on size.
1502 start-sanitize-r5900
1503         * gencode.c: #ifdef out offending code until a permanent fix
1504         can be added.  Code is causing build errors for non-5900 mips targets.
1505 end-sanitize-r5900
1506
1507 start-sanitize-r5900
1508 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1509
1510         * gencode.c (process_instructions): Correct test for ISA dependent
1511         architecture bits in isa field of MIPS_DECODE.
1512
1513 end-sanitize-r5900
1514 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1515
1516         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1517
1518 start-sanitize-r5900
1519 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1520
1521         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1522         PMADDUW.
1523
1524 end-sanitize-r5900
1525 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1526
1527         * gencode.c (build_mips16_operands): Correct computation of base
1528         address for extended PC relative instruction.
1529
1530 start-sanitize-r5900
1531 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1532
1533         * Makefile.in, configure, configure.in, gencode.c,
1534         interp.c, support.h: add r5900.
1535
1536 end-sanitize-r5900
1537 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1538
1539         * interp.c (mips16_entry): Add support for floating point cases.
1540         (SignalException): Pass floating point cases to mips16_entry.
1541         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1542         registers.
1543         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1544         or fmt_word.
1545         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1546         and then set the state to fmt_uninterpreted.
1547         (COP_SW): Temporarily set the state to fmt_word while calling
1548         ValueFPR.
1549
1550 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1551
1552         * gencode.c (build_instruction): The high order may be set in the
1553         comparison flags at any ISA level, not just ISA 4.
1554
1555 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1556
1557         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1558         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1559         * configure.in: sinclude ../common/aclocal.m4.
1560         * configure: Regenerated.
1561
1562 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1563
1564         * configure: Rebuild after change to aclocal.m4.
1565
1566 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1567
1568         * configure configure.in Makefile.in:  Update to new configure
1569         scheme which is more compatible with WinGDB builds.
1570         * configure.in:  Improve comment on how to run autoconf.
1571         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1572         * Makefile.in:  Use autoconf substitution to install common
1573         makefile fragment.
1574
1575 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1576
1577         * gencode.c (build_instruction): Use BigEndianCPU instead of
1578         ByteSwapMem.
1579
1580 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1581
1582         * interp.c (sim_monitor): Make output to stdout visible in
1583         wingdb's I/O log window.
1584
1585 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1586
1587         * support.h: Undo previous change to SIGTRAP
1588         and SIGQUIT values.
1589
1590 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1591
1592         * interp.c (store_word, load_word): New static functions.
1593         (mips16_entry): New static function.
1594         (SignalException): Look for mips16 entry and exit instructions.
1595         (simulate): Use the correct index when setting fpr_state after
1596         doing a pending move.
1597
1598 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1599
1600         * interp.c: Fix byte-swapping code throughout to work on
1601         both little- and big-endian hosts.
1602
1603 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1604
1605         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1606         with gdb/config/i386/xm-windows.h.
1607
1608 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1609
1610         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1611         that messes up arithmetic shifts.
1612
1613 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1614
1615         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1616         SIGTRAP and SIGQUIT for _WIN32.
1617
1618 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1619
1620         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1621         force a 64 bit multiplication.
1622         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1623         destination register is 0, since that is the default mips16 nop
1624         instruction.
1625
1626 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1627
1628         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1629         (build_endian_shift): Don't check proc64.
1630         (build_instruction): Always set memval to uword64.  Cast op2 to
1631         uword64 when shifting it left in memory instructions.  Always use
1632         the same code for stores--don't special case proc64.
1633
1634         * gencode.c (build_mips16_operands): Fix base PC value for PC
1635         relative operands.
1636         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1637         jal instruction.
1638         * interp.c (simJALDELAYSLOT): Define.
1639         (JALDELAYSLOT): Define.
1640         (INDELAYSLOT, INJALDELAYSLOT): Define.
1641         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1642
1643 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1644
1645         * interp.c (sim_open): add flush_cache as a PMON routine
1646         (sim_monitor): handle flush_cache by ignoring it
1647
1648 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1649
1650         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1651         BigEndianMem.
1652         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1653         (BigEndianMem): Rename to ByteSwapMem and change sense.
1654         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1655         BigEndianMem references to !ByteSwapMem.
1656         (set_endianness): New function, with prototype.
1657         (sim_open): Call set_endianness.
1658         (sim_info): Use simBE instead of BigEndianMem.
1659         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1660         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1661         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1662         ifdefs, keeping the prototype declaration.
1663         (swap_word): Rewrite correctly.
1664         (ColdReset): Delete references to CONFIG.  Delete endianness related
1665         code; moved to set_endianness.
1666
1667 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1668
1669         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1670         * interp.c (CHECKHILO): Define away.
1671         (simSIGINT): New macro.
1672         (membank_size): Increase from 1MB to 2MB.
1673         (control_c): New function.
1674         (sim_resume): Rename parameter signal to signal_number.  Add local
1675         variable prev.  Call signal before and after simulate.
1676         (sim_stop_reason): Add simSIGINT support.
1677         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1678         functions always.
1679         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1680         if logfh is NULL.
1681         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1682         a call to sim_warning.
1683
1684 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1685
1686         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1687         16 bit instructions.
1688
1689 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1690
1691         Add support for mips16 (16 bit MIPS implementation):
1692         * gencode.c (inst_type): Add mips16 instruction encoding types.
1693         (GETDATASIZEINSN): Define.
1694         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1695         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1696         mtlo.
1697         (MIPS16_DECODE): New table, for mips16 instructions.
1698         (bitmap_val): New static function.
1699         (struct mips16_op): Define.
1700         (mips16_op_table): New table, for mips16 operands.
1701         (build_mips16_operands): New static function.
1702         (process_instructions): If PC is odd, decode a mips16
1703         instruction.  Break out instruction handling into new
1704         build_instruction function.
1705         (build_instruction): New static function, broken out of
1706         process_instructions.  Check modifiers rather than flags for SHIFT
1707         bit count and m[ft]{hi,lo} direction.
1708         (usage): Pass program name to fprintf.
1709         (main): Remove unused variable this_option_optind.  Change
1710         ``*loptarg++'' to ``loptarg++''.
1711         (my_strtoul): Parenthesize && within ||.
1712         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1713         (simulate): If PC is odd, fetch a 16 bit instruction, and
1714         increment PC by 2 rather than 4.
1715         * configure.in: Add case for mips16*-*-*.
1716         * configure: Rebuild.
1717
1718 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1719
1720         * interp.c: Allow -t to enable tracing in standalone simulator.
1721         Fix garbage output in trace file and error messages.
1722
1723 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1724
1725         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1726         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1727         * configure.in: Simplify using macros in ../common/aclocal.m4.
1728         * configure: Regenerated.
1729         * tconfig.in: New file.
1730
1731 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1732
1733         * interp.c: Fix bugs in 64-bit port.
1734         Use ansi function declarations for msvc compiler.
1735         Initialize and test file pointer in trace code.
1736         Prevent duplicate definition of LAST_EMED_REGNUM.
1737
1738 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1739
1740         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1741
1742 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1743
1744         * interp.c (SignalException): Check for explicit terminating
1745         breakpoint value.
1746         * gencode.c: Pass instruction value through SignalException()
1747         calls for Trap, Breakpoint and Syscall.
1748
1749 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1750
1751         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1752         only used on those hosts that provide it.
1753         * configure.in: Add sqrt() to list of functions to be checked for.
1754         * config.in: Re-generated.
1755         * configure: Re-generated.
1756
1757 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1758
1759         * gencode.c (process_instructions): Call build_endian_shift when
1760         expanding STORE RIGHT, to fix swr.
1761         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1762         clear the high bits.
1763         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1764         Fix float to int conversions to produce signed values.
1765
1766 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1767
1768         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1769         (process_instructions): Correct handling of nor instruction.
1770         Correct shift count for 32 bit shift instructions. Correct sign
1771         extension for arithmetic shifts to not shift the number of bits in
1772         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1773         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1774         Fix madd.
1775         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1776         It's OK to have a mult follow a mult.  What's not OK is to have a
1777         mult follow an mfhi.
1778         (Convert): Comment out incorrect rounding code.
1779
1780 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1781
1782         * interp.c (sim_monitor): Improved monitor printf
1783         simulation. Tidied up simulator warnings, and added "--log" option
1784         for directing warning message output.
1785         * gencode.c: Use sim_warning() rather than WARNING macro.
1786
1787 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1788
1789         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1790         getopt1.o, rather than on gencode.c.  Link objects together.
1791         Don't link against -liberty.
1792         (gencode.o, getopt.o, getopt1.o): New targets.
1793         * gencode.c: Include <ctype.h> and "ansidecl.h".
1794         (AND): Undefine after including "ansidecl.h".
1795         (ULONG_MAX): Define if not defined.
1796         (OP_*): Don't define macros; now defined in opcode/mips.h.
1797         (main): Call my_strtoul rather than strtoul.
1798         (my_strtoul): New static function.
1799
1800 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1801
1802         * gencode.c (process_instructions):  Generate word64 and uword64
1803         instead of `long long' and `unsigned long long' data types.
1804         * interp.c:  #include sysdep.h to get signals, and define default
1805         for SIGBUS.
1806         * (Convert):  Work around for Visual-C++ compiler bug with type
1807         conversion.
1808         * support.h:  Make things compile under Visual-C++ by using
1809         __int64 instead of `long long'.  Change many refs to long long
1810         into word64/uword64 typedefs.
1811
1812 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1813
1814         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1815         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1816         (docdir): Removed.
1817         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1818         (AC_PROG_INSTALL): Added.
1819         (AC_PROG_CC): Moved to before configure.host call.
1820         * configure: Rebuilt.
1821
1822 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1823
1824         * configure.in: Define @SIMCONF@ depending on mips target.
1825         * configure: Rebuild.
1826         * Makefile.in (run): Add @SIMCONF@ to control simulator
1827         construction.
1828         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1829         * interp.c: Remove some debugging, provide more detailed error
1830         messages, update memory accesses to use LOADDRMASK.
1831
1832 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1833
1834         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1835         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1836         stamp-h.
1837         * configure: Rebuild.
1838         * config.in: New file, generated by autoheader.
1839         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1840         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1841         HAVE_ANINT and HAVE_AINT, as appropriate.
1842         * Makefile.in (run): Use @LIBS@ rather than -lm.
1843         (interp.o): Depend upon config.h.
1844         (Makefile): Just rebuild Makefile.
1845         (clean): Remove stamp-h.
1846         (mostlyclean): Make the same as clean, not as distclean.
1847         (config.h, stamp-h): New targets.
1848
1849 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1850
1851         * interp.c (ColdReset): Fix boolean test. Make all simulator
1852         globals static.
1853
1854 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1855
1856         * interp.c (xfer_direct_word, xfer_direct_long,
1857         swap_direct_word, swap_direct_long, xfer_big_word,
1858         xfer_big_long, xfer_little_word, xfer_little_long,
1859         swap_word,swap_long): Added.
1860         * interp.c (ColdReset): Provide function indirection to
1861         host<->simulated_target transfer routines.
1862         * interp.c (sim_store_register, sim_fetch_register): Updated to
1863         make use of indirected transfer routines.
1864
1865 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1866
1867         * gencode.c (process_instructions): Ensure FP ABS instruction
1868         recognised.
1869         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1870         system call support.
1871
1872 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1873
1874         * interp.c (sim_do_command): Complain if callback structure not
1875         initialised.
1876
1877 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1878
1879         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1880         support for Sun hosts.
1881         * Makefile.in (gencode): Ensure the host compiler and libraries
1882         used for cross-hosted build.
1883
1884 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1885
1886         * interp.c, gencode.c: Some more (TODO) tidying.
1887
1888 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1889
1890         * gencode.c, interp.c: Replaced explicit long long references with
1891         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1892         * support.h (SET64LO, SET64HI): Macros added.
1893
1894 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1895
1896         * configure: Regenerate with autoconf 2.7.
1897
1898 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1899
1900         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1901         * support.h: Remove superfluous "1" from #if.
1902         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1903
1904 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1905
1906         * interp.c (StoreFPR): Control UndefinedResult() call on
1907         WARN_RESULT manifest.
1908
1909 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1910
1911         * gencode.c: Tidied instruction decoding, and added FP instruction
1912         support.
1913
1914         * interp.c: Added dineroIII, and BSD profiling support. Also
1915         run-time FP handling.
1916
1917 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1918
1919         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1920         gencode.c, interp.c, support.h: created.