1 2001-02-23 Ben Elliston <bje@redhat.com>
3 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
4 already defined elsewhere.
6 2001-02-19 Ben Elliston <bje@redhat.com>
8 * sim-main.h (sim_monitor): Return an int.
9 * interp.c (sim_monitor): Add return values.
10 (signal_exception): Handle error conditions from sim_monitor.
12 2001-02-08 Ben Elliston <bje@redhat.com>
14 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
15 (store_memory): Likewise, pass cia to sim_core_write*.
17 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
19 On advice from Chris G. Demetriou <cgd@sibyte.com>:
20 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
22 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
24 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
25 * Makefile.in: Don't delete *.igen when cleaning directory.
27 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
29 * m16.igen (break): Call SignalException not sim_engine_halt.
31 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
34 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
36 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
38 * mips.igen (MxC1, DMxC1): Fix printf formatting.
40 2000-05-24 Michael Hayes <mhayes@cygnus.com>
42 * mips.igen (do_dmultx): Fix typo.
44 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
46 * configure: Regenerated to track ../common/aclocal.m4 changes.
48 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
50 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
52 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
54 * sim-main.h (GPR_CLEAR): Define macro.
56 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
58 * interp.c (decode_coproc): Output long using %lx and not %s.
60 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
62 * interp.c (sim_open): Sort & extend dummy memory regions for
63 --board=jmr3904 for eCos.
65 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
67 * configure: Regenerated.
69 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
71 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
72 calls, conditional on the simulator being in verbose mode.
74 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
76 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
77 cache don't get ReservedInstruction traps.
79 1999-11-29 Mark Salter <msalter@cygnus.com>
81 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
82 to clear status bits in sdisr register. This is how the hardware works.
84 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
87 1999-11-11 Andrew Haley <aph@cygnus.com>
89 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
92 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
94 * mips.igen (MULT): Correct previous mis-applied patch.
96 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
98 * mips.igen (delayslot32): Handle sequence like
99 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
100 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
101 (MULT): Actually pass the third register...
103 1999-09-03 Mark Salter <msalter@cygnus.com>
105 * interp.c (sim_open): Added more memory aliases for additional
106 hardware being touched by cygmon on jmr3904 board.
108 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
110 * configure: Regenerated to track ../common/aclocal.m4 changes.
112 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
114 * interp.c (sim_store_register): Handle case where client - GDB -
115 specifies that a 4 byte register is 8 bytes in size.
116 (sim_fetch_register): Ditto.
118 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
120 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
121 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
122 (idt_monitor_base): Base address for IDT monitor traps.
123 (pmon_monitor_base): Ditto for PMON.
124 (lsipmon_monitor_base): Ditto for LSI PMON.
125 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
126 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
127 (sim_firmware_command): New function.
128 (mips_option_handler): Call it for OPTION_FIRMWARE.
129 (sim_open): Allocate memory for idt_monitor region. If "--board"
130 option was given, add no monitor by default. Add BREAK hooks only if
131 monitors are also there.
133 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
135 * interp.c (sim_monitor): Flush output before reading input.
137 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
139 * tconfig.in (SIM_HANDLES_LMA): Always define.
141 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
143 From Mark Salter <msalter@cygnus.com>:
144 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
145 (sim_open): Add setup for BSP board.
147 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
149 * mips.igen (MULT, MULTU): Add syntax for two operand version.
150 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
151 them as unimplemented.
153 1999-05-08 Felix Lee <flee@cygnus.com>
155 * configure: Regenerated to track ../common/aclocal.m4 changes.
157 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
159 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
161 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
163 * configure.in: Any mips64vr5*-*-* target should have
164 -DTARGET_ENABLE_FR=1.
165 (default_endian): Any mips64vr*el-*-* target should default to
167 * configure: Re-generate.
169 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
171 * mips.igen (ldl): Extend from _16_, not 32.
173 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
175 * interp.c (sim_store_register): Force registers written to by GDB
176 into an un-interpreted state.
178 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
180 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
181 CPU, start periodic background I/O polls.
182 (tx3904sio_poll): New function: periodic I/O poller.
184 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
186 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
188 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
190 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
193 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
195 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
196 (load_word): Call SIM_CORE_SIGNAL hook on error.
197 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
198 starting. For exception dispatching, pass PC instead of NULL_CIA.
199 (decode_coproc): Use COP0_BADVADDR to store faulting address.
200 * sim-main.h (COP0_BADVADDR): Define.
201 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
202 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
203 (_sim_cpu): Add exc_* fields to store register value snapshots.
204 * mips.igen (*): Replace memory-related SignalException* calls
205 with references to SIM_CORE_SIGNAL hook.
207 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
209 * sim-main.c (*): Minor warning cleanups.
211 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
213 * m16.igen (DADDIU5): Correct type-o.
215 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
217 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
220 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
222 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
224 (interp.o): Add dependency on itable.h
225 (oengine.c, gencode): Delete remaining references.
226 (BUILT_SRC_FROM_GEN): Clean up.
228 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
231 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
232 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
234 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
235 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
236 Drop the "64" qualifier to get the HACK generator working.
237 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
238 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
239 qualifier to get the hack generator working.
240 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
242 (DSLLV): Use do_dsllv.
245 (DSRLV): Use do_dsrlv.
246 (BC1): Move *vr4100 to get the HACK generator working.
247 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
248 get the HACK generator working.
249 (MACC) Rename to get the HACK generator working.
250 (DMACC,MACCS,DMACCS): Add the 64.
252 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
254 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
255 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
257 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
259 * mips/interp.c (DEBUG): Cleanups.
261 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
263 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
264 (tx3904sio_tickle): fflush after a stdout character output.
266 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
268 * interp.c (sim_close): Uninstall modules.
270 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
272 * sim-main.h, interp.c (sim_monitor): Change to global
275 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
277 * configure.in (vr4100): Only include vr4100 instructions in
279 * configure: Re-generate.
280 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
282 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
284 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
285 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
288 * configure.in (sim_default_gen, sim_use_gen): Replace with
290 (--enable-sim-igen): Delete config option. Always using IGEN.
291 * configure: Re-generate.
293 * Makefile.in (gencode): Kill, kill, kill.
296 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
298 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
299 bit mips16 igen simulator.
300 * configure: Re-generate.
302 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
303 as part of vr4100 ISA.
304 * vr.igen: Mark all instructions as 64 bit only.
306 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
308 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
311 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
313 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
314 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
315 * configure: Re-generate.
317 * m16.igen (BREAK): Define breakpoint instruction.
318 (JALX32): Mark instruction as mips16 and not r3900.
319 * mips.igen (C.cond.fmt): Fix typo in instruction format.
321 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
323 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
325 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
326 insn as a debug breakpoint.
328 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
330 (PENDING_SCHED): Clean up trace statement.
331 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
332 (PENDING_FILL): Delay write by only one cycle.
333 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
335 * sim-main.c (pending_tick): Clean up trace statements. Add trace
337 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
339 (pending_tick): Move incrementing of index to FOR statement.
340 (pending_tick): Only update PENDING_OUT after a write has occured.
342 * configure.in: Add explicit mips-lsi-* target. Use gencode to
344 * configure: Re-generate.
346 * interp.c (sim_engine_run OLD): Delete explicit call to
347 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
349 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
351 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
352 interrupt level number to match changed SignalExceptionInterrupt
355 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
357 * interp.c: #include "itable.h" if WITH_IGEN.
358 (get_insn_name): New function.
359 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
360 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
362 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
364 * configure: Rebuilt to inhale new common/aclocal.m4.
366 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
368 * dv-tx3904sio.c: Include sim-assert.h.
370 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
372 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
373 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
374 Reorganize target-specific sim-hardware checks.
375 * configure: rebuilt.
376 * interp.c (sim_open): For tx39 target boards, set
377 OPERATING_ENVIRONMENT, add tx3904sio devices.
378 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
379 ROM executables. Install dv-sockser into sim-modules list.
381 * dv-tx3904irc.c: Compiler warning clean-up.
382 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
383 frequent hw-trace messages.
385 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
387 * vr.igen (MulAcc): Identify as a vr4100 specific function.
389 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
391 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
394 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
395 * mips.igen: Define vr4100 model. Include vr.igen.
396 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
398 * mips.igen (check_mf_hilo): Correct check.
400 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
402 * sim-main.h (interrupt_event): Add prototype.
404 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
405 register_ptr, register_value.
406 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
408 * sim-main.h (tracefh): Make extern.
410 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
412 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
413 Reduce unnecessarily high timer event frequency.
414 * dv-tx3904cpu.c: Ditto for interrupt event.
416 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
418 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
420 (interrupt_event): Made non-static.
422 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
423 interchange of configuration values for external vs. internal
426 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
428 * mips.igen (BREAK): Moved code to here for
429 simulator-reserved break instructions.
430 * gencode.c (build_instruction): Ditto.
431 * interp.c (signal_exception): Code moved from here. Non-
432 reserved instructions now use exception vector, rather
434 * sim-main.h: Moved magic constants to here.
436 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
438 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
439 register upon non-zero interrupt event level, clear upon zero
441 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
442 by passing zero event value.
443 (*_io_{read,write}_buffer): Endianness fixes.
444 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
445 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
447 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
448 serial I/O and timer module at base address 0xFFFF0000.
450 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
452 * mips.igen (SWC1) : Correct the handling of ReverseEndian
455 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
457 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
461 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
463 * dv-tx3904tmr.c: New file - implements tx3904 timer.
464 * dv-tx3904{irc,cpu}.c: Mild reformatting.
465 * configure.in: Include tx3904tmr in hw_device list.
466 * configure: Rebuilt.
467 * interp.c (sim_open): Instantiate three timer instances.
468 Fix address typo of tx3904irc instance.
470 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
472 * interp.c (signal_exception): SystemCall exception now uses
473 the exception vector.
475 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
477 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
480 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
482 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
484 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
486 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
488 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
489 sim-main.h. Declare a struct hw_descriptor instead of struct
490 hw_device_descriptor.
492 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
494 * mips.igen (do_store_left, do_load_left): Compute nr of left and
495 right bits and then re-align left hand bytes to correct byte
496 lanes. Fix incorrect computation in do_store_left when loading
497 bytes from second word.
499 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
501 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
502 * interp.c (sim_open): Only create a device tree when HW is
505 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
506 * interp.c (signal_exception): Ditto.
508 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
510 * gencode.c: Mark BEGEZALL as LIKELY.
512 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
514 * sim-main.h (ALU32_END): Sign extend 32 bit results.
515 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
517 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
519 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
520 modules. Recognize TX39 target with "mips*tx39" pattern.
521 * configure: Rebuilt.
522 * sim-main.h (*): Added many macros defining bits in
523 TX39 control registers.
524 (SignalInterrupt): Send actual PC instead of NULL.
525 (SignalNMIReset): New exception type.
526 * interp.c (board): New variable for future use to identify
527 a particular board being simulated.
528 (mips_option_handler,mips_options): Added "--board" option.
529 (interrupt_event): Send actual PC.
530 (sim_open): Make memory layout conditional on board setting.
531 (signal_exception): Initial implementation of hardware interrupt
532 handling. Accept another break instruction variant for simulator
534 (decode_coproc): Implement RFE instruction for TX39.
535 (mips.igen): Decode RFE instruction as such.
536 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
537 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
538 bbegin to implement memory map.
539 * dv-tx3904cpu.c: New file.
540 * dv-tx3904irc.c: New file.
542 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
544 * mips.igen (check_mt_hilo): Create a separate r3900 version.
546 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
548 * tx.igen (madd,maddu): Replace calls to check_op_hilo
549 with calls to check_div_hilo.
551 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
553 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
554 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
555 Add special r3900 version of do_mult_hilo.
556 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
557 with calls to check_mult_hilo.
558 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
559 with calls to check_div_hilo.
561 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
563 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
564 Document a replacement.
566 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
568 * interp.c (sim_monitor): Make mon_printf work.
570 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
572 * sim-main.h (INSN_NAME): New arg `cpu'.
574 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
576 * configure: Regenerated to track ../common/aclocal.m4 changes.
578 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
580 * configure: Regenerated to track ../common/aclocal.m4 changes.
583 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
585 * acconfig.h: New file.
586 * configure.in: Reverted change of Apr 24; use sinclude again.
588 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
590 * configure: Regenerated to track ../common/aclocal.m4 changes.
593 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
595 * configure.in: Don't call sinclude.
597 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
599 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
601 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
603 * mips.igen (ERET): Implement.
605 * interp.c (decode_coproc): Return sign-extended EPC.
607 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
609 * interp.c (signal_exception): Do not ignore Trap.
610 (signal_exception): On TRAP, restart at exception address.
611 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
612 (signal_exception): Update.
613 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
614 so that TRAP instructions are caught.
616 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
618 * sim-main.h (struct hilo_access, struct hilo_history): Define,
619 contains HI/LO access history.
620 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
621 (HIACCESS, LOACCESS): Delete, replace with
622 (HIHISTORY, LOHISTORY): New macros.
623 (CHECKHILO): Delete all, moved to mips.igen
625 * gencode.c (build_instruction): Do not generate checks for
626 correct HI/LO register usage.
628 * interp.c (old_engine_run): Delete checks for correct HI/LO
631 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
632 check_mf_cycles): New functions.
633 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
634 do_divu, domultx, do_mult, do_multu): Use.
636 * tx.igen ("madd", "maddu"): Use.
638 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
640 * mips.igen (DSRAV): Use function do_dsrav.
641 (SRAV): Use new function do_srav.
643 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
644 (B): Sign extend 11 bit immediate.
645 (EXT-B*): Shift 16 bit immediate left by 1.
646 (ADDIU*): Don't sign extend immediate value.
648 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
650 * m16run.c (sim_engine_run): Restore CIA after handling an event.
652 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
655 * mips.igen (delayslot32, nullify_next_insn): New functions.
656 (m16.igen): Always include.
657 (do_*): Add more tracing.
659 * m16.igen (delayslot16): Add NIA argument, could be called by a
660 32 bit MIPS16 instruction.
662 * interp.c (ifetch16): Move function from here.
663 * sim-main.c (ifetch16): To here.
665 * sim-main.c (ifetch16, ifetch32): Update to match current
666 implementations of LH, LW.
667 (signal_exception): Don't print out incorrect hex value of illegal
670 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
672 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
675 * m16.igen: Implement MIPS16 instructions.
677 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
678 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
679 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
680 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
681 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
682 bodies of corresponding code from 32 bit insn to these. Also used
683 by MIPS16 versions of functions.
685 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
686 (IMEM16): Drop NR argument from macro.
688 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
690 * Makefile.in (SIM_OBJS): Add sim-main.o.
692 * sim-main.h (address_translation, load_memory, store_memory,
693 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
695 (pr_addr, pr_uword64): Declare.
696 (sim-main.c): Include when H_REVEALS_MODULE_P.
698 * interp.c (address_translation, load_memory, store_memory,
699 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
701 * sim-main.c: To here. Fix compilation problems.
703 * configure.in: Enable inlining.
704 * configure: Re-config.
706 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
708 * configure: Regenerated to track ../common/aclocal.m4 changes.
710 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
712 * mips.igen: Include tx.igen.
713 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
714 * tx.igen: New file, contains MADD and MADDU.
716 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
717 the hardwired constant `7'.
718 (store_memory): Ditto.
719 (LOADDRMASK): Move definition to sim-main.h.
721 mips.igen (MTC0): Enable for r3900.
724 mips.igen (do_load_byte): Delete.
725 (do_load, do_store, do_load_left, do_load_write, do_store_left,
726 do_store_right): New functions.
727 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
729 configure.in: Let the tx39 use igen again.
732 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
734 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
735 not an address sized quantity. Return zero for cache sizes.
737 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
739 * mips.igen (r3900): r3900 does not support 64 bit integer
742 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
744 * configure.in (mipstx39*-*-*): Use gencode simulator rather
746 * configure : Rebuild.
748 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
750 * configure: Regenerated to track ../common/aclocal.m4 changes.
752 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
754 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
756 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
758 * configure: Regenerated to track ../common/aclocal.m4 changes.
759 * config.in: Regenerated to track ../common/aclocal.m4 changes.
761 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
763 * configure: Regenerated to track ../common/aclocal.m4 changes.
765 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
767 * interp.c (Max, Min): Comment out functions. Not yet used.
769 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
771 * configure: Regenerated to track ../common/aclocal.m4 changes.
773 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
775 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
776 configurable settings for stand-alone simulator.
778 * configure.in: Added X11 search, just in case.
780 * configure: Regenerated.
782 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
784 * interp.c (sim_write, sim_read, load_memory, store_memory):
785 Replace sim_core_*_map with read_map, write_map, exec_map resp.
787 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
789 * sim-main.h (GETFCC): Return an unsigned value.
791 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
793 * mips.igen (DIV): Fix check for -1 / MIN_INT.
794 (DADD): Result destination is RD not RT.
796 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
798 * sim-main.h (HIACCESS, LOACCESS): Always define.
800 * mdmx.igen (Maxi, Mini): Rename Max, Min.
802 * interp.c (sim_info): Delete.
804 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
806 * interp.c (DECLARE_OPTION_HANDLER): Use it.
807 (mips_option_handler): New argument `cpu'.
808 (sim_open): Update call to sim_add_option_table.
810 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
812 * mips.igen (CxC1): Add tracing.
814 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
816 * sim-main.h (Max, Min): Declare.
818 * interp.c (Max, Min): New functions.
820 * mips.igen (BC1): Add tracing.
822 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
824 * interp.c Added memory map for stack in vr4100
826 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
828 * interp.c (load_memory): Add missing "break"'s.
830 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
832 * interp.c (sim_store_register, sim_fetch_register): Pass in
833 length parameter. Return -1.
835 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
837 * interp.c: Added hardware init hook, fixed warnings.
839 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
841 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
843 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
845 * interp.c (ifetch16): New function.
847 * sim-main.h (IMEM32): Rename IMEM.
848 (IMEM16_IMMED): Define.
850 (DELAY_SLOT): Update.
852 * m16run.c (sim_engine_run): New file.
854 * m16.igen: All instructions except LB.
855 (LB): Call do_load_byte.
856 * mips.igen (do_load_byte): New function.
857 (LB): Call do_load_byte.
859 * mips.igen: Move spec for insn bit size and high bit from here.
860 * Makefile.in (tmp-igen, tmp-m16): To here.
862 * m16.dc: New file, decode mips16 instructions.
864 * Makefile.in (SIM_NO_ALL): Define.
865 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
867 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
869 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
870 point unit to 32 bit registers.
871 * configure: Re-generate.
873 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
875 * configure.in (sim_use_gen): Make IGEN the default simulator
876 generator for generic 32 and 64 bit mips targets.
877 * configure: Re-generate.
879 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
881 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
884 * interp.c (sim_fetch_register, sim_store_register): Read/write
885 FGR from correct location.
886 (sim_open): Set size of FGR's according to
887 WITH_TARGET_FLOATING_POINT_BITSIZE.
889 * sim-main.h (FGR): Store floating point registers in a separate
892 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
894 * configure: Regenerated to track ../common/aclocal.m4 changes.
896 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
898 * interp.c (ColdReset): Call PENDING_INVALIDATE.
900 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
902 * interp.c (pending_tick): New function. Deliver pending writes.
904 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
905 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
906 it can handle mixed sized quantites and single bits.
908 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
910 * interp.c (oengine.h): Do not include when building with IGEN.
911 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
912 (sim_info): Ditto for PROCESSOR_64BIT.
913 (sim_monitor): Replace ut_reg with unsigned_word.
914 (*): Ditto for t_reg.
915 (LOADDRMASK): Define.
916 (sim_open): Remove defunct check that host FP is IEEE compliant,
917 using software to emulate floating point.
918 (value_fpr, ...): Always compile, was conditional on HASFPU.
920 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
922 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
925 * interp.c (SD, CPU): Define.
926 (mips_option_handler): Set flags in each CPU.
927 (interrupt_event): Assume CPU 0 is the one being iterrupted.
928 (sim_close): Do not clear STATE, deleted anyway.
929 (sim_write, sim_read): Assume CPU zero's vm should be used for
931 (sim_create_inferior): Set the PC for all processors.
932 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
934 (mips16_entry): Pass correct nr of args to store_word, load_word.
935 (ColdReset): Cold reset all cpu's.
936 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
937 (sim_monitor, load_memory, store_memory, signal_exception): Use
938 `CPU' instead of STATE_CPU.
941 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
944 * sim-main.h (signal_exception): Add sim_cpu arg.
945 (SignalException*): Pass both SD and CPU to signal_exception.
946 * interp.c (signal_exception): Update.
948 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
950 (sync_operation, prefetch, cache_op, store_memory, load_memory,
951 address_translation): Ditto
952 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
954 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
956 * configure: Regenerated to track ../common/aclocal.m4 changes.
958 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
960 * interp.c (sim_engine_run): Add `nr_cpus' argument.
962 * mips.igen (model): Map processor names onto BFD name.
964 * sim-main.h (CPU_CIA): Delete.
965 (SET_CIA, GET_CIA): Define
967 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
969 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
972 * configure.in (default_endian): Configure a big-endian simulator
974 * configure: Re-generate.
976 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
978 * configure: Regenerated to track ../common/aclocal.m4 changes.
980 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
982 * interp.c (sim_monitor): Handle Densan monitor outbyte
983 and inbyte functions.
985 1997-12-29 Felix Lee <flee@cygnus.com>
987 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
989 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
991 * Makefile.in (tmp-igen): Arrange for $zero to always be
992 reset to zero after every instruction.
994 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
996 * configure: Regenerated to track ../common/aclocal.m4 changes.
999 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1001 * mips.igen (MSUB): Fix to work like MADD.
1002 * gencode.c (MSUB): Similarly.
1004 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1006 * configure: Regenerated to track ../common/aclocal.m4 changes.
1008 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1010 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1012 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1014 * sim-main.h (sim-fpu.h): Include.
1016 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1017 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1018 using host independant sim_fpu module.
1020 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1022 * interp.c (signal_exception): Report internal errors with SIGABRT
1025 * sim-main.h (C0_CONFIG): New register.
1026 (signal.h): No longer include.
1028 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1030 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
1032 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1034 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1036 * mips.igen: Tag vr5000 instructions.
1037 (ANDI): Was missing mipsIV model, fix assembler syntax.
1038 (do_c_cond_fmt): New function.
1039 (C.cond.fmt): Handle mips I-III which do not support CC field
1041 (bc1): Handle mips IV which do not have a delaed FCC separatly.
1042 (SDR): Mask paddr when BigEndianMem, not the converse as specified
1044 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
1045 vr5000 which saves LO in a GPR separatly.
1047 * configure.in (enable-sim-igen): For vr5000, select vr5000
1048 specific instructions.
1049 * configure: Re-generate.
1051 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1053 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1055 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1056 fmt_uninterpreted_64 bit cases to switch. Convert to
1059 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1061 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1062 as specified in IV3.2 spec.
1063 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1065 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1067 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1068 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1069 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1070 PENDING_FILL versions of instructions. Simplify.
1072 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1074 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1076 (MTHI, MFHI): Disable code checking HI-LO.
1078 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1080 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1082 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1084 * gencode.c (build_mips16_operands): Replace IPC with cia.
1086 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1087 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1089 (UndefinedResult): Replace function with macro/function
1091 (sim_engine_run): Don't save PC in IPC.
1093 * sim-main.h (IPC): Delete.
1096 * interp.c (signal_exception, store_word, load_word,
1097 address_translation, load_memory, store_memory, cache_op,
1098 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1099 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1100 current instruction address - cia - argument.
1101 (sim_read, sim_write): Call address_translation directly.
1102 (sim_engine_run): Rename variable vaddr to cia.
1103 (signal_exception): Pass cia to sim_monitor
1105 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1106 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1107 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1109 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1110 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1113 * interp.c (signal_exception): Pass restart address to
1116 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1117 idecode.o): Add dependency.
1119 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1121 (DELAY_SLOT): Update NIA not PC with branch address.
1122 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1124 * mips.igen: Use CIA not PC in branch calculations.
1125 (illegal): Call SignalException.
1126 (BEQ, ADDIU): Fix assembler.
1128 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1130 * m16.igen (JALX): Was missing.
1132 * configure.in (enable-sim-igen): New configuration option.
1133 * configure: Re-generate.
1135 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1137 * interp.c (load_memory, store_memory): Delete parameter RAW.
1138 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1139 bypassing {load,store}_memory.
1141 * sim-main.h (ByteSwapMem): Delete definition.
1143 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1145 * interp.c (sim_do_command, sim_commands): Delete mips specific
1146 commands. Handled by module sim-options.
1148 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1149 (WITH_MODULO_MEMORY): Define.
1151 * interp.c (sim_info): Delete code printing memory size.
1153 * interp.c (mips_size): Nee sim_size, delete function.
1155 (monitor, monitor_base, monitor_size): Delete global variables.
1156 (sim_open, sim_close): Delete code creating monitor and other
1157 memory regions. Use sim-memopts module, via sim_do_commandf, to
1158 manage memory regions.
1159 (load_memory, store_memory): Use sim-core for memory model.
1161 * interp.c (address_translation): Delete all memory map code
1162 except line forcing 32 bit addresses.
1164 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1166 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1169 * interp.c (logfh, logfile): Delete globals.
1170 (sim_open, sim_close): Delete code opening & closing log file.
1171 (mips_option_handler): Delete -l and -n options.
1172 (OPTION mips_options): Ditto.
1174 * interp.c (OPTION mips_options): Rename option trace to dinero.
1175 (mips_option_handler): Update.
1177 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1179 * interp.c (fetch_str): New function.
1180 (sim_monitor): Rewrite using sim_read & sim_write.
1181 (sim_open): Check magic number.
1182 (sim_open): Write monitor vectors into memory using sim_write.
1183 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1184 (sim_read, sim_write): Simplify - transfer data one byte at a
1186 (load_memory, store_memory): Clarify meaning of parameter RAW.
1188 * sim-main.h (isHOST): Defete definition.
1189 (isTARGET): Mark as depreciated.
1190 (address_translation): Delete parameter HOST.
1192 * interp.c (address_translation): Delete parameter HOST.
1194 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1198 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1199 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1201 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1203 * mips.igen: Add model filter field to records.
1205 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1207 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1209 interp.c (sim_engine_run): Do not compile function sim_engine_run
1210 when WITH_IGEN == 1.
1212 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1213 target architecture.
1215 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1216 igen. Replace with configuration variables sim_igen_flags /
1219 * m16.igen: New file. Copy mips16 insns here.
1220 * mips.igen: From here.
1222 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1224 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1226 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1228 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1230 * gencode.c (build_instruction): Follow sim_write's lead in using
1231 BigEndianMem instead of !ByteSwapMem.
1233 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1235 * configure.in (sim_gen): Dependent on target, select type of
1236 generator. Always select old style generator.
1238 configure: Re-generate.
1240 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1242 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1243 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1244 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1245 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1246 SIM_@sim_gen@_*, set by autoconf.
1248 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1250 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1252 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1253 CURRENT_FLOATING_POINT instead.
1255 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1256 (address_translation): Raise exception InstructionFetch when
1257 translation fails and isINSTRUCTION.
1259 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1260 sim_engine_run): Change type of of vaddr and paddr to
1262 (address_translation, prefetch, load_memory, store_memory,
1263 cache_op): Change type of vAddr and pAddr to address_word.
1265 * gencode.c (build_instruction): Change type of vaddr and paddr to
1268 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1270 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1271 macro to obtain result of ALU op.
1273 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1275 * interp.c (sim_info): Call profile_print.
1277 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1279 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1281 * sim-main.h (WITH_PROFILE): Do not define, defined in
1282 common/sim-config.h. Use sim-profile module.
1283 (simPROFILE): Delete defintion.
1285 * interp.c (PROFILE): Delete definition.
1286 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1287 (sim_close): Delete code writing profile histogram.
1288 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1290 (sim_engine_run): Delete code profiling the PC.
1292 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1294 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1296 * interp.c (sim_monitor): Make register pointers of type
1299 * sim-main.h: Make registers of type unsigned_word not
1302 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1304 * interp.c (sync_operation): Rename from SyncOperation, make
1305 global, add SD argument.
1306 (prefetch): Rename from Prefetch, make global, add SD argument.
1307 (decode_coproc): Make global.
1309 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1311 * gencode.c (build_instruction): Generate DecodeCoproc not
1312 decode_coproc calls.
1314 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1315 (SizeFGR): Move to sim-main.h
1316 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1317 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1318 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1320 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1321 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1322 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1323 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1324 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1325 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1327 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1329 (sim-alu.h): Include.
1330 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1331 (sim_cia): Typedef to instruction_address.
1333 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1335 * Makefile.in (interp.o): Rename generated file engine.c to
1340 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
1342 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1344 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1346 * gencode.c (build_instruction): For "FPSQRT", output correct
1347 number of arguments to Recip.
1349 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
1351 * Makefile.in (interp.o): Depends on sim-main.h
1353 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1355 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1356 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1357 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1358 STATE, DSSTATE): Define
1359 (GPR, FGRIDX, ..): Define.
1361 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1362 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1363 (GPR, FGRIDX, ...): Delete macros.
1365 * interp.c: Update names to match defines from sim-main.h
1367 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
1369 * interp.c (sim_monitor): Add SD argument.
1370 (sim_warning): Delete. Replace calls with calls to
1372 (sim_error): Delete. Replace calls with sim_io_error.
1373 (open_trace, writeout32, writeout16, getnum): Add SD argument.
1374 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1375 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1377 (mips_size): Rename from sim_size. Add SD argument.
1379 * interp.c (simulator): Delete global variable.
1380 (callback): Delete global variable.
1381 (mips_option_handler, sim_open, sim_write, sim_read,
1382 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1383 sim_size,sim_monitor): Use sim_io_* not callback->*.
1384 (sim_open): ZALLOC simulator struct.
1385 (PROFILE): Do not define.
1387 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1389 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1390 support.h with corresponding code.
1392 * sim-main.h (word64, uword64), support.h: Move definition to
1394 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1397 * Makefile.in: Update dependencies
1398 * interp.c: Do not include.
1400 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1402 * interp.c (address_translation, load_memory, store_memory,
1403 cache_op): Rename to from AddressTranslation et.al., make global,
1406 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1409 * interp.c (SignalException): Rename to signal_exception, make
1412 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1414 * sim-main.h (SignalException, SignalExceptionInterrupt,
1415 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1416 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1417 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1420 * interp.c, support.h: Use.
1422 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1424 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1425 to value_fpr / store_fpr. Add SD argument.
1426 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1427 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1429 * sim-main.h (ValueFPR, StoreFPR): Define.
1431 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1433 * interp.c (sim_engine_run): Check consistency between configure
1434 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1437 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1438 (mips_fpu): Configure WITH_FLOATING_POINT.
1439 (mips_endian): Configure WITH_TARGET_ENDIAN.
1440 * configure: Update.
1442 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1444 * configure: Regenerated to track ../common/aclocal.m4 changes.
1446 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
1448 * configure: Regenerated.
1450 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
1452 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1454 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1456 * gencode.c (print_igen_insn_models): Assume certain architectures
1457 include all mips* instructions.
1458 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1461 * Makefile.in (tmp.igen): Add target. Generate igen input from
1464 * gencode.c (FEATURE_IGEN): Define.
1465 (main): Add --igen option. Generate output in igen format.
1466 (process_instructions): Format output according to igen option.
1467 (print_igen_insn_format): New function.
1468 (print_igen_insn_models): New function.
1469 (process_instructions): Only issue warnings and ignore
1470 instructions when no FEATURE_IGEN.
1472 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1474 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1477 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1479 * configure: Regenerated to track ../common/aclocal.m4 changes.
1481 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1483 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1484 SIM_RESERVED_BITS): Delete, moved to common.
1485 (SIM_EXTRA_CFLAGS): Update.
1487 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1489 * configure.in: Configure non-strict memory alignment.
1490 * configure: Regenerated to track ../common/aclocal.m4 changes.
1492 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
1494 * configure: Regenerated to track ../common/aclocal.m4 changes.
1496 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
1498 * gencode.c (SDBBP,DERET): Added (3900) insns.
1499 (RFE): Turn on for 3900.
1500 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1501 (dsstate): Made global.
1502 (SUBTARGET_R3900): Added.
1503 (CANCELDELAYSLOT): New.
1504 (SignalException): Ignore SystemCall rather than ignore and
1505 terminate. Add DebugBreakPoint handling.
1506 (decode_coproc): New insns RFE, DERET; and new registers Debug
1507 and DEPC protected by SUBTARGET_R3900.
1508 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1510 * Makefile.in,configure.in: Add mips subtarget option.
1511 * configure: Update.
1513 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1515 * gencode.c: Add r3900 (tx39).
1518 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1520 * gencode.c (build_instruction): Don't need to subtract 4 for
1523 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1525 * interp.c: Correct some HASFPU problems.
1527 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1529 * configure: Regenerated to track ../common/aclocal.m4 changes.
1531 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1533 * interp.c (mips_options): Fix samples option short form, should
1536 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1538 * interp.c (sim_info): Enable info code. Was just returning.
1540 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1542 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1545 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1547 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1549 (build_instruction): Ditto for LL.
1551 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1553 * configure: Regenerated to track ../common/aclocal.m4 changes.
1555 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1557 * configure: Regenerated to track ../common/aclocal.m4 changes.
1560 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1562 * interp.c (sim_open): Add call to sim_analyze_program, update
1565 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1567 * interp.c (sim_kill): Delete.
1568 (sim_create_inferior): Add ABFD argument. Set PC from same.
1569 (sim_load): Move code initializing trap handlers from here.
1570 (sim_open): To here.
1571 (sim_load): Delete, use sim-hload.c.
1573 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1575 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1577 * configure: Regenerated to track ../common/aclocal.m4 changes.
1580 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1582 * interp.c (sim_open): Add ABFD argument.
1583 (sim_load): Move call to sim_config from here.
1584 (sim_open): To here. Check return status.
1586 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1588 * gencode.c (build_instruction): Two arg MADD should
1589 not assign result to $0.
1591 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1593 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1594 * sim/mips/configure.in: Regenerate.
1596 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1598 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1599 signed8, unsigned8 et.al. types.
1601 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1602 hosts when selecting subreg.
1604 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1606 * interp.c (sim_engine_run): Reset the ZERO register to zero
1607 regardless of FEATURE_WARN_ZERO.
1608 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1610 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1612 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1613 (SignalException): For BreakPoints ignore any mode bits and just
1615 (SignalException): Always set the CAUSE register.
1617 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1619 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1620 exception has been taken.
1622 * interp.c: Implement the ERET and mt/f sr instructions.
1624 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1626 * interp.c (SignalException): Don't bother restarting an
1629 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1631 * interp.c (SignalException): Really take an interrupt.
1632 (interrupt_event): Only deliver interrupts when enabled.
1634 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1636 * interp.c (sim_info): Only print info when verbose.
1637 (sim_info) Use sim_io_printf for output.
1639 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1641 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1644 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1646 * interp.c (sim_do_command): Check for common commands if a
1647 simulator specific command fails.
1649 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1651 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1652 and simBE when DEBUG is defined.
1654 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1656 * interp.c (interrupt_event): New function. Pass exception event
1657 onto exception handler.
1659 * configure.in: Check for stdlib.h.
1660 * configure: Regenerate.
1662 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1663 variable declaration.
1664 (build_instruction): Initialize memval1.
1665 (build_instruction): Add UNUSED attribute to byte, bigend,
1667 (build_operands): Ditto.
1669 * interp.c: Fix GCC warnings.
1670 (sim_get_quit_code): Delete.
1672 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1673 * Makefile.in: Ditto.
1674 * configure: Re-generate.
1676 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1678 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1680 * interp.c (mips_option_handler): New function parse argumes using
1682 (myname): Replace with STATE_MY_NAME.
1683 (sim_open): Delete check for host endianness - performed by
1685 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1686 (sim_open): Move much of the initialization from here.
1687 (sim_load): To here. After the image has been loaded and
1689 (sim_open): Move ColdReset from here.
1690 (sim_create_inferior): To here.
1691 (sim_open): Make FP check less dependant on host endianness.
1693 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1695 * interp.c (sim_set_callbacks): Delete.
1697 * interp.c (membank, membank_base, membank_size): Replace with
1698 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1699 (sim_open): Remove call to callback->init. gdb/run do this.
1703 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1705 * interp.c (big_endian_p): Delete, replaced by
1706 current_target_byte_order.
1708 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1710 * interp.c (host_read_long, host_read_word, host_swap_word,
1711 host_swap_long): Delete. Using common sim-endian.
1712 (sim_fetch_register, sim_store_register): Use H2T.
1713 (pipeline_ticks): Delete. Handled by sim-events.
1715 (sim_engine_run): Update.
1717 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1719 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1721 (SignalException): To here. Signal using sim_engine_halt.
1722 (sim_stop_reason): Delete, moved to common.
1724 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1726 * interp.c (sim_open): Add callback argument.
1727 (sim_set_callbacks): Delete SIM_DESC argument.
1730 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1732 * Makefile.in (SIM_OBJS): Add common modules.
1734 * interp.c (sim_set_callbacks): Also set SD callback.
1735 (set_endianness, xfer_*, swap_*): Delete.
1736 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1737 Change to functions using sim-endian macros.
1738 (control_c, sim_stop): Delete, use common version.
1739 (simulate): Convert into.
1740 (sim_engine_run): This function.
1741 (sim_resume): Delete.
1743 * interp.c (simulation): New variable - the simulator object.
1744 (sim_kind): Delete global - merged into simulation.
1745 (sim_load): Cleanup. Move PC assignment from here.
1746 (sim_create_inferior): To here.
1748 * sim-main.h: New file.
1749 * interp.c (sim-main.h): Include.
1751 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1753 * configure: Regenerated to track ../common/aclocal.m4 changes.
1755 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1757 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1759 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1761 * gencode.c (build_instruction): DIV instructions: check
1762 for division by zero and integer overflow before using
1763 host's division operation.
1765 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1767 * Makefile.in (SIM_OBJS): Add sim-load.o.
1768 * interp.c: #include bfd.h.
1769 (target_byte_order): Delete.
1770 (sim_kind, myname, big_endian_p): New static locals.
1771 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1772 after argument parsing. Recognize -E arg, set endianness accordingly.
1773 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1774 load file into simulator. Set PC from bfd.
1775 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1776 (set_endianness): Use big_endian_p instead of target_byte_order.
1778 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1780 * interp.c (sim_size): Delete prototype - conflicts with
1781 definition in remote-sim.h. Correct definition.
1783 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1785 * configure: Regenerated to track ../common/aclocal.m4 changes.
1788 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1790 * interp.c (sim_open): New arg `kind'.
1792 * configure: Regenerated to track ../common/aclocal.m4 changes.
1794 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1796 * configure: Regenerated to track ../common/aclocal.m4 changes.
1798 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1800 * interp.c (sim_open): Set optind to 0 before calling getopt.
1802 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1804 * configure: Regenerated to track ../common/aclocal.m4 changes.
1806 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1808 * interp.c : Replace uses of pr_addr with pr_uword64
1809 where the bit length is always 64 independent of SIM_ADDR.
1810 (pr_uword64) : added.
1812 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1814 * configure: Re-generate.
1816 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1818 * configure: Regenerate to track ../common/aclocal.m4 changes.
1820 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1822 * interp.c (sim_open): New SIM_DESC result. Argument is now
1824 (other sim_*): New SIM_DESC argument.
1826 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1828 * interp.c: Fix printing of addresses for non-64-bit targets.
1829 (pr_addr): Add function to print address based on size.
1831 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1833 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1835 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1837 * gencode.c (build_mips16_operands): Correct computation of base
1838 address for extended PC relative instruction.
1840 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1842 * interp.c (mips16_entry): Add support for floating point cases.
1843 (SignalException): Pass floating point cases to mips16_entry.
1844 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1846 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1848 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1849 and then set the state to fmt_uninterpreted.
1850 (COP_SW): Temporarily set the state to fmt_word while calling
1853 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1855 * gencode.c (build_instruction): The high order may be set in the
1856 comparison flags at any ISA level, not just ISA 4.
1858 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1860 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1861 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1862 * configure.in: sinclude ../common/aclocal.m4.
1863 * configure: Regenerated.
1865 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1867 * configure: Rebuild after change to aclocal.m4.
1869 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1871 * configure configure.in Makefile.in: Update to new configure
1872 scheme which is more compatible with WinGDB builds.
1873 * configure.in: Improve comment on how to run autoconf.
1874 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1875 * Makefile.in: Use autoconf substitution to install common
1878 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1880 * gencode.c (build_instruction): Use BigEndianCPU instead of
1883 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1885 * interp.c (sim_monitor): Make output to stdout visible in
1886 wingdb's I/O log window.
1888 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1890 * support.h: Undo previous change to SIGTRAP
1893 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1895 * interp.c (store_word, load_word): New static functions.
1896 (mips16_entry): New static function.
1897 (SignalException): Look for mips16 entry and exit instructions.
1898 (simulate): Use the correct index when setting fpr_state after
1899 doing a pending move.
1901 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1903 * interp.c: Fix byte-swapping code throughout to work on
1904 both little- and big-endian hosts.
1906 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1908 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1909 with gdb/config/i386/xm-windows.h.
1911 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1913 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1914 that messes up arithmetic shifts.
1916 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1918 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1919 SIGTRAP and SIGQUIT for _WIN32.
1921 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1923 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1924 force a 64 bit multiplication.
1925 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1926 destination register is 0, since that is the default mips16 nop
1929 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1931 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1932 (build_endian_shift): Don't check proc64.
1933 (build_instruction): Always set memval to uword64. Cast op2 to
1934 uword64 when shifting it left in memory instructions. Always use
1935 the same code for stores--don't special case proc64.
1937 * gencode.c (build_mips16_operands): Fix base PC value for PC
1939 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1941 * interp.c (simJALDELAYSLOT): Define.
1942 (JALDELAYSLOT): Define.
1943 (INDELAYSLOT, INJALDELAYSLOT): Define.
1944 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1946 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1948 * interp.c (sim_open): add flush_cache as a PMON routine
1949 (sim_monitor): handle flush_cache by ignoring it
1951 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1953 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1955 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1956 (BigEndianMem): Rename to ByteSwapMem and change sense.
1957 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1958 BigEndianMem references to !ByteSwapMem.
1959 (set_endianness): New function, with prototype.
1960 (sim_open): Call set_endianness.
1961 (sim_info): Use simBE instead of BigEndianMem.
1962 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1963 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1964 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1965 ifdefs, keeping the prototype declaration.
1966 (swap_word): Rewrite correctly.
1967 (ColdReset): Delete references to CONFIG. Delete endianness related
1968 code; moved to set_endianness.
1970 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1972 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1973 * interp.c (CHECKHILO): Define away.
1974 (simSIGINT): New macro.
1975 (membank_size): Increase from 1MB to 2MB.
1976 (control_c): New function.
1977 (sim_resume): Rename parameter signal to signal_number. Add local
1978 variable prev. Call signal before and after simulate.
1979 (sim_stop_reason): Add simSIGINT support.
1980 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1982 (sim_warning): Delete call to SignalException. Do call printf_filtered
1984 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1985 a call to sim_warning.
1987 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1989 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1990 16 bit instructions.
1992 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1994 Add support for mips16 (16 bit MIPS implementation):
1995 * gencode.c (inst_type): Add mips16 instruction encoding types.
1996 (GETDATASIZEINSN): Define.
1997 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1998 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2000 (MIPS16_DECODE): New table, for mips16 instructions.
2001 (bitmap_val): New static function.
2002 (struct mips16_op): Define.
2003 (mips16_op_table): New table, for mips16 operands.
2004 (build_mips16_operands): New static function.
2005 (process_instructions): If PC is odd, decode a mips16
2006 instruction. Break out instruction handling into new
2007 build_instruction function.
2008 (build_instruction): New static function, broken out of
2009 process_instructions. Check modifiers rather than flags for SHIFT
2010 bit count and m[ft]{hi,lo} direction.
2011 (usage): Pass program name to fprintf.
2012 (main): Remove unused variable this_option_optind. Change
2013 ``*loptarg++'' to ``loptarg++''.
2014 (my_strtoul): Parenthesize && within ||.
2015 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2016 (simulate): If PC is odd, fetch a 16 bit instruction, and
2017 increment PC by 2 rather than 4.
2018 * configure.in: Add case for mips16*-*-*.
2019 * configure: Rebuild.
2021 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
2023 * interp.c: Allow -t to enable tracing in standalone simulator.
2024 Fix garbage output in trace file and error messages.
2026 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
2028 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2029 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2030 * configure.in: Simplify using macros in ../common/aclocal.m4.
2031 * configure: Regenerated.
2032 * tconfig.in: New file.
2034 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
2036 * interp.c: Fix bugs in 64-bit port.
2037 Use ansi function declarations for msvc compiler.
2038 Initialize and test file pointer in trace code.
2039 Prevent duplicate definition of LAST_EMED_REGNUM.
2041 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
2043 * interp.c (xfer_big_long): Prevent unwanted sign extension.
2045 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2047 * interp.c (SignalException): Check for explicit terminating
2049 * gencode.c: Pass instruction value through SignalException()
2050 calls for Trap, Breakpoint and Syscall.
2052 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2054 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2055 only used on those hosts that provide it.
2056 * configure.in: Add sqrt() to list of functions to be checked for.
2057 * config.in: Re-generated.
2058 * configure: Re-generated.
2060 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2062 * gencode.c (process_instructions): Call build_endian_shift when
2063 expanding STORE RIGHT, to fix swr.
2064 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2065 clear the high bits.
2066 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2067 Fix float to int conversions to produce signed values.
2069 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2071 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2072 (process_instructions): Correct handling of nor instruction.
2073 Correct shift count for 32 bit shift instructions. Correct sign
2074 extension for arithmetic shifts to not shift the number of bits in
2075 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2076 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2078 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2079 It's OK to have a mult follow a mult. What's not OK is to have a
2080 mult follow an mfhi.
2081 (Convert): Comment out incorrect rounding code.
2083 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2085 * interp.c (sim_monitor): Improved monitor printf
2086 simulation. Tidied up simulator warnings, and added "--log" option
2087 for directing warning message output.
2088 * gencode.c: Use sim_warning() rather than WARNING macro.
2090 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2092 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2093 getopt1.o, rather than on gencode.c. Link objects together.
2094 Don't link against -liberty.
2095 (gencode.o, getopt.o, getopt1.o): New targets.
2096 * gencode.c: Include <ctype.h> and "ansidecl.h".
2097 (AND): Undefine after including "ansidecl.h".
2098 (ULONG_MAX): Define if not defined.
2099 (OP_*): Don't define macros; now defined in opcode/mips.h.
2100 (main): Call my_strtoul rather than strtoul.
2101 (my_strtoul): New static function.
2103 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2105 * gencode.c (process_instructions): Generate word64 and uword64
2106 instead of `long long' and `unsigned long long' data types.
2107 * interp.c: #include sysdep.h to get signals, and define default
2109 * (Convert): Work around for Visual-C++ compiler bug with type
2111 * support.h: Make things compile under Visual-C++ by using
2112 __int64 instead of `long long'. Change many refs to long long
2113 into word64/uword64 typedefs.
2115 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2117 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2118 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2120 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2121 (AC_PROG_INSTALL): Added.
2122 (AC_PROG_CC): Moved to before configure.host call.
2123 * configure: Rebuilt.
2125 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2127 * configure.in: Define @SIMCONF@ depending on mips target.
2128 * configure: Rebuild.
2129 * Makefile.in (run): Add @SIMCONF@ to control simulator
2131 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2132 * interp.c: Remove some debugging, provide more detailed error
2133 messages, update memory accesses to use LOADDRMASK.
2135 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2137 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2138 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2140 * configure: Rebuild.
2141 * config.in: New file, generated by autoheader.
2142 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2143 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2144 HAVE_ANINT and HAVE_AINT, as appropriate.
2145 * Makefile.in (run): Use @LIBS@ rather than -lm.
2146 (interp.o): Depend upon config.h.
2147 (Makefile): Just rebuild Makefile.
2148 (clean): Remove stamp-h.
2149 (mostlyclean): Make the same as clean, not as distclean.
2150 (config.h, stamp-h): New targets.
2152 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2154 * interp.c (ColdReset): Fix boolean test. Make all simulator
2157 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2159 * interp.c (xfer_direct_word, xfer_direct_long,
2160 swap_direct_word, swap_direct_long, xfer_big_word,
2161 xfer_big_long, xfer_little_word, xfer_little_long,
2162 swap_word,swap_long): Added.
2163 * interp.c (ColdReset): Provide function indirection to
2164 host<->simulated_target transfer routines.
2165 * interp.c (sim_store_register, sim_fetch_register): Updated to
2166 make use of indirected transfer routines.
2168 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2170 * gencode.c (process_instructions): Ensure FP ABS instruction
2172 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2173 system call support.
2175 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2177 * interp.c (sim_do_command): Complain if callback structure not
2180 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2182 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2183 support for Sun hosts.
2184 * Makefile.in (gencode): Ensure the host compiler and libraries
2185 used for cross-hosted build.
2187 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2189 * interp.c, gencode.c: Some more (TODO) tidying.
2191 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2193 * gencode.c, interp.c: Replaced explicit long long references with
2194 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2195 * support.h (SET64LO, SET64HI): Macros added.
2197 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2199 * configure: Regenerate with autoconf 2.7.
2201 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2203 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2204 * support.h: Remove superfluous "1" from #if.
2205 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2207 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2209 * interp.c (StoreFPR): Control UndefinedResult() call on
2210 WARN_RESULT manifest.
2212 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2214 * gencode.c: Tidied instruction decoding, and added FP instruction
2217 * interp.c: Added dineroIII, and BSD profiling support. Also
2218 run-time FP handling.
2220 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2222 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2223 gencode.c, interp.c, support.h: created.