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Remove need to update <targ>/Makefile.in when adding optional options
[thirdparty/binutils-gdb.git] / sim / mn10300 / ChangeLog
1 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * configure: Regenerated to track ../common/aclocal.m4 changes.
4
5 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
6
7 * configure: Regenerated to track ../common/aclocal.m4 changes.
8
9 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
10
11 * configure: Regenerated to track ../common/aclocal.m4 changes.
12
13 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
14
15 * configure: Regenerated to track ../common/aclocal.m4 changes.
16
17 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
18
19 * configure: Regenerated to track ../common/aclocal.m4 changes.
20
21 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
22
23 * configure: Regenerated to track ../common/aclocal.m4 changes.
24 * config.in: Ditto.
25
26 Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
27
28 * interp.c (sim_kill): Delete.
29 (sim_create_inferior): Add ABFD argument.
30 (sim_load): Move setting of PC from here.
31 (sim_create_inferior): To here.
32
33 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
34
35 * configure: Regenerated to track ../common/aclocal.m4 changes.
36 * config.in: Ditto.
37
38 Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
39
40 * interp.c (sim_open): Add ABFD argument.
41
42 Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
43
44 * interp.c (sim_resume): Clear State.exited.
45 (sim_stop_reason): If State.exited is nonzero, then indicate that
46 the simulator exited instead of stopped.
47 * mn10300_sim.h (struct _state): Add exited field.
48 * simops.c (syscall): Set State.exited for SYS_exit.
49
50 Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
51
52 * simops.c: Fix thinko in last change.
53
54 Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
55
56 * simops.c: "call" stores the callee saved registers into the
57 stack! Update the stack pointer properly when done with
58 register saves.
59
60 * simops.c: Fix return address computation for "call" instructions.
61
62 Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
63
64 * interp.c (sim_open): Fix typo.
65
66 Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
67
68 * interp.c (sim_resume): Add missing case in big switch
69 statement (for extb instruction).
70
71 Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
72
73 * interp.c: Replace all references to load_mem and store_mem
74 with references to load_byte, load_half, load_3_byte, load_word
75 and store_byte, store_half, store_3_byte, store_word.
76 (INLINE): Delete definition.
77 (load_mem_big): Likewise.
78 (max_mem): Make it global.
79 (dispatch): Make this function inline.
80 (load_mem, store_mem): Delete functions.
81 * mn10300_sim.h (INLINE): Define.
82 (RLW): Delete unused definition.
83 (load_mem, store_mem): Delete declarations.
84 (load_mem_big): New definition.
85 (load_byte, load_half, load_3_byte, load_word): New functions.
86 (store_byte, store_half, store_3_byte, store_word): New functions.
87 * simops.c: Replace all references to load_mem and store_mem
88 with references to load_byte, load_half, load_3_byte, load_word
89 and store_byte, store_half, store_3_byte, store_word.
90
91 Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
92
93 * interp.c (sim_open): Add callback to arguments.
94 (sim_set_callbacks): Delete SIM_DESC argument.
95
96 Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
97
98 * interp.c (dispatch): Make this an inline function.
99
100 * simops.c (syscall): Use callback->write regardless of
101 what file descriptor we're writing too.
102
103 Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
104
105 * interp.c (load_mem_big): Remove function. It's now a macro
106 defined elsewhere.
107 (compare_simops): New function.
108 (sim_open): Sort the Simops table before inserting entries
109 into the hash table.
110 * mn10300_sim.h: Remove unused #defines.
111 (load_mem_big): Define.
112
113 Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
114
115 * interp.c (load_mem): If we get a load from an out of range
116 address, abort.
117 (store_mem): Likewise for stores.
118 (max_mem): New variable.
119
120 Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
121
122 * mn10300_sim.h: Fix ordering of bits in the PSW.
123
124 * interp.c: Improve hashing routine to avoid long list
125 traversals for common instructions. Add HASH_STAT support.
126 Rewrite opcode dispatch code using a big switch instead of
127 cascaded if/else statements. Avoid useless calls to load_mem.
128
129 Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
130
131 * mn10300_sim.h (struct _state): Add space for mdrq register.
132 (REG_MDRQ): Define.
133 * simops.c: Don't abort for trap. Add support for the extended
134 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
135 and "bsch".
136
137 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
138
139 * configure: Regenerated to track ../common/aclocal.m4 changes.
140
141 Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
142
143 * interp.c (sim_stop): Add stub function.
144
145 Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
146
147 * Makefile.in (SIM_OBJS): Add sim-load.o.
148 * interp.c (sim_kind, myname): New static locals.
149 (sim_open): Set sim_kind, myname. Ignore -E arg.
150 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
151 load file into simulator. Set start address from bfd.
152 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
153
154 Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
155
156 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
157 only include if implemented by host.
158 (OP_F020): Typecast arg passed to time function;
159
160 Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
161
162 * simops.c (syscall): Handle new mn10300 calling conventions.
163
164 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
165
166 * configure: Regenerated to track ../common/aclocal.m4 changes.
167 * config.in: Ditto.
168
169 Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
170
171 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
172 corresponding change in opcodes directory.
173
174 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
175
176 * interp.c (sim_open): New arg `kind'.
177
178 * configure: Regenerated to track ../common/aclocal.m4 changes.
179
180 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
181
182 * configure: Regenerated to track ../common/aclocal.m4 changes.
183
184 Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
185
186 * simops.c: Fix register extraction for a two "movbu" variants.
187 Somewhat simplify "sub" instructions.
188 Correctly sign extend operands for "mul". Put the correct
189 half of the result in MDR for "mul" and "mulu".
190 Implement remaining instructions.
191 Tweak opcode for "syscall".
192
193 Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
194
195 * simops.c: Do syscall emulation in "syscall" instruction. Add
196 dummy "trap" instruction.
197
198 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
199
200 * configure: Regenerated to track ../common/aclocal.m4 changes.
201
202 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
203
204 * configure: Re-generate.
205
206 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
207
208 * configure: Regenerate to track ../common/aclocal.m4 changes.
209
210 Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
211
212 * interp.c (sim_open): New SIM_DESC result. Argument is now
213 in argv form.
214 (other sim_*): New SIM_DESC argument.
215
216 Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
217
218 * simops.c: Fix carry bit computation for "add" instructions.
219
220 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
221 for bset imm8,(d8,an) and bclr imm8,(d8,an).
222
223 Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
224
225 * simops.c: Fix register references when computing Z and N bits
226 for lsr imm8,dn.
227
228 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
229
230 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
231 COMMON_{PRE,POST}_CONFIG_FRAG instead.
232 * configure.in: sinclude ../common/aclocal.m4.
233 * configure: Regenerated.
234
235 Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
236
237 * interp.c (init_system): Allocate 2^19 bytes of space for the
238 simulator.
239
240 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
241
242 * configure configure.in Makefile.in: Update to new configure
243 scheme which is more compatible with WinGDB builds.
244 * configure.in: Improve comment on how to run autoconf.
245 * configure: Re-run autoconf to get new ../common/aclocal.m4.
246 * Makefile.in: Use autoconf substitution to install common
247 makefile fragment.
248
249 Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
250
251 * simops.c: Undo last change to "rol" and "ror", original code
252 was correct!
253
254 Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
255
256 * simops.c: Fix "rol" and "ror".
257
258 Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
259
260 * simops.c: Fix typo in last change.
261
262 Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
263
264 * simops.c: Use REG macros in few places not using them yet.
265
266 Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
267
268 * mn10300_sim.h (struct _state): Fix number of registers!
269
270 Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
271
272 * mn10300_sim.h (struct _state): Put all registers into a single
273 array to make gdb implementation easier.
274 (REG_*): Add definitions for all registers in the state array.
275 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
276 * simops.c: Related changes.
277
278 Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
279
280 * interp.c (sim_resume): Handle 0xff as a single byte insn.
281
282 * simops.c: Fix overflow computation for "add" and "inc"
283 instructions.
284
285 Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
286
287 * simops.c: Handle "break" instruction.
288
289 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
290
291 Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
292
293 * gencode.c (write_opcodes): Also write out the format of the
294 opcode.
295 * mn10300_sim.h (simops): Add "format" field.
296 * interp.c (sim_resume): Deal with endianness issues here.
297
298 Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
299
300 * simops.c (REG0_4): Define.
301 Use REG0_4 for indexed loads/stores.
302
303 Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
304
305 * simops.c (REG0_16): Fix typo.
306
307 Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
308
309 * simops.c: Call abort for any instruction that's not currently
310 simulated.
311
312 * simops.c: Define accessor macros to extract register
313 values from instructions. Use them consistently.
314
315 * interp.c: Delete unused global variable "OP".
316 (sim_resume): Remove unused variable "opcode".
317 * simops.c: Fix some uninitialized variable problems, add
318 parens to fix various -Wall warnings.
319
320 * gencode.c (write_header): Add "insn" and "extension" arguments
321 to the OP_* declarations.
322 (write_template): Similarly for function templates.
323 * interp.c (insn, extension): Remove global variables. Instead
324 pass them as arguments to the OP_* functions.
325 * mn10300_sim.h: Remove decls for "insn" and "extension".
326 * simops.c (OP_*): Accept "insn" and "extension" as arguments
327 instead of using globals.
328
329 Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
330
331 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
332
333 * simops.c: Fix thinkos in last change to "inc dn".
334
335 Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
336
337 * simops.c: "add imm,sp" does not effect the condition codes.
338 "inc dn" does effect the condition codes.
339
340 Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
341
342 * simops.c: Treat both operands as signed values for
343 "div" instruction.
344
345 * simops.c: Fix simulation of division instructions.
346 Fix typos/thinkos in several "cmp" and "sub" instructions.
347
348 Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
349
350 * simops.c: Fix carry bit handling in "sub" and "cmp"
351 instructions.
352
353 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
354
355 Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
356
357 * simops.c: Fix overflow computation for many instructions.
358
359 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
360
361 * simops.c: Fix "mov am, dn".
362
363 * simops.c: Fix more bugs in "add imm,an" and
364 "add imm,dn".
365
366 Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
367
368 * simops.c: Fix bugs in "movm" and "add imm,an".
369
370 * simops.c: Don't lose the upper 24 bits of the return
371 pointer in "call" and "calls" instructions. Rough cut
372 at emulated system calls.
373
374 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
375
376 * simops.c: Implement remaining 4 byte instructions.
377
378 * simops.c: Implement remaining 3 byte instructions.
379
380 * simops.c: Implement remaining 2 byte instructions. Call
381 abort for instructions we're not implementing now.
382
383 Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
384
385 * simops.c: Implement lots of random instructions.
386
387 * simops.c: Implement "movm" and "bCC" insns.
388
389 * mn10300_sim.h (_state): Add another register (MDR).
390 (REG_MDR): Define.
391 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
392 a few additional random insns.
393
394 * mn10300_sim.h (PSW_*): Define for CC status tracking.
395 (REG_D0, REG_A0, REG_SP): Define.
396 * simops.c: Implement "add", "addc" and a few other random
397 instructions.
398
399 * gencode.c, interp.c: Snapshot current simulator code.
400
401 Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
402
403 * Makefile.in, config.in, configure, configure.in: New files.
404 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
405