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* interp.c (load_mem_big): Remove function. It's now a macro
[thirdparty/binutils-gdb.git] / sim / mn10300 / ChangeLog
1 Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
2
3 * interp.c (load_mem_big): Remove function. It's now a macro
4 defined elsewhere.
5 (compare_simops): New function.
6 (sim_open): Sort the Simops table before inserting entries
7 into the hash table.
8 * mn10300_sim.h: Remove unused #defines.
9 (load_mem_big): Define.
10
11 Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
12
13 * interp.c (load_mem): If we get a load from an out of range
14 address, abort.
15 (store_mem): Likewise for stores.
16 (max_mem): New variable.
17
18 Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
19
20 * mn10300_sim.h: Fix ordering of bits in the PSW.
21
22 * interp.c: Improve hashing routine to avoid long list
23 traversals for common instructions. Add HASH_STAT support.
24 Rewrite opcode dispatch code using a big switch instead of
25 cascaded if/else statements. Avoid useless calls to load_mem.
26
27 Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
28
29 * mn10300_sim.h (struct _state): Add space for mdrq register.
30 (REG_MDRQ): Define.
31 * simops.c: Don't abort for trap. Add support for the extended
32 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
33 and "bsch".
34
35 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
36
37 * configure: Regenerated to track ../common/aclocal.m4 changes.
38
39 Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
40
41 * interp.c (sim_stop): Add stub function.
42
43 Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
44
45 * Makefile.in (SIM_OBJS): Add sim-load.o.
46 * interp.c (sim_kind, myname): New static locals.
47 (sim_open): Set sim_kind, myname. Ignore -E arg.
48 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
49 load file into simulator. Set start address from bfd.
50 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
51
52 Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
53
54 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
55 only include if implemented by host.
56 (OP_F020): Typecast arg passed to time function;
57
58 Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
59
60 * simops.c (syscall): Handle new mn10300 calling conventions.
61
62 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
63
64 * configure: Regenerated to track ../common/aclocal.m4 changes.
65 * config.in: Ditto.
66
67 Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
68
69 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
70 corresponding change in opcodes directory.
71
72 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
73
74 * interp.c (sim_open): New arg `kind'.
75
76 * configure: Regenerated to track ../common/aclocal.m4 changes.
77
78 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
79
80 * configure: Regenerated to track ../common/aclocal.m4 changes.
81
82 Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
83
84 * simops.c: Fix register extraction for a two "movbu" variants.
85 Somewhat simplify "sub" instructions.
86 Correctly sign extend operands for "mul". Put the correct
87 half of the result in MDR for "mul" and "mulu".
88 Implement remaining instructions.
89 Tweak opcode for "syscall".
90
91 Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
92
93 * simops.c: Do syscall emulation in "syscall" instruction. Add
94 dummy "trap" instruction.
95
96 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
97
98 * configure: Regenerated to track ../common/aclocal.m4 changes.
99
100 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
101
102 * configure: Re-generate.
103
104 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
105
106 * configure: Regenerate to track ../common/aclocal.m4 changes.
107
108 Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
109
110 * interp.c (sim_open): New SIM_DESC result. Argument is now
111 in argv form.
112 (other sim_*): New SIM_DESC argument.
113
114 Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
115
116 * simops.c: Fix carry bit computation for "add" instructions.
117
118 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
119 for bset imm8,(d8,an) and bclr imm8,(d8,an).
120
121 Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
122
123 * simops.c: Fix register references when computing Z and N bits
124 for lsr imm8,dn.
125
126 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
127
128 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
129 COMMON_{PRE,POST}_CONFIG_FRAG instead.
130 * configure.in: sinclude ../common/aclocal.m4.
131 * configure: Regenerated.
132
133 Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
134
135 * interp.c (init_system): Allocate 2^19 bytes of space for the
136 simulator.
137
138 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
139
140 * configure configure.in Makefile.in: Update to new configure
141 scheme which is more compatible with WinGDB builds.
142 * configure.in: Improve comment on how to run autoconf.
143 * configure: Re-run autoconf to get new ../common/aclocal.m4.
144 * Makefile.in: Use autoconf substitution to install common
145 makefile fragment.
146
147 Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
148
149 * simops.c: Undo last change to "rol" and "ror", original code
150 was correct!
151
152 Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
153
154 * simops.c: Fix "rol" and "ror".
155
156 Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
157
158 * simops.c: Fix typo in last change.
159
160 Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
161
162 * simops.c: Use REG macros in few places not using them yet.
163
164 Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
165
166 * mn10300_sim.h (struct _state): Fix number of registers!
167
168 Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
169
170 * mn10300_sim.h (struct _state): Put all registers into a single
171 array to make gdb implementation easier.
172 (REG_*): Add definitions for all registers in the state array.
173 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
174 * simops.c: Related changes.
175
176 Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
177
178 * interp.c (sim_resume): Handle 0xff as a single byte insn.
179
180 * simops.c: Fix overflow computation for "add" and "inc"
181 instructions.
182
183 Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
184
185 * simops.c: Handle "break" instruction.
186
187 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
188
189 Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
190
191 * gencode.c (write_opcodes): Also write out the format of the
192 opcode.
193 * mn10300_sim.h (simops): Add "format" field.
194 * interp.c (sim_resume): Deal with endianness issues here.
195
196 Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
197
198 * simops.c (REG0_4): Define.
199 Use REG0_4 for indexed loads/stores.
200
201 Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
202
203 * simops.c (REG0_16): Fix typo.
204
205 Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
206
207 * simops.c: Call abort for any instruction that's not currently
208 simulated.
209
210 * simops.c: Define accessor macros to extract register
211 values from instructions. Use them consistently.
212
213 * interp.c: Delete unused global variable "OP".
214 (sim_resume): Remove unused variable "opcode".
215 * simops.c: Fix some uninitialized variable problems, add
216 parens to fix various -Wall warnings.
217
218 * gencode.c (write_header): Add "insn" and "extension" arguments
219 to the OP_* declarations.
220 (write_template): Similarly for function templates.
221 * interp.c (insn, extension): Remove global variables. Instead
222 pass them as arguments to the OP_* functions.
223 * mn10300_sim.h: Remove decls for "insn" and "extension".
224 * simops.c (OP_*): Accept "insn" and "extension" as arguments
225 instead of using globals.
226
227 Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
228
229 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
230
231 * simops.c: Fix thinkos in last change to "inc dn".
232
233 Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
234
235 * simops.c: "add imm,sp" does not effect the condition codes.
236 "inc dn" does effect the condition codes.
237
238 Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
239
240 * simops.c: Treat both operands as signed values for
241 "div" instruction.
242
243 * simops.c: Fix simulation of division instructions.
244 Fix typos/thinkos in several "cmp" and "sub" instructions.
245
246 Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
247
248 * simops.c: Fix carry bit handling in "sub" and "cmp"
249 instructions.
250
251 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
252
253 Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
254
255 * simops.c: Fix overflow computation for many instructions.
256
257 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
258
259 * simops.c: Fix "mov am, dn".
260
261 * simops.c: Fix more bugs in "add imm,an" and
262 "add imm,dn".
263
264 Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
265
266 * simops.c: Fix bugs in "movm" and "add imm,an".
267
268 * simops.c: Don't lose the upper 24 bits of the return
269 pointer in "call" and "calls" instructions. Rough cut
270 at emulated system calls.
271
272 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
273
274 * simops.c: Implement remaining 4 byte instructions.
275
276 * simops.c: Implement remaining 3 byte instructions.
277
278 * simops.c: Implement remaining 2 byte instructions. Call
279 abort for instructions we're not implementing now.
280
281 Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
282
283 * simops.c: Implement lots of random instructions.
284
285 * simops.c: Implement "movm" and "bCC" insns.
286
287 * mn10300_sim.h (_state): Add another register (MDR).
288 (REG_MDR): Define.
289 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
290 a few additional random insns.
291
292 * mn10300_sim.h (PSW_*): Define for CC status tracking.
293 (REG_D0, REG_A0, REG_SP): Define.
294 * simops.c: Implement "add", "addc" and a few other random
295 instructions.
296
297 * gencode.c, interp.c: Snapshot current simulator code.
298
299 Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
300
301 * Makefile.in, config.in, configure, configure.in: New files.
302 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
303