sim/mn10300/ChangeLog

   1 Tue Aug 26 10:41:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * interp.c (sim_kill): Delete.
   4         (sim_create_inferior): Add ABFD argument.
   5         (sim_load): Move setting of PC from here.
   6         (sim_create_inferior): To here.
   7
   8 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
   9
  10         * configure: Regenerated to track ../common/aclocal.m4 changes.
  11         * config.in: Ditto.
  12
  13 Mon Aug 25 16:14:44 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  14
  15         * interp.c (sim_open): Add ABFD argument.
  16
  17 Tue Jun 24 13:46:20 1997  Jeffrey A Law  (law@cygnus.com)
  18
  19         * interp.c (sim_resume): Clear State.exited.
  20         (sim_stop_reason): If State.exited is nonzero, then indicate that
  21         the simulator exited instead of stopped.
  22         * mn10300_sim.h (struct _state): Add exited field.
  23         * simops.c (syscall): Set State.exited for SYS_exit.
  24
  25 Wed Jun 11 22:07:56 1997  Jeffrey A Law  (law@cygnus.com)
  26
  27         * simops.c: Fix thinko in last change.
  28
  29 Tue Jun 10 12:31:32 1997  Jeffrey A Law  (law@cygnus.com)
  30
  31         * simops.c: "call" stores the callee saved registers into the
  32         stack!  Update the stack pointer properly when done with
  33         register saves.
  34
  35         * simops.c: Fix return address computation for "call" instructions.
  36
  37 Thu May 22 01:43:11 1997  Jeffrey A Law  (law@cygnus.com)
  38
  39         * interp.c (sim_open): Fix typo.
  40
  41 Wed May 21 23:27:58 1997  Jeffrey A Law  (law@cygnus.com)
  42
  43         * interp.c (sim_resume): Add missing case in big switch
  44         statement (for extb instruction).
  45
  46 Tue May 20 17:51:30 1997  Jeffrey A Law  (law@cygnus.com)
  47
  48         * interp.c: Replace all references to load_mem and store_mem
  49         with references to load_byte, load_half, load_3_byte, load_word
  50         and store_byte, store_half, store_3_byte, store_word.
  51         (INLINE): Delete definition.
  52         (load_mem_big): Likewise.
  53         (max_mem): Make it global.
  54         (dispatch): Make this function inline.
  55         (load_mem, store_mem): Delete functions.
  56         * mn10300_sim.h (INLINE): Define.
  57         (RLW): Delete unused definition.
  58         (load_mem, store_mem): Delete declarations.
  59         (load_mem_big): New definition.
  60         (load_byte, load_half, load_3_byte, load_word): New functions.
  61         (store_byte, store_half, store_3_byte, store_word): New functions.
  62         * simops.c:  Replace all references to load_mem and store_mem
  63         with references to load_byte, load_half, load_3_byte, load_word
  64         and store_byte, store_half, store_3_byte, store_word.
  65
  66 Tue May 20 10:21:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  67
  68         * interp.c (sim_open): Add callback to arguments.
  69         (sim_set_callbacks): Delete SIM_DESC argument.
  70
  71 Mon May 19 13:54:22 1997  Jeffrey A Law  (law@cygnus.com)
  72
  73         * interp.c (dispatch): Make this an inline function.
  74
  75         * simops.c (syscall): Use callback->write regardless of
  76         what file descriptor we're writing too.
  77
  78 Sun May 18 16:46:31 1997  Jeffrey A Law  (law@cygnus.com)
  79
  80         * interp.c (load_mem_big): Remove function.  It's now a macro
  81         defined elsewhere.
  82         (compare_simops): New function.
  83         (sim_open): Sort the Simops table before inserting entries
  84         into the hash table.
  85         * mn10300_sim.h: Remove unused #defines.
  86         (load_mem_big): Define.
  87
  88 Fri May 16 16:36:17 1997  Jeffrey A Law  (law@cygnus.com)
  89
  90         * interp.c (load_mem): If we get a load from an out of range
  91         address, abort.
  92         (store_mem): Likewise for stores.
  93         (max_mem): New variable.
  94
  95 Tue May  6 13:24:36 1997  Jeffrey A Law  (law@cygnus.com)
  96
  97         * mn10300_sim.h: Fix ordering of bits in the PSW.
  98
  99         * interp.c: Improve hashing routine to avoid long list
 100         traversals for common instructions.  Add HASH_STAT support.
 101         Rewrite opcode dispatch code using a big switch instead of
 102         cascaded if/else statements.  Avoid useless calls to load_mem.
 103
 104 Mon May  5 18:07:48 1997  Jeffrey A Law  (law@cygnus.com)
 105
 106         * mn10300_sim.h (struct _state): Add space for mdrq register.
 107         (REG_MDRQ): Define.
 108         * simops.c: Don't abort for trap.  Add support for the extended
 109         instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
 110         and "bsch".
 111
 112 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 113
 114         * configure: Regenerated to track ../common/aclocal.m4 changes.
 115
 116 Fri Apr 18 14:04:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 117
 118         * interp.c (sim_stop): Add stub function.
 119
 120 Thu Apr 17 03:26:59 1997  Doug Evans  <dje@canuck.cygnus.com>
 121
 122         * Makefile.in (SIM_OBJS): Add sim-load.o.
 123         * interp.c (sim_kind, myname): New static locals.
 124         (sim_open): Set sim_kind, myname.  Ignore -E arg.
 125         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
 126         load file into simulator.  Set start address from bfd.
 127         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
 128
 129 Wed Apr 16 19:30:44 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 130
 131         * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
 132         only include if implemented by host.
 133         (OP_F020): Typecast arg passed to time function;
 134
 135 Mon Apr  7 23:57:49 1997  Jeffrey A Law  (law@cygnus.com)
 136
 137         * simops.c (syscall): Handle new mn10300 calling conventions.
 138
 139 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 140
 141         * configure: Regenerated to track ../common/aclocal.m4 changes.
 142         * config.in: Ditto.
 143
 144 Fri Apr  4 20:02:37 1997  Ian Lance Taylor  <ian@cygnus.com>
 145
 146         * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
 147         corresponding change in opcodes directory.
 148
 149 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
 150
 151         * interp.c (sim_open): New arg `kind'.
 152
 153         * configure: Regenerated to track ../common/aclocal.m4 changes.
 154
 155 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
 156
 157         * configure: Regenerated to track ../common/aclocal.m4 changes.
 158
 159 Thu Mar 20 11:58:02 1997  Jeffrey A Law  (law@cygnus.com)
 160
 161         * simops.c: Fix register extraction for a two "movbu" variants.
 162         Somewhat simplify "sub" instructions.
 163         Correctly sign extend operands for "mul".  Put the correct
 164         half of the result in MDR for "mul" and "mulu".
 165         Implement remaining instructions.
 166         Tweak opcode for "syscall".
 167
 168 Tue Mar 18 14:21:21 1997  Jeffrey A Law  (law@cygnus.com)
 169
 170         * simops.c: Do syscall emulation in "syscall" instruction.  Add
 171         dummy "trap" instruction.
 172
 173 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 174
 175         * configure: Regenerated to track ../common/aclocal.m4 changes.
 176
 177 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 178
 179         * configure: Re-generate.
 180
 181 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
 182
 183         * configure: Regenerate to track ../common/aclocal.m4 changes.
 184
 185 Thu Mar 13 12:54:45 1997  Doug Evans  <dje@canuck.cygnus.com>
 186
 187         * interp.c (sim_open): New SIM_DESC result.  Argument is now
 188         in argv form.
 189         (other sim_*): New SIM_DESC argument.
 190
 191 Wed Mar 12 15:04:00 1997  Jeffrey A Law  (law@cygnus.com)
 192
 193         * simops.c: Fix carry bit computation for "add" instructions.
 194
 195         * simops.c: Fix typos in bset insns.  Fix arguments to store_mem
 196         for bset imm8,(d8,an) and bclr imm8,(d8,an).
 197
 198 Wed Mar  5 15:00:10 1997  Jeffrey A Law  (law@cygnus.com)
 199
 200         * simops.c: Fix register references when computing Z and N bits
 201         for lsr imm8,dn.
 202
 203 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
 204
 205         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
 206         COMMON_{PRE,POST}_CONFIG_FRAG instead.
 207         * configure.in: sinclude ../common/aclocal.m4.
 208         * configure: Regenerated.
 209
 210 Fri Jan 24 10:47:25 1997  Jeffrey A Law  (law@cygnus.com)
 211
 212         * interp.c (init_system): Allocate 2^19 bytes of space for the
 213         simulator.
 214
 215 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
 216
 217         * configure configure.in Makefile.in:  Update to new configure
 218         scheme which is more compatible with WinGDB builds.
 219         * configure.in:  Improve comment on how to run autoconf.
 220         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
 221         * Makefile.in:  Use autoconf substitution to install common
 222         makefile fragment.
 223
 224 Tue Jan 21 15:03:04 1997  Jeffrey A Law  (law@cygnus.com)
 225
 226         * simops.c: Undo last change to "rol" and "ror", original code
 227         was correct!
 228
 229 Thu Jan 16 11:28:14 1997  Jeffrey A Law  (law@cygnus.com)
 230
 231         * simops.c: Fix "rol" and "ror".
 232
 233 Wed Jan 15 06:45:58 1997  Jeffrey A Law  (law@cygnus.com)
 234
 235         * simops.c: Fix typo in last change.
 236
 237 Mon Jan 13 13:22:35 1997  Jeffrey A Law  (law@cygnus.com)
 238
 239         * simops.c: Use REG macros in few places not using them yet.
 240
 241 Mon Jan  6 16:21:19 1997  Jeffrey A Law  (law@cygnus.com)
 242
 243         * mn10300_sim.h (struct _state): Fix number of registers!
 244
 245 Tue Dec 31 16:20:41 1996  Jeffrey A Law  (law@cygnus.com)
 246
 247         * mn10300_sim.h (struct _state): Put all registers into a single
 248         array to make gdb implementation easier.
 249         (REG_*): Add definitions for all registers in the state array.
 250         (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
 251         * simops.c: Related changes.
 252
 253 Wed Dec 18 10:10:45 1996  Jeffrey A Law  (law@cygnus.com)
 254
 255         * interp.c (sim_resume): Handle 0xff as a single byte insn.
 256
 257         * simops.c: Fix overflow computation for "add" and "inc"
 258         instructions.
 259
 260 Mon Dec 16 10:03:52 1996  Jeffrey A Law  (law@cygnus.com)
 261
 262         * simops.c: Handle "break" instruction.
 263
 264         * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
 265
 266 Wed Dec 11 09:53:10 1996  Jeffrey A Law  (law@cygnus.com)
 267
 268         * gencode.c (write_opcodes): Also write out the format of the
 269         opcode.
 270         * mn10300_sim.h (simops): Add "format" field.
 271         * interp.c (sim_resume): Deal with endianness issues here.
 272
 273 Tue Dec 10 15:05:37 1996  Jeffrey A Law  (law@cygnus.com)
 274
 275         * simops.c (REG0_4): Define.
 276         Use REG0_4 for indexed loads/stores.
 277
 278 Sat Dec  7 09:50:28 1996  Jeffrey A Law  (law@cygnus.com)
 279
 280         * simops.c (REG0_16): Fix typo.
 281
 282 Fri Dec  6 14:13:34 1996  Jeffrey A Law  (law@cygnus.com)
 283
 284         * simops.c: Call abort for any instruction that's not currently
 285         simulated.
 286
 287         * simops.c: Define accessor macros to extract register
 288         values from instructions.  Use them consistently.
 289
 290         * interp.c: Delete unused global variable "OP".
 291         (sim_resume): Remove unused variable "opcode".
 292         * simops.c: Fix some uninitialized variable problems, add
 293         parens to fix various -Wall warnings.
 294
 295         * gencode.c (write_header): Add "insn" and "extension" arguments
 296         to the OP_* declarations.
 297         (write_template): Similarly for function templates.
 298         * interp.c (insn, extension): Remove global variables.  Instead
 299         pass them as arguments to the OP_* functions.
 300         * mn10300_sim.h: Remove decls for "insn" and "extension".
 301         * simops.c (OP_*): Accept "insn" and "extension" as arguments
 302         instead of using globals.
 303
 304 Thu Dec  5 22:26:31 1996  Jeffrey A Law  (law@cygnus.com)
 305
 306         * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
 307
 308         * simops.c: Fix thinkos in last change to "inc dn".
 309
 310 Wed Dec  4 10:57:53 1996  Jeffrey A Law  (law@cygnus.com)
 311
 312         * simops.c: "add imm,sp" does not effect the condition codes.
 313         "inc dn" does effect the condition codes.
 314
 315 Tue Dec  3 17:37:45 1996  Jeffrey A Law  (law@cygnus.com)
 316
 317         * simops.c: Treat both operands as signed values for
 318         "div" instruction.
 319
 320         * simops.c: Fix simulation of division instructions.
 321         Fix typos/thinkos in several "cmp" and "sub" instructions.
 322
 323 Mon Dec  2 12:31:40 1996  Jeffrey A Law  (law@cygnus.com)
 324
 325         * simops.c: Fix carry bit handling in "sub" and "cmp"
 326         instructions.
 327
 328         * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
 329
 330 Sun Dec  1 16:05:42 1996  Jeffrey A Law  (law@cygnus.com)
 331
 332         * simops.c: Fix overflow computation for many instructions.
 333
 334         * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
 335
 336         * simops.c: Fix "mov am, dn".
 337
 338         * simops.c: Fix more bugs in "add imm,an" and
 339         "add imm,dn".
 340
 341 Wed Nov 27 09:20:42 1996  Jeffrey A Law  (law@cygnus.com)
 342
 343         * simops.c: Fix bugs in "movm" and "add imm,an".
 344
 345         * simops.c: Don't lose the upper 24 bits of the return
 346         pointer in "call" and "calls" instructions.  Rough cut
 347         at emulated system calls.
 348
 349         * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
 350
 351         * simops.c: Implement remaining 4 byte instructions.
 352
 353         * simops.c: Implement remaining 3 byte instructions.
 354
 355         * simops.c: Implement remaining 2 byte instructions.  Call
 356         abort for instructions we're not implementing now.
 357
 358 Tue Nov 26 15:43:41 1996  Jeffrey A Law  (law@cygnus.com)
 359
 360         * simops.c: Implement lots of random instructions.
 361
 362         * simops.c: Implement "movm" and "bCC" insns.
 363
 364         * mn10300_sim.h (_state): Add another register (MDR).
 365         (REG_MDR): Define.
 366         * simops.c: Implement "cmp", "calls", "rets", "jmp" and
 367         a few additional random insns.
 368
 369         * mn10300_sim.h (PSW_*): Define for CC status tracking.
 370         (REG_D0, REG_A0, REG_SP): Define.
 371         * simops.c: Implement "add", "addc" and a few other random
 372         instructions.
 373
 374         * gencode.c, interp.c: Snapshot current simulator code.
 375
 376 Mon Nov 25 12:46:38 1996  Jeffrey A Law  (law@cygnus.com)
 377
 378         * Makefile.in, config.in, configure, configure.in: New files.
 379         * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
 380