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For sim_fetch_register / sim_store_register: Add LENGTH parameter,
[thirdparty/binutils-gdb.git] / sim / mn10300 / ChangeLog
1 Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * interp.c (sim_store_register, sim_fetch_register): Pass in
4 length parameter. Return -1.
5
6 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
7
8 * configure: Regenerated to track ../common/aclocal.m4 changes.
9
10 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
11
12 * configure: Regenerated to track ../common/aclocal.m4 changes.
13
14 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
15
16 * configure: Regenerated to track ../common/aclocal.m4 changes.
17
18 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
19
20 * configure: Regenerated to track ../common/aclocal.m4 changes.
21 * config.in: Ditto.
22
23 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
24
25 * configure: Regenerated to track ../common/aclocal.m4 changes.
26
27 Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com)
28
29 * simops.c (call:16 call:32): Stack adjustment is determined solely
30 by the imm8 field.
31
32 Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
33
34 * interp.c (sim_load): Pass lma_p and sim_write args to
35 sim_load_file.
36
37 Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com)
38
39 * simops.c: Correctly handle register restores for "ret" and "retf"
40 instructions.
41
42 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
43
44 * configure: Regenerated to track ../common/aclocal.m4 changes.
45
46 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
47
48 * configure: Regenerated to track ../common/aclocal.m4 changes.
49
50 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
51
52 * configure: Regenerated to track ../common/aclocal.m4 changes.
53
54 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
55
56 * configure: Regenerated to track ../common/aclocal.m4 changes.
57
58 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
59
60 * configure: Regenerated to track ../common/aclocal.m4 changes.
61
62 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
63
64 * configure: Regenerated to track ../common/aclocal.m4 changes.
65
66 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
67
68 * configure: Regenerated to track ../common/aclocal.m4 changes.
69
70 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
71
72 * configure: Regenerated to track ../common/aclocal.m4 changes.
73 * config.in: Ditto.
74
75 Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
76
77 * interp.c (sim_kill): Delete.
78 (sim_create_inferior): Add ABFD argument.
79 (sim_load): Move setting of PC from here.
80 (sim_create_inferior): To here.
81
82 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
83
84 * configure: Regenerated to track ../common/aclocal.m4 changes.
85 * config.in: Ditto.
86
87 Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
88
89 * interp.c (sim_open): Add ABFD argument.
90
91 Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
92
93 * interp.c (sim_resume): Clear State.exited.
94 (sim_stop_reason): If State.exited is nonzero, then indicate that
95 the simulator exited instead of stopped.
96 * mn10300_sim.h (struct _state): Add exited field.
97 * simops.c (syscall): Set State.exited for SYS_exit.
98
99 Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
100
101 * simops.c: Fix thinko in last change.
102
103 Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
104
105 * simops.c: "call" stores the callee saved registers into the
106 stack! Update the stack pointer properly when done with
107 register saves.
108
109 * simops.c: Fix return address computation for "call" instructions.
110
111 Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
112
113 * interp.c (sim_open): Fix typo.
114
115 Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
116
117 * interp.c (sim_resume): Add missing case in big switch
118 statement (for extb instruction).
119
120 Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
121
122 * interp.c: Replace all references to load_mem and store_mem
123 with references to load_byte, load_half, load_3_byte, load_word
124 and store_byte, store_half, store_3_byte, store_word.
125 (INLINE): Delete definition.
126 (load_mem_big): Likewise.
127 (max_mem): Make it global.
128 (dispatch): Make this function inline.
129 (load_mem, store_mem): Delete functions.
130 * mn10300_sim.h (INLINE): Define.
131 (RLW): Delete unused definition.
132 (load_mem, store_mem): Delete declarations.
133 (load_mem_big): New definition.
134 (load_byte, load_half, load_3_byte, load_word): New functions.
135 (store_byte, store_half, store_3_byte, store_word): New functions.
136 * simops.c: Replace all references to load_mem and store_mem
137 with references to load_byte, load_half, load_3_byte, load_word
138 and store_byte, store_half, store_3_byte, store_word.
139
140 Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
141
142 * interp.c (sim_open): Add callback to arguments.
143 (sim_set_callbacks): Delete SIM_DESC argument.
144
145 Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
146
147 * interp.c (dispatch): Make this an inline function.
148
149 * simops.c (syscall): Use callback->write regardless of
150 what file descriptor we're writing too.
151
152 Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
153
154 * interp.c (load_mem_big): Remove function. It's now a macro
155 defined elsewhere.
156 (compare_simops): New function.
157 (sim_open): Sort the Simops table before inserting entries
158 into the hash table.
159 * mn10300_sim.h: Remove unused #defines.
160 (load_mem_big): Define.
161
162 Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
163
164 * interp.c (load_mem): If we get a load from an out of range
165 address, abort.
166 (store_mem): Likewise for stores.
167 (max_mem): New variable.
168
169 Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
170
171 * mn10300_sim.h: Fix ordering of bits in the PSW.
172
173 * interp.c: Improve hashing routine to avoid long list
174 traversals for common instructions. Add HASH_STAT support.
175 Rewrite opcode dispatch code using a big switch instead of
176 cascaded if/else statements. Avoid useless calls to load_mem.
177
178 Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
179
180 * mn10300_sim.h (struct _state): Add space for mdrq register.
181 (REG_MDRQ): Define.
182 * simops.c: Don't abort for trap. Add support for the extended
183 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
184 and "bsch".
185
186 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
187
188 * configure: Regenerated to track ../common/aclocal.m4 changes.
189
190 Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
191
192 * interp.c (sim_stop): Add stub function.
193
194 Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
195
196 * Makefile.in (SIM_OBJS): Add sim-load.o.
197 * interp.c (sim_kind, myname): New static locals.
198 (sim_open): Set sim_kind, myname. Ignore -E arg.
199 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
200 load file into simulator. Set start address from bfd.
201 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
202
203 Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
204
205 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
206 only include if implemented by host.
207 (OP_F020): Typecast arg passed to time function;
208
209 Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
210
211 * simops.c (syscall): Handle new mn10300 calling conventions.
212
213 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
214
215 * configure: Regenerated to track ../common/aclocal.m4 changes.
216 * config.in: Ditto.
217
218 Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
219
220 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
221 corresponding change in opcodes directory.
222
223 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
224
225 * interp.c (sim_open): New arg `kind'.
226
227 * configure: Regenerated to track ../common/aclocal.m4 changes.
228
229 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
230
231 * configure: Regenerated to track ../common/aclocal.m4 changes.
232
233 Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
234
235 * simops.c: Fix register extraction for a two "movbu" variants.
236 Somewhat simplify "sub" instructions.
237 Correctly sign extend operands for "mul". Put the correct
238 half of the result in MDR for "mul" and "mulu".
239 Implement remaining instructions.
240 Tweak opcode for "syscall".
241
242 Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
243
244 * simops.c: Do syscall emulation in "syscall" instruction. Add
245 dummy "trap" instruction.
246
247 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
248
249 * configure: Regenerated to track ../common/aclocal.m4 changes.
250
251 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
252
253 * configure: Re-generate.
254
255 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
256
257 * configure: Regenerate to track ../common/aclocal.m4 changes.
258
259 Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
260
261 * interp.c (sim_open): New SIM_DESC result. Argument is now
262 in argv form.
263 (other sim_*): New SIM_DESC argument.
264
265 Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
266
267 * simops.c: Fix carry bit computation for "add" instructions.
268
269 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
270 for bset imm8,(d8,an) and bclr imm8,(d8,an).
271
272 Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
273
274 * simops.c: Fix register references when computing Z and N bits
275 for lsr imm8,dn.
276
277 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
278
279 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
280 COMMON_{PRE,POST}_CONFIG_FRAG instead.
281 * configure.in: sinclude ../common/aclocal.m4.
282 * configure: Regenerated.
283
284 Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
285
286 * interp.c (init_system): Allocate 2^19 bytes of space for the
287 simulator.
288
289 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
290
291 * configure configure.in Makefile.in: Update to new configure
292 scheme which is more compatible with WinGDB builds.
293 * configure.in: Improve comment on how to run autoconf.
294 * configure: Re-run autoconf to get new ../common/aclocal.m4.
295 * Makefile.in: Use autoconf substitution to install common
296 makefile fragment.
297
298 Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
299
300 * simops.c: Undo last change to "rol" and "ror", original code
301 was correct!
302
303 Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
304
305 * simops.c: Fix "rol" and "ror".
306
307 Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
308
309 * simops.c: Fix typo in last change.
310
311 Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
312
313 * simops.c: Use REG macros in few places not using them yet.
314
315 Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
316
317 * mn10300_sim.h (struct _state): Fix number of registers!
318
319 Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
320
321 * mn10300_sim.h (struct _state): Put all registers into a single
322 array to make gdb implementation easier.
323 (REG_*): Add definitions for all registers in the state array.
324 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
325 * simops.c: Related changes.
326
327 Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
328
329 * interp.c (sim_resume): Handle 0xff as a single byte insn.
330
331 * simops.c: Fix overflow computation for "add" and "inc"
332 instructions.
333
334 Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
335
336 * simops.c: Handle "break" instruction.
337
338 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
339
340 Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
341
342 * gencode.c (write_opcodes): Also write out the format of the
343 opcode.
344 * mn10300_sim.h (simops): Add "format" field.
345 * interp.c (sim_resume): Deal with endianness issues here.
346
347 Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
348
349 * simops.c (REG0_4): Define.
350 Use REG0_4 for indexed loads/stores.
351
352 Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
353
354 * simops.c (REG0_16): Fix typo.
355
356 Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
357
358 * simops.c: Call abort for any instruction that's not currently
359 simulated.
360
361 * simops.c: Define accessor macros to extract register
362 values from instructions. Use them consistently.
363
364 * interp.c: Delete unused global variable "OP".
365 (sim_resume): Remove unused variable "opcode".
366 * simops.c: Fix some uninitialized variable problems, add
367 parens to fix various -Wall warnings.
368
369 * gencode.c (write_header): Add "insn" and "extension" arguments
370 to the OP_* declarations.
371 (write_template): Similarly for function templates.
372 * interp.c (insn, extension): Remove global variables. Instead
373 pass them as arguments to the OP_* functions.
374 * mn10300_sim.h: Remove decls for "insn" and "extension".
375 * simops.c (OP_*): Accept "insn" and "extension" as arguments
376 instead of using globals.
377
378 Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
379
380 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
381
382 * simops.c: Fix thinkos in last change to "inc dn".
383
384 Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
385
386 * simops.c: "add imm,sp" does not effect the condition codes.
387 "inc dn" does effect the condition codes.
388
389 Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
390
391 * simops.c: Treat both operands as signed values for
392 "div" instruction.
393
394 * simops.c: Fix simulation of division instructions.
395 Fix typos/thinkos in several "cmp" and "sub" instructions.
396
397 Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
398
399 * simops.c: Fix carry bit handling in "sub" and "cmp"
400 instructions.
401
402 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
403
404 Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
405
406 * simops.c: Fix overflow computation for many instructions.
407
408 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
409
410 * simops.c: Fix "mov am, dn".
411
412 * simops.c: Fix more bugs in "add imm,an" and
413 "add imm,dn".
414
415 Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
416
417 * simops.c: Fix bugs in "movm" and "add imm,an".
418
419 * simops.c: Don't lose the upper 24 bits of the return
420 pointer in "call" and "calls" instructions. Rough cut
421 at emulated system calls.
422
423 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
424
425 * simops.c: Implement remaining 4 byte instructions.
426
427 * simops.c: Implement remaining 3 byte instructions.
428
429 * simops.c: Implement remaining 2 byte instructions. Call
430 abort for instructions we're not implementing now.
431
432 Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
433
434 * simops.c: Implement lots of random instructions.
435
436 * simops.c: Implement "movm" and "bCC" insns.
437
438 * mn10300_sim.h (_state): Add another register (MDR).
439 (REG_MDR): Define.
440 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
441 a few additional random insns.
442
443 * mn10300_sim.h (PSW_*): Define for CC status tracking.
444 (REG_D0, REG_A0, REG_SP): Define.
445 * simops.c: Implement "add", "addc" and a few other random
446 instructions.
447
448 * gencode.c, interp.c: Snapshot current simulator code.
449
450 Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
451
452 * Makefile.in, config.in, configure, configure.in: New files.
453 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
454