sim/mn10300/interp.c

   1 #include <signal.h>
   2 #include "sysdep.h"
   3 #include "bfd.h"
   4
   5 #include "mn10300_sim.h"
   6
   7 #ifndef INLINE
   8 #ifdef __GNUC__
   9 #define INLINE inline
  10 #else
  11 #define INLINE
  12 #endif
  13 #endif
  14
  15 host_callback *mn10300_callback;
  16 int mn10300_debug;
  17 static SIM_OPEN_KIND sim_kind;
  18 static char *myname;
  19
  20 static void dispatch PARAMS ((uint32, uint32, int));
  21 static long hash PARAMS ((long));
  22 static void init_system PARAMS ((void));
  23 #define MAX_HASH  127
  24
  25 struct hash_entry
  26 {
  27   struct hash_entry *next;
  28   long opcode;
  29   long mask;
  30   struct simops *ops;
  31 #ifdef HASH_STAT
  32   unsigned long count;
  33 #endif
  34 };
  35
  36 static int max_mem = 0;
  37 struct hash_entry hash_table[MAX_HASH+1];
  38
  39
  40 /* This probably doesn't do a very good job at bucket filling, but
  41    it's simple... */
  42 static INLINE long
  43 hash(insn)
  44      long insn;
  45 {
  46   /* These are one byte insns, we special case these since, in theory,
  47      they should be the most heavily used.  */
  48   if ((insn & 0xffffff00) == 0)
  49     {
  50       switch (insn & 0xf0)
  51         {
  52           case 0x00:
  53             return 0x70;
  54
  55           case 0x40:
  56             return 0x71;
  57
  58           case 0x10:
  59             return 0x72;
  60
  61           case 0x30:
  62             return 0x73;
  63
  64           case 0x50:
  65             return 0x74;
  66
  67           case 0x60:
  68             return 0x75;
  69
  70           case 0x70:
  71             return 0x76;
  72
  73           case 0x80:
  74             return 0x77;
  75
  76           case 0x90:
  77             return 0x78;
  78
  79           case 0xa0:
  80             return 0x79;
  81
  82           case 0xb0:
  83             return 0x7a;
  84
  85           case 0xe0:
  86             return 0x7b;
  87
  88           default:
  89             return 0x7c;
  90         }
  91     }
  92
  93   /* These are two byte insns */
  94   if ((insn & 0xffff0000) == 0)
  95     {
  96       if ((insn & 0xf000) == 0x2000
  97           || (insn & 0xf000) == 0x5000)
  98         return ((insn & 0xfc00) >> 8) & 0x7f;
  99
 100       if ((insn & 0xf000) == 0x4000)
 101         return ((insn & 0xf300) >> 8) & 0x7f;
 102
 103       if ((insn & 0xf000) == 0x8000
 104           || (insn & 0xf000) == 0x9000
 105           || (insn & 0xf000) == 0xa000
 106           || (insn & 0xf000) == 0xb000)
 107         return ((insn & 0xf000) >> 8) & 0x7f;
 108
 109       if ((insn & 0xff00) == 0xf000
 110           || (insn & 0xff00) == 0xf100
 111           || (insn & 0xff00) == 0xf200
 112           || (insn & 0xff00) == 0xf500
 113           || (insn & 0xff00) == 0xf600)
 114         return ((insn & 0xfff0) >> 4) & 0x7f;
 115
 116       if ((insn & 0xf000) == 0xc000)
 117         return ((insn & 0xff00) >> 8) & 0x7f;
 118
 119       return ((insn & 0xffc0) >> 6) & 0x7f;
 120     }
 121
 122   /* These are three byte insns.  */
 123   if ((insn & 0xff000000) == 0)
 124     {
 125       if ((insn & 0xf00000) == 0x000000)
 126         return ((insn & 0xf30000) >> 16) & 0x7f;
 127
 128       if ((insn & 0xf00000) == 0x200000
 129           || (insn & 0xf00000) == 0x300000)
 130         return ((insn & 0xfc0000) >> 16) & 0x7f;
 131
 132       if ((insn & 0xff0000) == 0xf80000)
 133         return ((insn & 0xfff000) >> 12) & 0x7f;
 134
 135       if ((insn & 0xff0000) == 0xf90000)
 136         return ((insn & 0xfffc00) >> 10) & 0x7f;
 137
 138       return ((insn & 0xff0000) >> 16) & 0x7f;
 139     }
 140
 141   /* These are four byte or larger insns.  */
 142   if ((insn & 0xf0000000) == 0xf0000000)
 143     return ((insn & 0xfff00000) >> 20) & 0x7f;
 144
 145   return ((insn & 0xff000000) >> 24) & 0x7f;
 146 }
 147
 148 static INLINE void
 149 dispatch (insn, extension, length)
 150      uint32 insn;
 151      uint32 extension;
 152      int length;
 153 {
 154   struct hash_entry *h;
 155
 156   h = &hash_table[hash(insn)];
 157
 158   while ((insn & h->mask) != h->opcode
 159           || (length != h->ops->length))
 160     {
 161       if (!h->next)
 162         {
 163           (*mn10300_callback->printf_filtered) (mn10300_callback,
 164             "ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
 165           exit(1);
 166         }
 167       h = h->next;
 168     }
 169
 170
 171 #ifdef HASH_STAT
 172   h->count++;
 173 #endif
 174
 175   /* Now call the right function.  */
 176   (h->ops->func)(insn, extension);
 177   PC += length;
 178 }
 179
 180 /* FIXME These would more efficient to use than load_mem/store_mem,
 181    but need to be changed to use the memory map.  */
 182
 183 uint8
 184 get_byte (x)
 185      uint8 *x;
 186 {
 187   return *x;
 188 }
 189
 190 uint16
 191 get_half (x)
 192      uint8 *x;
 193 {
 194   uint8 *a = x;
 195   return (a[1] << 8) + (a[0]);
 196 }
 197
 198 uint32
 199 get_word (x)
 200       uint8 *x;
 201 {
 202   uint8 *a = x;
 203   return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
 204 }
 205
 206 void
 207 put_byte (addr, data)
 208      uint8 *addr;
 209      uint8 data;
 210 {
 211   uint8 *a = addr;
 212   a[0] = data;
 213 }
 214
 215 void
 216 put_half (addr, data)
 217      uint8 *addr;
 218      uint16 data;
 219 {
 220   uint8 *a = addr;
 221   a[0] = data & 0xff;
 222   a[1] = (data >> 8) & 0xff;
 223 }
 224
 225 void
 226 put_word (addr, data)
 227      uint8 *addr;
 228      uint32 data;
 229 {
 230   uint8 *a = addr;
 231   a[0] = data & 0xff;
 232   a[1] = (data >> 8) & 0xff;
 233   a[2] = (data >> 16) & 0xff;
 234   a[3] = (data >> 24) & 0xff;
 235 }
 236
 237 uint32
 238 load_mem (addr, len)
 239      SIM_ADDR addr;
 240      int len;
 241 {
 242   uint8 *p = addr + State.mem;
 243
 244   if (addr > max_mem)
 245     abort ();
 246
 247   switch (len)
 248     {
 249     case 1:
 250       return p[0];
 251     case 2:
 252       return p[1] << 8 | p[0];
 253     case 3:
 254       return p[2] << 16 | p[1] << 8 | p[0];
 255     case 4:
 256       return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
 257     default:
 258       abort ();
 259     }
 260 }
 261
 262 void
 263 store_mem (addr, len, data)
 264      SIM_ADDR addr;
 265      int len;
 266      uint32 data;
 267 {
 268   uint8 *p = addr + State.mem;
 269
 270   if (addr > max_mem)
 271     abort ();
 272
 273   switch (len)
 274     {
 275     case 1:
 276       p[0] = data;
 277       return;
 278     case 2:
 279       p[0] = data;
 280       p[1] = data >> 8;
 281       return;
 282     case 4:
 283       p[0] = data;
 284       p[1] = data >> 8;
 285       p[2] = data >> 16;
 286       p[3] = data >> 24;
 287       return;
 288     default:
 289       abort ();
 290     }
 291 }
 292
 293 void
 294 sim_size (power)
 295      int power;
 296
 297 {
 298   if (State.mem)
 299     free (State.mem);
 300
 301   max_mem = 1 << power;
 302   State.mem = (uint8 *) calloc (1,  1 << power);
 303   if (!State.mem)
 304     {
 305       (*mn10300_callback->printf_filtered) (mn10300_callback, "Allocation of main memory failed.\n");
 306       exit (1);
 307     }
 308 }
 309
 310 static void
 311 init_system ()
 312 {
 313   if (!State.mem)
 314     sim_size(19);
 315 }
 316
 317 int
 318 sim_write (sd, addr, buffer, size)
 319      SIM_DESC sd;
 320      SIM_ADDR addr;
 321      unsigned char *buffer;
 322      int size;
 323 {
 324   int i;
 325
 326   init_system ();
 327
 328   for (i = 0; i < size; i++)
 329     store_mem (addr + i, 1, buffer[i]);
 330
 331   return size;
 332 }
 333
 334 /* Compare two opcode table entries for qsort.  */
 335 static int
 336 compare_simops (arg1, arg2)
 337      const PTR arg1;
 338      const PTR arg2;
 339 {
 340   unsigned long code1 = ((struct simops *)arg1)->opcode;
 341   unsigned long code2 = ((struct simops *)arg2)->opcode;
 342
 343   if (code1 < code2)
 344     return -1;
 345   if (code2 < code1)
 346     return 1;
 347   return 0;
 348 }
 349
 350 SIM_DESC
 351 sim_open (kind,argv)
 352      SIM_OPEN_KIND kind;
 353      char **argv;
 354 {
 355   struct simops *s;
 356   struct hash_entry *h;
 357   char **p;
 358   int i;
 359
 360   /* Sort the opcode array from smallest opcode to largest.
 361      This will generally improve simulator performance as the smaller
 362      opcodes are generally preferred to the larger opcodes.  */
 363   for (i = 0, s = Simops; s->func; s++, i++)
 364     ;
 365   qsort (Simops, i, sizeof (Simops[0]), compare_simops);
 366
 367   sim_kind = kind;
 368   myname = argv[0];
 369
 370   for (p = argv + 1; *p; ++p)
 371     {
 372       if (strcmp (*p, "-E") == 0)
 373         ++p; /* ignore endian spec */
 374       else
 375 #ifdef DEBUG
 376       if (strcmp (*p, "-t") == 0)
 377         mn10300_debug = DEBUG;
 378       else
 379 #endif
 380         (*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",*p);
 381     }
 382
 383  /* put all the opcodes in the hash table */
 384   for (s = Simops; s->func; s++)
 385     {
 386       h = &hash_table[hash(s->opcode)];
 387
 388       /* go to the last entry in the chain */
 389       while (h->next)
 390         {
 391           /* Don't insert the same opcode more than once.  */
 392           if (h->opcode == s->opcode
 393               && h->mask == s->mask
 394               && h->ops == s)
 395             continue;
 396           else
 397             h = h->next;
 398         }
 399
 400       /* Don't insert the same opcode more than once.  */
 401       if (h->opcode == s->opcode
 402           && h->mask == s->mask
 403           && h->ops == s)
 404         continue;
 405
 406       if (h->ops)
 407         {
 408           h->next = calloc(1,sizeof(struct hash_entry));
 409           h = h->next;
 410         }
 411       h->ops = s;
 412       h->mask = s->mask;
 413       h->opcode = s->opcode;
 414 #if HASH_STAT
 415       h->count = 0;
 416 #endif
 417     }
 418
 419
 420   /* fudge our descriptor for now */
 421   return (SIM_DESC) 1;
 422 }
 423
 424
 425 void
 426 sim_close (sd, quitting)
 427      SIM_DESC sd;
 428      int quitting;
 429 {
 430   /* nothing to do */
 431 }
 432
 433 void
 434 sim_set_profile (n)
 435      int n;
 436 {
 437   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile %d\n", n);
 438 }
 439
 440 void
 441 sim_set_profile_size (n)
 442      int n;
 443 {
 444   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile_size %d\n", n);
 445 }
 446
 447 int
 448 sim_stop (sd)
 449      SIM_DESC sd;
 450 {
 451   return 0;
 452 }
 453
 454 void
 455 sim_resume (sd, step, siggnal)
 456      SIM_DESC sd;
 457      int step, siggnal;
 458 {
 459   uint32 inst;
 460   reg_t oldpc;
 461   struct hash_entry *h;
 462
 463   if (step)
 464     State.exception = SIGTRAP;
 465   else
 466     State.exception = 0;
 467
 468   do
 469     {
 470       unsigned long insn, extension;
 471
 472       /* Fetch the current instruction.  */
 473       inst = load_mem_big (PC, 2);
 474       oldpc = PC;
 475
 476       /* Using a giant case statement may seem like a waste because of the
 477         code/rodata size the table itself will consume.  However, using
 478         a giant case statement speeds up the simulator by 10-15% by avoiding
 479         cascading if/else statements or cascading case statements.  */
 480
 481       switch ((inst >> 8) & 0xff)
 482         {
 483           /* All the single byte insns except 0x80, 0x90, 0xa0, 0xb0
 484              which must be handled specially.  */
 485           case 0x00:
 486           case 0x04:
 487           case 0x08:
 488           case 0x0c:
 489           case 0x11:
 490           case 0x12:
 491           case 0x13:
 492           case 0x14:
 493           case 0x15:
 494           case 0x16:
 495           case 0x17:
 496           case 0x18:
 497           case 0x19:
 498           case 0x1a:
 499           case 0x1b:
 500           case 0x1c:
 501           case 0x1d:
 502           case 0x1e:
 503           case 0x1f:
 504           case 0x3c:
 505           case 0x3d:
 506           case 0x3e:
 507           case 0x3f:
 508           case 0x40:
 509           case 0x41:
 510           case 0x44:
 511           case 0x45:
 512           case 0x48:
 513           case 0x49:
 514           case 0x4c:
 515           case 0x4d:
 516           case 0x50:
 517           case 0x51:
 518           case 0x52:
 519           case 0x53:
 520           case 0x54:
 521           case 0x55:
 522           case 0x56:
 523           case 0x57:
 524           case 0x60:
 525           case 0x61:
 526           case 0x62:
 527           case 0x63:
 528           case 0x64:
 529           case 0x65:
 530           case 0x66:
 531           case 0x67:
 532           case 0x68:
 533           case 0x69:
 534           case 0x6a:
 535           case 0x6b:
 536           case 0x6c:
 537           case 0x6d:
 538           case 0x6e:
 539           case 0x6f:
 540           case 0x70:
 541           case 0x71:
 542           case 0x72:
 543           case 0x73:
 544           case 0x74:
 545           case 0x75:
 546           case 0x76:
 547           case 0x77:
 548           case 0x78:
 549           case 0x79:
 550           case 0x7a:
 551           case 0x7b:
 552           case 0x7c:
 553           case 0x7d:
 554           case 0x7e:
 555           case 0x7f:
 556           case 0xcb:
 557           case 0xd0:
 558           case 0xd1:
 559           case 0xd2:
 560           case 0xd3:
 561           case 0xd4:
 562           case 0xd5:
 563           case 0xd6:
 564           case 0xd7:
 565           case 0xd8:
 566           case 0xd9:
 567           case 0xda:
 568           case 0xdb:
 569           case 0xe0:
 570           case 0xe1:
 571           case 0xe2:
 572           case 0xe3:
 573           case 0xe4:
 574           case 0xe5:
 575           case 0xe6:
 576           case 0xe7:
 577           case 0xe8:
 578           case 0xe9:
 579           case 0xea:
 580           case 0xeb:
 581           case 0xec:
 582           case 0xed:
 583           case 0xee:
 584           case 0xef:
 585           case 0xff:
 586             insn = (inst >> 8) & 0xff;
 587             extension = 0;
 588             dispatch (insn, extension, 1);
 589             break;
 590
 591           /* Special cases where dm == dn is used to encode a different
 592              instruction.  */
 593           case 0x80:
 594           case 0x85:
 595           case 0x8a:
 596           case 0x8f:
 597           case 0x90:
 598           case 0x95:
 599           case 0x9a:
 600           case 0x9f:
 601           case 0xa0:
 602           case 0xa5:
 603           case 0xaa:
 604           case 0xaf:
 605           case 0xb0:
 606           case 0xb5:
 607           case 0xba:
 608           case 0xbf:
 609             insn = inst;
 610             extension = 0;
 611             dispatch (insn, extension, 2);
 612             break;
 613
 614           case 0x81:
 615           case 0x82:
 616           case 0x83:
 617           case 0x84:
 618           case 0x86:
 619           case 0x87:
 620           case 0x88:
 621           case 0x89:
 622           case 0x8b:
 623           case 0x8c:
 624           case 0x8d:
 625           case 0x8e:
 626           case 0x91:
 627           case 0x92:
 628           case 0x93:
 629           case 0x94:
 630           case 0x96:
 631           case 0x97:
 632           case 0x98:
 633           case 0x99:
 634           case 0x9b:
 635           case 0x9c:
 636           case 0x9d:
 637           case 0x9e:
 638           case 0xa1:
 639           case 0xa2:
 640           case 0xa3:
 641           case 0xa4:
 642           case 0xa6:
 643           case 0xa7:
 644           case 0xa8:
 645           case 0xa9:
 646           case 0xab:
 647           case 0xac:
 648           case 0xad:
 649           case 0xae:
 650           case 0xb1:
 651           case 0xb2:
 652           case 0xb3:
 653           case 0xb4:
 654           case 0xb6:
 655           case 0xb7:
 656           case 0xb8:
 657           case 0xb9:
 658           case 0xbb:
 659           case 0xbc:
 660           case 0xbd:
 661           case 0xbe:
 662             insn = (inst >> 8) & 0xff;
 663             extension = 0;
 664           dispatch (insn, extension, 1);
 665           break;
 666
 667           /* The two byte instructions.  */
 668           case 0x20:
 669           case 0x21:
 670           case 0x22:
 671           case 0x23:
 672           case 0x28:
 673           case 0x29:
 674           case 0x2a:
 675           case 0x2b:
 676           case 0x42:
 677           case 0x43:
 678           case 0x46:
 679           case 0x47:
 680           case 0x4a:
 681           case 0x4b:
 682           case 0x4e:
 683           case 0x4f:
 684           case 0x58:
 685           case 0x59:
 686           case 0x5a:
 687           case 0x5b:
 688           case 0x5c:
 689           case 0x5d:
 690           case 0x5e:
 691           case 0x5f:
 692           case 0xc0:
 693           case 0xc1:
 694           case 0xc2:
 695           case 0xc3:
 696           case 0xc4:
 697           case 0xc5:
 698           case 0xc6:
 699           case 0xc7:
 700           case 0xc8:
 701           case 0xc9:
 702           case 0xca:
 703           case 0xce:
 704           case 0xcf:
 705           case 0xf0:
 706           case 0xf1:
 707           case 0xf2:
 708           case 0xf3:
 709           case 0xf4:
 710           case 0xf5:
 711           case 0xf6:
 712             insn = inst;
 713             extension = 0;
 714             dispatch (insn, extension, 2);
 715             break;
 716
 717           /* The three byte insns with a 16bit operand in little endian
 718              format.  */
 719           case 0x01:
 720           case 0x02:
 721           case 0x03:
 722           case 0x05:
 723           case 0x06:
 724           case 0x07:
 725           case 0x09:
 726           case 0x0a:
 727           case 0x0b:
 728           case 0x0d:
 729           case 0x0e:
 730           case 0x0f:
 731           case 0x24:
 732           case 0x25:
 733           case 0x26:
 734           case 0x27:
 735           case 0x2c:
 736           case 0x2d:
 737           case 0x2e:
 738           case 0x2f:
 739           case 0x30:
 740           case 0x31:
 741           case 0x32:
 742           case 0x33:
 743           case 0x34:
 744           case 0x35:
 745           case 0x36:
 746           case 0x37:
 747           case 0x38:
 748           case 0x39:
 749           case 0x3a:
 750           case 0x3b:
 751           case 0xcc:
 752             insn = load_mem (PC, 1);
 753             insn <<= 16;
 754             insn |= load_mem (PC + 1, 2);
 755             extension = 0;
 756             dispatch (insn, extension, 3);
 757             break;
 758
 759           /* The three byte insns without 16bit operand.  */
 760           case 0xde:
 761           case 0xdf:
 762           case 0xf8:
 763           case 0xf9:
 764             insn = load_mem_big (PC, 3);
 765             extension = 0;
 766             dispatch (insn, extension, 3);
 767             break;
 768
 769           /* Four byte insns.  */
 770           case 0xfa:
 771           case 0xfb:
 772             if ((inst & 0xfffc) == 0xfaf0
 773                 || (inst & 0xfffc) == 0xfaf4
 774                 || (inst & 0xfffc) == 0xfaf8)
 775               insn = load_mem_big (PC, 4);
 776             else
 777               {
 778                 insn = inst;
 779                 insn <<= 16;
 780                 insn |= load_mem (PC + 2, 2);
 781                 extension = 0;
 782               }
 783             dispatch (insn, extension, 4);
 784             break;
 785
 786           /* Five byte insns.  */
 787           case 0xcd:
 788             insn = load_mem (PC, 1);
 789             insn <<= 24;
 790             insn |= (load_mem (PC + 1, 2) << 8);
 791             insn |= load_mem (PC + 3, 1);
 792             extension = load_mem (PC + 4, 1);
 793             dispatch (insn, extension, 5);
 794             break;
 795
 796           case 0xdc:
 797             insn = load_mem (PC, 1);
 798             insn <<= 24;
 799             extension = load_mem (PC + 1, 4);
 800             insn |= (extension & 0xffffff00) >> 8;
 801             extension &= 0xff;
 802             dispatch (insn, extension, 5);
 803             break;
 804
 805           /* Six byte insns.  */
 806           case 0xfc:
 807           case 0xfd:
 808             insn = (inst << 16);
 809             extension = load_mem (PC + 2, 4);
 810             insn |= ((extension & 0xffff0000) >> 16);
 811             extension &= 0xffff;
 812             dispatch (insn, extension, 6);
 813             break;
 814
 815           case 0xdd:
 816             insn = load_mem (PC, 1) << 24;
 817             extension = load_mem (PC + 1, 4);
 818             insn |= ((extension >> 8) & 0xffffff);
 819             extension = (extension & 0xff) << 16;
 820             extension |= load_mem (PC + 5, 1) << 8;
 821             extension |= load_mem (PC + 6, 1);
 822             dispatch (insn, extension, 7);
 823             break;
 824
 825           case 0xfe:
 826             insn = inst << 16;
 827             extension = load_mem (PC + 2, 4);
 828             insn |= ((extension >> 16) & 0xffff);
 829             extension <<= 8;
 830             extension &= 0xffff00;
 831             extension |= load_mem (PC + 6, 1);
 832             dispatch (insn, extension, 7);
 833             break;
 834
 835           default:
 836             abort ();
 837         }
 838     }
 839   while (!State.exception);
 840
 841 #ifdef HASH_STAT
 842   {
 843     int i;
 844     for (i = 0; i < MAX_HASH; i++)
 845       {
 846          struct hash_entry *h;
 847          h = &hash_table[i];
 848
 849          printf("hash 0x%x:\n", i);
 850
 851          while (h)
 852            {
 853              printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
 854              h = h->next;
 855            }
 856
 857          printf("\n\n");
 858       }
 859     fflush (stdout);
 860   }
 861 #endif
 862
 863 }
 864
 865 int
 866 sim_trace (sd)
 867      SIM_DESC sd;
 868 {
 869 #ifdef DEBUG
 870   mn10300_debug = DEBUG;
 871 #endif
 872   sim_resume (sd, 0, 0);
 873   return 1;
 874 }
 875
 876 void
 877 sim_info (sd, verbose)
 878      SIM_DESC sd;
 879      int verbose;
 880 {
 881   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n");
 882 }
 883
 884 SIM_RC
 885 sim_create_inferior (sd, argv, env)
 886      SIM_DESC sd;
 887      char **argv;
 888      char **env;
 889 {
 890   return SIM_RC_OK;
 891 }
 892
 893 void
 894 sim_kill (sd)
 895      SIM_DESC sd;
 896 {
 897   /* nothing to do */
 898 }
 899
 900 void
 901 sim_set_callbacks (sd, p)
 902      SIM_DESC sd;
 903      host_callback *p;
 904 {
 905   mn10300_callback = p;
 906 }
 907
 908 /* All the code for exiting, signals, etc needs to be revamped.
 909
 910    This is enough to get c-torture limping though.  */
 911
 912 void
 913 sim_stop_reason (sd, reason, sigrc)
 914      SIM_DESC sd;
 915      enum sim_stop *reason;
 916      int *sigrc;
 917 {
 918   *reason = sim_stopped;
 919   if (State.exception == SIGQUIT)
 920     *sigrc = 0;
 921   else
 922     *sigrc = State.exception;
 923 }
 924
 925 void
 926 sim_fetch_register (sd, rn, memory)
 927      SIM_DESC sd;
 928      int rn;
 929      unsigned char *memory;
 930 {
 931   put_word (memory, State.regs[rn]);
 932 }
 933
 934 void
 935 sim_store_register (sd, rn, memory)
 936      SIM_DESC sd;
 937      int rn;
 938      unsigned char *memory;
 939 {
 940   State.regs[rn] = get_word (memory);
 941 }
 942
 943 int
 944 sim_read (sd, addr, buffer, size)
 945      SIM_DESC sd;
 946      SIM_ADDR addr;
 947      unsigned char *buffer;
 948      int size;
 949 {
 950   int i;
 951   for (i = 0; i < size; i++)
 952     buffer[i] = load_mem (addr + i, 1);
 953
 954   return size;
 955 }
 956
 957 void
 958 sim_do_command (sd, cmd)
 959      SIM_DESC sd;
 960      char *cmd;
 961 {
 962   (*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd);
 963 }
 964
 965 SIM_RC
 966 sim_load (sd, prog, abfd, from_tty)
 967      SIM_DESC sd;
 968      char *prog;
 969      bfd *abfd;
 970      int from_tty;
 971 {
 972   extern bfd *sim_load_file (); /* ??? Don't know where this should live.  */
 973   bfd *prog_bfd;
 974
 975   prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
 976                             sim_kind == SIM_OPEN_DEBUG);
 977   if (prog_bfd == NULL)
 978     return SIM_RC_FAIL;
 979   PC = bfd_get_start_address (prog_bfd);
 980   if (abfd == NULL)
 981     bfd_close (prog_bfd);
 982   return SIM_RC_OK;
 983 }