1 //Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1_u/c_dsp32mac_pair_a1_u.dsp
2 // Spec Reference: dsp32mac pair a1 U
5 .include "testutils.inc"
10 // The result accumulated in A1 , and stored to a reg half
19 R7 = ( A1 += R1.L * R0.L ), A0 = R1.L * R0.L (FU);
21 R1 = ( A1 = R2.L * R3.L ), A0 = R2.H * R3.L (FU);
23 R3 = ( A1 = R7.L * R4.L ), A0 += R7.H * R4.H (FU);
25 R5 = ( A1 += R6.L * R5.L ), A0 += R6.L * R5.H (FU);
27 CHECKREG r0, 0x93545ABD;
28 CHECKREG r1, 0x00025D4F;
29 CHECKREG r2, 0xA8945679;
30 CHECKREG r3, 0x08B4E563;
31 CHECKREG r4, 0xEFB89569;
32 CHECKREG r5, 0x0D514922;
33 CHECKREG r6, 0x000C089D;
34 CHECKREG r7, 0x5A4E0EEB;
35 CHECKREG p1, 0x5A4E0EEB;
36 CHECKREG p2, 0x00025D4F;
37 CHECKREG p3, 0x08B4E563;
38 CHECKREG p4, 0x0D514922;
48 R5 = ( A1 += R1.L * R0.H ), A0 = R1.L * R0.L (FU);
50 R1 = ( A1 = R2.L * R3.H ), A0 = R2.H * R3.L (FU);
52 R3 = ( A1 = R4.L * R5.H ), A0 += R4.H * R5.H (FU);
54 R1 = ( A1 += R6.L * R7.H ), A0 += R6.L * R7.H (FU);
56 CHECKREG r0, 0x98464ABD;
57 CHECKREG r1, 0x0D7355F0;
58 CHECKREG r2, 0xA1146649;
59 CHECKREG r3, 0x0D682BDA;
60 CHECKREG r4, 0xEFBC1599;
61 CHECKREG r5, 0x9EEA5F8C;
62 CHECKREG r6, 0x200C001D;
63 CHECKREG r7, 0x628E0001;
64 CHECKREG p1, 0x9EEA5F8C;
65 CHECKREG p2, 0x00006649;
66 CHECKREG p3, 0x0D682BDA;
67 CHECKREG p4, 0x0D7355F0;
77 R5 = ( A1 += R7.H * R3.L ), A0 = R7.L * R3.L (FU);
79 R7 = ( A1 = R2.H * R4.L ), A0 -= R2.H * R4.L (FU);
81 R1 = ( A1 -= R0.H * R5.L ), A0 += R0.H * R5.H (FU);
83 R5 = ( A1 += R6.H * R1.L ), A0 += R6.L * R1.H (FU);
85 CHECKREG r0, 0x713A459D;
86 CHECKREG r1, 0x00000000;
87 CHECKREG r2, 0x7A145A79;
88 CHECKREG r3, 0x08A100A7;
89 CHECKREG r4, 0xEF9A156A;
90 CHECKREG r5, 0x00000000;
91 CHECKREG r6, 0x0003401D;
92 CHECKREG r7, 0x0A363048;
93 CHECKREG p1, 0x0DB6E392;
94 CHECKREG p2, 0x0A363048;
95 CHECKREG p3, 0x00000000;
96 CHECKREG p4, 0x00000000;
100 imm32 r2, 0xa9177679;
101 imm32 r3, 0xd0910777;
102 imm32 r4, 0xedb91579;
103 imm32 r5, 0xd235910b;
104 imm32 r6, 0x0d077999;
105 imm32 r7, 0x677e0709;
106 R1 = ( A1 += R5.H * R3.H ), A0 -= R5.L * R3.L (FU);
108 R3 = ( A1 = R2.H * R1.H ), A0 -= R2.H * R1.L (FU);
110 R5 = ( A1 = R7.H * R0.H ), A0 += R7.H * R0.H (FU);
112 R7 = ( A1 += R4.H * R6.H ), A0 += R4.L * R6.H (FU);
114 CHECKREG r0, 0x773489BD;
115 CHECKREG r1, 0xAB422005;
116 CHECKREG r2, 0xA9177679;
117 CHECKREG r3, 0x711DF4EE;
118 CHECKREG r4, 0xEDB91579;
119 CHECKREG r5, 0x30309798;
120 CHECKREG r6, 0x0D077999;
121 CHECKREG r7, 0x3C497CA7;
122 CHECKREG p1, 0xAB422005;
123 CHECKREG p2, 0x711DF4EE;
124 CHECKREG p3, 0x30309798;
125 CHECKREG p4, 0x3C497CA7;
127 imm32 r0, 0x83547abd;
128 imm32 r1, 0x88bc8ec7;
129 imm32 r2, 0xa8895679;
130 imm32 r3, 0x00080007;
131 imm32 r4, 0xe6b86569;
132 imm32 r5, 0x1A35860b;
133 imm32 r6, 0x000c896d;
134 imm32 r7, 0x67Be0096;
135 R7 = ( A1 += R1.L * R0.L ) (FU);
137 R1 = ( A1 = R2.H * R3.L ) (FU);
139 R3 = ( A1 -= R7.L * R4.H ) (FU);
141 R5 = ( A1 += R6.H * R5.H ) (FU);
143 CHECKREG r0, 0x83547ABD;
144 CHECKREG r1, 0x00049BBF;
145 CHECKREG r2, 0xA8895679;
146 CHECKREG r3, 0x00000000;
147 CHECKREG r4, 0xE6B86569;
148 CHECKREG r5, 0x00013A7C;
149 CHECKREG r6, 0x000C896D;
150 CHECKREG r7, 0x80BDBB92;
151 CHECKREG p1, 0x80BDBB92;
152 CHECKREG p2, 0x00049BBF;
153 CHECKREG p3, 0x00000000;
154 CHECKREG p4, 0x00013A7C;
156 imm32 r0, 0x9aa64abd;
157 imm32 r1, 0xa1baf4c7;
158 imm32 r2, 0xb114a649;
159 imm32 r3, 0x0b010005;
160 imm32 r4, 0xefbcdb69;
161 imm32 r5, 0x123501bb;
162 imm32 r6, 0x000c0d1b;
163 imm32 r7, 0x678e0d01;
164 R5 = ( A1 += R5.L * R0.H ) (M), A0 = R5.L * R0.L (FU);
166 R1 = ( A1 = R1.L * R3.H ) (M), A0 = R1.H * R3.L (FU);
168 R3 = ( A1 -= R2.L * R6.H ) (M), A0 += R2.H * R6.H (FU);
170 R1 = ( A1 += R4.L * R7.H ) (M), A0 += R4.L * R7.H (FU);
172 CHECKREG r0, 0x9AA64ABD;
173 CHECKREG r1, 0xF0BBA999;
174 CHECKREG r2, 0xB114A649;
175 CHECKREG r3, 0xFF88B65B;
176 CHECKREG r4, 0xEFBCDB69;
177 CHECKREG r5, 0x010CD7BE;
178 CHECKREG r6, 0x000C0D1B;
179 CHECKREG r7, 0x678E0D01;
180 CHECKREG p1, 0x010CD7BE;
181 CHECKREG p2, 0xFF8481C7;
182 CHECKREG p3, 0xFF88B65B;
183 CHECKREG p4, 0xF0BBA999;
185 imm32 r0, 0xd136459d;
186 imm32 r1, 0xabd69ec7;
187 imm32 r2, 0x71145679;
188 imm32 r3, 0xdd010007;
189 imm32 r4, 0xeddc1569;
190 imm32 r5, 0x122d010b;
191 imm32 r6, 0x00e3d01d;
192 imm32 r7, 0x678e0d61;
193 R5 = A1 , A0 = R1.L * R0.L (FU);
195 R7 = A1 , A0 = R2.H * R3.L (FU);
197 R1 = A1 , A0 += R4.H * R5.H (FU);
199 R5 = A1 , A0 += R6.L * R7.H (FU);
201 CHECKREG r0, 0xD136459D;
202 CHECKREG r1, 0xFFFFFFFF;
203 CHECKREG r2, 0x71145679;
204 CHECKREG r3, 0xDD010007;
205 CHECKREG r4, 0xEDDC1569;
206 CHECKREG r5, 0xFFFFFFFF;
207 CHECKREG r6, 0x00E3D01D;
208 CHECKREG r7, 0xFFFFFFFF;
209 CHECKREG p1, 0xF0BBA999;
210 CHECKREG p2, 0xF0BBA999;
211 CHECKREG p3, 0xF0BBA999;
212 CHECKREG p4, 0xF0BBA999;
214 imm32 r0, 0x125489bd;
215 imm32 r1, 0x91b5fec7;
216 imm32 r2, 0xa9145679;
217 imm32 r3, 0xd0910507;
218 imm32 r4, 0x34567859;
219 imm32 r5, 0xd2359105;
220 imm32 r6, 0x0d0c0999;
221 imm32 r7, 0x67de0009;
222 R1 = ( A1 += R5.H * R3.H ) (M,FU);
224 R3 = ( A1 -= R2.H * R1.H ) (M,FU);
226 R5 = ( A1 = R7.H * R0.H ) (M,FU);
228 R7 = ( A1 += R4.H * R6.H ) (M,FU);
230 CHECKREG r0, 0x125489BD;
231 CHECKREG r1, 0xCB6CC99E;
232 CHECKREG r2, 0xA9145679;
233 CHECKREG r3, 0x107E992E;
234 CHECKREG r4, 0x34567859;
235 CHECKREG r5, 0x076FB0D8;
236 CHECKREG r6, 0x0D0C0999;
237 CHECKREG r7, 0x0A1A82E0;
238 CHECKREG p1, 0xCB6CC99E;
239 CHECKREG p2, 0x107E992E;
240 CHECKREG p3, 0x076FB0D8;
241 CHECKREG p4, 0x0A1A82E0;