sim/testsuite/sim/bfin/c_loopsetup_nested_bot.s

   1 //Original:/testcases/core/c_loopsetup_nested_bot/c_loopsetup_nested_bot.dsp
   2 // Spec Reference: loopsetup nested same bottom
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9 INIT_R_REGS 0;
  10 ASTAT = r0;
  11
  12 //p0 = 2;
  13 P1 = 2;
  14 P2 = 4;
  15 P3 = 6;
  16 P4 = 8;
  17 P5 = 10;
  18 SP = 12;
  19 FP = 14;
  20
  21 R0 = 0x05;
  22 R1 = 0x10;
  23 R2 = 0x20;
  24 R3 = 0x32;
  25 R4 = 0x46 (X);
  26 R5 = 0x50 (X);
  27 R6 = 0x68 (X);
  28 R7 = 0x72 (X);
  29 LSETUP ( start1 , end1 ) LC0 = P1;
  30 start1: R0 += 1;
  31  R1 += -2;
  32 LSETUP ( start2 , end2 ) LC1 = P2;
  33 start2: R4 += 4;
  34 end2: R5 += -5;
  35  R3 += 1;
  36 end1: R2 += 3;
  37  R3 += 4;
  38 LSETUP ( start3 , end3 ) LC1 = P3;
  39 start3: R6 += 6;
  40 LSETUP ( start4 , end3 ) LC0 = P4 >> 1;
  41 start4: R0 += 1;
  42  R1 += -2;
  43 end4: R2 += 3;
  44  R3 += 4;
  45 end3: R7 += -7;
  46  R3 += 1;
  47 CHECKREG r0, 0x00000010;
  48 CHECKREG r1, 0xFFFFFFFA;
  49 CHECKREG r2, 0x00000041;
  50 CHECKREG r3, 0x0000005D;
  51 CHECKREG r4, 0x00000066;
  52 CHECKREG r5, 0x00000028;
  53 CHECKREG r6, 0x0000008C;
  54 CHECKREG r7, 0x00000033;
  55
  56 R0 = 0x05;
  57 R1 = 0x10;
  58 R2 = 0x14;
  59 R3 = 0x18;
  60 R4 = 0x20;
  61 R5 = 0x12;
  62 R6 = 0x24;
  63 R7 = 0x16;
  64 LSETUP ( start5 , end5 ) LC0 = P5;
  65 start5: R4 += 1;
  66 LSETUP ( start6 , end5 ) LC1 = SP >> 1;
  67 start6: R6 += 4;
  68 end6: R7 += -5;
  69  R3 += 6;
  70 end5: R5 += -2;
  71  R3 += 3;
  72 CHECKREG r0, 0x00000005;
  73 CHECKREG r1, 0x00000010;
  74 CHECKREG r2, 0x00000014;
  75 CHECKREG r3, 0x00000183;
  76 CHECKREG r4, 0x0000002A;
  77 CHECKREG r5, 0xFFFFFF9A;
  78 CHECKREG r6, 0x00000114;
  79 CHECKREG r7, 0xFFFFFEEA;
  80 LSETUP ( start7 , end7 ) LC0 = FP;
  81 start7: R4 += 4;
  82 end7: R5 += -5;
  83  R3 += 6;
  84 CHECKREG r0, 0x00000005;
  85 CHECKREG r1, 0x00000010;
  86 CHECKREG r2, 0x00000014;
  87 CHECKREG r3, 0x00000189;
  88 CHECKREG r4, 0x00000062;
  89 CHECKREG r5, 0xFFFFFF54;
  90 CHECKREG r6, 0x00000114;
  91 CHECKREG r7, 0xFFFFFEEA;
  92
  93 P1 = 04;
  94 P2 = 08;
  95 P3 = 10;
  96 P4 = 12;
  97 P5 = 14;
  98 SP = 16;
  99 FP = 18;
 100
 101 R0 = 0x05;
 102 R1 = 0x10;
 103 R2 = 0x12;
 104 R3 = 0x20;
 105 R4 = 0x18;
 106 R5 = 0x14;
 107 R6 = 0x16;
 108 R7 = 0x28;
 109 LSETUP ( start11 , end11 ) LC0 = P5;
 110 start11: R0 += 1;
 111  R1 += -1;
 112 LSETUP ( start15 , end15 ) LC1 = P1;
 113 start15: R4 += 1;
 114 end15: R5 += -1;
 115  R3 += 1;
 116 end11: R2 += 1;
 117  R3 += 1;
 118 LSETUP ( start13 , end12 ) LC0 = P2;
 119 start13: R6 += 1;
 120 LSETUP ( start12 , end12 ) LC1 = P3;
 121 start12: R4 += 1;
 122 end12: R5 += -1;
 123  R3 += 1;
 124 end13: R7 += -1;
 125  R3 += 1;
 126 CHECKREG r0, 0x00000013;
 127 CHECKREG r1, 0x00000002;
 128 CHECKREG r2, 0x00000020;
 129 CHECKREG r3, 0x00000031;
 130 CHECKREG r4, 0x0000005A;
 131 CHECKREG r5, 0xFFFFFFD2;
 132 CHECKREG r6, 0x00000017;
 133 CHECKREG r7, 0x00000027;
 134
 135 R0 = 0x05;
 136 R1 = 0x08;
 137 R2 = 0x12;
 138 R3 = 0x24;
 139 R4 = 0x18;
 140 R5 = 0x20;
 141 R6 = 0x32;
 142 R7 = 0x46 (X);
 143 LSETUP ( start14 , end14 ) LC0 = P4;
 144 start14: R0 += 1;
 145  R1 += -1;
 146 LSETUP ( start16 , end16 ) LC1 = SP;
 147 start16: R6 += 1;
 148 end16: R7 += -1;
 149  R3 += 1;
 150 LSETUP ( start17 , end14 ) LC1 = FP >> 1;
 151 start17: R4 += 1;
 152 end17: R5 += -1;
 153  R3 += 1;
 154 end14: R2 += 1;
 155  R3 += 1;
 156 CHECKREG r0, 0x00000011;
 157 CHECKREG r1, 0xFFFFFFFC;
 158 CHECKREG r2, 0x0000007E;
 159 CHECKREG r3, 0x0000009D;
 160 CHECKREG r4, 0x00000084;
 161 CHECKREG r5, 0xFFFFFFB4;
 162 CHECKREG r6, 0x000000F2;
 163 CHECKREG r7, 0xFFFFFF86;
 164
 165 pass