sim/testsuite/sim/bfin/se_bug_ui.S

   1 //Original:/proj/frio/dv/testcases/seq/se_bug_ui/se_bug_ui.dsp
   2 // Description: 16 bit special cases Undefined Instructions in Supervisor Mode
   3 # mach: bfin
   4 # sim: --environment operating
   5
   6 #include "test.h"
   7 .include "testutils.inc"
   8 start
   9
  10 //
  11 // Constants and Defines
  12 //
  13
  14 include(gen_int.inc)
  15 include(selfcheck.inc)
  16 include(std.inc)
  17 include(mmrs.inc)
  18 include(symtable.inc)
  19
  20 #ifndef STACKSIZE
  21 #define STACKSIZE 0x10   // change for how much stack you need
  22 #endif
  23 #ifndef ITABLE
  24 #define ITABLE 0xF0000000
  25 #endif
  26
  27 GEN_INT_INIT(ITABLE) // set location for interrupt table
  28
  29 //
  30 // Reset/Bootstrap Code
  31 //   (Here we should set the processor operating modes, initialize registers,
  32 //    etc.)
  33 //
  34
  35 BOOT:
  36 INIT_R_REGS(0);     // initialize general purpose regs
  37
  38 INIT_P_REGS(0);     // initialize the pointers
  39
  40 INIT_I_REGS(0);     // initialize the dsp address regs
  41 INIT_M_REGS(0);
  42 INIT_L_REGS(0);
  43 INIT_B_REGS(0);
  44
  45 CLI R1;           // inhibit events during MMR writes
  46
  47 LD32_LABEL(sp, USTACK);   // setup the user stack pointer
  48 USP = SP;
  49
  50 LD32_LABEL(sp, KSTACK);   // setup the kernel stack pointer
  51 FP = SP;        // and frame pointer
  52
  53 LD32(p0, EVT0);      // Setup Event Vectors and Handlers
  54
  55     P0 += 4;            // EVT0 not used (Emulation)
  56
  57     P0 += 4;            // EVT1 not used (Reset)
  58
  59 LD32_LABEL(r0, NHANDLE);  // NMI Handler (Int2)
  60     [ P0 ++ ] = R0;
  61
  62 LD32_LABEL(r0, XHANDLE);  // Exception Handler (Int3)
  63     [ P0 ++ ] = R0;
  64
  65     P0 += 4;            // EVT4 not used (Global Interrupt Enable)
  66
  67 LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
  68     [ P0 ++ ] = R0;
  69
  70 LD32_LABEL(r0, THANDLE);  // Timer Handler (Int6)
  71     [ P0 ++ ] = R0;
  72
  73 LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
  74     [ P0 ++ ] = R0;
  75
  76 LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
  77     [ P0 ++ ] = R0;
  78
  79 LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
  80     [ P0 ++ ] = R0;
  81
  82 LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
  83     [ P0 ++ ] = R0;
  84
  85 LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
  86     [ P0 ++ ] = R0;
  87
  88 LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
  89     [ P0 ++ ] = R0;
  90
  91 LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
  92     [ P0 ++ ] = R0;
  93
  94 LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
  95     [ P0 ++ ] = R0;
  96
  97 LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
  98     [ P0 ++ ] = R0;
  99
 100 LD32(p0, EVT_OVERRIDE);
 101     R0 = 0;
 102     [ P0 ++ ] = R0;
 103
 104     R1 = -1;     // Change this to mask interrupts (*)
 105 CSYNC;       // wait for MMR writes to finish
 106 STI R1;      // sync and reenable events (implicit write to IMASK)
 107
 108 DUMMY:
 109
 110     R0 = 0 (Z);
 111
 112 LT0 = r0;       // set loop counters to something deterministic
 113 LB0 = r0;
 114 LC0 = r0;
 115 LT1 = r0;
 116 LB1 = r0;
 117 LC1 = r0;
 118
 119 ASTAT = r0;     // reset other internal regs
 120 SYSCFG = r0;
 121 RETS = r0;      // prevent X's breaking LINK instruction
 122
 123 // The following code sets up the test for running in USER mode
 124
 125 LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
 126                         // ReturnFromInterrupt (RTI)
 127 RETI = r0;      // We need to load the return address
 128
 129 // Comment the following line for a USER Mode test
 130
 131 JUMP    STARTSUP;   // jump to code start for SUPERVISOR mode
 132
 133 RTI;
 134
 135 STARTSUP:
 136 LD32_LABEL(p1, BEGIN);
 137
 138 LD32(p0, EVT15);
 139
 140 CLI R1;   // inhibit events during write to MMR
 141     [ P0 ] = P1;  // IVG15 (General) handler (Int 15) load with start
 142 CSYNC;      // wait for it
 143 STI R1;     // reenable events with proper imask
 144
 145 RAISE 15;       // after we RTI, INT 15 should be taken
 146
 147 RTI;
 148
 149 //
 150 // The Main Program
 151 //
 152
 153 STARTUSER:
 154
 155 LINK 0;     // change for how much stack frame space you need.
 156
 157 JUMP BEGIN;
 158
 159 //*********************************************************************
 160
 161 BEGIN:
 162
 163                 // COMMENT the following line for USER MODE tests
 164     [ -- SP ] = RETI;  // enable interrupts in supervisor mode
 165
 166                 // **** YOUR CODE GOES HERE ****
 167
 168     // count of UI's will be in r5, which was initialized to 0 by header
 169
 170     .dw 0x41FD ;
 171     .dw 0x41FE ;
 172     .dw 0x41FF ;
 173     .dw 0x9040 ;
 174     .dw 0x9049 ;
 175     .dw 0x9052 ;
 176     .dw 0x905B ;
 177     .dw 0x9064 ;
 178     .dw 0x906D ;
 179     .dw 0x9076 ;
 180     .dw 0x907F ;
 181     .dw 0x90C0 ;
 182     .dw 0x90C9 ;
 183     .dw 0x90D2 ;
 184     .dw 0x90DB ;
 185     .dw 0x90E4 ;
 186     .dw 0x90ED ;
 187     .dw 0x90F6 ;
 188     .dw 0x90FF ;
 189     .dw 0x9180 ;
 190
 191
 192 CHECK_INIT_DEF(p0); //CHECK_INIT(p0, 0xFF7FFFFC);
 193                     // Xhandler counts all EXCAUSE = 0x21;
 194 CHECKREG(r5, 20); // count of all 16 bit UI's.
 195
 196 END:
 197 dbg_pass;            // End the test
 198
 199 //*********************************************************************
 200
 201 //
 202 // Handlers for Events
 203 //
 204
 205 NHANDLE:            // NMI Handler 2
 206 RTN;
 207
 208 XHANDLE:            // Exception Handler 3
 209                     // 16 bit illegal opcode handler - skips bad instruction
 210
 211     // handler MADE LEAN and destructive so test runs more quckly
 212     //   se_undefinedinstruction1.dsp tests using a "nice" handler
 213
 214 //    [--sp] = ASTAT; // save what we damage
 215 //    [--sp] = (r7 - r6);
 216     R7 = SEQSTAT;
 217     R7 <<= 26;
 218     R7 >>= 26;      // only want EXCAUSE
 219     R6 = 0x21;      // EXCAUSE 0x21 means I-Fetch Undefined Instruction
 220 CC = r7 == r6;
 221 IF CC JUMP UNDEFINEDINSTRUCTION;   // If EXCAUSE != 0x21 then leave
 222
 223     R6 = 0x22;      // Also accept illegal insn combo
 224 CC = r7 == r6;
 225 IF CC JUMP UNDEFINEDINSTRUCTION;   // If EXCAUSE != 0x21 then leave
 226
 227 dbg_fail;
 228
 229 UNDEFINEDINSTRUCTION:
 230     R7 = RETX;      // Fix up return address
 231
 232     R7 += 2;        // skip offending 16 bit instruction
 233
 234 RETX = r7;      // and put back in RETX
 235
 236     R5 += 1;        // Increment global counter
 237
 238 OUT:
 239 //    (r7 - r6) = [sp++];
 240 //    ASTAT = [sp++];
 241
 242 RTX;
 243
 244 HWHANDLE:           // HW Error Handler 5
 245 RTI;
 246
 247 THANDLE:            // Timer Handler 6
 248 RTI;
 249
 250 I7HANDLE:           // IVG 7 Handler
 251 RTI;
 252
 253 I8HANDLE:           // IVG 8 Handler
 254 RTI;
 255
 256 I9HANDLE:           // IVG 9 Handler
 257 RTI;
 258
 259 I10HANDLE:          // IVG 10 Handler
 260 RTI;
 261
 262 I11HANDLE:          // IVG 11 Handler
 263 RTI;
 264
 265 I12HANDLE:          // IVG 12 Handler
 266 RTI;
 267
 268 I13HANDLE:          // IVG 13 Handler
 269 RTI;
 270
 271 I14HANDLE:          // IVG 14 Handler
 272 RTI;
 273
 274 I15HANDLE:          // IVG 15 Handler
 275 RTI;
 276
 277
 278     // padding for the icache
 279
 280 EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0;
 281
 282 //
 283 // Data Segment
 284 //
 285
 286 .data
 287 DATA:
 288     .space (0x10);
 289
 290 // Stack Segments (Both Kernel and User)
 291
 292     .space (STACKSIZE);
 293 KSTACK:
 294
 295     .space (STACKSIZE);
 296 USTACK: