sim/v850/ChangeLog

   1 Tue Dec 31 18:11:13 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
   2
   3         * simops.c (OP_10007E0): Know that kill encodes the signal number
   4         via: 0xdead0000 | signal and turn it back into a signal.
   5
   6 Fri Dec 27 14:44:06 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
   7
   8         * v850_sim.h (SIG_V850_EXIT): Define as -1.
   9
  10         * interp.c (sim_open): Cast calloc function.
  11         (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the
  12         program exited with the appropriate exit code.
  13         (sim_set_interrupt): Declare buildargv.
  14
  15         * simops.c (OP_10007E0): Make exit signal normal exit.  Make time
  16         type correct and work on big endian systems.
  17
  18 Wed Nov 20 02:18:44 1996  Doug Evans  <dje@canuck.cygnus.com>
  19
  20         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
  21         (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
  22         * configure.in: Simplify using macros in ../common/aclocal.m4.
  23         Call AC_CHECK_HEADERS(unistd.h).
  24         * configure: Regenerated.
  25         * config.in: New file.
  26         * simops.c: #include "config.h".  #include <unistd.h> if present.
  27
  28 Sun Nov  3 23:02:54 1996  Stan Shebs  <shebs@andros.cygnus.com>
  29
  30         * v850_sim.h (State): New slots dummy_mem, pending_nmi.
  31         (EIPC, etc): New macros for system registers.
  32         * simops.c, interp.c: Use everywhere.
  33
  34         * interp.c: Add support for interrupts issued by interrupt
  35         generators, either PC- or time-based.  Controlled by simulator
  36         command "sim interrupt".
  37
  38         * interp.c: Add support for variable-size allocation of memory,
  39         via simulator command "sim memory-map".
  40         (map): Issue SIGSEGV for references to invalid memory regions.
  41
  42 Thu Oct 31 14:44:10 1996  Gavin Koch  <gavin@cygnus.com>
  43
  44         * simops.c: Include <sys/time.h> for struct timeval and
  45         struct timezone.
  46
  47 Wed Oct 30 08:49:10 1996  Jeffrey A Law  (law@cygnus.com)
  48
  49         * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
  50
  51         * simops.c (OP_10007E0): Handle SYS_time.
  52
  53 Tue Oct 29 14:22:55 1996  Jeffrey A Law  (law@cygnus.com)
  54
  55         * simops.c: Include <sys/stat.h>.
  56         (OP_10007E0): Handle SYS_stat.
  57
  58 Thu Oct 24 12:26:35 1996  Jeffrey A Law  (law@cygnus.com)
  59
  60         * simops.c (OP_10007E0): Don't declare errno.
  61
  62         * simops.c (OP_500): Mask off low bit in displacement
  63         for sld.w.
  64         (OP_501): Similarly.
  65
  66         * simops.c (OP_500): Fix displacement handling for sld.w.
  67         (OP_501): Similarly for sst.w.
  68
  69         * simops.c (trace_input): Remove all references to SEXT7.
  70         (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
  71         is zero extended for sst/sld instructions.
  72         * v850_sim.h (SEX7): Delete.  It's no longer needed (and it
  73         was incorrect anyway).
  74
  75 Thu Oct 24 10:33:33 1996  Stu Grossman  (grossman@critters.cygnus.com)
  76
  77         * Makefile.in:  Get rid of srcroot.  Set all INSTALL macros via
  78         autoconf.
  79         * gencode.c (write_opcodes):  Pad operands field to account for
  80         MSVC braindamage.
  81         * simops.c:  Include errno.h.  Exclude SYS_chown, since MSVC
  82         doesn't support it.  (Why is this here in the first place?!?)
  83         * v850_sim.h:  Get rid of 64 bit defs.  Also, get rid of #elif's.
  84         Change number of operands in struct simops from 9 to 6.  Define
  85         SIGTRAP and SIGQUIT for MSVC.
  86
  87 Tue Oct 15 16:19:51 1996  Stu Grossman  (grossman@critters.cygnus.com)
  88
  89         * interp.c (MEM_SIZE):  It's now bytes, not a power of 2.
  90         * (map):  Add support for external mem in the 1->2 meg range.
  91         Also, abort() when memory access is way out of bounds.  (Better to
  92         die than to give wrong result.  (This will be fixed later.))
  93         * (sim_size):  MEM_SIZE is now bytes, not shift factor.
  94
  95 Tue Oct  1 15:53:24 1996  Gavin Koch <gavin@cygnus.com>
  96
  97         * simops.c (trace_input): Swapped order of operands for output
  98         output of OP_IMM_REG.  Changed the fetching of the operands for
  99         OP_LOAD32, and OP_STORE32 to work like op-function.
 100
 101 Mon Sep 30 15:46:33 1996  Stu Grossman  (grossman@critters.cygnus.com)
 102
 103         * interp.c:  Move includes of remote-sim.h and callback.h to
 104         v850-sim.h.
 105         * (lookup_hash): Add PC to report of hash failure.
 106         * (map load_mem store_mem):  New memory subsystem.  Models V851
 107         memory system.
 108         * (sim_write sim_read):  Use new memory subsystem.
 109         * (sim_resume):  Don't load and save PC into EIPC anymore.  Needed
 110         to make user-defined traps work right.
 111         * simops.c (OP_*):  Use new memory subsystem.
 112         * (OP_14007E0 (reti)):  Implement reti.
 113         * (OP_14996E0 (trap)):  Implement user-defined traps.  Move I/O to
 114         trap 31.  Use new memory subsystem.
 115         * v850_sim.h:  Prototypes for load_mem, store_mem and map.  Use
 116         load_mem in RLW macro.
 117
 118 Fri Sep 27 18:34:09 1996  Stu Grossman  (grossman@critters.cygnus.com)
 119
 120         * gencode.c (write_opcodes):  Output hex values for opcode mask
 121         and patterns.
 122         * interp.c (sim_resume):  Save and restore PC from the appropriate
 123         register.
 124         * (sim_fetch_register sim_store_register):  Fix byte-order problem
 125         with reading and writing registers.
 126         * simops.c (OP_FFFF):  Implement pseudo-breakpoint insn.
 127
 128 Fri Sep 27 17:42:37 1996  Jeffrey A Law  (law@cygnus.com)
 129
 130         * simops.c (trace_input): Fix thinko.
 131
 132 Wed Sep 18 09:54:12 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 133
 134         * simops.c (exec_bfd): Rename from sim_bfd.
 135         (trace_input): Ditto.
 136
 137 Thu Sep 12 12:03:05 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 138
 139         * simops.c (trace_input): Use find_nearest_line to print line
 140         number, function name or file name of PC.
 141
 142 Wed Sep 11 16:44:37 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 143
 144         * simops.c: Add tracing support.  Use SEXTxx macros instead of
 145         doing hardwired shifts.
 146
 147         * configure.in (--enable-sim-cflags): Add switch to add additional
 148         flags to simulator buld.  If --enable-sim-cflags=trace, turn on
 149         tracing.
 150         * configure: Regenerate.
 151
 152         * Makefile.in: Don't require a VPATH capable make if configuring
 153         in the same directory.  Don't use CFLAGS for configuration flags.
 154         Add flags from --enable-sim-cflags.  Support canadian cross
 155         builds.  Rebuild whole simulator if include files change.
 156
 157         * interp.c (v850_debug): New global for debugging.
 158         (lookup_hash,sim_size,sim_set_profile): Use
 159         printf_filtered callback, instead of calling printf directly.
 160         (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
 161
 162         * v850_sim.h: Use limits.h to set the various sized types.
 163         (SEXT{5,7,16,22}): New macros.
 164
 165 Mon Sep  9 20:50:46 1996  Jeffrey A Law  (law@cygnus.com)
 166
 167         * interp.c (hash): Make this an inline function
 168         when compiling with GCC.  Simplify.
 169         * simpos.c: Explicitly include "sys/syscall.h".  Remove
 170         some #if 0'd code.  Enable more emulated syscalls.
 171
 172 Wed Sep  4 01:48:55 1996  Jeffrey A Law  (law@cygnus.com)
 173
 174         * interp.c: Fix sign bit handling for add and sub instructions.
 175
 176 Tue Sep  3 10:20:30 1996  Jeffrey A Law  (law@cygnus.com)
 177
 178         * gencode.c: Fix various indention & style problems.
 179         Remove test code.  Remove #if 0 code.
 180         * interp.c: Provide prototypes for all static functions.
 181         Fix minor indention problems.
 182         (sim_open, sim_resume): Remove unused variables.
 183         (sim_read): Return type is "int".
 184         * simops.c: Remove unused variables.
 185         (divh): Make result of divide-by-zero zero.
 186         (setf): Initialize result to keep compiler quiet.
 187         (sar instructions): These just clear the overflow bit.
 188         * v850_sim.h: Provide prototypes for put_byte, put_half
 189         and put_word.
 190
 191         * interp.c: OP should be an array of 32bit operands!
 192         (v850_callback): Declare.
 193         (do_format_5): Fix extraction of OP[0].
 194         (sim_size): Remove debugging printf.
 195         (sim_set_callbacks): Do something useful.
 196         (sim_stop_reason): Gross hacks to get c-torture running.
 197         * simops.c: Simplify code for computing targets of bCC
 198         insns.   Invert 's' bit if 'ov' bit is set for some
 199         instructions.  Fix 'cy' bit handling for numerous
 200         instructions.  Make the simulator stop when a halt
 201         instruction is encountered.  Very crude support for
 202         emulated syscalls (trap 0).
 203         * v850_sim.h: Include "callback.h" and declare
 204         v850_callback.  Items in the operand array are 32bits.
 205
 206 Sun Sep  1 22:35:35 1996  Jeffrey A Law  (law@cygnus.com)
 207
 208         * interp.c (sim_resume): Fix code to check for a format 3
 209         opcode.
 210         * simops.c: bCC insns only argument is a constant, not a
 211         register value (duh...)
 212
 213 Fri Aug 30 10:33:49 1996  Jeffrey A Law  (law@cygnus.com)
 214
 215         * simops.c: Fix "not1" and "set1".
 216
 217         * simops.c: Don't forget to initialize temp for
 218         "ld.h" and "ld.w"
 219
 220         * interp.c: Remove various debugging printfs.
 221
 222         * simops.c: Fix satadd, satsub boundary case handling.
 223
 224         * interp.c (hash): Fix.
 225         * interp.c (do_format_8): Get operands correctly and
 226         call the target function.
 227         * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
 228
 229 Thu Aug 29 13:53:29 1996  Jeffrey A Law  (law@cygnus.com)
 230
 231         * interp.c (do_format_4): Get operands correctly and
 232         call the target function.
 233         * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
 234         "sst.h", and "sst.w".
 235
 236         * v850_sim.h: The V850 doesn't have split I&D spaces.  Change
 237         accordingly.  Remove many unused definitions.
 238         * interp.c: The V850 doesn't have split I&D spaces.  Change
 239         accordingly.
 240         (get_longlong, get_longword, get_word): Deleted.
 241         (write_longlong, write_longword, write_word): Deleted.
 242         (get_operands): Deleted.
 243         (get_byte, get_half, get_word): New functions.
 244         (put_byte, put_half, put_word): New functions.
 245         * simops.c: Remove unused functions.  Rough cut at
 246         "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
 247
 248         * v850_sim.h (struct _state): Remove "psw" field.  Add
 249         "sregs" field.
 250         (PSW): Remove bogus definition.
 251         * simops.c: Change condition code handling to use the psw
 252         register within the sregs array.  Handle "ldsr" and "stsr".
 253
 254         * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
 255
 256         * interp.c (do_format_5): Get operands correctly and
 257         call the target function.
 258         (sim_resume): Don't do a PC update for format 5 instructions.
 259         * simops.c: Handle "jarl" and "jmp" instructions.
 260
 261         * simops.c: Fix minor typos.  Handle "cmp", "setf", "tst"
 262         "di", and "ei" instructions correctly.
 263
 264         * interp.c (do_format_3): Get operands correctly and call
 265         the target function.
 266         * simops.c: Handle bCC instructions.
 267
 268         * simops.c: Add condition code handling to shift insns.
 269         Fix minor typos in condition code handling for other insns.
 270
 271         * Makefile.in: Fix typo.
 272         * simops.c: Add condition code handling to "sub" "subr" and
 273         "divh" instructions.
 274
 275         * interp.c (hash): Update to be more accurate.
 276         (lookup_hash): Call hash rather than computing the hash
 277         code here.
 278         (do_format_1_2): Handle format 1 and format 2 instructions.
 279         Get operands correctly and call the target function.
 280         (do_format_6): Get operands correctly and call the target
 281         function.
 282         (do_formats_9_10): Rough cut so shift ops will work.
 283         (sim_resume): Tweak to deal with format 1 and format 2
 284         handling in a single funtion.  Don't update the PC
 285         for format 3 insns.  Fix typos.
 286         * simops.c: Slightly reorganize.  Add condition code handling
 287         to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
 288         and "not" instructions.
 289         * v850_sim.h (reg_t): Registers are 32bits.
 290         (_state): The V850 has 32 general registers.  Add a 32bit
 291         psw and pc register too.  Add accessor macros
 292
 293         * Makefile.in, interp.c, v850_sim.h: Bring over endianness
 294         changes from the d10v simulator.
 295
 296         * simops.c: Add shift support.
 297
 298         * simops.c: Add multiply & divide support.  Abort for system
 299         instructions.
 300
 301         * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
 302         and subr.  No condition codes yet.
 303
 304 Wed Aug 28 13:53:22 1996  Jeffrey A Law  (law@cygnus.com)
 305
 306         * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
 307         gencode.c, interp.c, simops.c: Created.
 308