1 /* Copyright (C) 2001-2021 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
22 #include "ucontext_i.h"
24 /* __getcontext (ucontext_t *ucp)
26 Saves the machine context in UCP such that when it is activated,
27 it appears as if __getcontext() returned again. The only difference
28 is that on a first return, r9 contains 1 and on a subsequent
29 return, it contains 0.
31 This implementation in intended to be used for *synchronous* context
32 switches only. Therefore, it does not have to save anything
33 other than the PRESERVED state. */
38 alloc r11 = ar.pfs, 1, 0, 4, 0
40 // sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask):
45 flushrs // save dirty partition on rbs
49 mov out3 = 8 // sizeof kernel sigset_t
50 DO_CALL(__NR_rt_sigprocmask)
54 add r2 = SC_GR+1*8, r32
61 add r3 = SC_GR+4*8, r32
64 .mem.offset 0,0; st8.spill [r2] = r1, (5*8 - 1*8)
65 .mem.offset 8,0; st8.spill [r3] = r4, 16
68 .mem.offset 0,0; st8.spill [r2] = r5, 16
69 .mem.offset 8,0; st8.spill [r3] = r6, 48
72 .mem.offset 0,0; st8.spill [r2] = r7, (SC_FR+2*16-(SC_GR+7*8))
73 .mem.offset 8,0; st8.spill [r3] = sp, (SC_FR+3*16-(SC_GR+12*8))
75 mov.m ar.rsc = rTMP // put RSE into enforced lazy mode
80 mov.m ar.rsc = rRSC // restore RSE mode
84 * Rotate NaT bits by rPOS positions to the right:
86 stf.spill [r2] = f2, 32
87 stf.spill [r3] = f3, 32
88 add rPOS = SC_GR, r32 // rPOS <- &sc_gr[0]
90 stf.spill [r2] = f4, (16*16-4*16)
91 stf.spill [r3] = f5, (17*16-5*16)
92 extr.u rPOS = rPOS, 3, 6 // get NaT bit number for r0
94 stf.spill [r2] = f16, 32
95 stf.spill [r3] = f17, 32
98 stf.spill [r2] = f18, 32
99 stf.spill [r3] = f19, 32
100 shr.u rTMP = rNAT, rPOS
102 stf.spill [r2] = f20, 32
103 stf.spill [r3] = f21, 32
104 shl rNAT = rNAT, rCPOS
106 stf.spill [r2] = f22, 32
107 stf.spill [r3] = f23, 32
110 stf.spill [r2] = f24, 32
111 stf.spill [r3] = f25, 32
114 stf.spill [r2] = f26, 32
115 stf.spill [r3] = f27, 32
118 stf.spill [r2] = f28, 32
119 stf.spill [r3] = f29, 32
122 stf.spill [r2] = f30, 32
123 stf.spill [r3] = f31, 32
126 mov ar.unat = rUNAT // we're done spilling integer regs; restore caller's UNaT
130 st8 [r2] = rNAT, (SC_RNAT-SC_NAT)
131 st8 [r3] = rBSP, (SC_UNAT-SC_BSP)
134 st8 [r2] = rRNAT, (SC_FPSR-SC_RNAT)
135 st8 [r3] = rUNAT, (SC_PFS-SC_UNAT)
138 st8 [r2] = rFPSR, (SC_LC-SC_FPSR)
139 st8 [r3] = rPFS, (SC_PR-SC_PFS)
142 st8 [r2] = rLC, (SC_BR+0*8-SC_LC)
143 st8 [r3] = rPR, (SC_BR+1*8-SC_PR)
157 weak_alias (__getcontext, getcontext)