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git.ipfire.org Git - thirdparty/qemu.git/blob - target/sparc/fop_helper.c
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
22 #include "exec/exec-all.h"
23 #include "exec/helper-proto.h"
24 #include "fpu/softfloat.h"
26 static inline float128
f128_in(Int128 i
)
37 static inline Int128
f128_ret(float128 f
)
48 static void check_ieee_exceptions(CPUSPARCState
*env
, uintptr_t ra
)
50 target_ulong status
= get_float_exception_flags(&env
->fp_status
);
53 if (unlikely(status
)) {
54 /* Keep exception flags clear for next time. */
55 set_float_exception_flags(0, &env
->fp_status
);
57 /* Copy IEEE 754 flags into FSR */
58 if (status
& float_flag_invalid
) {
61 if (status
& float_flag_overflow
) {
64 if (status
& float_flag_underflow
) {
67 if (status
& float_flag_divbyzero
) {
70 if (status
& float_flag_inexact
) {
74 if (cexc
& (env
->fsr
>> FSR_TEM_SHIFT
)) {
75 /* Unmasked exception, generate an IEEE trap. */
76 env
->fsr_cexc_ftt
= cexc
| FSR_FTT_IEEE_EXCP
;
77 cpu_raise_exception_ra(env
, TT_FP_EXCP
, ra
);
80 /* Accumulate exceptions */
81 env
->fsr
|= cexc
<< FSR_AEXC_SHIFT
;
84 /* No trap, so FTT is cleared. */
85 env
->fsr_cexc_ftt
= cexc
;
88 float32
helper_fadds(CPUSPARCState
*env
, float32 src1
, float32 src2
)
90 float32 ret
= float32_add(src1
, src2
, &env
->fp_status
);
91 check_ieee_exceptions(env
, GETPC());
95 float32
helper_fsubs(CPUSPARCState
*env
, float32 src1
, float32 src2
)
97 float32 ret
= float32_sub(src1
, src2
, &env
->fp_status
);
98 check_ieee_exceptions(env
, GETPC());
102 float32
helper_fmuls(CPUSPARCState
*env
, float32 src1
, float32 src2
)
104 float32 ret
= float32_mul(src1
, src2
, &env
->fp_status
);
105 check_ieee_exceptions(env
, GETPC());
109 float32
helper_fdivs(CPUSPARCState
*env
, float32 src1
, float32 src2
)
111 float32 ret
= float32_div(src1
, src2
, &env
->fp_status
);
112 check_ieee_exceptions(env
, GETPC());
116 float64
helper_faddd(CPUSPARCState
*env
, float64 src1
, float64 src2
)
118 float64 ret
= float64_add(src1
, src2
, &env
->fp_status
);
119 check_ieee_exceptions(env
, GETPC());
123 float64
helper_fsubd(CPUSPARCState
*env
, float64 src1
, float64 src2
)
125 float64 ret
= float64_sub(src1
, src2
, &env
->fp_status
);
126 check_ieee_exceptions(env
, GETPC());
130 float64
helper_fmuld(CPUSPARCState
*env
, float64 src1
, float64 src2
)
132 float64 ret
= float64_mul(src1
, src2
, &env
->fp_status
);
133 check_ieee_exceptions(env
, GETPC());
137 float64
helper_fdivd(CPUSPARCState
*env
, float64 src1
, float64 src2
)
139 float64 ret
= float64_div(src1
, src2
, &env
->fp_status
);
140 check_ieee_exceptions(env
, GETPC());
144 Int128
helper_faddq(CPUSPARCState
*env
, Int128 src1
, Int128 src2
)
146 float128 ret
= float128_add(f128_in(src1
), f128_in(src2
), &env
->fp_status
);
147 check_ieee_exceptions(env
, GETPC());
148 return f128_ret(ret
);
151 Int128
helper_fsubq(CPUSPARCState
*env
, Int128 src1
, Int128 src2
)
153 float128 ret
= float128_sub(f128_in(src1
), f128_in(src2
), &env
->fp_status
);
154 check_ieee_exceptions(env
, GETPC());
155 return f128_ret(ret
);
158 Int128
helper_fmulq(CPUSPARCState
*env
, Int128 src1
, Int128 src2
)
160 float128 ret
= float128_mul(f128_in(src1
), f128_in(src2
), &env
->fp_status
);
161 check_ieee_exceptions(env
, GETPC());
162 return f128_ret(ret
);
165 Int128
helper_fdivq(CPUSPARCState
*env
, Int128 src1
, Int128 src2
)
167 float128 ret
= float128_div(f128_in(src1
), f128_in(src2
), &env
->fp_status
);
168 check_ieee_exceptions(env
, GETPC());
169 return f128_ret(ret
);
172 float64
helper_fsmuld(CPUSPARCState
*env
, float32 src1
, float32 src2
)
174 float64 ret
= float64_mul(float32_to_float64(src1
, &env
->fp_status
),
175 float32_to_float64(src2
, &env
->fp_status
),
177 check_ieee_exceptions(env
, GETPC());
181 Int128
helper_fdmulq(CPUSPARCState
*env
, float64 src1
, float64 src2
)
183 float128 ret
= float128_mul(float64_to_float128(src1
, &env
->fp_status
),
184 float64_to_float128(src2
, &env
->fp_status
),
186 check_ieee_exceptions(env
, GETPC());
187 return f128_ret(ret
);
190 /* Integer to float conversion. */
191 float32
helper_fitos(CPUSPARCState
*env
, int32_t src
)
193 float32 ret
= int32_to_float32(src
, &env
->fp_status
);
194 check_ieee_exceptions(env
, GETPC());
198 float64
helper_fitod(CPUSPARCState
*env
, int32_t src
)
200 float64 ret
= int32_to_float64(src
, &env
->fp_status
);
201 check_ieee_exceptions(env
, GETPC());
205 Int128
helper_fitoq(CPUSPARCState
*env
, int32_t src
)
207 float128 ret
= int32_to_float128(src
, &env
->fp_status
);
208 check_ieee_exceptions(env
, GETPC());
209 return f128_ret(ret
);
212 #ifdef TARGET_SPARC64
213 float32
helper_fxtos(CPUSPARCState
*env
, int64_t src
)
215 float32 ret
= int64_to_float32(src
, &env
->fp_status
);
216 check_ieee_exceptions(env
, GETPC());
220 float64
helper_fxtod(CPUSPARCState
*env
, int64_t src
)
222 float64 ret
= int64_to_float64(src
, &env
->fp_status
);
223 check_ieee_exceptions(env
, GETPC());
227 Int128
helper_fxtoq(CPUSPARCState
*env
, int64_t src
)
229 float128 ret
= int64_to_float128(src
, &env
->fp_status
);
230 check_ieee_exceptions(env
, GETPC());
231 return f128_ret(ret
);
235 /* floating point conversion */
236 float32
helper_fdtos(CPUSPARCState
*env
, float64 src
)
238 float32 ret
= float64_to_float32(src
, &env
->fp_status
);
239 check_ieee_exceptions(env
, GETPC());
243 float64
helper_fstod(CPUSPARCState
*env
, float32 src
)
245 float64 ret
= float32_to_float64(src
, &env
->fp_status
);
246 check_ieee_exceptions(env
, GETPC());
250 float32
helper_fqtos(CPUSPARCState
*env
, Int128 src
)
252 float32 ret
= float128_to_float32(f128_in(src
), &env
->fp_status
);
253 check_ieee_exceptions(env
, GETPC());
257 Int128
helper_fstoq(CPUSPARCState
*env
, float32 src
)
259 float128 ret
= float32_to_float128(src
, &env
->fp_status
);
260 check_ieee_exceptions(env
, GETPC());
261 return f128_ret(ret
);
264 float64
helper_fqtod(CPUSPARCState
*env
, Int128 src
)
266 float64 ret
= float128_to_float64(f128_in(src
), &env
->fp_status
);
267 check_ieee_exceptions(env
, GETPC());
271 Int128
helper_fdtoq(CPUSPARCState
*env
, float64 src
)
273 float128 ret
= float64_to_float128(src
, &env
->fp_status
);
274 check_ieee_exceptions(env
, GETPC());
275 return f128_ret(ret
);
278 /* Float to integer conversion. */
279 int32_t helper_fstoi(CPUSPARCState
*env
, float32 src
)
281 int32_t ret
= float32_to_int32_round_to_zero(src
, &env
->fp_status
);
282 check_ieee_exceptions(env
, GETPC());
286 int32_t helper_fdtoi(CPUSPARCState
*env
, float64 src
)
288 int32_t ret
= float64_to_int32_round_to_zero(src
, &env
->fp_status
);
289 check_ieee_exceptions(env
, GETPC());
293 int32_t helper_fqtoi(CPUSPARCState
*env
, Int128 src
)
295 int32_t ret
= float128_to_int32_round_to_zero(f128_in(src
),
297 check_ieee_exceptions(env
, GETPC());
301 #ifdef TARGET_SPARC64
302 int64_t helper_fstox(CPUSPARCState
*env
, float32 src
)
304 int64_t ret
= float32_to_int64_round_to_zero(src
, &env
->fp_status
);
305 check_ieee_exceptions(env
, GETPC());
309 int64_t helper_fdtox(CPUSPARCState
*env
, float64 src
)
311 int64_t ret
= float64_to_int64_round_to_zero(src
, &env
->fp_status
);
312 check_ieee_exceptions(env
, GETPC());
316 int64_t helper_fqtox(CPUSPARCState
*env
, Int128 src
)
318 int64_t ret
= float128_to_int64_round_to_zero(f128_in(src
),
320 check_ieee_exceptions(env
, GETPC());
325 float32
helper_fsqrts(CPUSPARCState
*env
, float32 src
)
327 float32 ret
= float32_sqrt(src
, &env
->fp_status
);
328 check_ieee_exceptions(env
, GETPC());
332 float64
helper_fsqrtd(CPUSPARCState
*env
, float64 src
)
334 float64 ret
= float64_sqrt(src
, &env
->fp_status
);
335 check_ieee_exceptions(env
, GETPC());
339 Int128
helper_fsqrtq(CPUSPARCState
*env
, Int128 src
)
341 float128 ret
= float128_sqrt(f128_in(src
), &env
->fp_status
);
342 check_ieee_exceptions(env
, GETPC());
343 return f128_ret(ret
);
346 #define GEN_FCMP(name, size, FS, E) \
347 target_ulong glue(helper_, name) (CPUSPARCState *env, \
348 Int128 src1, Int128 src2) \
350 float128 reg1 = f128_in(src1); \
351 float128 reg2 = f128_in(src2); \
355 ret = glue(size, _compare)(reg1, reg2, &env->fp_status); \
357 ret = glue(size, _compare_quiet)(reg1, reg2, \
360 check_ieee_exceptions(env, GETPC()); \
363 case float_relation_unordered: \
364 fsr |= (FSR_FCC1 | FSR_FCC0) << FS; \
367 case float_relation_less: \
368 fsr &= ~(FSR_FCC1) << FS; \
369 fsr |= FSR_FCC0 << FS; \
371 case float_relation_greater: \
372 fsr &= ~(FSR_FCC0) << FS; \
373 fsr |= FSR_FCC1 << FS; \
376 fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \
381 #define GEN_FCMP_T(name, size, FS, E) \
382 target_ulong glue(helper_, name)(CPUSPARCState *env, size src1, size src2)\
387 ret = glue(size, _compare)(src1, src2, &env->fp_status); \
389 ret = glue(size, _compare_quiet)(src1, src2, \
392 check_ieee_exceptions(env, GETPC()); \
395 case float_relation_unordered: \
396 fsr |= (FSR_FCC1 | FSR_FCC0) << FS; \
398 case float_relation_less: \
399 fsr &= ~(FSR_FCC1 << FS); \
400 fsr |= FSR_FCC0 << FS; \
402 case float_relation_greater: \
403 fsr &= ~(FSR_FCC0 << FS); \
404 fsr |= FSR_FCC1 << FS; \
407 fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \
413 GEN_FCMP_T(fcmps
, float32
, 0, 0);
414 GEN_FCMP_T(fcmpd
, float64
, 0, 0);
416 GEN_FCMP_T(fcmpes
, float32
, 0, 1);
417 GEN_FCMP_T(fcmped
, float64
, 0, 1);
419 GEN_FCMP(fcmpq
, float128
, 0, 0);
420 GEN_FCMP(fcmpeq
, float128
, 0, 1);
422 #ifdef TARGET_SPARC64
423 GEN_FCMP_T(fcmps_fcc1
, float32
, 22, 0);
424 GEN_FCMP_T(fcmpd_fcc1
, float64
, 22, 0);
425 GEN_FCMP(fcmpq_fcc1
, float128
, 22, 0);
427 GEN_FCMP_T(fcmps_fcc2
, float32
, 24, 0);
428 GEN_FCMP_T(fcmpd_fcc2
, float64
, 24, 0);
429 GEN_FCMP(fcmpq_fcc2
, float128
, 24, 0);
431 GEN_FCMP_T(fcmps_fcc3
, float32
, 26, 0);
432 GEN_FCMP_T(fcmpd_fcc3
, float64
, 26, 0);
433 GEN_FCMP(fcmpq_fcc3
, float128
, 26, 0);
435 GEN_FCMP_T(fcmpes_fcc1
, float32
, 22, 1);
436 GEN_FCMP_T(fcmped_fcc1
, float64
, 22, 1);
437 GEN_FCMP(fcmpeq_fcc1
, float128
, 22, 1);
439 GEN_FCMP_T(fcmpes_fcc2
, float32
, 24, 1);
440 GEN_FCMP_T(fcmped_fcc2
, float64
, 24, 1);
441 GEN_FCMP(fcmpeq_fcc2
, float128
, 24, 1);
443 GEN_FCMP_T(fcmpes_fcc3
, float32
, 26, 1);
444 GEN_FCMP_T(fcmped_fcc3
, float64
, 26, 1);
445 GEN_FCMP(fcmpeq_fcc3
, float128
, 26, 1);
450 target_ulong
cpu_get_fsr(CPUSPARCState
*env
)
452 target_ulong fsr
= env
->fsr
| env
->fsr_cexc_ftt
;
454 /* VER is kept completely separate until re-assembly. */
455 fsr
|= env
->def
.fpu_version
;
460 target_ulong
helper_get_fsr(CPUSPARCState
*env
)
462 return cpu_get_fsr(env
);
465 static void set_fsr_nonsplit(CPUSPARCState
*env
, target_ulong fsr
)
469 env
->fsr
= fsr
& ~(FSR_VER_MASK
| FSR_CEXC_MASK
| FSR_FTT_MASK
);
471 switch (fsr
& FSR_RD_MASK
) {
473 rnd_mode
= float_round_nearest_even
;
477 rnd_mode
= float_round_to_zero
;
480 rnd_mode
= float_round_up
;
483 rnd_mode
= float_round_down
;
486 set_float_rounding_mode(rnd_mode
, &env
->fp_status
);
489 void cpu_put_fsr(CPUSPARCState
*env
, target_ulong fsr
)
491 env
->fsr_cexc_ftt
= fsr
& (FSR_CEXC_MASK
| FSR_FTT_MASK
);
492 set_fsr_nonsplit(env
, fsr
);
495 void helper_set_fsr_noftt(CPUSPARCState
*env
, target_ulong fsr
)
497 env
->fsr_cexc_ftt
&= FSR_FTT_MASK
;
498 env
->fsr_cexc_ftt
|= fsr
& FSR_CEXC_MASK
;
499 set_fsr_nonsplit(env
, fsr
);