target/sparc/int32_helper.c

   1 /*
   2  * Sparc32 interrupt helpers
   3  *
   4  *  Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qemu/main-loop.h"
  22 #include "cpu.h"
  23 #include "trace.h"
  24 #include "exec/log.h"
  25 #include "sysemu/runstate.h"
  26
  27
  28 static const char * const excp_names[0x80] = {
  29     [TT_TFAULT] = "Instruction Access Fault",
  30     [TT_ILL_INSN] = "Illegal Instruction",
  31     [TT_PRIV_INSN] = "Privileged Instruction",
  32     [TT_NFPU_INSN] = "FPU Disabled",
  33     [TT_WIN_OVF] = "Window Overflow",
  34     [TT_WIN_UNF] = "Window Underflow",
  35     [TT_UNALIGNED] = "Unaligned Memory Access",
  36     [TT_FP_EXCP] = "FPU Exception",
  37     [TT_DFAULT] = "Data Access Fault",
  38     [TT_TOVF] = "Tag Overflow",
  39     [TT_EXTINT | 0x1] = "External Interrupt 1",
  40     [TT_EXTINT | 0x2] = "External Interrupt 2",
  41     [TT_EXTINT | 0x3] = "External Interrupt 3",
  42     [TT_EXTINT | 0x4] = "External Interrupt 4",
  43     [TT_EXTINT | 0x5] = "External Interrupt 5",
  44     [TT_EXTINT | 0x6] = "External Interrupt 6",
  45     [TT_EXTINT | 0x7] = "External Interrupt 7",
  46     [TT_EXTINT | 0x8] = "External Interrupt 8",
  47     [TT_EXTINT | 0x9] = "External Interrupt 9",
  48     [TT_EXTINT | 0xa] = "External Interrupt 10",
  49     [TT_EXTINT | 0xb] = "External Interrupt 11",
  50     [TT_EXTINT | 0xc] = "External Interrupt 12",
  51     [TT_EXTINT | 0xd] = "External Interrupt 13",
  52     [TT_EXTINT | 0xe] = "External Interrupt 14",
  53     [TT_EXTINT | 0xf] = "External Interrupt 15",
  54     [TT_CODE_ACCESS] = "Instruction Access Error",
  55     [TT_DATA_ACCESS] = "Data Access Error",
  56     [TT_DIV_ZERO] = "Division By Zero",
  57     [TT_NCP_INSN] = "Coprocessor Disabled",
  58 };
  59
  60 static const char *excp_name_str(int32_t exception_index)
  61 {
  62     if (exception_index < 0 || exception_index >= ARRAY_SIZE(excp_names)) {
  63         return "Unknown";
  64     }
  65     return excp_names[exception_index];
  66 }
  67
  68 void cpu_check_irqs(CPUSPARCState *env)
  69 {
  70     CPUState *cs;
  71
  72     /* We should be holding the BQL before we mess with IRQs */
  73     g_assert(bql_locked());
  74
  75     if (env->pil_in && (env->interrupt_index == 0 ||
  76                         (env->interrupt_index & ~15) == TT_EXTINT)) {
  77         unsigned int i;
  78
  79         for (i = 15; i > 0; i--) {
  80             if (env->pil_in & (1 << i)) {
  81                 int old_interrupt = env->interrupt_index;
  82
  83                 env->interrupt_index = TT_EXTINT | i;
  84                 if (old_interrupt != env->interrupt_index) {
  85                     cs = env_cpu(env);
  86                     trace_sun4m_cpu_interrupt(i);
  87                     cpu_interrupt(cs, CPU_INTERRUPT_HARD);
  88                 }
  89                 break;
  90             }
  91         }
  92     } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) {
  93         cs = env_cpu(env);
  94         trace_sun4m_cpu_reset_interrupt(env->interrupt_index & 15);
  95         env->interrupt_index = 0;
  96         cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
  97     }
  98 }
  99
 100 void sparc_cpu_do_interrupt(CPUState *cs)
 101 {
 102     CPUSPARCState *env = cpu_env(cs);
 103     int cwp, intno = cs->exception_index;
 104
 105     if (qemu_loglevel_mask(CPU_LOG_INT)) {
 106         static int count;
 107         const char *name;
 108
 109         if (intno < 0 || intno >= 0x100) {
 110             name = "Unknown";
 111         } else if (intno >= 0x80) {
 112             name = "Trap Instruction";
 113         } else {
 114             name = excp_name_str(intno);
 115         }
 116
 117         qemu_log("%6d: %s (v=%02x)\n", count, name, intno);
 118         log_cpu_state(cs, 0);
 119 #if 0
 120         {
 121             int i;
 122             uint8_t *ptr;
 123
 124             qemu_log("       code=");
 125             ptr = (uint8_t *)env->pc;
 126             for (i = 0; i < 16; i++) {
 127                 qemu_log(" %02x", ldub(ptr + i));
 128             }
 129             qemu_log("\n");
 130         }
 131 #endif
 132         count++;
 133     }
 134 #if !defined(CONFIG_USER_ONLY)
 135     if (env->psret == 0) {
 136         if (cs->exception_index == 0x80 &&
 137             env->def.features & CPU_FEATURE_TA0_SHUTDOWN) {
 138             qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
 139         } else {
 140             cpu_abort(cs, "Trap 0x%02x (%s) while interrupts disabled, "
 141                           "Error state",
 142                       cs->exception_index, excp_name_str(cs->exception_index));
 143         }
 144         return;
 145     }
 146 #endif
 147     env->psret = 0;
 148     cwp = cpu_cwp_dec(env, env->cwp - 1);
 149     cpu_set_cwp(env, cwp);
 150     env->regwptr[9] = env->pc;
 151     env->regwptr[10] = env->npc;
 152     env->psrps = env->psrs;
 153     env->psrs = 1;
 154     env->tbr = (env->tbr & TBR_BASE_MASK) | (intno << 4);
 155     env->pc = env->tbr;
 156     env->npc = env->pc + 4;
 157     cs->exception_index = -1;
 158
 159 #if !defined(CONFIG_USER_ONLY)
 160     /* IRQ acknowledgment */
 161     if ((intno & ~15) == TT_EXTINT && env->qemu_irq_ack != NULL) {
 162         env->qemu_irq_ack(env, intno);
 163     }
 164 #endif
 165 }