sunxi: Set PLL lock enable bits for R40

[people/ms/u-boot.git] / arch / arm / include / asm / arch-sunxi / clock_sun6i.h

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 1bfb48bd52df7f695f45048e22f9ec6eaaf989c7..1aefd5a64c1f839798b18dc7adda2e2505610678 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -142,6 +142,8 @@ struct sunxi_ccm_reg {
        u32 apb2_reset_cfg;     /* 0x2d8 APB2 Reset config */
        u32 reserved25[5];
        u32 ccu_sec_switch;     /* 0x2f0 CCU Security Switch, H3 only */
+       u32 reserved26[11];
+       u32 pll_lock_ctrl;      /* 0x320 PLL lock control, R40 only */
 };
 
 /* apb2 bit field */