config ROCKCHIP_RK3188
bool "Support Rockchip RK3188"
select CPU_V7
+ select SPL_BOARD_INIT if SPL
select SUPPORT_SPL
- select SUPPORT_TPL
select SPL
- select TPL
+ select SPL_CLK
+ select SPL_PINCTRL
+ select SPL_REGMAP
+ select SPL_SYSCON
+ select SPL_RAM
+ select SPL_DRIVERS_MISC_SUPPORT
+ select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
+ select BOARD_LATE_INIT
select ROCKCHIP_BROM_HELPER
help
The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
UART, SPI, I2C and PWMs.
+config ROCKCHIP_RK322X
+ bool "Support Rockchip RK3228/RK3229"
+ select CPU_V7
+ select SUPPORT_SPL
+ select SPL
+ select ROCKCHIP_BROM_HELPER
+ select DEBUG_UART_BOARD_INIT
+ help
+ The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
+ including NEON and GPU, Mali-400 graphics, several DDR3 options
+ and video codec support. Peripherals include Gigabit Ethernet,
+ USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
config ROCKCHIP_RK3288
bool "Support Rockchip RK3288"
select CPU_V7
+ select SPL_BOARD_INIT if SPL
select SUPPORT_SPL
select SPL
help
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
+config ROCKCHIP_RK3368
+ bool "Support Rockchip RK3368"
+ select ARM64
+ select SUPPORT_SPL
+ select SUPPORT_TPL
+ select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
+ select TPL_NEEDS_SEPARATE_STACK if TPL
+ imply SPL_SEPARATE_BSS
+ imply SPL_SERIAL_SUPPORT
+ imply TPL_SERIAL_SUPPORT
+ select DEBUG_UART_BOARD_INIT
+ select SYS_NS16550
+ help
+ The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
+ into a big and little cluster with 4 cores each) Cortex-A53 including
+ AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
+ (for the little cluster), PowerVR G6110 based graphics, one video
+ output processor supporting LVDS/HDMI/eDP, several DDR3 options and
+ video codec support.
+
+ On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
+ I2S, UARTs, SPI, I2C and PWMs.
+
+if ROCKCHIP_RK3368
+
+config TPL_LDSCRIPT
+ default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
+
+config TPL_TEXT_BASE
+ default 0xff8c1000
+
+config TPL_MAX_SIZE
+ default 28672
+
+config TPL_STACK
+ default 0xff8cffff
+
+endif
+
config ROCKCHIP_RK3399
bool "Support Rockchip RK3399"
select ARM64
select SUPPORT_SPL
select SPL
select SPL_SEPARATE_BSS
- select ENABLE_ARM_SOC_BOOT0_HOOK
+ select SPL_SERIAL_SUPPORT
+ select SPL_DRIVERS_MISC_SUPPORT
+ select DEBUG_UART_BOARD_INIT
+ select BOARD_LATE_INIT
+ select ROCKCHIP_BROM_HELPER
help
The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
and quad-core Cortex-A53.
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
-config ROCKCHIP_SPL_BACK_TO_BROM
+config ROCKCHIP_RV1108
+ bool "Support Rockchip RV1108"
+ select CPU_V7
+ help
+ The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
+ and a DSP.
+
+config SPL_ROCKCHIP_BACK_TO_BROM
bool "SPL returns to bootrom"
default y if ROCKCHIP_RK3036
select ROCKCHIP_BROM_HELPER
+ depends on SPL
+ help
+ Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
+ SPL will return to the boot rom, which will then load the U-Boot
+ binary to keep going on.
+
+config TPL_ROCKCHIP_BACK_TO_BROM
+ bool "TPL returns to bootrom"
+ default y if ROCKCHIP_RK3368
+ select ROCKCHIP_BROM_HELPER
+ depends on TPL
help
Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
SPL will return to the boot rom, which will then load the U-Boot
binary to keep going on.
+config ROCKCHIP_BOOT_MODE_REG
+ hex "Rockchip boot mode flag register address"
+ default 0x200081c8 if ROCKCHIP_RK3036
+ default 0x20004040 if ROCKCHIP_RK3188
+ default 0x110005c8 if ROCKCHIP_RK322X
+ default 0xff730094 if ROCKCHIP_RK3288
+ default 0xff738200 if ROCKCHIP_RK3368
+ default 0xff320300 if ROCKCHIP_RK3399
+ default 0x10300580 if ROCKCHIP_RV1108
+ default 0
+ help
+ The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
+ according to the value from this register.
+
+config ROCKCHIP_SPL_RESERVE_IRAM
+ hex "Size of IRAM reserved in SPL"
+ default 0x4000
+ help
+ SPL may need reserve memory for firmware loaded by SPL, whose load
+ address is in IRAM and may overlay with SPL text area if not
+ reserved.
+
config ROCKCHIP_BROM_HELPER
bool
+config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
+ bool "SPL requires early-return (for RK3188-style BROM) to BROM"
+ depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
+ help
+ Some Rockchip BROM variants (e.g. on the RK3188) load the
+ first stage in segments and enter multiple times. E.g. on
+ the RK3188, the first 1KB of the first stage are loaded
+ first and entered; after returning to the BROM, the
+ remainder of the first stage is loaded, but the BROM
+ re-enters at the same address/to the same code as previously.
+
+ This enables support code in the BOOT0 hook for the SPL stage
+ to allow multiple entries.
+
+config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
+ bool "TPL requires early-return (for RK3188-style BROM) to BROM"
+ depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
+ help
+ Some Rockchip BROM variants (e.g. on the RK3188) load the
+ first stage in segments and enter multiple times. E.g. on
+ the RK3188, the first 1KB of the first stage are loaded
+ first and entered; after returning to the BROM, the
+ remainder of the first stage is loaded, but the BROM
+ re-enters at the same address/to the same code as previously.
+
+ This enables support code in the BOOT0 hook for the TPL stage
+ to allow multiple entries.
+
config SPL_MMC_SUPPORT
- default y if !ROCKCHIP_SPL_BACK_TO_BROM
+ default y if !SPL_ROCKCHIP_BACK_TO_BROM
source "arch/arm/mach-rockchip/rk3036/Kconfig"
source "arch/arm/mach-rockchip/rk3188/Kconfig"
+source "arch/arm/mach-rockchip/rk322x/Kconfig"
source "arch/arm/mach-rockchip/rk3288/Kconfig"
source "arch/arm/mach-rockchip/rk3328/Kconfig"
+source "arch/arm/mach-rockchip/rk3368/Kconfig"
source "arch/arm/mach-rockchip/rk3399/Kconfig"
+source "arch/arm/mach-rockchip/rv1108/Kconfig"
endif