/* BFD library support routines for architectures.
- Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 1990-2016 Free Software Foundation, Inc.
Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
.#define bfd_mach_i960_jx 7
.#define bfd_mach_i960_hx 8
.
-. bfd_arch_or32, {* OpenRISC 32 *}
+. bfd_arch_or1k, {* OpenRISC 1000 *}
+.#define bfd_mach_or1k 1
+.#define bfd_mach_or1knd 2
.
. bfd_arch_sparc, {* SPARC *}
.#define bfd_mach_sparc 1
.#define bfd_mach_sparc_v9a 8 {* with ultrasparc add'ns. *}
.#define bfd_mach_sparc_v8plusb 9 {* with cheetah add'ns. *}
.#define bfd_mach_sparc_v9b 10 {* with cheetah add'ns. *}
+.#define bfd_mach_sparc_v8plusc 11 {* with UA2005 and T1 add'ns. *}
+.#define bfd_mach_sparc_v9c 12 {* with UA2005 and T1 add'ns. *}
+.#define bfd_mach_sparc_v8plusd 13 {* with UA2007 and T3 add'ns. *}
+.#define bfd_mach_sparc_v9d 14 {* with UA2007 and T3 add'ns. *}
+.#define bfd_mach_sparc_v8pluse 15 {* with OSA2001 and T4 add'ns (no IMA). *}
+.#define bfd_mach_sparc_v9e 16 {* with OSA2001 and T4 add'ns (no IMA). *}
+.#define bfd_mach_sparc_v8plusv 17 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
+.#define bfd_mach_sparc_v9v 18 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
+.#define bfd_mach_sparc_v8plusm 19 {* with OSA2015 and M7 add'ns. *}
+.#define bfd_mach_sparc_v9m 20 {* with OSA2015 and M7 add'ns. *}
.{* Nonzero if MACH has the v9 instruction set. *}
.#define bfd_mach_sparc_v9_p(mach) \
-. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
+. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9m \
. && (mach) != bfd_mach_sparc_sparclite_le)
.{* Nonzero if MACH is a 64 bit sparc architecture. *}
.#define bfd_mach_sparc_64bit_p(mach) \
-. ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
+. ((mach) >= bfd_mach_sparc_v9 \
+. && (mach) != bfd_mach_sparc_v8plusb \
+. && (mach) != bfd_mach_sparc_v8plusc \
+. && (mach) != bfd_mach_sparc_v8plusd \
+. && (mach) != bfd_mach_sparc_v8pluse \
+. && (mach) != bfd_mach_sparc_v8plusv \
+. && (mach) != bfd_mach_sparc_v8plusm)
. bfd_arch_spu, {* PowerPC SPU *}
-.#define bfd_mach_spu 256
+.#define bfd_mach_spu 256
. bfd_arch_mips, {* MIPS Rxxxx *}
.#define bfd_mach_mips3000 3000
.#define bfd_mach_mips3900 3900
.#define bfd_mach_mips5000 5000
.#define bfd_mach_mips5400 5400
.#define bfd_mach_mips5500 5500
+.#define bfd_mach_mips5900 5900
.#define bfd_mach_mips6000 6000
.#define bfd_mach_mips7000 7000
.#define bfd_mach_mips8000 8000
.#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *}
.#define bfd_mach_mips_octeon 6501
.#define bfd_mach_mips_octeonp 6601
+.#define bfd_mach_mips_octeon2 6502
+.#define bfd_mach_mips_octeon3 6503
.#define bfd_mach_mips_xlr 887682 {* decimal 'XLR' *}
.#define bfd_mach_mipsisa32 32
.#define bfd_mach_mipsisa32r2 33
+.#define bfd_mach_mipsisa32r3 34
+.#define bfd_mach_mipsisa32r5 36
+.#define bfd_mach_mipsisa32r6 37
.#define bfd_mach_mipsisa64 64
.#define bfd_mach_mipsisa64r2 65
+.#define bfd_mach_mipsisa64r3 66
+.#define bfd_mach_mipsisa64r5 68
+.#define bfd_mach_mipsisa64r6 69
.#define bfd_mach_mips_micromips 96
. bfd_arch_i386, {* Intel 386 *}
.#define bfd_mach_i386_intel_syntax (1 << 0)
. bfd_arch_k1om, {* Intel K1OM *}
.#define bfd_mach_k1om (1 << 6)
.#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax)
+.#define bfd_mach_i386_nacl (1 << 7)
+.#define bfd_mach_i386_i386_nacl (bfd_mach_i386_i386 | bfd_mach_i386_nacl)
+.#define bfd_mach_x86_64_nacl (bfd_mach_x86_64 | bfd_mach_i386_nacl)
+.#define bfd_mach_x64_32_nacl (bfd_mach_x64_32 | bfd_mach_i386_nacl)
+. bfd_arch_iamcu, {* Intel MCU *}
+.#define bfd_mach_iamcu (1 << 8)
+.#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu)
+.#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax)
. bfd_arch_we32k, {* AT&T WE32xxx *}
. bfd_arch_tahoe, {* CCI/Harris Tahoe *}
. bfd_arch_i860, {* Intel 860 *}
.#define bfd_mach_ppc_e500 500
.#define bfd_mach_ppc_e500mc 5001
.#define bfd_mach_ppc_e500mc64 5005
+.#define bfd_mach_ppc_e5500 5006
+.#define bfd_mach_ppc_e6500 5007
.#define bfd_mach_ppc_titan 83
+.#define bfd_mach_ppc_vle 84
. bfd_arch_rs6000, {* IBM RS/6000 *}
.#define bfd_mach_rs6k 6000
.#define bfd_mach_rs6k_rs1 6001
.#define bfd_mach_m6812_default 0
.#define bfd_mach_m6812 1
.#define bfd_mach_m6812s 2
+. bfd_arch_m9s12x, {* Freescale S12X *}
+. bfd_arch_m9s12xg, {* Freescale XGATE *}
. bfd_arch_z8k, {* Zilog Z8000 *}
.#define bfd_mach_z8001 1
.#define bfd_mach_z8002 2
.#define bfd_mach_arm_ep9312 11
.#define bfd_mach_arm_iWMMXt 12
.#define bfd_mach_arm_iWMMXt2 13
+. bfd_arch_nds32, {* Andes NDS32 *}
+.#define bfd_mach_n1 1
+.#define bfd_mach_n1h 2
+.#define bfd_mach_n1h_v2 3
+.#define bfd_mach_n1h_v3 4
+.#define bfd_mach_n1h_v3m 5
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
. bfd_arch_tic6x, {* Texas Instruments TMS320C6X *}
. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
. bfd_arch_v850, {* NEC V850 *}
+. bfd_arch_v850_rh850,{* NEC V850 (using RH850 ABI) *}
.#define bfd_mach_v850 1
.#define bfd_mach_v850e 'E'
.#define bfd_mach_v850e1 '1'
.#define bfd_mach_v850e2 0x4532
.#define bfd_mach_v850e2v3 0x45325633
+.#define bfd_mach_v850e3v5 0x45335635 {* ('E'|'3'|'V'|'5') *}
. bfd_arch_arc, {* ARC Cores *}
-.#define bfd_mach_arc_5 5
-.#define bfd_mach_arc_6 6
-.#define bfd_mach_arc_7 7
-.#define bfd_mach_arc_8 8
+.#define bfd_mach_arc_a4 0
+.#define bfd_mach_arc_a5 1
+.#define bfd_mach_arc_arc600 2
+.#define bfd_mach_arc_arc601 4
+.#define bfd_mach_arc_arc700 3
+.#define bfd_mach_arc_arcv2 5
. bfd_arch_m32c, {* Renesas M16C/M32C. *}
.#define bfd_mach_m16c 0x75
.#define bfd_mach_m32c 0x78
.#define bfd_mach_fr550 550
. bfd_arch_moxie, {* The moxie processor *}
.#define bfd_mach_moxie 1
+. bfd_arch_ft32, {* The ft32 processor *}
+.#define bfd_mach_ft32 1
. bfd_arch_mcore,
. bfd_arch_mep,
.#define bfd_mach_mep 1
.#define bfd_mach_mep_h1 0x6831
.#define bfd_mach_mep_c5 0x6335
+. bfd_arch_metag,
+.#define bfd_mach_metag 1
. bfd_arch_ia64, {* HP/Intel ia64 *}
.#define bfd_mach_ia64_elf64 64
.#define bfd_mach_ia64_elf32 32
.#define bfd_mach_avr5 5
.#define bfd_mach_avr51 51
.#define bfd_mach_avr6 6
+.#define bfd_mach_avrtiny 100
.#define bfd_mach_avrxmega1 101
.#define bfd_mach_avrxmega2 102
.#define bfd_mach_avrxmega3 103
.#define bfd_mach_cris_v0_v10 255
.#define bfd_mach_cris_v32 32
.#define bfd_mach_cris_v10_v32 1032
+. bfd_arch_riscv,
+.#define bfd_mach_riscv32 132
+.#define bfd_mach_riscv64 164
. bfd_arch_rl78,
.#define bfd_mach_rl78 0x75
. bfd_arch_rx, {* Renesas RX. *}
. bfd_arch_s390, {* IBM s390 *}
.#define bfd_mach_s390_31 31
.#define bfd_mach_s390_64 64
-. bfd_arch_score, {* Sunplus score *}
+. bfd_arch_score, {* Sunplus score *}
.#define bfd_mach_score3 3
.#define bfd_mach_score7 7
-. bfd_arch_openrisc, {* OpenRISC *}
. bfd_arch_mmix, {* Donald Knuth's educational processor. *}
. bfd_arch_xstormy16,
.#define bfd_mach_xstormy16 1
.#define bfd_mach_msp14 14
.#define bfd_mach_msp15 15
.#define bfd_mach_msp16 16
+.#define bfd_mach_msp20 20
.#define bfd_mach_msp21 21
+.#define bfd_mach_msp22 22
+.#define bfd_mach_msp23 23
+.#define bfd_mach_msp24 24
+.#define bfd_mach_msp26 26
.#define bfd_mach_msp31 31
.#define bfd_mach_msp32 32
.#define bfd_mach_msp33 33
.#define bfd_mach_msp42 42
.#define bfd_mach_msp43 43
.#define bfd_mach_msp44 44
+.#define bfd_mach_msp430x 45
+.#define bfd_mach_msp46 46
+.#define bfd_mach_msp47 47
+.#define bfd_mach_msp54 54
. bfd_arch_xc16x, {* Infineon's XC16X Series. *}
.#define bfd_mach_xc16x 1
.#define bfd_mach_xc16xl 2
-.#define bfd_mach_xc16xs 3
+.#define bfd_mach_xc16xs 3
+. bfd_arch_xgate, {* Freescale XGATE *}
+.#define bfd_mach_xgate 1
. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
.#define bfd_mach_xtensa 1
. bfd_arch_z80,
. bfd_arch_tilegx, {* Tilera TILE-Gx *}
.#define bfd_mach_tilepro 1
.#define bfd_mach_tilegx 1
+.#define bfd_mach_tilegx32 2
+. bfd_arch_aarch64, {* AArch64 *}
+.#define bfd_mach_aarch64 0
+.#define bfd_mach_aarch64_ilp32 32
+. bfd_arch_nios2, {* Nios II *}
+.#define bfd_mach_nios2 0
+.#define bfd_mach_nios2r1 1
+.#define bfd_mach_nios2r2 2
+. bfd_arch_visium, {* Visium *}
+.#define bfd_mach_visium 1
. bfd_arch_last
. };
*/
.
. bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
.
+. {* Allocate via bfd_malloc and return a fill buffer of size COUNT. If
+. IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is
+. TRUE, the buffer contains code. *}
+. void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian,
+. bfd_boolean code);
+.
. const struct bfd_arch_info *next;
.}
.bfd_arch_info_type;
.
*/
+extern const bfd_arch_info_type bfd_aarch64_arch;
extern const bfd_arch_info_type bfd_alpha_arch;
extern const bfd_arch_info_type bfd_arc_arch;
extern const bfd_arch_info_type bfd_arm_arch;
extern const bfd_arch_info_type bfd_hppa_arch;
extern const bfd_arch_info_type bfd_i370_arch;
extern const bfd_arch_info_type bfd_i386_arch;
+extern const bfd_arch_info_type bfd_iamcu_arch;
extern const bfd_arch_info_type bfd_i860_arch;
extern const bfd_arch_info_type bfd_i960_arch;
extern const bfd_arch_info_type bfd_ia64_arch;
extern const bfd_arch_info_type bfd_m32r_arch;
extern const bfd_arch_info_type bfd_m68hc11_arch;
extern const bfd_arch_info_type bfd_m68hc12_arch;
+extern const bfd_arch_info_type bfd_m9s12x_arch;
+extern const bfd_arch_info_type bfd_m9s12xg_arch;
extern const bfd_arch_info_type bfd_m68k_arch;
extern const bfd_arch_info_type bfd_m88k_arch;
extern const bfd_arch_info_type bfd_mcore_arch;
extern const bfd_arch_info_type bfd_mep_arch;
+extern const bfd_arch_info_type bfd_metag_arch;
extern const bfd_arch_info_type bfd_mips_arch;
extern const bfd_arch_info_type bfd_microblaze_arch;
extern const bfd_arch_info_type bfd_mmix_arch;
extern const bfd_arch_info_type bfd_mn10200_arch;
extern const bfd_arch_info_type bfd_mn10300_arch;
extern const bfd_arch_info_type bfd_moxie_arch;
+extern const bfd_arch_info_type bfd_ft32_arch;
extern const bfd_arch_info_type bfd_msp430_arch;
extern const bfd_arch_info_type bfd_mt_arch;
+extern const bfd_arch_info_type bfd_nds32_arch;
+extern const bfd_arch_info_type bfd_nios2_arch;
extern const bfd_arch_info_type bfd_ns32k_arch;
-extern const bfd_arch_info_type bfd_openrisc_arch;
-extern const bfd_arch_info_type bfd_or32_arch;
+extern const bfd_arch_info_type bfd_or1k_arch;
extern const bfd_arch_info_type bfd_pdp11_arch;
extern const bfd_arch_info_type bfd_pj_arch;
extern const bfd_arch_info_type bfd_plugin_arch;
extern const bfd_arch_info_type bfd_powerpc_archs[];
#define bfd_powerpc_arch bfd_powerpc_archs[0]
+extern const bfd_arch_info_type bfd_riscv_arch;
extern const bfd_arch_info_type bfd_rs6000_arch;
extern const bfd_arch_info_type bfd_rl78_arch;
extern const bfd_arch_info_type bfd_rx_arch;
extern const bfd_arch_info_type bfd_tilegx_arch;
extern const bfd_arch_info_type bfd_tilepro_arch;
extern const bfd_arch_info_type bfd_v850_arch;
+extern const bfd_arch_info_type bfd_v850_rh850_arch;
extern const bfd_arch_info_type bfd_vax_arch;
+extern const bfd_arch_info_type bfd_visium_arch;
extern const bfd_arch_info_type bfd_w65_arch;
extern const bfd_arch_info_type bfd_we32k_arch;
extern const bfd_arch_info_type bfd_xstormy16_arch;
extern const bfd_arch_info_type bfd_xtensa_arch;
extern const bfd_arch_info_type bfd_xc16x_arch;
+extern const bfd_arch_info_type bfd_xgate_arch;
extern const bfd_arch_info_type bfd_z80_arch;
extern const bfd_arch_info_type bfd_z8k_arch;
#ifdef SELECT_ARCHITECTURES
SELECT_ARCHITECTURES,
#else
+ &bfd_aarch64_arch,
&bfd_alpha_arch,
&bfd_arc_arch,
&bfd_arm_arch,
&bfd_hppa_arch,
&bfd_i370_arch,
&bfd_i386_arch,
+ &bfd_iamcu_arch,
&bfd_i860_arch,
&bfd_i960_arch,
&bfd_ia64_arch,
&bfd_m32r_arch,
&bfd_m68hc11_arch,
&bfd_m68hc12_arch,
+ &bfd_m9s12x_arch,
+ &bfd_m9s12xg_arch,
&bfd_m68k_arch,
&bfd_m88k_arch,
&bfd_mcore_arch,
&bfd_mep_arch,
+ &bfd_metag_arch,
&bfd_microblaze_arch,
&bfd_mips_arch,
&bfd_mmix_arch,
&bfd_mn10200_arch,
&bfd_mn10300_arch,
&bfd_moxie_arch,
+ &bfd_ft32_arch,
&bfd_msp430_arch,
&bfd_mt_arch,
+ &bfd_nds32_arch,
+ &bfd_nios2_arch,
&bfd_ns32k_arch,
- &bfd_openrisc_arch,
- &bfd_or32_arch,
+ &bfd_or1k_arch,
&bfd_pdp11_arch,
&bfd_powerpc_arch,
- &bfd_rs6000_arch,
+ &bfd_riscv_arch,
&bfd_rl78_arch,
+ &bfd_rs6000_arch,
&bfd_rx_arch,
&bfd_s390_arch,
&bfd_score_arch,
&bfd_tilegx_arch,
&bfd_tilepro_arch,
&bfd_v850_arch,
+ &bfd_v850_rh850_arch,
&bfd_vax_arch,
+ &bfd_visium_arch,
&bfd_w65_arch,
&bfd_we32k_arch,
&bfd_xstormy16_arch,
&bfd_xtensa_arch,
&bfd_xc16x_arch,
+ &bfd_xgate_arch,
&bfd_z80_arch,
&bfd_z8k_arch,
#endif
32, 32, 8, bfd_arch_unknown, 0, "unknown", "unknown", 2, TRUE,
bfd_default_compatible,
bfd_default_scan,
+ bfd_arch_default_fill,
0,
};
}
/*
-INTERNAL_FUNCTION
+FUNCTION
bfd_default_set_arch_mach
SYNOPSIS
return ap->bits_per_byte / 8;
return 1;
}
+
+/*
+INTERNAL_FUNCTION
+ bfd_arch_default_fill
+
+SYNOPSIS
+ void *bfd_arch_default_fill (bfd_size_type count,
+ bfd_boolean is_bigendian,
+ bfd_boolean code);
+
+DESCRIPTION
+ Allocate via bfd_malloc and return a fill buffer of size COUNT.
+ If IS_BIGENDIAN is TRUE, the order of bytes is big endian. If
+ CODE is TRUE, the buffer contains code.
+*/
+
+void *
+bfd_arch_default_fill (bfd_size_type count,
+ bfd_boolean is_bigendian ATTRIBUTE_UNUSED,
+ bfd_boolean code ATTRIBUTE_UNUSED)
+{
+ void *fill = bfd_malloc (count);
+ if (fill != NULL)
+ memset (fill, 0, count);
+ return fill;
+}
projects / thirdparty / binutils-gdb.git / blobdiff