ppc_4xx: Apply new HW register names

[people/ms/u-boot.git] / board / amcc / sequoia / sequoia.c

diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
index 17f831c3f41f1999f5868c8ff81d9758abf2cc8a..d42c802538c87bf75e201406b676840d15879d1e 100644 (file)
--- a/board/amcc/sequoia/sequoia.c
+++ b/board/amcc/sequoia/sequoia.c
@@ -428,26 +428,26 @@ void pci_target_init(struct pci_controller *hose)
         * Use byte reversed out routines to handle endianess.
         * Make this region non-prefetchable.
         */
-       out32r(PCIX0_PMM0MA, 0x00000000);       /* PMM0 Mask/Attribute */
+       out32r(PCIL0_PMM0MA, 0x00000000);       /* PMM0 Mask/Attribute */
                                                /* - disabled b4 setting */
-       out32r(PCIX0_PMM0LA, CONFIG_SYS_PCI_MEMBASE);   /* PMM0 Local Address */
-       out32r(PCIX0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
-       out32r(PCIX0_PMM0PCIHA, 0x00000000);    /* PMM0 PCI High Address */
-       out32r(PCIX0_PMM0MA, 0xE0000001);       /* 512M + No prefetching, */
+       out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE);   /* PMM0 Local Address */
+       out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
+       out32r(PCIL0_PMM0PCIHA, 0x00000000);    /* PMM0 PCI High Address */
+       out32r(PCIL0_PMM0MA, 0xE0000001);       /* 512M + No prefetching, */
                                                /* and enable region */
 
-       out32r(PCIX0_PMM1MA, 0x00000000);       /* PMM0 Mask/Attribute */
+       out32r(PCIL0_PMM1MA, 0x00000000);       /* PMM0 Mask/Attribute */
                                                /* - disabled b4 setting */
-       out32r(PCIX0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
-       out32r(PCIX0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
-       out32r(PCIX0_PMM1PCIHA, 0x00000000);    /* PMM0 PCI High Address */
-       out32r(PCIX0_PMM1MA, 0xE0000001);       /* 512M + No prefetching, */
+       out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
+       out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
+       out32r(PCIL0_PMM1PCIHA, 0x00000000);    /* PMM0 PCI High Address */
+       out32r(PCIL0_PMM1MA, 0xE0000001);       /* 512M + No prefetching, */
                                                /* and enable region */
 
-       out32r(PCIX0_PTM1MS, 0x00000001);       /* Memory Size/Attribute */
-       out32r(PCIX0_PTM1LA, 0);                /* Local Addr. Reg */
-       out32r(PCIX0_PTM2MS, 0);                /* Memory Size/Attribute */
-       out32r(PCIX0_PTM2LA, 0);                /* Local Addr. Reg */
+       out32r(PCIL0_PTM1MS, 0x00000001);       /* Memory Size/Attribute */
+       out32r(PCIL0_PTM1LA, 0);                /* Local Addr. Reg */
+       out32r(PCIL0_PTM2MS, 0);                /* Memory Size/Attribute */
+       out32r(PCIL0_PTM2LA, 0);                /* Local Addr. Reg */
 
        /*
         * Set up Configuration registers