Add ARM946E cpu and core module targets; remap memory to 0x00000000

[people/ms/u-boot.git] / cpu / arm_intcm / cpu.c

diff --git a/cpu/arm_intcm/cpu.c b/cpu/arm_intcm/cpu.c
new file mode 100644 (file)
index 0000000..34cd5af
--- /dev/null
+++ b/cpu/arm_intcm/cpu.c
@@ -0,0 +1,91 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * CPU specific code for an unknown cpu
+ * - hence fairly empty......
+ */
+
+#include <common.h>
+#include <command.h>
+
+int cpu_init (void)
+{
+       /*
+        * setup up stacks if necessary
+        */
+#ifdef CONFIG_USE_IRQ
+       DECLARE_GLOBAL_DATA_PTR;
+
+       IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
+       FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
+#endif
+       return 0;
+}
+
+int cleanup_before_linux (void)
+{
+       /*
+        * this function is called just before we call linux
+        * it prepares the processor for linux
+        *
+        * we turn off caches etc ...
+        */
+
+       disable_interrupts ();
+
+       /* Since the CM has unknown processor we do not support 
+        * cache operations 
+        */
+
+       return (0);
+}
+
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+       extern void reset_cpu (ulong addr);
+
+       disable_interrupts ();
+       reset_cpu (0);
+       /*NOTREACHED*/
+       return (0);
+}
+
+/* May not be cahed processor on the CM - do nothing */
+void icache_enable (void)
+{
+}
+
+void icache_disable (void)
+{
+}
+
+/* return "disabled" */
+int icache_status (void)
+{
+       return 0;
+}