out32 (EMAC_IAL + hw_p->hw_addr, reg);
switch (devnum) {
+#if defined(CONFIG_NET_MULTI)
case 1:
/* setup MAL tx & rx channel pointers */
/* For 405EP, the EMAC1 tx channel 0 is MAL tx channel 2 */
/* set RX buffer size */
mtdcr (malrcbs1, ENET_MAX_MTU_ALIGNED / 16);
break;
+#endif
case 0:
default:
/* setup MAL tx & rx channel pointers */