Merge git://git.denx.de/u-boot-net

[people/ms/u-boot.git] / drivers / net / e1000.c

diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 027f2bfd11f7c273f9ebf3aec14872af68e8d218..70fc02ee5ca6bb9bb28abf9361eb359398e6089e 100644 (file)
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -551,43 +551,6 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
                eeprom->use_eerd = true;
                eeprom->use_eewr = false;
                break;
-
-       /* ich8lan does not support currently. if needed, please
-        * add corresponding code and functions.
-        */
-#if 0
-       case e1000_ich8lan:
-               {
-               int32_t  i = 0;
-
-               eeprom->type = e1000_eeprom_ich8;
-               eeprom->use_eerd = false;
-               eeprom->use_eewr = false;
-               eeprom->word_size = E1000_SHADOW_RAM_WORDS;
-               uint32_t flash_size = E1000_READ_ICH_FLASH_REG(hw,
-                               ICH_FLASH_GFPREG);
-               /* Zero the shadow RAM structure. But don't load it from NVM
-                * so as to save time for driver init */
-               if (hw->eeprom_shadow_ram != NULL) {
-                       for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) {
-                               hw->eeprom_shadow_ram[i].modified = false;
-                               hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF;
-                       }
-               }
-
-               hw->flash_base_addr = (flash_size & ICH_GFPREG_BASE_MASK) *
-                               ICH_FLASH_SECTOR_SIZE;
-
-               hw->flash_bank_size = ((flash_size >> 16)
-                               & ICH_GFPREG_BASE_MASK) + 1;
-               hw->flash_bank_size -= (flash_size & ICH_GFPREG_BASE_MASK);
-
-               hw->flash_bank_size *= ICH_FLASH_SECTOR_SIZE;
-
-               hw->flash_bank_size /= 2 * sizeof(uint16_t);
-               break;
-               }
-#endif
        default:
                break;
        }
@@ -838,14 +801,6 @@ e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset,
        if (eeprom->use_eerd == true)
                return e1000_read_eeprom_eerd(hw, offset, words, data);
 
-       /* ich8lan does not support currently. if needed, please
-        * add corresponding code and functions.
-        */
-#if 0
-       /* ICH EEPROM access is done via the ICH flash controller */
-       if (eeprom->type == e1000_eeprom_ich8)
-               return e1000_read_eeprom_ich8(hw, offset, words, data);
-#endif
        /* Set up the SPI or Microwire EEPROM for bit-bang reading.  We have
         * acquired the EEPROM at this point, so any returns should relase it */
        if (eeprom->type == e1000_eeprom_spi) {
@@ -1732,17 +1687,7 @@ e1000_init_hw(struct e1000_hw *hw, unsigned char enetaddr[6])
                 * occuring when accessing our register space */
                E1000_WRITE_FLUSH(hw);
        }
-#if 0
-       /* Set the PCI priority bit correctly in the CTRL register.  This
-        * determines if the adapter gives priority to receives, or if it
-        * gives equal priority to transmits and receives.  Valid only on
-        * 82542 and 82543 silicon.
-        */
-       if (hw->dma_fairness && hw->mac_type <= e1000_82543) {
-               ctrl = E1000_READ_REG(hw, CTRL);
-               E1000_WRITE_REG(hw, CTRL, ctrl | E1000_CTRL_PRIOR);
-       }
-#endif
+
        switch (hw->mac_type) {
        case e1000_82545_rev_3:
        case e1000_82546_rev_3:
@@ -1842,20 +1787,6 @@ e1000_init_hw(struct e1000_hw *hw, unsigned char enetaddr[6])
                break;
        }
 
-#if 0
-       /* Clear all of the statistics registers (clear on read).  It is
-        * important that we do this after we have tried to establish link
-        * because the symbol error count will increment wildly if there
-        * is no link.
-        */
-       e1000_clear_hw_cntrs(hw);
-
-       /* ICH8 No-snoop bits are opposite polarity.
-        * Set to snoop by default after reset. */
-       if (hw->mac_type == e1000_ich8lan)
-               e1000_set_pci_ex_no_snoop(hw, PCI_EX_82566_SNOOP_ALL);
-#endif
-
        if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER ||
                hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) {
                ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
@@ -5230,10 +5161,6 @@ _e1000_disable(struct e1000_hw *hw)
        E1000_WRITE_REG(hw, RDH, 0);
        E1000_WRITE_REG(hw, RDT, 0);
 
-       /* put the card in its initial state */
-#if 0
-       E1000_WRITE_REG(hw, CTRL, E1000_CTRL_RST);
-#endif
        mdelay(10);
 }
 
@@ -5359,7 +5286,6 @@ static int e1000_init_one(struct e1000_hw *hw, int cardnum, pci_dev_t devno,
 
 #ifndef CONFIG_E1000_NO_NVM
        /* Validate the EEPROM and get chipset information */
-#if !defined(CONFIG_MVBC_1G)
        if (e1000_init_eeprom_params(hw)) {
                E1000_ERR(hw, "EEPROM is invalid!\n");
                return -EINVAL;
@@ -5367,7 +5293,6 @@ static int e1000_init_one(struct e1000_hw *hw, int cardnum, pci_dev_t devno,
        if ((E1000_READ_REG(hw, I210_EECD) & E1000_EECD_FLUPD) &&
            e1000_validate_eeprom_checksum(hw))
                return -ENXIO;
-#endif
        e1000_read_mac_addr(hw, enetaddr);
 #endif
        e1000_get_bus_type(hw);