/* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
- Copyright (C) 1989, 93, 94, 95, 96, 1997, 1998 Free Software Foundation, Inc.
+ Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+ 2001, 2002, 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
Contributed by Carnegie Mellon University, 1993.
Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
Modified by Ken Raeburn for gas-2.x and ECOFF support.
Modified by Richard Henderson for ELF support.
- Modified by Klaus K"ampf for EVAX (openVMS/Alpha) support.
+ Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2, or (at your option)
+ the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
-
-/*
- * Mach Operating System
- * Copyright (c) 1993 Carnegie Mellon University
- * All Rights Reserved.
- *
- * Permission to use, copy, modify and distribute this software and its
- * documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
- * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+/* Mach Operating System
+ Copyright (c) 1993 Carnegie Mellon University
+ All Rights Reserved.
+
+ Permission to use, copy, modify and distribute this software and its
+ documentation is hereby granted, provided that both the copyright
+ notice and this permission notice appear in all copies of the
+ software, derivative works or modified versions, and any portions
+ thereof, and that both notices appear in supporting documentation.
+
+ CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
+ CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+
+ Carnegie Mellon requests users of this software to return to
+
+ Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
+ School of Computer Science
+ Carnegie Mellon University
+ Pittsburgh PA 15213-3890
+
+ any improvements or extensions that they make and grant Carnegie the
+ rights to redistribute these changes. */
#include "as.h"
#include "subsegs.h"
+#include "struc-symbol.h"
+#include "ecoff.h"
#include "opcode/alpha.h"
#include "elf/alpha.h"
#endif
-#include <ctype.h>
+#ifdef OBJ_EVAX
+#include "vms.h"
+#endif
+#include "dwarf2dbg.h"
+#include "dw2gencfi.h"
+#include "safe-ctype.h"
\f
-/* Local types */
+/* Local types. */
-#define MAX_INSN_FIXUPS 2
-#define MAX_INSN_ARGS 5
+#define TOKENIZE_ERROR -1
+#define TOKENIZE_ERROR_REPORT -2
+#define MAX_INSN_FIXUPS 2
+#define MAX_INSN_ARGS 5
struct alpha_fixup
{
expressionS exp;
bfd_reloc_code_real_type reloc;
+#ifdef OBJ_EVAX
+ symbolS *xtrasym, *procsym;
+#endif
};
struct alpha_insn
unsigned insn;
int nfixups;
struct alpha_fixup fixups[MAX_INSN_FIXUPS];
+ long sequence;
};
enum alpha_macro_arg
-{
- MACRO_EOA = 1, MACRO_IR, MACRO_PIR, MACRO_CPIR, MACRO_FPR, MACRO_EXP
-};
+ {
+ MACRO_EOA = 1,
+ MACRO_IR,
+ MACRO_PIR,
+ MACRO_OPIR,
+ MACRO_CPIR,
+ MACRO_FPR,
+ MACRO_EXP
+ };
struct alpha_macro
{
const char *name;
- void (*emit) PARAMS ((const expressionS *, int, const PTR));
- const PTR arg;
+ void (*emit) (const expressionS *, int, const void *);
+ const void * arg;
enum alpha_macro_arg argsets[16];
};
-/* Two extra symbols we want to see in our input. This is a blatent
- misuse of the expressionS.X_op field. */
-
-#define O_pregister (O_max+1) /* O_register, but in parentheses */
-#define O_cpregister (O_pregister+1) /* + a leading comma */
-
-/* Macros for extracting the type and number of encoded register tokens */
+/* Extra expression types. */
+
+#define O_pregister O_md1 /* O_register, in parentheses. */
+#define O_cpregister O_md2 /* + a leading comma. */
+
+/* The alpha_reloc_op table below depends on the ordering of these. */
+#define O_literal O_md3 /* !literal relocation. */
+#define O_lituse_addr O_md4 /* !lituse_addr relocation. */
+#define O_lituse_base O_md5 /* !lituse_base relocation. */
+#define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation. */
+#define O_lituse_jsr O_md7 /* !lituse_jsr relocation. */
+#define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation. */
+#define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation. */
+#define O_lituse_jsrdirect O_md10 /* !lituse_jsrdirect relocation. */
+#define O_gpdisp O_md11 /* !gpdisp relocation. */
+#define O_gprelhigh O_md12 /* !gprelhigh relocation. */
+#define O_gprellow O_md13 /* !gprellow relocation. */
+#define O_gprel O_md14 /* !gprel relocation. */
+#define O_samegp O_md15 /* !samegp relocation. */
+#define O_tlsgd O_md16 /* !tlsgd relocation. */
+#define O_tlsldm O_md17 /* !tlsldm relocation. */
+#define O_gotdtprel O_md18 /* !gotdtprel relocation. */
+#define O_dtprelhi O_md19 /* !dtprelhi relocation. */
+#define O_dtprello O_md20 /* !dtprello relocation. */
+#define O_dtprel O_md21 /* !dtprel relocation. */
+#define O_gottprel O_md22 /* !gottprel relocation. */
+#define O_tprelhi O_md23 /* !tprelhi relocation. */
+#define O_tprello O_md24 /* !tprello relocation. */
+#define O_tprel O_md25 /* !tprel relocation. */
+
+#define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
+#define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
+#define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
+#define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
+#define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5)
+#define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6)
+#define DUMMY_RELOC_LITUSE_JSRDIRECT (BFD_RELOC_UNUSED + 7)
+
+#define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
+
+/* Macros for extracting the type and number of encoded register tokens. */
#define is_ir_num(x) (((x) & 32) == 0)
#define is_fpr_num(x) (((x) & 32) != 0)
#define regno(x) ((x) & 31)
-/* Something odd inherited from the old assembler */
+/* Something odd inherited from the old assembler. */
#define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
#define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
#if 1
#define range_signed_16(x) \
- (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1)
+ (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
#define range_signed_32(x) \
- (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1)
+ (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
#else
-#define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
- (offsetT)(x) <= (offsetT)0x7FFF)
-#define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
- (offsetT)(x) <= (offsetT)0x7FFFFFFF)
+#define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \
+ (offsetT) (x) <= (offsetT) 0x7FFF)
+#define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \
+ (offsetT) (x) <= (offsetT) 0x7FFFFFFF)
#endif
/* Macros for sign extending from 16- and 32-bits. */
but really a predicate should be found to use the non-cast forms. */
#if 1
-#define sign_extend_16(x) ((short)(x))
-#define sign_extend_32(x) ((int)(x))
+#define sign_extend_16(x) ((short) (x))
+#define sign_extend_32(x) ((int) (x))
#else
-#define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
-#define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
+#define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
+#define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
^ 0x80000000) - 0x80000000)
#endif
-/* Macros to build tokens */
+/* Macros to build tokens. */
-#define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_register, \
(t).X_add_number = (r))
-#define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_pregister, \
(t).X_add_number = (r))
-#define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_cpregister, \
(t).X_add_number = (r))
-#define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_register, \
- (t).X_add_number = (r)+32)
-#define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
+ (t).X_add_number = (r) + 32)
+#define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_symbol, \
(t).X_add_symbol = (s), \
(t).X_add_number = (a))
-#define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_constant, \
(t).X_add_number = (n))
-
-\f
-/* Prototypes for all local functions */
-
-static int tokenize_arguments PARAMS ((char *, expressionS *, int));
-static const struct alpha_opcode *find_opcode_match
- PARAMS ((const struct alpha_opcode *, const expressionS *, int *, int *));
-static const struct alpha_macro *find_macro_match
- PARAMS ((const struct alpha_macro *, const expressionS *, int *));
-static unsigned insert_operand
- PARAMS ((unsigned, const struct alpha_operand *, offsetT, char *, unsigned));
-static void assemble_insn
- PARAMS ((const struct alpha_opcode *, const expressionS *, int,
- struct alpha_insn *));
-static void emit_insn PARAMS ((struct alpha_insn *));
-static void assemble_tokens_to_insn
- PARAMS ((const char *, const expressionS *, int, struct alpha_insn *));
-static void assemble_tokens
- PARAMS ((const char *, const expressionS *, int, int));
-
-static int load_expression
- PARAMS ((int, const expressionS *, int *, expressionS *));
-
-static void emit_ldgp PARAMS ((const expressionS *, int, const PTR));
-static void emit_division PARAMS ((const expressionS *, int, const PTR));
-static void emit_lda PARAMS ((const expressionS *, int, const PTR));
-static void emit_ldah PARAMS ((const expressionS *, int, const PTR));
-static void emit_ir_load PARAMS ((const expressionS *, int, const PTR));
-static void emit_loadstore PARAMS ((const expressionS *, int, const PTR));
-static void emit_jsrjmp PARAMS ((const expressionS *, int, const PTR));
-static void emit_ldX PARAMS ((const expressionS *, int, const PTR));
-static void emit_ldXu PARAMS ((const expressionS *, int, const PTR));
-static void emit_uldX PARAMS ((const expressionS *, int, const PTR));
-static void emit_uldXu PARAMS ((const expressionS *, int, const PTR));
-static void emit_ldil PARAMS ((const expressionS *, int, const PTR));
-static void emit_stX PARAMS ((const expressionS *, int, const PTR));
-static void emit_ustX PARAMS ((const expressionS *, int, const PTR));
-static void emit_sextX PARAMS ((const expressionS *, int, const PTR));
-static void emit_retjcr PARAMS ((const expressionS *, int, const PTR));
-
-static void s_alpha_text PARAMS ((int));
-static void s_alpha_data PARAMS ((int));
-#ifndef OBJ_ELF
-static void s_alpha_comm PARAMS ((int));
-#endif
-#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
-static void s_alpha_rdata PARAMS ((int));
-#endif
-#ifdef OBJ_ECOFF
-static void s_alpha_sdata PARAMS ((int));
-#endif
-#ifdef OBJ_ELF
-static void s_alpha_section PARAMS ((int));
-#endif
-#ifdef OBJ_EVAX
-static void s_alpha_section PARAMS ((int));
-#endif
-static void s_alpha_gprel32 PARAMS ((int));
-static void s_alpha_float_cons PARAMS ((int));
-static void s_alpha_proc PARAMS ((int));
-static void s_alpha_set PARAMS ((int));
-static void s_alpha_base PARAMS ((int));
-static void s_alpha_align PARAMS ((int));
-static void s_alpha_stringer PARAMS ((int));
-static void s_alpha_space PARAMS ((int));
-
-static void create_literal_section PARAMS ((const char *, segT *, symbolS **));
-#ifndef OBJ_ELF
-static void select_gp_value PARAMS ((void));
-#endif
-static void alpha_align PARAMS ((int, char *, symbolS *, int));
-
\f
/* Generic assembler global variables which must be defined by all
targets. */
-/* These are exported to relaxing code, even though we don't do any
- relaxing on this processor currently. */
-int md_short_jump_size = 4;
-int md_long_jump_size = 4;
-
/* Characters which always start a comment. */
const char comment_chars[] = "#";
/* Characters which mean that a number is a floating point constant,
as in 0d1.0. */
-#if 0
-const char FLT_CHARS[] = "dD";
-#else
/* XXX: Do all of these really get used on the alpha?? */
char FLT_CHARS[] = "rRsSfFdDxXpP";
-#endif
#ifdef OBJ_EVAX
const char *md_shortopts = "Fm:g+1h:HG:";
const char *md_shortopts = "Fm:gG:";
#endif
-struct option md_longopts[] = {
+struct option md_longopts[] =
+ {
#define OPTION_32ADDR (OPTION_MD_BASE)
- { "32addr", no_argument, NULL, OPTION_32ADDR },
-#define OPTION_RELAX (OPTION_32ADDR+1)
- { "relax", no_argument, NULL, OPTION_RELAX },
- { NULL, no_argument, NULL, 0 }
-};
-
-size_t md_longopts_size = sizeof(md_longopts);
+ { "32addr", no_argument, NULL, OPTION_32ADDR },
+#define OPTION_RELAX (OPTION_32ADDR + 1)
+ { "relax", no_argument, NULL, OPTION_RELAX },
+#ifdef OBJ_ELF
+#define OPTION_MDEBUG (OPTION_RELAX + 1)
+#define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
+ { "mdebug", no_argument, NULL, OPTION_MDEBUG },
+ { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
+#endif
+#ifdef OBJ_EVAX
+#define OPTION_REPLACE (OPTION_RELAX + 1)
+#define OPTION_NOREPLACE (OPTION_REPLACE+1)
+ { "replace", no_argument, NULL, OPTION_REPLACE },
+ { "noreplace", no_argument, NULL, OPTION_NOREPLACE },
+#endif
+ { NULL, no_argument, NULL, 0 }
+ };
+size_t md_longopts_size = sizeof (md_longopts);
\f
#ifdef OBJ_EVAX
#define AXP_REG_R0 0
#undef AXP_REG_GP
#define AXP_REG_GP AXP_REG_PV
+
+static struct hash_control *alpha_evax_proc_hash;
+
#endif /* OBJ_EVAX */
-/* The cpu for which we are generating code */
+/* The cpu for which we are generating code. */
static unsigned alpha_target = AXP_OPCODE_BASE;
static const char *alpha_target_name = "<all>";
-/* The hash table of instruction opcodes */
+/* The hash table of instruction opcodes. */
static struct hash_control *alpha_opcode_hash;
-/* The hash table of macro opcodes */
+/* The hash table of macro opcodes. */
static struct hash_control *alpha_macro_hash;
#ifdef OBJ_ECOFF
-/* The $gp relocation symbol */
+/* The $gp relocation symbol. */
static symbolS *alpha_gp_symbol;
/* XXX: what is this, and why is it exported? */
valueT alpha_gp_value;
#endif
-/* The current $gp register */
+/* The current $gp register. */
static int alpha_gp_register = AXP_REG_GP;
-/* A table of the register symbols */
+/* A table of the register symbols. */
static symbolS *alpha_register_table[64];
-/* Constant sections, or sections of constants */
+/* Constant sections, or sections of constants. */
#ifdef OBJ_ECOFF
static segT alpha_lita_section;
-static segT alpha_lit4_section;
#endif
#ifdef OBJ_EVAX
-static segT alpha_link_section;
-static segT alpha_ctors_section;
-static segT alpha_dtors_section;
+segT alpha_link_section;
#endif
+#ifndef OBJ_EVAX
static segT alpha_lit8_section;
+#endif
-/* Symbols referring to said sections. */
+/* Symbols referring to said sections. */
#ifdef OBJ_ECOFF
static symbolS *alpha_lita_symbol;
-static symbolS *alpha_lit4_symbol;
#endif
#ifdef OBJ_EVAX
static symbolS *alpha_link_symbol;
-static symbolS *alpha_ctors_symbol;
-static symbolS *alpha_dtors_symbol;
#endif
+#ifndef OBJ_EVAX
static symbolS *alpha_lit8_symbol;
+#endif
-/* Literal for .litX+0x8000 within .lita */
+/* Literal for .litX+0x8000 within .lita. */
#ifdef OBJ_ECOFF
-static offsetT alpha_lit4_literal;
static offsetT alpha_lit8_literal;
#endif
-/* Is the assembler not allowed to use $at? */
+/* Is the assembler not allowed to use $at? */
static int alpha_noat_on = 0;
-/* Are macros enabled? */
+/* Are macros enabled? */
static int alpha_macros_on = 1;
-/* Are floats disabled? */
+/* Are floats disabled? */
static int alpha_nofloats_on = 0;
-/* Are addresses 32 bit? */
+/* Are addresses 32 bit? */
static int alpha_addr32_on = 0;
/* Symbol labelling the current insn. When the Alpha gas sees
and the section happens to not be on an eight byte boundary, it
will align both the symbol and the .quad to an eight byte boundary. */
static symbolS *alpha_insn_label;
+#if defined(OBJ_ELF) || defined (OBJ_EVAX)
+static symbolS *alpha_prologue_label;
+#endif
+
+#ifdef OBJ_EVAX
+/* Symbol associate with the current jsr instruction. */
+static symbolS *alpha_linkage_symbol;
+#endif
/* Whether we should automatically align data generation pseudo-ops.
.align 0 will turn this off. */
/* Whether the debugging option was seen. */
static int alpha_debug;
+#ifdef OBJ_ELF
+/* Whether we are emitting an mdebug section. */
+int alpha_flag_mdebug = -1;
+#endif
+
+#ifdef OBJ_EVAX
+/* Whether to perform the VMS procedure call optimization. */
+int alpha_flag_replace = 1;
+#endif
+
/* Don't fully resolve relocations, allowing code movement in the linker. */
static int alpha_flag_relax;
#ifdef OBJ_EVAX
/* Collect information about current procedure here. */
-static struct {
- symbolS *symbol; /* proc pdesc symbol */
+struct alpha_evax_procs
+{
+ symbolS *symbol; /* Proc pdesc symbol. */
int pdsckind;
- int framereg; /* register for frame pointer */
- int framesize; /* size of frame */
+ int framereg; /* Register for frame pointer. */
+ int framesize; /* Size of frame. */
int rsa_offset;
int ra_save;
int fp_save;
long fmask;
int type;
int prologue;
-} alpha_evax_proc;
+ symbolS *handler;
+ int handler_data;
+};
+
+struct alpha_linkage_fixups *alpha_linkage_fixup_root;
+static struct alpha_linkage_fixups *alpha_linkage_fixup_tail;
+
+static struct alpha_evax_procs *alpha_evax_proc;
static int alpha_flag_hash_long_names = 0; /* -+ */
static int alpha_flag_show_after_trunc = 0; /* -H */
/* If the -+ switch is given, then a hash is appended to any name that is
- * longer than 64 characters, else longer symbol names are truncated.
- */
+ longer than 64 characters, else longer symbol names are truncated. */
+
+#endif
+\f
+#ifdef RELOC_OP_P
+/* A table to map the spelling of a relocation operand into an appropriate
+ bfd_reloc_code_real_type type. The table is assumed to be ordered such
+ that op-O_literal indexes into it. */
+
+#define ALPHA_RELOC_TABLE(op) \
+(&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
+ ? (abort (), 0) \
+ : (int) (op) - (int) O_literal) ])
+
+#define DEF(NAME, RELOC, REQ, ALLOW) \
+ { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
+
+static const struct alpha_reloc_op_tag
+{
+ const char *name; /* String to lookup. */
+ size_t length; /* Size of the string. */
+ operatorT op; /* Which operator to use. */
+ bfd_reloc_code_real_type reloc; /* Relocation before frob. */
+ unsigned int require_seq : 1; /* Require a sequence number. */
+ unsigned int allow_seq : 1; /* Allow a sequence number. */
+}
+alpha_reloc_op[] =
+{
+ DEF (literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
+ DEF (lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
+ DEF (lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
+ DEF (lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1),
+ DEF (lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1),
+ DEF (lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1),
+ DEF (lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1),
+ DEF (lituse_jsrdirect, DUMMY_RELOC_LITUSE_JSRDIRECT, 1, 1),
+ DEF (gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1),
+ DEF (gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0),
+ DEF (gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0),
+ DEF (gprel, BFD_RELOC_GPREL16, 0, 0),
+ DEF (samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0),
+ DEF (tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1),
+ DEF (tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1),
+ DEF (gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0),
+ DEF (dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0),
+ DEF (dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0),
+ DEF (dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0),
+ DEF (gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0),
+ DEF (tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0),
+ DEF (tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0),
+ DEF (tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0),
+};
+
+#undef DEF
+
+static const int alpha_num_reloc_op
+ = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
+#endif /* RELOC_OP_P */
+/* Maximum # digits needed to hold the largest sequence #. */
+#define ALPHA_RELOC_DIGITS 25
+
+/* Structure to hold explicit sequence information. */
+struct alpha_reloc_tag
+{
+ fixS *master; /* The literal reloc. */
+#ifdef OBJ_EVAX
+ struct symbol *sym;
+ struct symbol *psym;
#endif
+ fixS *slaves; /* Head of linked list of lituses. */
+ segT segment; /* Segment relocs are in or undefined_section. */
+ long sequence; /* Sequence #. */
+ unsigned n_master; /* # of literals. */
+ unsigned n_slaves; /* # of lituses. */
+ unsigned saw_tlsgd : 1; /* True if ... */
+ unsigned saw_tlsldm : 1;
+ unsigned saw_lu_tlsgd : 1;
+ unsigned saw_lu_tlsldm : 1;
+ unsigned multi_section_p : 1; /* True if more than one section was used. */
+ char string[1]; /* Printable form of sequence to hash with. */
+};
+
+/* Hash table to link up literals with the appropriate lituse. */
+static struct hash_control *alpha_literal_hash;
+
+/* Sequence numbers for internal use by macros. */
+static long next_sequence_num = -1;
\f
/* A table of CPU names and opcode sets. */
{
const char *name;
unsigned flags;
-} cpu_types[] =
+}
+cpu_types[] =
{
/* Ad hoc convention: cpu number gets palcode, process code doesn't.
- This supports usage under DU 4.0b that does ".arch ev4", and
+ This supports usage under DU 4.0b that does ".arch ev4", and
usage in MILO that does -m21064. Probably something more
specific like -m21064-pal should be used, but oh well. */
{ "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
{ "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
{ "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 },
- /* Do we have CIX extension here? */
{ "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX },
- /* Still same PALcodes? */
{ "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX
|AXP_OPCODE_MAX) },
- /* All new PALcodes? Extras? */
- { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_BWX
- |AXP_OPCODE_CIX|AXP_OPCODE_MAX) },
+ { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
+ |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
+ { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
+ |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
+ { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
+ |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
{ "ev4", AXP_OPCODE_BASE },
{ "ev45", AXP_OPCODE_BASE },
{ "ev5", AXP_OPCODE_BASE },
{ "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
{ "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
- { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_CIX|AXP_OPCODE_MAX },
+ { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
+ { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
+ { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
{ "all", AXP_OPCODE_BASE },
- { 0 }
+ { 0, 0 }
};
-/* The macro table */
-
-static const struct alpha_macro alpha_macros[] = {
-/* Load/Store macros */
- { "lda", emit_lda, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldah", emit_ldah, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_EOA } },
-
- { "ldl", emit_ir_load, "ldl",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldl_l", emit_ir_load, "ldl_l",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldq", emit_ir_load, "ldq",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldq_l", emit_ir_load, "ldq_l",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldq_u", emit_ir_load, "ldq_u",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldf", emit_loadstore, "ldf",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldg", emit_loadstore, "ldg",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "lds", emit_loadstore, "lds",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldt", emit_loadstore, "ldt",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
-
- { "ldb", emit_ldX, (PTR)0,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldbu", emit_ldXu, (PTR)0,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldw", emit_ldX, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldwu", emit_ldXu, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
-
- { "uldw", emit_uldX, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "uldwu", emit_uldXu, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "uldl", emit_uldX, (PTR)2,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "uldlu", emit_uldXu, (PTR)2,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "uldq", emit_uldXu, (PTR)3,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
-
- { "ldgp", emit_ldgp, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
+/* Some instruction sets indexed by lg(size). */
+static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
+static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
+static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
+static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
+static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
+static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
+static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
+static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
+static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
- { "ldi", emit_lda, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldil", emit_ldil, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldiq", emit_lda, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_EOA } },
-#if 0
- { "ldif" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldid" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldig" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldis" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldit" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+static void assemble_insn (const struct alpha_opcode *, const expressionS *, int, struct alpha_insn *, bfd_reloc_code_real_type);
+static void emit_insn (struct alpha_insn *);
+static void assemble_tokens (const char *, const expressionS *, int, int);
+#ifdef OBJ_EVAX
+static char *s_alpha_section_name (void);
+static symbolS *add_to_link_pool (symbolS *, symbolS *, offsetT);
#endif
+\f
+static struct alpha_reloc_tag *
+get_alpha_reloc_tag (long sequence)
+{
+ char buffer[ALPHA_RELOC_DIGITS];
+ struct alpha_reloc_tag *info;
- { "stl", emit_loadstore, "stl",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "stl_c", emit_loadstore, "stl_c",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "stq", emit_loadstore, "stq",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "stq_c", emit_loadstore, "stq_c",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "stq_u", emit_loadstore, "stq_u",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "stf", emit_loadstore, "stf",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "stg", emit_loadstore, "stg",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "sts", emit_loadstore, "sts",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "stt", emit_loadstore, "stt",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
-
- { "stb", emit_stX, (PTR)0,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "stw", emit_stX, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ustw", emit_ustX, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ustl", emit_ustX, (PTR)2,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ustq", emit_ustX, (PTR)3,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
-
-/* Arithmetic macros */
-#if 0
- { "absl" emit_absl, 1, { IR } },
- { "absl" emit_absl, 2, { IR, IR } },
- { "absl" emit_absl, 2, { EXP, IR } },
- { "absq" emit_absq, 1, { IR } },
- { "absq" emit_absq, 2, { IR, IR } },
- { "absq" emit_absq, 2, { EXP, IR } },
-#endif
+ sprintf (buffer, "!%ld", sequence);
- { "sextb", emit_sextX, (PTR)0,
- { MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
- { "sextw", emit_sextX, (PTR)1,
- { MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
+ info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer);
+ if (! info)
+ {
+ size_t len = strlen (buffer);
+ const char *errmsg;
- { "divl", emit_division, "__divl",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "divlu", emit_division, "__divlu",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "divq", emit_division, "__divq",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "divqu", emit_division, "__divqu",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "reml", emit_division, "__reml",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "remlu", emit_division, "__remlu",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "remq", emit_division, "__remq",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "remqu", emit_division, "__remqu",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ info = xcalloc (sizeof (struct alpha_reloc_tag) + len, 1);
- { "jsr", emit_jsrjmp, "jsr",
- { MACRO_PIR, MACRO_EXP, MACRO_EOA,
- MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA,
- MACRO_EXP, MACRO_EOA } },
- { "jmp", emit_jsrjmp, "jmp",
- { MACRO_PIR, MACRO_EXP, MACRO_EOA,
- MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA,
- MACRO_EXP, MACRO_EOA } },
- { "ret", emit_retjcr, "ret",
- { MACRO_IR, MACRO_EXP, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- MACRO_PIR, MACRO_EXP, MACRO_EOA,
- MACRO_PIR, MACRO_EOA,
- MACRO_EXP, MACRO_EOA,
- MACRO_EOA } },
- { "jcr", emit_retjcr, "jcr",
- { MACRO_IR, MACRO_EXP, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- MACRO_PIR, MACRO_EXP, MACRO_EOA,
- MACRO_PIR, MACRO_EOA,
- MACRO_EXP, MACRO_EOA,
- MACRO_EOA } },
- { "jsr_coroutine", emit_retjcr, "jcr",
- { MACRO_IR, MACRO_EXP, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- MACRO_PIR, MACRO_EXP, MACRO_EOA,
- MACRO_PIR, MACRO_EOA,
- MACRO_EXP, MACRO_EOA,
- MACRO_EOA } },
-};
+ info->segment = now_seg;
+ info->sequence = sequence;
+ strcpy (info->string, buffer);
+ errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info);
+ if (errmsg)
+ as_fatal (errmsg);
+#ifdef OBJ_EVAX
+ info->sym = 0;
+ info->psym = 0;
+#endif
+ }
-static const int alpha_num_macros
- = sizeof(alpha_macros) / sizeof(*alpha_macros);
-\f
-/* Public interface functions */
+ return info;
+}
-/* This function is called once, at assembler startup time. It sets
- up all the tables, etc. that the MD part of the assembler will
- need, that can be determined before arguments are parsed. */
+#ifndef OBJ_EVAX
-void
-md_begin ()
+static void
+alpha_adjust_relocs (bfd *abfd ATTRIBUTE_UNUSED,
+ asection *sec,
+ void * ptr ATTRIBUTE_UNUSED)
{
- unsigned int i;
+ segment_info_type *seginfo = seg_info (sec);
+ fixS **prevP;
+ fixS *fixp;
+ fixS *next;
+ fixS *slave;
+
+ /* If seginfo is NULL, we did not create this section; don't do
+ anything with it. By using a pointer to a pointer, we can update
+ the links in place. */
+ if (seginfo == NULL)
+ return;
- /* Create the opcode hash table */
+ /* If there are no relocations, skip the section. */
+ if (! seginfo->fix_root)
+ return;
- alpha_opcode_hash = hash_new ();
- for (i = 0; i < alpha_num_opcodes; )
+ /* First rebuild the fixup chain without the explicit lituse and
+ gpdisp_lo16 relocs. */
+ prevP = &seginfo->fix_root;
+ for (fixp = seginfo->fix_root; fixp; fixp = next)
{
- const char *name, *retval, *slash;
+ next = fixp->fx_next;
+ fixp->fx_next = (fixS *) 0;
- name = alpha_opcodes[i].name;
- retval = hash_insert (alpha_opcode_hash, name, (PTR)&alpha_opcodes[i]);
- if (retval)
- as_fatal (_("internal error: can't hash opcode `%s': %s"), name, retval);
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_LITUSE:
+ if (fixp->tc_fix_data.info->n_master == 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No !literal!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+#ifdef RELOC_OP_P
+ if (fixp->fx_offset == LITUSE_ALPHA_TLSGD)
+ {
+ if (! fixp->tc_fix_data.info->saw_tlsgd)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No !tlsgd!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ }
+ else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM)
+ {
+ if (! fixp->tc_fix_data.info->saw_tlsldm)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No !tlsldm!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ }
+#endif
+ break;
- /* Some opcodes include modifiers of various sorts with a "/mod"
- syntax, like the architecture manual suggests. However, for
- use with gcc at least, we also need access to those same opcodes
- without the "/". */
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ if (fixp->tc_fix_data.info->n_master == 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No ldah !gpdisp!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ break;
- if ((slash = strchr (name, '/')) != NULL)
- {
- char *p = xmalloc (strlen (name));
- memcpy (p, name, slash - name);
- strcpy (p + (slash - name), slash + 1);
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ if (fixp->tc_fix_data.info
+ && (fixp->tc_fix_data.info->saw_tlsgd
+ || fixp->tc_fix_data.info->saw_tlsldm))
+ break;
+ /* FALLTHRU */
- (void)hash_insert(alpha_opcode_hash, p, (PTR)&alpha_opcodes[i]);
- /* Ignore failures -- the opcode table does duplicate some
- variants in different forms, like "hw_stq" and "hw_st/q". */
+ default:
+ *prevP = fixp;
+ prevP = &fixp->fx_next;
+ break;
}
-
- while (++i < alpha_num_opcodes
- && (alpha_opcodes[i].name == name
- || !strcmp (alpha_opcodes[i].name, name)))
- continue;
}
- /* Create the macro hash table */
+ /* Go back and re-chain dependent relocations. They are currently
+ linked through the next_reloc field in reverse order, so as we
+ go through the next_reloc chain, we effectively reverse the chain
+ once again.
- alpha_macro_hash = hash_new ();
- for (i = 0; i < alpha_num_macros; )
- {
- const char *name, *retval;
+ Except if there is more than one !literal for a given sequence
+ number. In that case, the programmer and/or compiler is not sure
+ how control flows from literal to lituse, and we can't be sure to
+ get the relaxation correct.
- name = alpha_macros[i].name;
- retval = hash_insert (alpha_macro_hash, name, (PTR)&alpha_macros[i]);
- if (retval)
- as_fatal (_("internal error: can't hash macro `%s': %s"), name, retval);
+ ??? Well, actually we could, if there are enough lituses such that
+ we can make each literal have at least one of each lituse type
+ present. Not implemented.
- while (++i < alpha_num_macros
- && (alpha_macros[i].name == name
- || !strcmp (alpha_macros[i].name, name)))
- continue;
- }
+ Also suppress the optimization if the !literals/!lituses are spread
+ in different segments. This can happen with "intersting" uses of
+ inline assembly; examples are present in the Linux kernel semaphores. */
- /* Construct symbols for each of the registers */
-
- for (i = 0; i < 32; ++i)
- {
- char name[4];
- sprintf(name, "$%d", i);
- alpha_register_table[i] = symbol_create(name, reg_section, i,
- &zero_address_frag);
- }
- for (; i < 64; ++i)
+ for (fixp = seginfo->fix_root; fixp; fixp = next)
{
- char name[5];
- sprintf(name, "$f%d", i-32);
- alpha_register_table[i] = symbol_create(name, reg_section, i,
- &zero_address_frag);
- }
-
- /* Create the special symbols and sections we'll be using */
-
- /* So .sbss will get used for tiny objects. */
- bfd_set_gp_size (stdoutput, g_switch_value);
-
-#ifdef OBJ_ECOFF
- create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
+ next = fixp->fx_next;
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ if (!fixp->tc_fix_data.info)
+ break;
+ if (fixp->tc_fix_data.info->n_master == 0)
+ break;
+ else if (fixp->tc_fix_data.info->n_master > 1)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("too many !literal!%ld for %s"),
+ fixp->tc_fix_data.info->sequence,
+ (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD
+ ? "!tlsgd" : "!tlsldm"));
+ break;
+ }
- /* For handling the GP, create a symbol that won't be output in the
- symbol table. We'll edit it out of relocs later. */
- alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
- &zero_address_frag);
-#endif
+ fixp->tc_fix_data.info->master->fx_next = fixp->fx_next;
+ fixp->fx_next = fixp->tc_fix_data.info->master;
+ fixp = fixp->fx_next;
+ /* Fall through. */
-#ifdef OBJ_EVAX
- create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
-#endif
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ if (fixp->tc_fix_data.info
+ && fixp->tc_fix_data.info->n_master == 1
+ && ! fixp->tc_fix_data.info->multi_section_p)
+ {
+ for (slave = fixp->tc_fix_data.info->slaves;
+ slave != (fixS *) 0;
+ slave = slave->tc_fix_data.next_reloc)
+ {
+ slave->fx_next = fixp->fx_next;
+ fixp->fx_next = slave;
+ }
+ }
+ break;
-#ifdef OBJ_ELF
- if (ECOFF_DEBUGGING)
- {
- segT sec;
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ if (fixp->tc_fix_data.info->n_slaves == 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No lda !gpdisp!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ else
+ {
+ slave = fixp->tc_fix_data.info->slaves;
+ slave->fx_next = next;
+ fixp->fx_next = slave;
+ }
+ break;
- sec = subseg_new(".mdebug", (subsegT)0);
- bfd_set_section_flags(stdoutput, sec, SEC_HAS_CONTENTS|SEC_READONLY);
- bfd_set_section_alignment(stdoutput, sec, 3);
-
-#ifdef ERIC_neverdef
- sec = subseg_new(".reginfo", (subsegT)0);
- /* The ABI says this section should be loaded so that the running
- program can access it. */
- bfd_set_section_flags(stdoutput, sec,
- SEC_ALLOC|SEC_LOAD|SEC_READONLY|SEC_DATA);
- bfd_set_section_alignement(stdoutput, sec, 3);
-#endif
+ default:
+ break;
+ }
}
-#endif /* OBJ_ELF */
-
- subseg_set(text_section, 0);
}
-/* The public interface to the instruction assembler. */
+/* Before the relocations are written, reorder them, so that user
+ supplied !lituse relocations follow the appropriate !literal
+ relocations, and similarly for !gpdisp relocations. */
void
-md_assemble (str)
- char *str;
+alpha_before_fix (void)
{
- char opname[32]; /* current maximum is 13 */
- expressionS tok[MAX_INSN_ARGS];
- int ntok, opnamelen, trunclen;
+ if (alpha_literal_hash)
+ bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL);
+}
- /* split off the opcode */
- opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/48");
- trunclen = (opnamelen < sizeof (opname) - 1
- ? opnamelen
- : sizeof (opname) - 1);
- memcpy (opname, str, trunclen);
- opname[trunclen] = '\0';
+#endif
+\f
+#ifdef DEBUG_ALPHA
+static void
+debug_exp (expressionS tok[], int ntok)
+{
+ int i;
- /* tokenize the rest of the line */
- if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
+ fprintf (stderr, "debug_exp: %d tokens", ntok);
+ for (i = 0; i < ntok; i++)
{
- as_bad (_("syntax error"));
- return;
- }
+ expressionS *t = &tok[i];
+ const char *name;
- /* finish it off */
- assemble_tokens (opname, tok, ntok, alpha_macros_on);
+ switch (t->X_op)
+ {
+ default: name = "unknown"; break;
+ case O_illegal: name = "O_illegal"; break;
+ case O_absent: name = "O_absent"; break;
+ case O_constant: name = "O_constant"; break;
+ case O_symbol: name = "O_symbol"; break;
+ case O_symbol_rva: name = "O_symbol_rva"; break;
+ case O_register: name = "O_register"; break;
+ case O_big: name = "O_big"; break;
+ case O_uminus: name = "O_uminus"; break;
+ case O_bit_not: name = "O_bit_not"; break;
+ case O_logical_not: name = "O_logical_not"; break;
+ case O_multiply: name = "O_multiply"; break;
+ case O_divide: name = "O_divide"; break;
+ case O_modulus: name = "O_modulus"; break;
+ case O_left_shift: name = "O_left_shift"; break;
+ case O_right_shift: name = "O_right_shift"; break;
+ case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
+ case O_bit_or_not: name = "O_bit_or_not"; break;
+ case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
+ case O_bit_and: name = "O_bit_and"; break;
+ case O_add: name = "O_add"; break;
+ case O_subtract: name = "O_subtract"; break;
+ case O_eq: name = "O_eq"; break;
+ case O_ne: name = "O_ne"; break;
+ case O_lt: name = "O_lt"; break;
+ case O_le: name = "O_le"; break;
+ case O_ge: name = "O_ge"; break;
+ case O_gt: name = "O_gt"; break;
+ case O_logical_and: name = "O_logical_and"; break;
+ case O_logical_or: name = "O_logical_or"; break;
+ case O_index: name = "O_index"; break;
+ case O_pregister: name = "O_pregister"; break;
+ case O_cpregister: name = "O_cpregister"; break;
+ case O_literal: name = "O_literal"; break;
+ case O_lituse_addr: name = "O_lituse_addr"; break;
+ case O_lituse_base: name = "O_lituse_base"; break;
+ case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
+ case O_lituse_jsr: name = "O_lituse_jsr"; break;
+ case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break;
+ case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break;
+ case O_lituse_jsrdirect: name = "O_lituse_jsrdirect"; break;
+ case O_gpdisp: name = "O_gpdisp"; break;
+ case O_gprelhigh: name = "O_gprelhigh"; break;
+ case O_gprellow: name = "O_gprellow"; break;
+ case O_gprel: name = "O_gprel"; break;
+ case O_samegp: name = "O_samegp"; break;
+ case O_tlsgd: name = "O_tlsgd"; break;
+ case O_tlsldm: name = "O_tlsldm"; break;
+ case O_gotdtprel: name = "O_gotdtprel"; break;
+ case O_dtprelhi: name = "O_dtprelhi"; break;
+ case O_dtprello: name = "O_dtprello"; break;
+ case O_dtprel: name = "O_dtprel"; break;
+ case O_gottprel: name = "O_gottprel"; break;
+ case O_tprelhi: name = "O_tprelhi"; break;
+ case O_tprello: name = "O_tprello"; break;
+ case O_tprel: name = "O_tprel"; break;
+ }
+
+ fprintf (stderr, ", %s(%s, %s, %d)", name,
+ (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
+ (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
+ (int) t->X_add_number);
+ }
+ fprintf (stderr, "\n");
+ fflush (stderr);
}
+#endif
-/* Round up a section's size to the appropriate boundary. */
+/* Parse the arguments to an opcode. */
-valueT
-md_section_align (seg, size)
- segT seg;
- valueT size;
+static int
+tokenize_arguments (char *str,
+ expressionS tok[],
+ int ntok)
{
- int align = bfd_get_section_alignment(stdoutput, seg);
- valueT mask = ((valueT)1 << align) - 1;
-
- return (size + mask) & ~mask;
-}
-
-/* Turn a string in input_line_pointer into a floating point constant
- of type type, and store the appropriate bytes in *litP. The number
- of LITTLENUMS emitted is stored in *sizeP. An error message is
- returned, or NULL on OK. */
+ expressionS *end_tok = tok + ntok;
+ char *old_input_line_pointer;
+ int saw_comma = 0, saw_arg = 0;
+#ifdef DEBUG_ALPHA
+ expressionS *orig_tok = tok;
+#endif
+#ifdef RELOC_OP_P
+ char *p;
+ const struct alpha_reloc_op_tag *r;
+ int c, i;
+ size_t len;
+ int reloc_found_p = 0;
+#endif
-/* Equal to MAX_PRECISION in atof-ieee.c */
-#define MAX_LITTLENUMS 6
+ memset (tok, 0, sizeof (*tok) * ntok);
-extern char *vax_md_atof PARAMS ((int, char *, int *));
+ /* Save and restore input_line_pointer around this function. */
+ old_input_line_pointer = input_line_pointer;
+ input_line_pointer = str;
-char *
-md_atof (type, litP, sizeP)
- char type;
- char *litP;
- int *sizeP;
-{
- int prec;
- LITTLENUM_TYPE words[MAX_LITTLENUMS];
- LITTLENUM_TYPE *wordP;
- char *t;
+#ifdef RELOC_OP_P
+ /* ??? Wrest control of ! away from the regular expression parser. */
+ is_end_of_line[(unsigned char) '!'] = 1;
+#endif
- switch (type)
+ while (tok < end_tok && *input_line_pointer)
{
- /* VAX floats */
- case 'G':
- /* VAX md_atof doesn't like "G" for some reason. */
- type = 'g';
- case 'F':
- case 'D':
- return vax_md_atof (type, litP, sizeP);
-
- /* IEEE floats */
- case 'f':
- prec = 2;
- break;
+ SKIP_WHITESPACE ();
+ switch (*input_line_pointer)
+ {
+ case '\0':
+ goto fini;
- case 'd':
- prec = 4;
- break;
+#ifdef RELOC_OP_P
+ case '!':
+ /* A relocation operand can be placed after the normal operand on an
+ assembly language statement, and has the following form:
+ !relocation_type!sequence_number. */
+ if (reloc_found_p)
+ {
+ /* Only support one relocation op per insn. */
+ as_bad (_("More than one relocation op per insn"));
+ goto err_report;
+ }
- case 'x':
- case 'X':
- prec = 6;
- break;
+ if (!saw_arg)
+ goto err;
- case 'p':
- case 'P':
- prec = 6;
- break;
+ ++input_line_pointer;
+ SKIP_WHITESPACE ();
+ p = input_line_pointer;
+ c = get_symbol_end ();
- default:
- *sizeP = 0;
- return _("Bad call to MD_ATOF()");
- }
- t = atof_ieee (input_line_pointer, type, words);
- if (t)
- input_line_pointer = t;
- *sizeP = prec * sizeof (LITTLENUM_TYPE);
+ /* Parse !relocation_type. */
+ len = input_line_pointer - p;
+ if (len == 0)
+ {
+ as_bad (_("No relocation operand"));
+ goto err_report;
+ }
- for (wordP = words + prec - 1; prec--;)
- {
- md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
- litP += sizeof (LITTLENUM_TYPE);
- }
+ r = &alpha_reloc_op[0];
+ for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
+ if (len == r->length && memcmp (p, r->name, len) == 0)
+ break;
+ if (i < 0)
+ {
+ as_bad (_("Unknown relocation operand: !%s"), p);
+ goto err_report;
+ }
- return 0;
-}
+ *input_line_pointer = c;
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer != '!')
+ {
+ if (r->require_seq)
+ {
+ as_bad (_("no sequence number after !%s"), p);
+ goto err_report;
+ }
-/* Take care of the target-specific command-line options. */
+ tok->X_add_number = 0;
+ }
+ else
+ {
+ if (! r->allow_seq)
+ {
+ as_bad (_("!%s does not use a sequence number"), p);
+ goto err_report;
+ }
-int
-md_parse_option (c, arg)
- int c;
- char *arg;
-{
- switch (c)
- {
- case 'F':
- alpha_nofloats_on = 1;
- break;
+ input_line_pointer++;
- case OPTION_32ADDR:
- alpha_addr32_on = 1;
- break;
+ /* Parse !sequence_number. */
+ expression (tok);
+ if (tok->X_op != O_constant || tok->X_add_number <= 0)
+ {
+ as_bad (_("Bad sequence number: !%s!%s"),
+ r->name, input_line_pointer);
+ goto err_report;
+ }
+ }
- case 'g':
- alpha_debug = 1;
- break;
+ tok->X_op = r->op;
+ reloc_found_p = 1;
+ ++tok;
+ break;
+#endif /* RELOC_OP_P */
- case 'G':
- g_switch_value = atoi(arg);
- break;
+ case ',':
+ ++input_line_pointer;
+ if (saw_comma || !saw_arg)
+ goto err;
+ saw_comma = 1;
+ break;
- case 'm':
- {
- const struct cpu_type *p;
- for (p = cpu_types; p->name; ++p)
- if (strcmp(arg, p->name) == 0)
- {
- alpha_target_name = p->name, alpha_target = p->flags;
- goto found;
- }
- as_warn(_("Unknown CPU identifier `%s'"), arg);
- found:;
- }
- break;
+ case '(':
+ {
+ char *hold = input_line_pointer++;
-#ifdef OBJ_EVAX
- case '+': /* For g++. Hash any name > 63 chars long. */
- alpha_flag_hash_long_names = 1;
- break;
+ /* First try for parenthesized register ... */
+ expression (tok);
+ if (*input_line_pointer == ')' && tok->X_op == O_register)
+ {
+ tok->X_op = (saw_comma ? O_cpregister : O_pregister);
+ saw_comma = 0;
+ saw_arg = 1;
+ ++input_line_pointer;
+ ++tok;
+ break;
+ }
- case 'H': /* Show new symbol after hash truncation */
- alpha_flag_show_after_trunc = 1;
- break;
+ /* ... then fall through to plain expression. */
+ input_line_pointer = hold;
+ }
- case 'h': /* for gnu-c/vax compatibility. */
- break;
-#endif
+ default:
+ if (saw_arg && !saw_comma)
+ goto err;
- case OPTION_RELAX:
- alpha_flag_relax = 1;
- break;
+ expression (tok);
+ if (tok->X_op == O_illegal || tok->X_op == O_absent)
+ goto err;
- default:
- return 0;
+ saw_comma = 0;
+ saw_arg = 1;
+ ++tok;
+ break;
+ }
}
- return 1;
-}
+fini:
+ if (saw_comma)
+ goto err;
+ input_line_pointer = old_input_line_pointer;
-/* Print a description of the command-line options that we accept. */
+#ifdef DEBUG_ALPHA
+ debug_exp (orig_tok, ntok - (end_tok - tok));
+#endif
+#ifdef RELOC_OP_P
+ is_end_of_line[(unsigned char) '!'] = 0;
+#endif
-void
-md_show_usage (stream)
- FILE *stream;
-{
- fputs(_("\
-Alpha options:\n\
--32addr treat addresses as 32-bit values\n\
--F lack floating point instructions support\n\
--m21064 | -m21066 | -m21164 | -m21164a\n\
--mev4 | -mev45 | -mev5 | -mev56 | -mall\n\
- specify variant of Alpha architecture\n"),
- stream);
-#ifdef OBJ_EVAX
- fputs (_("\
-VMS options:\n\
--+ hash encode (don't truncate) names longer than 64 characters\n\
--H show new symbol after hash truncation\n"),
- stream);
+ return ntok - (end_tok - tok);
+
+err:
+#ifdef RELOC_OP_P
+ is_end_of_line[(unsigned char) '!'] = 0;
+#endif
+ input_line_pointer = old_input_line_pointer;
+ return TOKENIZE_ERROR;
+
+#ifdef RELOC_OP_P
+err_report:
+ is_end_of_line[(unsigned char) '!'] = 0;
#endif
+ input_line_pointer = old_input_line_pointer;
+ return TOKENIZE_ERROR_REPORT;
}
-/* Decide from what point a pc-relative relocation is relative to,
- relative to the pc-relative fixup. Er, relatively speaking. */
+/* Search forward through all variants of an opcode looking for a
+ syntax match. */
-long
-md_pcrel_from (fixP)
- fixS *fixP;
+static const struct alpha_opcode *
+find_opcode_match (const struct alpha_opcode *first_opcode,
+ const expressionS *tok,
+ int *pntok,
+ int *pcpumatch)
{
- valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
- switch (fixP->fx_r_type)
+ const struct alpha_opcode *opcode = first_opcode;
+ int ntok = *pntok;
+ int got_cpu_match = 0;
+
+ do
{
- case BFD_RELOC_ALPHA_GPDISP:
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- return addr;
- default:
- return fixP->fx_size + addr;
+ const unsigned char *opidx;
+ int tokidx = 0;
+
+ /* Don't match opcodes that don't exist on this architecture. */
+ if (!(opcode->flags & alpha_target))
+ goto match_failed;
+
+ got_cpu_match = 1;
+
+ for (opidx = opcode->operands; *opidx; ++opidx)
+ {
+ const struct alpha_operand *operand = &alpha_operands[*opidx];
+
+ /* Only take input from real operands. */
+ if (operand->flags & AXP_OPERAND_FAKE)
+ continue;
+
+ /* When we expect input, make sure we have it. */
+ if (tokidx >= ntok)
+ {
+ if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
+ goto match_failed;
+ continue;
+ }
+
+ /* Match operand type with expression type. */
+ switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
+ {
+ case AXP_OPERAND_IR:
+ if (tok[tokidx].X_op != O_register
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+ case AXP_OPERAND_FPR:
+ if (tok[tokidx].X_op != O_register
+ || !is_fpr_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+ case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
+ if (tok[tokidx].X_op != O_pregister
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+ case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
+ if (tok[tokidx].X_op != O_cpregister
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+
+ case AXP_OPERAND_RELATIVE:
+ case AXP_OPERAND_SIGNED:
+ case AXP_OPERAND_UNSIGNED:
+ switch (tok[tokidx].X_op)
+ {
+ case O_illegal:
+ case O_absent:
+ case O_register:
+ case O_pregister:
+ case O_cpregister:
+ goto match_failed;
+
+ default:
+ break;
+ }
+ break;
+
+ default:
+ /* Everything else should have been fake. */
+ abort ();
+ }
+ ++tokidx;
+ }
+
+ /* Possible match -- did we use all of our input? */
+ if (tokidx == ntok)
+ {
+ *pntok = ntok;
+ return opcode;
+ }
+
+ match_failed:;
}
+ while (++opcode - alpha_opcodes < (int) alpha_num_opcodes
+ && !strcmp (opcode->name, first_opcode->name));
+
+ if (*pcpumatch)
+ *pcpumatch = got_cpu_match;
+
+ return NULL;
}
-/* Attempt to simplify or even eliminate a fixup. The return value is
- ignored; perhaps it was once meaningful, but now it is historical.
- To indicate that a fixup has been eliminated, set fixP->fx_done.
+/* Given an opcode name and a pre-tokenized set of arguments, assemble
+ the insn, but do not emit it.
- For ELF, here it is that we transform the GPDISP_HI16 reloc we used
- internally into the GPDISP reloc used externally. We had to do
- this so that we'd have the GPDISP_LO16 reloc as a tag to compute
- the distance to the "lda" instruction for setting the addend to
- GPDISP. */
+ Note that this implies no macros allowed, since we can't store more
+ than one insn in an insn structure. */
-int
-md_apply_fix (fixP, valueP)
- fixS *fixP;
- valueT *valueP;
+static void
+assemble_tokens_to_insn (const char *opname,
+ const expressionS *tok,
+ int ntok,
+ struct alpha_insn *insn)
{
- char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
- valueT value = *valueP;
- unsigned image, size;
+ const struct alpha_opcode *opcode;
- switch (fixP->fx_r_type)
+ /* Search opcodes. */
+ opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
+ if (opcode)
{
- /* The GPDISP relocations are processed internally with a symbol
- referring to the current function; we need to drop in a value
- which, when added to the address of the start of the function,
- gives the desired GP. */
- case BFD_RELOC_ALPHA_GPDISP_HI16:
+ int cpumatch;
+ opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
+ if (opcode)
+ {
+ assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
+ return;
+ }
+ else if (cpumatch)
+ as_bad (_("inappropriate arguments for opcode `%s'"), opname);
+ else
+ as_bad (_("opcode `%s' not supported for target %s"), opname,
+ alpha_target_name);
+ }
+ else
+ as_bad (_("unknown opcode `%s'"), opname);
+}
+
+/* Build a BFD section with its flags set appropriately for the .lita,
+ .lit8, or .lit4 sections. */
+
+static void
+create_literal_section (const char *name,
+ segT *secp,
+ symbolS **symp)
+{
+ segT current_section = now_seg;
+ int current_subsec = now_subseg;
+ segT new_sec;
+
+ *secp = new_sec = subseg_new (name, 0);
+ subseg_set (current_section, current_subsec);
+ bfd_set_section_alignment (stdoutput, new_sec, 4);
+ bfd_set_section_flags (stdoutput, new_sec,
+ SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
+ | SEC_DATA);
+
+ S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
+}
+
+/* Load a (partial) expression into a target register.
+
+ If poffset is not null, after the call it will either contain
+ O_constant 0, or a 16-bit offset appropriate for any MEM format
+ instruction. In addition, pbasereg will be modified to point to
+ the base register to use in that MEM format instruction.
+
+ In any case, *pbasereg should contain a base register to add to the
+ expression. This will normally be either AXP_REG_ZERO or
+ alpha_gp_register. Symbol addresses will always be loaded via $gp,
+ so "foo($0)" is interpreted as adding the address of foo to $0;
+ i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
+ but this is what OSF/1 does.
+
+ If explicit relocations of the form !literal!<number> are allowed,
+ and used, then explicit_reloc with be an expression pointer.
+
+ Finally, the return value is nonzero if the calling macro may emit
+ a LITUSE reloc if otherwise appropriate; the return value is the
+ sequence number to use. */
+
+static long
+load_expression (int targreg,
+ const expressionS *exp,
+ int *pbasereg,
+ expressionS *poffset,
+ const char *opname)
+{
+ long emit_lituse = 0;
+ offsetT addend = exp->X_add_number;
+ int basereg = *pbasereg;
+ struct alpha_insn insn;
+ expressionS newtok[3];
+
+ switch (exp->X_op)
+ {
+ case O_symbol:
{
- fixS *next = fixP->fx_next;
- assert (next->fx_r_type == BFD_RELOC_ALPHA_GPDISP_LO16);
+#ifdef OBJ_ECOFF
+ offsetT lit;
+
+ /* Attempt to reduce .lit load by splitting the offset from
+ its symbol when possible, but don't create a situation in
+ which we'd fail. */
+ if (!range_signed_32 (addend) &&
+ (alpha_noat_on || targreg == AXP_REG_AT))
+ {
+ lit = add_to_literal_pool (exp->X_add_symbol, addend,
+ alpha_lita_section, 8);
+ addend = 0;
+ }
+ else
+ lit = add_to_literal_pool (exp->X_add_symbol, 0,
+ alpha_lita_section, 8);
+
+ if (lit >= 0x8000)
+ as_fatal (_("overflow in literal (.lita) table"));
+
+ /* Emit "ldq r, lit(gp)". */
+
+ if (basereg != alpha_gp_register && targreg == basereg)
+ {
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+ if (targreg == AXP_REG_AT)
+ as_bad (_("macro requires $at while $at in use"));
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ }
+ else
+ set_tok_reg (newtok[0], targreg);
+
+ set_tok_sym (newtok[1], alpha_lita_symbol, lit);
+ set_tok_preg (newtok[2], alpha_gp_register);
+
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+
+ gas_assert (insn.nfixups == 1);
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
+ insn.sequence = emit_lituse = next_sequence_num--;
+#endif /* OBJ_ECOFF */
+#ifdef OBJ_ELF
+ /* Emit "ldq r, gotoff(gp)". */
+
+ if (basereg != alpha_gp_register && targreg == basereg)
+ {
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+ if (targreg == AXP_REG_AT)
+ as_bad (_("macro requires $at while $at in use"));
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ }
+ else
+ set_tok_reg (newtok[0], targreg);
+
+ /* XXX: Disable this .got minimizing optimization so that we can get
+ better instruction offset knowledge in the compiler. This happens
+ very infrequently anyway. */
+ if (1
+ || (!range_signed_32 (addend)
+ && (alpha_noat_on || targreg == AXP_REG_AT)))
+ {
+ newtok[1] = *exp;
+ addend = 0;
+ }
+ else
+ set_tok_sym (newtok[1], exp->X_add_symbol, 0);
+
+ set_tok_preg (newtok[2], alpha_gp_register);
+
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+
+ gas_assert (insn.nfixups == 1);
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
+ insn.sequence = emit_lituse = next_sequence_num--;
+#endif /* OBJ_ELF */
+#ifdef OBJ_EVAX
+ /* Find symbol or symbol pointer in link section. */
+
+ if (exp->X_add_symbol == alpha_evax_proc->symbol)
+ {
+ if (range_signed_16 (addend))
+ {
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], addend);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("lda", newtok, 3, &insn);
+ addend = 0;
+ }
+ else
+ {
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("lda", newtok, 3, &insn);
+ }
+ }
+ else
+ {
+ const char *symname = S_GET_NAME (exp->X_add_symbol);
+ const char *ptr1, *ptr2;
+ int symlen = strlen (symname);
+
+ if ((symlen > 4 &&
+ strcmp (ptr2 = &symname [symlen - 4], "..lk") == 0))
+ {
+ set_tok_reg (newtok[0], targreg);
+
+ newtok[1] = *exp;
+ newtok[1].X_op = O_subtract;
+ newtok[1].X_op_symbol = alpha_evax_proc->symbol;
+
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ alpha_linkage_symbol = exp->X_add_symbol;
+
+ if (poffset)
+ set_tok_const (*poffset, 0);
+
+ if (alpha_flag_replace && targreg == 26)
+ {
+ char *ensymname;
+ symbolS *ensym;
+ volatile asymbol *dummy;
+
+ ptr1 = strstr (symname, "..") + 2;
+ if (ptr1 > ptr2)
+ ptr1 = symname;
+ ensymname = (char *) xmalloc (ptr2 - ptr1 + 5);
+ memcpy (ensymname, ptr1, ptr2 - ptr1);
+ memcpy (ensymname + (ptr2 - ptr1), "..en", 5);
+
+ gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_NOP;
+ ensym = symbol_find_or_make (ensymname);
+ ensym->sy_used = 1;
+ /* The fixup must be the same as the BFD_RELOC_ALPHA_BOH
+ case in emit_jsrjmp. See B.4.5.2 of the OpenVMS Linker
+ Utility Manual. */
+ insn.fixups[insn.nfixups].exp.X_op = O_symbol;
+ insn.fixups[insn.nfixups].exp.X_add_symbol = ensym;
+ insn.fixups[insn.nfixups].exp.X_add_number = 0;
+ insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol;
+ insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol;
+ insn.nfixups++;
+
+ /* ??? Force bsym to be instantiated now, as it will be
+ too late to do so in tc_gen_reloc. */
+ dummy = symbol_get_bfdsym (exp->X_add_symbol);
+ }
+ else if (alpha_flag_replace && targreg == 27)
+ {
+ char *psymname;
+ symbolS *psym;
+
+ ptr1 = strstr (symname, "..") + 2;
+ if (ptr1 > ptr2)
+ ptr1 = symname;
+ psymname = (char *) xmalloc (ptr2 - ptr1 + 1);
+ memcpy (psymname, ptr1, ptr2 - ptr1);
+ psymname [ptr2 - ptr1] = 0;
+ gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_LDA;
+ psym = symbol_find_or_make (psymname);
+ psym->sy_used = 1;
+ insn.fixups[insn.nfixups].exp.X_op = O_subtract;
+ insn.fixups[insn.nfixups].exp.X_add_symbol = psym;
+ insn.fixups[insn.nfixups].exp.X_op_symbol = alpha_evax_proc->symbol;
+ insn.fixups[insn.nfixups].exp.X_add_number = 0;
+ insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol;
+ insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol;
+ insn.nfixups++;
+ }
+
+ emit_insn(&insn);
+ return 0;
+ }
+ else
+ {
+ symbolS *linkexp;
+
+ if (!range_signed_32 (addend))
+ addend = sign_extend_32 (addend);
+ linkexp = add_to_link_pool (alpha_evax_proc->symbol,
+ exp->X_add_symbol, 0);
+ set_tok_reg (newtok[0], targreg);
+ set_tok_sym (newtok[1], linkexp, 0);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ }
+ }
+#endif /* OBJ_EVAX */
+
+ emit_insn (&insn);
+
+#ifndef OBJ_EVAX
+ if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
+ {
+ /* Emit "addq r, base, r". */
+
+ set_tok_reg (newtok[1], basereg);
+ set_tok_reg (newtok[2], targreg);
+ assemble_tokens ("addq", newtok, 3, 0);
+ }
+#endif
+ basereg = targreg;
+ }
+ break;
+
+ case O_constant:
+ break;
+
+ case O_subtract:
+ /* Assume that this difference expression will be resolved to an
+ absolute value and that that value will fit in 16 bits. */
+
+ set_tok_reg (newtok[0], targreg);
+ newtok[1] = *exp;
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens (opname, newtok, 3, 0);
+
+ if (poffset)
+ set_tok_const (*poffset, 0);
+ return 0;
+
+ case O_big:
+ if (exp->X_add_number > 0)
+ as_bad (_("bignum invalid; zero assumed"));
+ else
+ as_bad (_("floating point number invalid; zero assumed"));
+ addend = 0;
+ break;
+
+ default:
+ as_bad (_("can't handle expression"));
+ addend = 0;
+ break;
+ }
+
+ if (!range_signed_32 (addend))
+ {
+#ifdef OBJ_EVAX
+ symbolS *litexp;
+#else
+ offsetT lit;
+ long seq_num = next_sequence_num--;
+#endif
+
+ /* For 64-bit addends, just put it in the literal pool. */
+#ifdef OBJ_EVAX
+ /* Emit "ldq targreg, lit(basereg)". */
+ litexp = add_to_link_pool (alpha_evax_proc->symbol,
+ section_symbol (absolute_section), addend);
+ set_tok_reg (newtok[0], targreg);
+ set_tok_sym (newtok[1], litexp, 0);
+ set_tok_preg (newtok[2], alpha_gp_register);
+ assemble_tokens ("ldq", newtok, 3, 0);
+#else
+
+ if (alpha_lit8_section == NULL)
+ {
+ create_literal_section (".lit8",
+ &alpha_lit8_section,
+ &alpha_lit8_symbol);
+
+#ifdef OBJ_ECOFF
+ alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
+ alpha_lita_section, 8);
+ if (alpha_lit8_literal >= 0x8000)
+ as_fatal (_("overflow in literal (.lita) table"));
+#endif
+ }
+
+ lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
+ if (lit >= 0x8000)
+ as_fatal (_("overflow in literal (.lit8) table"));
+
+ /* Emit "lda litreg, .lit8+0x8000". */
+
+ if (targreg == basereg)
+ {
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+ if (targreg == AXP_REG_AT)
+ as_bad (_("macro requires $at while $at in use"));
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ }
+ else
+ set_tok_reg (newtok[0], targreg);
+#ifdef OBJ_ECOFF
+ set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
+#endif
+#ifdef OBJ_ELF
+ set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
+#endif
+ set_tok_preg (newtok[2], alpha_gp_register);
+
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+
+ gas_assert (insn.nfixups == 1);
+#ifdef OBJ_ECOFF
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
+#endif
+#ifdef OBJ_ELF
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
+#endif
+ insn.sequence = seq_num;
+
+ emit_insn (&insn);
+
+ /* Emit "ldq litreg, lit(litreg)". */
+
+ set_tok_const (newtok[1], lit);
+ set_tok_preg (newtok[2], newtok[0].X_add_number);
+
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = seq_num;
+ emit_lituse = 0;
+
+ emit_insn (&insn);
+
+ /* Emit "addq litreg, base, target". */
+
+ if (basereg != AXP_REG_ZERO)
+ {
+ set_tok_reg (newtok[1], basereg);
+ set_tok_reg (newtok[2], targreg);
+ assemble_tokens ("addq", newtok, 3, 0);
+ }
+#endif /* !OBJ_EVAX */
+
+ if (poffset)
+ set_tok_const (*poffset, 0);
+ *pbasereg = targreg;
+ }
+ else
+ {
+ offsetT low, high, extra, tmp;
+
+ /* For 32-bit operands, break up the addend. */
+
+ low = sign_extend_16 (addend);
+ tmp = addend - low;
+ high = sign_extend_16 (tmp >> 16);
+
+ if (tmp - (high << 16))
+ {
+ extra = 0x4000;
+ tmp -= 0x40000000;
+ high = sign_extend_16 (tmp >> 16);
+ }
+ else
+ extra = 0;
+
+ set_tok_reg (newtok[0], targreg);
+ set_tok_preg (newtok[2], basereg);
+
+ if (extra)
+ {
+ /* Emit "ldah r, extra(r). */
+ set_tok_const (newtok[1], extra);
+ assemble_tokens ("ldah", newtok, 3, 0);
+ set_tok_preg (newtok[2], basereg = targreg);
+ }
+
+ if (high)
+ {
+ /* Emit "ldah r, high(r). */
+ set_tok_const (newtok[1], high);
+ assemble_tokens ("ldah", newtok, 3, 0);
+ basereg = targreg;
+ set_tok_preg (newtok[2], basereg);
+ }
+
+ if ((low && !poffset) || (!poffset && basereg != targreg))
+ {
+ /* Emit "lda r, low(base)". */
+ set_tok_const (newtok[1], low);
+ assemble_tokens ("lda", newtok, 3, 0);
+ basereg = targreg;
+ low = 0;
+ }
+
+ if (poffset)
+ set_tok_const (*poffset, low);
+ *pbasereg = basereg;
+ }
+
+ return emit_lituse;
+}
+
+/* The lda macro differs from the lda instruction in that it handles
+ most simple expressions, particularly symbol address loads and
+ large constants. */
+
+static void
+emit_lda (const expressionS *tok,
+ int ntok,
+ const void * unused ATTRIBUTE_UNUSED)
+{
+ int basereg;
+
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
+
+ (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL, "lda");
+}
+
+/* The ldah macro differs from the ldah instruction in that it has $31
+ as an implied base register. */
+
+static void
+emit_ldah (const expressionS *tok,
+ int ntok ATTRIBUTE_UNUSED,
+ const void * unused ATTRIBUTE_UNUSED)
+{
+ expressionS newtok[3];
+
+ newtok[0] = tok[0];
+ newtok[1] = tok[1];
+ set_tok_preg (newtok[2], AXP_REG_ZERO);
+
+ assemble_tokens ("ldah", newtok, 3, 0);
+}
+
+/* Called internally to handle all alignment needs. This takes care
+ of eliding calls to frag_align if'n the cached current alignment
+ says we've already got it, as well as taking care of the auto-align
+ feature wrt labels. */
+
+static void
+alpha_align (int n,
+ char *pfill,
+ symbolS *label,
+ int force ATTRIBUTE_UNUSED)
+{
+ if (alpha_current_align >= n)
+ return;
+
+ if (pfill == NULL)
+ {
+ if (subseg_text_p (now_seg))
+ frag_align_code (n, 0);
+ else
+ frag_align (n, 0, 0);
+ }
+ else
+ frag_align (n, *pfill, 0);
+
+ alpha_current_align = n;
+
+ if (label != NULL && S_GET_SEGMENT (label) == now_seg)
+ {
+ symbol_set_frag (label, frag_now);
+ S_SET_VALUE (label, (valueT) frag_now_fix ());
+ }
+
+ record_alignment (now_seg, n);
+
+ /* ??? If alpha_flag_relax && force && elf, record the requested alignment
+ in a reloc for the linker to see. */
+}
+
+/* Actually output an instruction with its fixup. */
+
+static void
+emit_insn (struct alpha_insn *insn)
+{
+ char *f;
+ int i;
+
+ /* Take care of alignment duties. */
+ if (alpha_auto_align_on && alpha_current_align < 2)
+ alpha_align (2, (char *) NULL, alpha_insn_label, 0);
+ if (alpha_current_align > 2)
+ alpha_current_align = 2;
+ alpha_insn_label = NULL;
+
+ /* Write out the instruction. */
+ f = frag_more (4);
+ md_number_to_chars (f, insn->insn, 4);
+
+#ifdef OBJ_ELF
+ dwarf2_emit_insn (4);
+#endif
+
+ /* Apply the fixups in order. */
+ for (i = 0; i < insn->nfixups; ++i)
+ {
+ const struct alpha_operand *operand = (const struct alpha_operand *) 0;
+ struct alpha_fixup *fixup = &insn->fixups[i];
+ struct alpha_reloc_tag *info = NULL;
+ int size, pcrel;
+ fixS *fixP;
+
+ /* Some fixups are only used internally and so have no howto. */
+ if ((int) fixup->reloc < 0)
+ {
+ operand = &alpha_operands[-(int) fixup->reloc];
+ size = 4;
+ pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
+ }
+ else if (fixup->reloc > BFD_RELOC_UNUSED
+ || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
+ || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
+ {
+ size = 2;
+ pcrel = 0;
+ }
+ else
+ {
+ reloc_howto_type *reloc_howto
+ = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
+ gas_assert (reloc_howto);
+
+ size = bfd_get_reloc_size (reloc_howto);
+
+ switch (fixup->reloc)
+ {
+#ifdef OBJ_EVAX
+ case BFD_RELOC_ALPHA_NOP:
+ case BFD_RELOC_ALPHA_BSR:
+ case BFD_RELOC_ALPHA_LDA:
+ case BFD_RELOC_ALPHA_BOH:
+ break;
+#endif
+ default:
+ gas_assert (size >= 1 && size <= 4);
+ }
+
+ pcrel = reloc_howto->pc_relative;
+ }
+
+ fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
+ &fixup->exp, pcrel, fixup->reloc);
+
+ /* Turn off complaints that the addend is too large for some fixups,
+ and copy in the sequence number for the explicit relocations. */
+ switch (fixup->reloc)
+ {
+ case BFD_RELOC_ALPHA_HINT:
+ case BFD_RELOC_GPREL32:
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ fixP->fx_no_overflow = 1;
+ break;
+
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ fixP->fx_no_overflow = 1;
+ fixP->fx_addsy = section_symbol (now_seg);
+ fixP->fx_offset = 0;
+
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (++info->n_master > 1)
+ as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence);
+ if (info->segment != now_seg)
+ as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
+ insn->sequence);
+ fixP->tc_fix_data.info = info;
+ break;
+
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ fixP->fx_no_overflow = 1;
+
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (++info->n_slaves > 1)
+ as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence);
+ if (info->segment != now_seg)
+ as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
+ insn->sequence);
+ fixP->tc_fix_data.info = info;
+ info->slaves = fixP;
+ break;
+
+ case BFD_RELOC_ALPHA_LITERAL:
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ fixP->fx_no_overflow = 1;
+
+ if (insn->sequence == 0)
+ break;
+ info = get_alpha_reloc_tag (insn->sequence);
+ info->master = fixP;
+ info->n_master++;
+ if (info->segment != now_seg)
+ info->multi_section_p = 1;
+ fixP->tc_fix_data.info = info;
+ break;
+
+#ifdef RELOC_OP_P
+ case DUMMY_RELOC_LITUSE_ADDR:
+ fixP->fx_offset = LITUSE_ALPHA_ADDR;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_BASE:
+ fixP->fx_offset = LITUSE_ALPHA_BASE;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_BYTOFF:
+ fixP->fx_offset = LITUSE_ALPHA_BYTOFF;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_JSR:
+ fixP->fx_offset = LITUSE_ALPHA_JSR;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_TLSGD:
+ fixP->fx_offset = LITUSE_ALPHA_TLSGD;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_TLSLDM:
+ fixP->fx_offset = LITUSE_ALPHA_TLSLDM;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_JSRDIRECT:
+ fixP->fx_offset = LITUSE_ALPHA_JSRDIRECT;
+ goto do_lituse;
+ do_lituse:
+ fixP->fx_addsy = section_symbol (now_seg);
+ fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
+
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD)
+ info->saw_lu_tlsgd = 1;
+ else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM)
+ info->saw_lu_tlsldm = 1;
+ if (++info->n_slaves > 1)
+ {
+ if (info->saw_lu_tlsgd)
+ as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"),
+ insn->sequence);
+ else if (info->saw_lu_tlsldm)
+ as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"),
+ insn->sequence);
+ }
+ fixP->tc_fix_data.info = info;
+ fixP->tc_fix_data.next_reloc = info->slaves;
+ info->slaves = fixP;
+ if (info->segment != now_seg)
+ info->multi_section_p = 1;
+ break;
+
+ case BFD_RELOC_ALPHA_TLSGD:
+ fixP->fx_no_overflow = 1;
+
+ if (insn->sequence == 0)
+ break;
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (info->saw_tlsgd)
+ as_bad (_("duplicate !tlsgd!%ld"), insn->sequence);
+ else if (info->saw_tlsldm)
+ as_bad (_("sequence number in use for !tlsldm!%ld"),
+ insn->sequence);
+ else
+ info->saw_tlsgd = 1;
+ fixP->tc_fix_data.info = info;
+ break;
+
+ case BFD_RELOC_ALPHA_TLSLDM:
+ fixP->fx_no_overflow = 1;
+
+ if (insn->sequence == 0)
+ break;
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (info->saw_tlsldm)
+ as_bad (_("duplicate !tlsldm!%ld"), insn->sequence);
+ else if (info->saw_tlsgd)
+ as_bad (_("sequence number in use for !tlsgd!%ld"),
+ insn->sequence);
+ else
+ info->saw_tlsldm = 1;
+ fixP->tc_fix_data.info = info;
+ break;
+#endif
+#ifdef OBJ_EVAX
+ case BFD_RELOC_ALPHA_NOP:
+ case BFD_RELOC_ALPHA_LDA:
+ case BFD_RELOC_ALPHA_BSR:
+ case BFD_RELOC_ALPHA_BOH:
+ info = get_alpha_reloc_tag (next_sequence_num--);
+ fixP->tc_fix_data.info = info;
+ fixP->tc_fix_data.info->sym = fixup->xtrasym;
+ fixP->tc_fix_data.info->psym = fixup->procsym;
+ break;
+#endif
+
+ default:
+ if ((int) fixup->reloc < 0)
+ {
+ if (operand->flags & AXP_OPERAND_NOOVERFLOW)
+ fixP->fx_no_overflow = 1;
+ }
+ break;
+ }
+ }
+}
+
+/* Insert an operand value into an instruction. */
+
+static unsigned
+insert_operand (unsigned insn,
+ const struct alpha_operand *operand,
+ offsetT val,
+ char *file,
+ unsigned line)
+{
+ if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
+ {
+ offsetT min, max;
+
+ if (operand->flags & AXP_OPERAND_SIGNED)
+ {
+ max = (1 << (operand->bits - 1)) - 1;
+ min = -(1 << (operand->bits - 1));
+ }
+ else
+ {
+ max = (1 << operand->bits) - 1;
+ min = 0;
+ }
+
+ if (val < min || val > max)
+ as_warn_value_out_of_range (_("operand"), val, min, max, file, line);
+ }
+
+ if (operand->insert)
+ {
+ const char *errmsg = NULL;
+
+ insn = (*operand->insert) (insn, val, &errmsg);
+ if (errmsg)
+ as_warn (errmsg);
+ }
+ else
+ insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
+
+ return insn;
+}
+
+/* Turn an opcode description and a set of arguments into
+ an instruction and a fixup. */
+
+static void
+assemble_insn (const struct alpha_opcode *opcode,
+ const expressionS *tok,
+ int ntok,
+ struct alpha_insn *insn,
+ bfd_reloc_code_real_type reloc)
+{
+ const struct alpha_operand *reloc_operand = NULL;
+ const expressionS *reloc_exp = NULL;
+ const unsigned char *argidx;
+ unsigned image;
+ int tokidx = 0;
+
+ memset (insn, 0, sizeof (*insn));
+ image = opcode->opcode;
+
+ for (argidx = opcode->operands; *argidx; ++argidx)
+ {
+ const struct alpha_operand *operand = &alpha_operands[*argidx];
+ const expressionS *t = (const expressionS *) 0;
+
+ if (operand->flags & AXP_OPERAND_FAKE)
+ {
+ /* Fake operands take no value and generate no fixup. */
+ image = insert_operand (image, operand, 0, NULL, 0);
+ continue;
+ }
+
+ if (tokidx >= ntok)
+ {
+ switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
+ {
+ case AXP_OPERAND_DEFAULT_FIRST:
+ t = &tok[0];
+ break;
+ case AXP_OPERAND_DEFAULT_SECOND:
+ t = &tok[1];
+ break;
+ case AXP_OPERAND_DEFAULT_ZERO:
+ {
+ static expressionS zero_exp;
+ t = &zero_exp;
+ zero_exp.X_op = O_constant;
+ zero_exp.X_unsigned = 1;
+ }
+ break;
+ default:
+ abort ();
+ }
+ }
+ else
+ t = &tok[tokidx++];
+
+ switch (t->X_op)
+ {
+ case O_register:
+ case O_pregister:
+ case O_cpregister:
+ image = insert_operand (image, operand, regno (t->X_add_number),
+ NULL, 0);
+ break;
+
+ case O_constant:
+ image = insert_operand (image, operand, t->X_add_number, NULL, 0);
+ gas_assert (reloc_operand == NULL);
+ reloc_operand = operand;
+ reloc_exp = t;
+ break;
+
+ default:
+ /* This is only 0 for fields that should contain registers,
+ which means this pattern shouldn't have matched. */
+ if (operand->default_reloc == 0)
+ abort ();
+
+ /* There is one special case for which an insn receives two
+ relocations, and thus the user-supplied reloc does not
+ override the operand reloc. */
+ if (operand->default_reloc == BFD_RELOC_ALPHA_HINT)
+ {
+ struct alpha_fixup *fixup;
+
+ if (insn->nfixups >= MAX_INSN_FIXUPS)
+ as_fatal (_("too many fixups"));
+
+ fixup = &insn->fixups[insn->nfixups++];
+ fixup->exp = *t;
+ fixup->reloc = BFD_RELOC_ALPHA_HINT;
+ }
+ else
+ {
+ if (reloc == BFD_RELOC_UNUSED)
+ reloc = operand->default_reloc;
+
+ gas_assert (reloc_operand == NULL);
+ reloc_operand = operand;
+ reloc_exp = t;
+ }
+ break;
+ }
+ }
+
+ if (reloc != BFD_RELOC_UNUSED)
+ {
+ struct alpha_fixup *fixup;
+
+ if (insn->nfixups >= MAX_INSN_FIXUPS)
+ as_fatal (_("too many fixups"));
+
+ /* ??? My but this is hacky. But the OSF/1 assembler uses the same
+ relocation tag for both ldah and lda with gpdisp. Choose the
+ correct internal relocation based on the opcode. */
+ if (reloc == BFD_RELOC_ALPHA_GPDISP)
+ {
+ if (strcmp (opcode->name, "ldah") == 0)
+ reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
+ else if (strcmp (opcode->name, "lda") == 0)
+ reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
+ else
+ as_bad (_("invalid relocation for instruction"));
+ }
+
+ /* If this is a real relocation (as opposed to a lituse hint), then
+ the relocation width should match the operand width.
+ Take care of -MDISP in operand table. */
+ else if (reloc < BFD_RELOC_UNUSED && reloc > 0)
+ {
+ reloc_howto_type *reloc_howto
+ = bfd_reloc_type_lookup (stdoutput, reloc);
+ if (reloc_operand == NULL
+ || reloc_howto->bitsize != reloc_operand->bits)
+ {
+ as_bad (_("invalid relocation for field"));
+ return;
+ }
+ }
+
+ fixup = &insn->fixups[insn->nfixups++];
+ if (reloc_exp)
+ fixup->exp = *reloc_exp;
+ else
+ fixup->exp.X_op = O_absent;
+ fixup->reloc = reloc;
+ }
+
+ insn->insn = image;
+}
+
+/* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
+ etc. They differ from the real instructions in that they do simple
+ expressions like the lda macro. */
+
+static void
+emit_ir_load (const expressionS *tok,
+ int ntok,
+ const void * opname)
+{
+ int basereg;
+ long lituse;
+ expressionS newtok[3];
+ struct alpha_insn insn;
+ const char *symname
+ = tok[1].X_add_symbol ? S_GET_NAME (tok[1].X_add_symbol): "";
+ int symlen = strlen (symname);
+
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
+
+ lituse = load_expression (tok[0].X_add_number, &tok[1],
+ &basereg, &newtok[1], opname);
+
+ if (basereg == alpha_gp_register &&
+ (symlen > 4 && strcmp (&symname [symlen - 4], "..lk") == 0))
+ return;
+
+ newtok[0] = tok[0];
+ set_tok_preg (newtok[2], basereg);
+
+ assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
+
+ if (lituse)
+ {
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
+}
+
+/* Handle fp register loads, and both integer and fp register stores.
+ Again, we handle simple expressions. */
+
+static void
+emit_loadstore (const expressionS *tok,
+ int ntok,
+ const void * opname)
+{
+ int basereg;
+ long lituse;
+ expressionS newtok[3];
+ struct alpha_insn insn;
+
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
+
+ if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
+ {
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+
+ lituse = load_expression (AXP_REG_AT, &tok[1],
+ &basereg, &newtok[1], opname);
+ }
+ else
+ {
+ newtok[1] = tok[1];
+ lituse = 0;
+ }
+
+ newtok[0] = tok[0];
+ set_tok_preg (newtok[2], basereg);
+
+ assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
+
+ if (lituse)
+ {
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
+}
+
+/* Load a half-word or byte as an unsigned value. */
+
+static void
+emit_ldXu (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ if (alpha_target & AXP_OPCODE_BWX)
+ emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
+ else
+ {
+ expressionS newtok[3];
+ struct alpha_insn insn;
+ int basereg;
+ long lituse;
+
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant
+ ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
+
+ /* Emit "lda $at, exp". */
+ lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda");
+
+ /* Emit "ldq_u targ, 0($at)". */
+ newtok[0] = tok[0];
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
+
+ if (lituse)
+ {
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
+
+ /* Emit "extXl targ, $at, targ". */
+ set_tok_reg (newtok[1], basereg);
+ newtok[2] = newtok[0];
+ assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn);
+
+ if (lituse)
+ {
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
+ }
+}
+
+/* Load a half-word or byte as a signed value. */
+
+static void
+emit_ldX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ emit_ldXu (tok, ntok, vlgsize);
+ assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
+}
+
+/* Load an integral value from an unaligned address as an unsigned
+ value. */
+
+static void
+emit_uldXu (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ long lgsize = (long) vlgsize;
+ expressionS newtok[3];
+
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+
+ /* Emit "lda $at, exp". */
+ memcpy (newtok, tok, sizeof (expressionS) * ntok);
+ newtok[0].X_add_number = AXP_REG_AT;
+ assemble_tokens ("lda", newtok, ntok, 1);
+
+ /* Emit "ldq_u $t9, 0($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
+
+ /* Emit "ldq_u $t10, size-1($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_const (newtok[1], (1 << lgsize) - 1);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
+
+ /* Emit "extXl $t9, $at, $t9". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ set_tok_reg (newtok[2], AXP_REG_T9);
+ assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
+
+ /* Emit "extXh $t10, $at, $t10". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[2], AXP_REG_T10);
+ assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
+
+ /* Emit "or $t9, $t10, targ". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ newtok[2] = tok[0];
+ assemble_tokens ("or", newtok, 3, 1);
+}
+
+/* Load an integral value from an unaligned address as a signed value.
+ Note that quads should get funneled to the unsigned load since we
+ don't have to do the sign extension. */
+
+static void
+emit_uldX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ emit_uldXu (tok, ntok, vlgsize);
+ assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
+}
+
+/* Implement the ldil macro. */
+
+static void
+emit_ldil (const expressionS *tok,
+ int ntok,
+ const void * unused ATTRIBUTE_UNUSED)
+{
+ expressionS newtok[2];
+
+ memcpy (newtok, tok, sizeof (newtok));
+ newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
+
+ assemble_tokens ("lda", newtok, ntok, 1);
+}
+
+/* Store a half-word or byte. */
+
+static void
+emit_stX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ int lgsize = (int) (long) vlgsize;
+
+ if (alpha_target & AXP_OPCODE_BWX)
+ emit_loadstore (tok, ntok, stX_op[lgsize]);
+ else
+ {
+ expressionS newtok[3];
+ struct alpha_insn insn;
+ int basereg;
+ long lituse;
+
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
- fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
- - fixP->fx_frag->fr_address - fixP->fx_where);
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant
+ ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
- value = (value - sign_extend_16 (value)) >> 16;
- }
-#ifdef OBJ_ELF
- fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
-#endif
- goto do_reloc_gp;
+ /* Emit "lda $at, exp". */
+ lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda");
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- value = sign_extend_16 (value);
- fixP->fx_offset = 0;
-#ifdef OBJ_ELF
- fixP->fx_done = 1;
-#endif
+ /* Emit "ldq_u $t9, 0($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
- do_reloc_gp:
- fixP->fx_addsy = section_symbol (absolute_section);
- md_number_to_chars (fixpos, value, 2);
- break;
+ if (lituse)
+ {
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
- case BFD_RELOC_16:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_16_PCREL;
- size = 2;
- goto do_reloc_xx;
- case BFD_RELOC_32:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_32_PCREL;
- size = 4;
- goto do_reloc_xx;
- case BFD_RELOC_64:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_64_PCREL;
- size = 8;
- do_reloc_xx:
- if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ emit_insn (&insn);
+
+ /* Emit "insXl src, $at, $t10". */
+ newtok[0] = tok[0];
+ set_tok_reg (newtok[1], basereg);
+ set_tok_reg (newtok[2], AXP_REG_T10);
+ assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn);
+
+ if (lituse)
{
- md_number_to_chars (fixpos, value, size);
- goto done;
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
}
- return 1;
-#ifdef OBJ_ECOFF
- case BFD_RELOC_GPREL32:
- assert (fixP->fx_subsy == alpha_gp_symbol);
- fixP->fx_subsy = 0;
- /* FIXME: inherited this obliviousness of `value' -- why? */
- md_number_to_chars (fixpos, -alpha_gp_value, 4);
- break;
-#endif
-#ifdef OBJ_ELF
- case BFD_RELOC_GPREL32:
- return 1;
-#endif
+ emit_insn (&insn);
- case BFD_RELOC_23_PCREL_S2:
- if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ /* Emit "mskXl $t9, $at, $t9". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ newtok[2] = newtok[0];
+ assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn);
+
+ if (lituse)
{
- image = bfd_getl32(fixpos);
- image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
- goto write_done;
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
}
- return 1;
- case BFD_RELOC_ALPHA_HINT:
- if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ emit_insn (&insn);
+
+ /* Emit "or $t9, $t10, $t9". */
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ assemble_tokens ("or", newtok, 3, 1);
+
+ /* Emit "stq_u $t9, 0($at). */
+ set_tok_const(newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens_to_insn ("stq_u", newtok, 3, &insn);
+
+ if (lituse)
{
- image = bfd_getl32(fixpos);
- image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
- goto write_done;
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
}
- return 1;
-#ifdef OBJ_ECOFF
- case BFD_RELOC_ALPHA_LITERAL:
- md_number_to_chars (fixpos, value, 2);
- return 1;
+ emit_insn (&insn);
+ }
+}
- case BFD_RELOC_ALPHA_LITUSE:
- return 1;
-#endif
-#ifdef OBJ_ELF
- case BFD_RELOC_ALPHA_ELF_LITERAL:
- case BFD_RELOC_ALPHA_LITUSE:
- return 1;
-#endif
-#ifdef OBJ_EVAX
- case BFD_RELOC_ALPHA_LINKAGE:
- case BFD_RELOC_ALPHA_CODEADDR:
- return 1;
-#endif
+/* Store an integer to an unaligned address. */
- default:
- {
- const struct alpha_operand *operand;
+static void
+emit_ustX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ int lgsize = (int) (long) vlgsize;
+ expressionS newtok[3];
- if ((int)fixP->fx_r_type >= 0)
- as_fatal (_("unhandled relocation type %s"),
- bfd_get_reloc_code_name (fixP->fx_r_type));
+ /* Emit "lda $at, exp". */
+ memcpy (newtok, tok, sizeof (expressionS) * ntok);
+ newtok[0].X_add_number = AXP_REG_AT;
+ assemble_tokens ("lda", newtok, ntok, 1);
- assert (-(int)fixP->fx_r_type < alpha_num_operands);
- operand = &alpha_operands[-(int)fixP->fx_r_type];
+ /* Emit "ldq_u $9, 0($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
- /* The rest of these fixups only exist internally during symbol
- resolution and have no representation in the object file.
- Therefore they must be completely resolved as constants. */
+ /* Emit "ldq_u $10, size-1($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_const (newtok[1], (1 << lgsize) - 1);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
- if (fixP->fx_addsy != 0
- && fixP->fx_addsy->bsym->section != absolute_section)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("non-absolute expression in constant field"));
+ /* Emit "insXl src, $at, $t11". */
+ newtok[0] = tok[0];
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ set_tok_reg (newtok[2], AXP_REG_T11);
+ assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
- image = bfd_getl32(fixpos);
- image = insert_operand(image, operand, (offsetT)value,
- fixP->fx_file, fixP->fx_line);
- }
- goto write_done;
- }
+ /* Emit "insXh src, $at, $t12". */
+ set_tok_reg (newtok[2], AXP_REG_T12);
+ assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
- if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
- return 1;
+ /* Emit "mskXl $t9, $at, $t9". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ newtok[2] = newtok[0];
+ assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
+
+ /* Emit "mskXh $t10, $at, $t10". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ newtok[2] = newtok[0];
+ assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
+
+ /* Emit "or $t9, $t11, $t9". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ newtok[2] = newtok[0];
+ assemble_tokens ("or", newtok, 3, 1);
+
+ /* Emit "or $t10, $t12, $t10". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[1], AXP_REG_T12);
+ newtok[2] = newtok[0];
+ assemble_tokens ("or", newtok, 3, 1);
+
+ /* Emit "stq_u $t10, size-1($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_const (newtok[1], (1 << lgsize) - 1);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("stq_u", newtok, 3, 1);
+
+ /* Emit "stq_u $t9, 0($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ assemble_tokens ("stq_u", newtok, 3, 1);
+}
+
+/* Sign extend a half-word or byte. The 32-bit sign extend is
+ implemented as "addl $31, $r, $t" in the opcode table. */
+
+static void
+emit_sextX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ long lgsize = (long) vlgsize;
+
+ if (alpha_target & AXP_OPCODE_BWX)
+ assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
else
{
- as_warn_where(fixP->fx_file, fixP->fx_line,
- _("type %d reloc done?\n"), (int)fixP->fx_r_type);
- goto done;
- }
+ int bitshift = 64 - 8 * (1 << lgsize);
+ expressionS newtok[3];
-write_done:
- md_number_to_chars(fixpos, image, 4);
+ /* Emit "sll src,bits,dst". */
+ newtok[0] = tok[0];
+ set_tok_const (newtok[1], bitshift);
+ newtok[2] = tok[ntok - 1];
+ assemble_tokens ("sll", newtok, 3, 1);
-done:
- fixP->fx_done = 1;
- return 0;
+ /* Emit "sra dst,bits,dst". */
+ newtok[0] = newtok[2];
+ assemble_tokens ("sra", newtok, 3, 1);
+ }
}
-/*
- * Look for a register name in the given symbol.
- */
+/* Implement the division and modulus macros. */
-symbolS *
-md_undefined_symbol(name)
- char *name;
+#ifdef OBJ_EVAX
+
+/* Make register usage like in normal procedure call.
+ Don't clobber PV and RA. */
+
+static void
+emit_division (const expressionS *tok,
+ int ntok,
+ const void * symname)
{
- if (*name == '$')
+ /* DIVISION and MODULUS. Yech.
+
+ Convert
+ OP x,y,result
+ to
+ mov x,R16 # if x != R16
+ mov y,R17 # if y != R17
+ lda AT,__OP
+ jsr AT,(AT),0
+ mov R0,result
+
+ with appropriate optimizations if R0,R16,R17 are the registers
+ specified by the compiler. */
+
+ int xr, yr, rr;
+ symbolS *sym;
+ expressionS newtok[3];
+
+ xr = regno (tok[0].X_add_number);
+ yr = regno (tok[1].X_add_number);
+
+ if (ntok < 3)
+ rr = xr;
+ else
+ rr = regno (tok[2].X_add_number);
+
+ /* Move the operands into the right place. */
+ if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
{
- int is_float = 0, num;
+ /* They are in exactly the wrong order -- swap through AT. */
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
- switch (*++name)
+ set_tok_reg (newtok[0], AXP_REG_R16);
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ assemble_tokens ("mov", newtok, 2, 1);
+
+ set_tok_reg (newtok[0], AXP_REG_R17);
+ set_tok_reg (newtok[1], AXP_REG_R16);
+ assemble_tokens ("mov", newtok, 2, 1);
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_reg (newtok[1], AXP_REG_R17);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
+ else
+ {
+ if (yr == AXP_REG_R16)
{
- case 'f':
- if (name[1] == 'p' && name[2] == '\0')
- return alpha_register_table[AXP_REG_FP];
- is_float = 32;
- /* FALLTHRU */
+ set_tok_reg (newtok[0], AXP_REG_R16);
+ set_tok_reg (newtok[1], AXP_REG_R17);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
- case 'r':
- if (!isdigit(*++name))
- break;
- /* FALLTHRU */
+ if (xr != AXP_REG_R16)
+ {
+ set_tok_reg (newtok[0], xr);
+ set_tok_reg (newtok[1], AXP_REG_R16);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
- case '0': case '1': case '2': case '3': case '4':
- case '5': case '6': case '7': case '8': case '9':
- if (name[1] == '\0')
- num = name[0] - '0';
- else if (name[0] != '0' && isdigit(name[1]) && name[2] == '\0')
- {
- num = (name[0] - '0') * 10 + name[1] - '0';
- if (num >= 32)
- break;
- }
- else
- break;
+ if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
+ {
+ set_tok_reg (newtok[0], yr);
+ set_tok_reg (newtok[1], AXP_REG_R17);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
+ }
- if (!alpha_noat_on && num == AXP_REG_AT)
- as_warn(_("Used $at without \".set noat\""));
- return alpha_register_table[num + is_float];
+ sym = symbol_find_or_make ((const char *) symname);
- case 'a':
- if (name[1] == 't' && name[2] == '\0')
- {
- if (!alpha_noat_on)
- as_warn(_("Used $at without \".set noat\""));
- return alpha_register_table[AXP_REG_AT];
- }
- break;
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_sym (newtok[1], sym, 0);
+ assemble_tokens ("lda", newtok, 2, 1);
- case 'g':
- if (name[1] == 'p' && name[2] == '\0')
- return alpha_register_table[alpha_gp_register];
- break;
+ /* Call the division routine. */
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_cpreg (newtok[1], AXP_REG_AT);
+ set_tok_const (newtok[2], 0);
+ assemble_tokens ("jsr", newtok, 3, 1);
- case 's':
- if (name[1] == 'p' && name[2] == '\0')
- return alpha_register_table[AXP_REG_SP];
- break;
- }
+ /* Move the result to the right place. */
+ if (rr != AXP_REG_R0)
+ {
+ set_tok_reg (newtok[0], AXP_REG_R0);
+ set_tok_reg (newtok[1], rr);
+ assemble_tokens ("mov", newtok, 2, 1);
}
- return NULL;
}
-#ifdef OBJ_ECOFF
-/* @@@ Magic ECOFF bits. */
+#else /* !OBJ_EVAX */
-void
-alpha_frob_ecoff_data ()
+static void
+emit_division (const expressionS *tok,
+ int ntok,
+ const void * symname)
{
- select_gp_value ();
- /* $zero and $f31 are read-only */
- alpha_gprmask &= ~1;
- alpha_fprmask &= ~1;
-}
-#endif
+ /* DIVISION and MODULUS. Yech.
+ Convert
+ OP x,y,result
+ to
+ lda pv,__OP
+ mov x,t10
+ mov y,t11
+ jsr t9,(pv),__OP
+ mov t12,result
+
+ with appropriate optimizations if t10,t11,t12 are the registers
+ specified by the compiler. */
-/* Hook to remember a recently defined label so that the auto-align
- code can adjust the symbol after we know what alignment will be
- required. */
+ int xr, yr, rr;
+ symbolS *sym;
+ expressionS newtok[3];
-void
-alpha_define_label (sym)
- symbolS *sym;
-{
- alpha_insn_label = sym;
-}
+ xr = regno (tok[0].X_add_number);
+ yr = regno (tok[1].X_add_number);
-/* Return true if we must always emit a reloc for a type and false if
- there is some hope of resolving it a assembly time. */
+ if (ntok < 3)
+ rr = xr;
+ else
+ rr = regno (tok[2].X_add_number);
-int
-alpha_force_relocation (f)
- fixS *f;
-{
- if (alpha_flag_relax)
- return 1;
+ sym = symbol_find_or_make ((const char *) symname);
- switch (f->fx_r_type)
+ /* Move the operands into the right place. */
+ if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
{
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- case BFD_RELOC_ALPHA_GPDISP:
-#ifdef OBJ_ECOFF
- case BFD_RELOC_ALPHA_LITERAL:
-#endif
-#ifdef OBJ_ELF
- case BFD_RELOC_ALPHA_ELF_LITERAL:
-#endif
- case BFD_RELOC_ALPHA_LITUSE:
- case BFD_RELOC_GPREL32:
-#ifdef OBJ_EVAX
- case BFD_RELOC_ALPHA_LINKAGE:
- case BFD_RELOC_ALPHA_CODEADDR:
-#endif
- return 1;
+ /* They are in exactly the wrong order -- swap through AT. */
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
- case BFD_RELOC_23_PCREL_S2:
- case BFD_RELOC_32:
- case BFD_RELOC_64:
- case BFD_RELOC_ALPHA_HINT:
- return 0;
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ assemble_tokens ("mov", newtok, 2, 1);
- default:
- assert((int)f->fx_r_type < 0 && -(int)f->fx_r_type < alpha_num_operands);
- return 0;
+ set_tok_reg (newtok[0], AXP_REG_T11);
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ assemble_tokens ("mov", newtok, 2, 1);
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ assemble_tokens ("mov", newtok, 2, 1);
}
-}
+ else
+ {
+ if (yr == AXP_REG_T10)
+ {
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
-/* Return true if we can partially resolve a relocation now. */
+ if (xr != AXP_REG_T10)
+ {
+ set_tok_reg (newtok[0], xr);
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
-int
-alpha_fix_adjustable (f)
- fixS *f;
-{
-#ifdef OBJ_ELF
- /* Prevent all adjustments to global symbols */
- if (S_IS_EXTERN (f->fx_addsy))
- return 0;
-#endif
+ if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
+ {
+ set_tok_reg (newtok[0], yr);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
+ }
- /* Are there any relocation types for which we must generate a reloc
- but we can adjust the values contained within it? */
- switch (f->fx_r_type)
- {
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- case BFD_RELOC_ALPHA_GPDISP:
- return 0;
+ /* Call the division routine. */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_sym (newtok[1], sym, 0);
+ assemble_tokens ("jsr", newtok, 2, 1);
-#ifdef OBJ_ECOFF
- case BFD_RELOC_ALPHA_LITERAL:
-#endif
-#ifdef OBJ_ELF
- case BFD_RELOC_ALPHA_ELF_LITERAL:
+ /* Reload the GP register. */
+#ifdef OBJ_AOUT
+FIXME
#endif
-#ifdef OBJ_EVAX
- case BFD_RELOC_ALPHA_LINKAGE:
- case BFD_RELOC_ALPHA_CODEADDR:
+#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
+ set_tok_reg (newtok[0], alpha_gp_register);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_T9);
+ assemble_tokens ("ldgp", newtok, 3, 1);
#endif
- return 1;
-
- case BFD_RELOC_ALPHA_LITUSE:
- return 0;
-
- case BFD_RELOC_GPREL32:
- case BFD_RELOC_23_PCREL_S2:
- case BFD_RELOC_32:
- case BFD_RELOC_64:
- case BFD_RELOC_ALPHA_HINT:
- return 1;
- default:
- assert ((int)f->fx_r_type < 0
- && - (int)f->fx_r_type < alpha_num_operands);
- return 1;
+ /* Move the result to the right place. */
+ if (rr != AXP_REG_T12)
+ {
+ set_tok_reg (newtok[0], AXP_REG_T12);
+ set_tok_reg (newtok[1], rr);
+ assemble_tokens ("mov", newtok, 2, 1);
}
- /*NOTREACHED*/
}
-/* Generate the BFD reloc to be stuck in the object file from the
- fixup used internally in the assembler. */
+#endif /* !OBJ_EVAX */
-arelent *
-tc_gen_reloc (sec, fixp)
- asection *sec;
- fixS *fixp;
+/* The jsr and jmp macros differ from their instruction counterparts
+ in that they can load the target address and default most
+ everything. */
+
+static void
+emit_jsrjmp (const expressionS *tok,
+ int ntok,
+ const void * vopname)
{
- arelent *reloc;
+ const char *opname = (const char *) vopname;
+ struct alpha_insn insn;
+ expressionS newtok[3];
+ int r, tokidx = 0;
+ long lituse = 0;
- reloc = (arelent *) xmalloc (sizeof (arelent));
- reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
- reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+ if (tokidx < ntok && tok[tokidx].X_op == O_register)
+ r = regno (tok[tokidx++].X_add_number);
+ else
+ r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
- /* Make sure none of our internal relocations make it this far.
- They'd better have been fully resolved by this point. */
- assert ((int)fixp->fx_r_type > 0);
+ set_tok_reg (newtok[0], r);
- reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
- if (reloc->howto == NULL)
+ if (tokidx < ntok &&
+ (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
+ r = regno (tok[tokidx++].X_add_number);
+#ifdef OBJ_EVAX
+ /* Keep register if jsr $n.<sym>. */
+#else
+ else
{
- as_bad_where (fixp->fx_file, fixp->fx_line,
- _("cannot represent `%s' relocation in object file"),
- bfd_get_reloc_code_name (fixp->fx_r_type));
- return NULL;
+ int basereg = alpha_gp_register;
+ lituse = load_expression (r = AXP_REG_PV, &tok[tokidx],
+ &basereg, NULL, opname);
}
+#endif
- if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
- {
- as_fatal (_("internal error? cannot generate `%s' relocation"),
- bfd_get_reloc_code_name (fixp->fx_r_type));
- }
- assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
+ set_tok_cpreg (newtok[1], r);
-#ifdef OBJ_ECOFF
- if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
- {
- /* fake out bfd_perform_relocation. sigh */
- reloc->addend = -alpha_gp_value;
- }
+#ifndef OBJ_EVAX
+ if (tokidx < ntok)
+ newtok[2] = tok[tokidx];
else
#endif
- {
- reloc->addend = fixp->fx_offset;
-#ifdef OBJ_ELF
- /*
- * Ohhh, this is ugly. The problem is that if this is a local global
- * symbol, the relocation will entirely be performed at link time, not
- * at assembly time. bfd_perform_reloc doesn't know about this sort
- * of thing, and as a result we need to fake it out here.
- */
- if (S_IS_EXTERN (fixp->fx_addsy) && !S_IS_COMMON(fixp->fx_addsy))
- reloc->addend -= fixp->fx_addsy->bsym->value;
-#endif
- }
-
- return reloc;
-}
-
-/* Parse a register name off of the input_line and return a register
- number. Gets md_undefined_symbol above to do the register name
- matching for us.
+ set_tok_const (newtok[2], 0);
- Only called as a part of processing the ECOFF .frame directive. */
+ assemble_tokens_to_insn (opname, newtok, 3, &insn);
-int
-tc_get_register (frame)
- int frame;
-{
- int framereg = AXP_REG_SP;
+ if (lituse)
+ {
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
- SKIP_WHITESPACE ();
- if (*input_line_pointer == '$')
+#ifdef OBJ_EVAX
+ if (alpha_flag_replace
+ && r == AXP_REG_RA
+ && tok[tokidx].X_add_symbol
+ && alpha_linkage_symbol)
{
- char *s = input_line_pointer;
- char c = get_symbol_end ();
- symbolS *sym = md_undefined_symbol (s);
+ const char *symname = S_GET_NAME (tok[tokidx].X_add_symbol);
+ int symlen = strlen (symname);
+ char *ensymname;
- *strchr(s, '\0') = c;
- if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
- goto found;
+ ensymname = (char *) xmalloc (symlen + 5);
+ memcpy (ensymname, symname, symlen);
+ memcpy (ensymname + symlen, "..en", 5);
+
+ gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
+ if (insn.nfixups > 0)
+ {
+ memmove (&insn.fixups[1], &insn.fixups[0],
+ sizeof(struct alpha_fixup) * insn.nfixups);
+ }
+
+ /* The fixup must be the same as the BFD_RELOC_ALPHA_NOP
+ case in load_expression. See B.4.5.2 of the OpenVMS
+ Linker Utility Manual. */
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_BOH;
+ insn.fixups[0].exp.X_op = O_symbol;
+ insn.fixups[0].exp.X_add_symbol = symbol_find_or_make (ensymname);
+ insn.fixups[0].exp.X_add_number = 0;
+ insn.fixups[0].xtrasym = alpha_linkage_symbol;
+ insn.fixups[0].procsym = alpha_evax_proc->symbol;
+ insn.nfixups++;
+ alpha_linkage_symbol = 0;
}
- as_warn (_("frame reg expected, using $%d."), framereg);
+#endif
-found:
- note_gpreg (framereg);
- return framereg;
+ emit_insn (&insn);
}
-/* This is called before the symbol table is processed. In order to
- work with gcc when using mips-tfile, we must keep all local labels.
- However, in other cases, we want to discard them. If we were
- called with -g, but we didn't see any debugging information, it may
- mean that gcc is smuggling debugging information through to
- mips-tfile, in which case we must generate all local labels. */
-
-#ifdef OBJ_ECOFF
+/* The ret and jcr instructions differ from their instruction
+ counterparts in that everything can be defaulted. */
-void
-alpha_frob_file_before_adjust ()
+static void
+emit_retjcr (const expressionS *tok,
+ int ntok,
+ const void * vopname)
{
- if (alpha_debug != 0
- && ! ecoff_debugging_seen)
- flag_keep_locals = 1;
-}
+ const char *opname = (const char *) vopname;
+ expressionS newtok[3];
+ int r, tokidx = 0;
-#endif /* OBJ_ECOFF */
-\f
-/* Parse the arguments to an opcode. */
+ if (tokidx < ntok && tok[tokidx].X_op == O_register)
+ r = regno (tok[tokidx++].X_add_number);
+ else
+ r = AXP_REG_ZERO;
-static int
-tokenize_arguments (str, tok, ntok)
- char *str;
- expressionS tok[];
- int ntok;
-{
- expressionS *end_tok = tok + ntok;
- char *old_input_line_pointer;
- int saw_comma = 0, saw_arg = 0;
+ set_tok_reg (newtok[0], r);
- memset (tok, 0, sizeof (*tok) * ntok);
+ if (tokidx < ntok &&
+ (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
+ r = regno (tok[tokidx++].X_add_number);
+ else
+ r = AXP_REG_RA;
- /* Save and restore input_line_pointer around this function */
- old_input_line_pointer = input_line_pointer;
- input_line_pointer = str;
+ set_tok_cpreg (newtok[1], r);
- while (tok < end_tok && *input_line_pointer)
- {
- SKIP_WHITESPACE ();
- switch (*input_line_pointer)
- {
- case '\0':
- goto fini;
+ if (tokidx < ntok)
+ newtok[2] = tok[tokidx];
+ else
+ set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
- case ',':
- ++input_line_pointer;
- if (saw_comma || !saw_arg)
- goto err;
- saw_comma = 1;
- break;
+ assemble_tokens (opname, newtok, 3, 0);
+}
- case '(':
- {
- char *hold = input_line_pointer++;
+/* Implement the ldgp macro. */
- /* First try for parenthesized register ... */
- expression (tok);
- if (*input_line_pointer == ')' && tok->X_op == O_register)
- {
- tok->X_op = (saw_comma ? O_cpregister : O_pregister);
- saw_comma = 0;
- saw_arg = 1;
- ++input_line_pointer;
- ++tok;
- break;
- }
+static void
+emit_ldgp (const expressionS *tok,
+ int ntok ATTRIBUTE_UNUSED,
+ const void * unused ATTRIBUTE_UNUSED)
+{
+#ifdef OBJ_AOUT
+FIXME
+#endif
+#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
+ /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
+ with appropriate constants and relocations. */
+ struct alpha_insn insn;
+ expressionS newtok[3];
+ expressionS addend;
- /* ... then fall through to plain expression */
- input_line_pointer = hold;
- }
+#ifdef OBJ_ECOFF
+ if (regno (tok[2].X_add_number) == AXP_REG_PV)
+ ecoff_set_gp_prolog_size (0);
+#endif
- default:
- if (saw_arg && !saw_comma)
- goto err;
- expression (tok);
- if (tok->X_op == O_illegal || tok->X_op == O_absent)
- goto err;
+ newtok[0] = tok[0];
+ set_tok_const (newtok[1], 0);
+ newtok[2] = tok[2];
- saw_comma = 0;
- saw_arg = 1;
- ++tok;
- break;
- }
- }
+ assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
-fini:
- if (saw_comma)
- goto err;
- input_line_pointer = old_input_line_pointer;
- return ntok - (end_tok - tok);
+ addend = tok[1];
-err:
- input_line_pointer = old_input_line_pointer;
- return -1;
-}
+#ifdef OBJ_ECOFF
+ if (addend.X_op != O_constant)
+ as_bad (_("can not resolve expression"));
+ addend.X_op = O_symbol;
+ addend.X_add_symbol = alpha_gp_symbol;
+#endif
-/* Search forward through all variants of an opcode looking for a
- syntax match. */
+ insn.nfixups = 1;
+ insn.fixups[0].exp = addend;
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
+ insn.sequence = next_sequence_num;
-static const struct alpha_opcode *
-find_opcode_match(first_opcode, tok, pntok, pcpumatch)
- const struct alpha_opcode *first_opcode;
- const expressionS *tok;
- int *pntok;
- int *pcpumatch;
-{
- const struct alpha_opcode *opcode = first_opcode;
- int ntok = *pntok;
- int got_cpu_match = 0;
+ emit_insn (&insn);
- do
- {
- const unsigned char *opidx;
- int tokidx = 0;
+ set_tok_preg (newtok[2], tok[0].X_add_number);
- /* Don't match opcodes that don't exist on this architecture */
- if (!(opcode->flags & alpha_target))
- goto match_failed;
+ assemble_tokens_to_insn ("lda", newtok, 3, &insn);
- got_cpu_match = 1;
+#ifdef OBJ_ECOFF
+ addend.X_add_number += 4;
+#endif
- for (opidx = opcode->operands; *opidx; ++opidx)
- {
- const struct alpha_operand *operand = &alpha_operands[*opidx];
+ insn.nfixups = 1;
+ insn.fixups[0].exp = addend;
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
+ insn.sequence = next_sequence_num--;
- /* only take input from real operands */
- if (operand->flags & AXP_OPERAND_FAKE)
- continue;
+ emit_insn (&insn);
+#else /* OBJ_ECOFF || OBJ_ELF */
+ /* Avoid warning. */
+ tok = NULL;
+#endif
+}
- /* when we expect input, make sure we have it */
- if (tokidx >= ntok)
- {
- if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
- goto match_failed;
- continue;
- }
+/* The macro table. */
- /* match operand type with expression type */
- switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
- {
- case AXP_OPERAND_IR:
- if (tok[tokidx].X_op != O_register
- || !is_ir_num(tok[tokidx].X_add_number))
- goto match_failed;
- break;
- case AXP_OPERAND_FPR:
- if (tok[tokidx].X_op != O_register
- || !is_fpr_num(tok[tokidx].X_add_number))
- goto match_failed;
- break;
- case AXP_OPERAND_IR|AXP_OPERAND_PARENS:
- if (tok[tokidx].X_op != O_pregister
- || !is_ir_num(tok[tokidx].X_add_number))
- goto match_failed;
- break;
- case AXP_OPERAND_IR|AXP_OPERAND_PARENS|AXP_OPERAND_COMMA:
- if (tok[tokidx].X_op != O_cpregister
- || !is_ir_num(tok[tokidx].X_add_number))
- goto match_failed;
- break;
+static const struct alpha_macro alpha_macros[] =
+{
+/* Load/Store macros. */
+ { "lda", emit_lda, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldah", emit_ldah, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
- case AXP_OPERAND_RELATIVE:
- case AXP_OPERAND_SIGNED:
- case AXP_OPERAND_UNSIGNED:
- switch (tok[tokidx].X_op)
- {
- case O_illegal:
- case O_absent:
- case O_register:
- case O_pregister:
- case O_cpregister:
- goto match_failed;
- }
- break;
+ { "ldl", emit_ir_load, "ldl",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldl_l", emit_ir_load, "ldl_l",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldq", emit_ir_load, "ldq",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldq_l", emit_ir_load, "ldq_l",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldq_u", emit_ir_load, "ldq_u",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldf", emit_loadstore, "ldf",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldg", emit_loadstore, "ldg",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "lds", emit_loadstore, "lds",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldt", emit_loadstore, "ldt",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+ { "ldb", emit_ldX, (void *) 0,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldbu", emit_ldXu, (void *) 0,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldw", emit_ldX, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldwu", emit_ldXu, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+ { "uldw", emit_uldX, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldwu", emit_uldXu, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldl", emit_uldX, (void *) 2,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldlu", emit_uldXu, (void *) 2,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldq", emit_uldXu, (void *) 3,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
- default:
- /* everything else should have been fake */
- abort();
- }
- ++tokidx;
- }
+ { "ldgp", emit_ldgp, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
- /* possible match -- did we use all of our input? */
- if (tokidx == ntok)
- {
- *pntok = ntok;
- return opcode;
- }
+ { "ldi", emit_lda, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldil", emit_ldil, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldiq", emit_lda, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
- match_failed:;
- }
- while (++opcode-alpha_opcodes < alpha_num_opcodes
- && !strcmp(opcode->name, first_opcode->name));
+ { "stl", emit_loadstore, "stl",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stl_c", emit_loadstore, "stl_c",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stq", emit_loadstore, "stq",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stq_c", emit_loadstore, "stq_c",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stq_u", emit_loadstore, "stq_u",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stf", emit_loadstore, "stf",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stg", emit_loadstore, "stg",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "sts", emit_loadstore, "sts",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stt", emit_loadstore, "stt",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+ { "stb", emit_stX, (void *) 0,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stw", emit_stX, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ustw", emit_ustX, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ustl", emit_ustX, (void *) 2,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ustq", emit_ustX, (void *) 3,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+/* Arithmetic macros. */
+
+ { "sextb", emit_sextX, (void *) 0,
+ { MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
+ { "sextw", emit_sextX, (void *) 1,
+ { MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
+
+ { "divl", emit_division, "__divl",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "divlu", emit_division, "__divlu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "divq", emit_division, "__divq",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "divqu", emit_division, "__divqu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "reml", emit_division, "__reml",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "remlu", emit_division, "__remlu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "remq", emit_division, "__remq",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "remqu", emit_division, "__remqu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- if (*pcpumatch)
- *pcpumatch = got_cpu_match;
+ { "jsr", emit_jsrjmp, "jsr",
+ { MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA } },
+ { "jmp", emit_jsrjmp, "jmp",
+ { MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA } },
+ { "ret", emit_retjcr, "ret",
+ { MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA,
+ MACRO_EOA } },
+ { "jcr", emit_retjcr, "jcr",
+ { MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA,
+ MACRO_EOA } },
+ { "jsr_coroutine", emit_retjcr, "jcr",
+ { MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA,
+ MACRO_EOA } },
+};
- return NULL;
-}
+static const unsigned int alpha_num_macros
+ = sizeof (alpha_macros) / sizeof (*alpha_macros);
/* Search forward through all variants of a macro looking for a syntax
match. */
static const struct alpha_macro *
-find_macro_match(first_macro, tok, pntok)
- const struct alpha_macro *first_macro;
- const expressionS *tok;
- int *pntok;
+find_macro_match (const struct alpha_macro *first_macro,
+ const expressionS *tok,
+ int *pntok)
+
{
const struct alpha_macro *macro = first_macro;
int ntok = *pntok;
tokidx = 0;
break;
+ /* Index register. */
case MACRO_IR:
if (tokidx >= ntok || tok[tokidx].X_op != O_register
- || !is_ir_num(tok[tokidx].X_add_number))
+ || !is_ir_num (tok[tokidx].X_add_number))
goto match_failed;
++tokidx;
break;
+
+ /* Parenthesized index register. */
case MACRO_PIR:
if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
- || !is_ir_num(tok[tokidx].X_add_number))
- goto match_failed;
- ++tokidx;
- break;
- case MACRO_CPIR:
- if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
- || !is_ir_num(tok[tokidx].X_add_number))
- goto match_failed;
- ++tokidx;
- break;
- case MACRO_FPR:
- if (tokidx >= ntok || tok[tokidx].X_op != O_register
- || !is_fpr_num(tok[tokidx].X_add_number))
- goto match_failed;
- ++tokidx;
- break;
-
- case MACRO_EXP:
- if (tokidx >= ntok)
+ || !is_ir_num (tok[tokidx].X_add_number))
goto match_failed;
- switch (tok[tokidx].X_op)
- {
- case O_illegal:
- case O_absent:
- case O_register:
- case O_pregister:
- case O_cpregister:
- goto match_failed;
- }
++tokidx;
break;
- match_failed:
- while (*arg != MACRO_EOA)
- ++arg;
- tokidx = 0;
- break;
- }
- ++arg;
- }
- }
- while (++macro-alpha_macros < alpha_num_macros
- && !strcmp(macro->name, first_macro->name));
-
- return NULL;
-}
-
-/* Insert an operand value into an instruction. */
-
-static unsigned
-insert_operand(insn, operand, val, file, line)
- unsigned insn;
- const struct alpha_operand *operand;
- offsetT val;
- char *file;
- unsigned line;
-{
- if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
- {
- offsetT min, max;
-
- if (operand->flags & AXP_OPERAND_SIGNED)
- {
- max = (1 << (operand->bits - 1)) - 1;
- min = -(1 << (operand->bits - 1));
- }
- else
- {
- max = (1 << operand->bits) - 1;
- min = 0;
- }
-
- if (val < min || val > max)
- {
- const char *err =
- _("operand out of range (%s not between %d and %d)");
- char buf[sizeof (val) * 3 + 2];
-
- sprint_value(buf, val);
- if (file)
- as_warn_where(file, line, err, buf, min, max);
- else
- as_warn(err, buf, min, max);
- }
- }
-
- if (operand->insert)
- {
- const char *errmsg = NULL;
-
- insn = (*operand->insert) (insn, val, &errmsg);
- if (errmsg)
- as_warn (errmsg);
- }
- else
- insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
-
- return insn;
-}
-
-/*
- * Turn an opcode description and a set of arguments into
- * an instruction and a fixup.
- */
-
-static void
-assemble_insn(opcode, tok, ntok, insn)
- const struct alpha_opcode *opcode;
- const expressionS *tok;
- int ntok;
- struct alpha_insn *insn;
-{
- const unsigned char *argidx;
- unsigned image;
- int tokidx = 0;
-
- memset (insn, 0, sizeof (*insn));
- image = opcode->opcode;
-
- for (argidx = opcode->operands; *argidx; ++argidx)
- {
- const struct alpha_operand *operand = &alpha_operands[*argidx];
- const expressionS *t;
-
- if (operand->flags & AXP_OPERAND_FAKE)
- {
- /* fake operands take no value and generate no fixup */
- image = insert_operand(image, operand, 0, NULL, 0);
- continue;
- }
-
- if (tokidx >= ntok)
- {
- switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
- {
- case AXP_OPERAND_DEFAULT_FIRST:
- t = &tok[0];
- break;
- case AXP_OPERAND_DEFAULT_SECOND:
- t = &tok[1];
- break;
- case AXP_OPERAND_DEFAULT_ZERO:
- {
- static const expressionS zero_exp = { 0, 0, 0, O_constant, 1 };
- t = &zero_exp;
- }
+ /* Optional parenthesized index register. */
+ case MACRO_OPIR:
+ if (tokidx < ntok && tok[tokidx].X_op == O_pregister
+ && is_ir_num (tok[tokidx].X_add_number))
+ ++tokidx;
break;
- default:
- abort();
- }
- }
- else
- t = &tok[tokidx++];
-
- switch (t->X_op)
- {
- case O_register:
- case O_pregister:
- case O_cpregister:
- image = insert_operand(image, operand, regno(t->X_add_number),
- NULL, 0);
- break;
-
- case O_constant:
- image = insert_operand(image, operand, t->X_add_number, NULL, 0);
- break;
-
- default:
- {
- struct alpha_fixup *fixup;
-
- if (insn->nfixups >= MAX_INSN_FIXUPS)
- as_fatal(_("too many fixups"));
-
- fixup = &insn->fixups[insn->nfixups++];
-
- fixup->exp = *t;
- fixup->reloc = operand->default_reloc;
- }
- break;
- }
- }
-
- insn->insn = image;
-}
-
-/*
- * Actually output an instruction with its fixup.
- */
-
-static void
-emit_insn (insn)
- struct alpha_insn *insn;
-{
- char *f;
- int i;
-
- /* Take care of alignment duties */
- if (alpha_auto_align_on && alpha_current_align < 2)
- alpha_align (2, (char *) NULL, alpha_insn_label, 0);
- if (alpha_current_align > 2)
- alpha_current_align = 2;
- alpha_insn_label = NULL;
-
- /* Write out the instruction. */
- f = frag_more (4);
- md_number_to_chars (f, insn->insn, 4);
-
- /* Apply the fixups in order */
- for (i = 0; i < insn->nfixups; ++i)
- {
- struct alpha_fixup *fixup = &insn->fixups[i];
- int size, pcrel;
- fixS *fixP;
-
- /* Some fixups are only used internally and so have no howto */
- if ((int)fixup->reloc < 0)
- size = 4, pcrel = 0;
-#ifdef OBJ_ELF
- /* These relocation types are only used internally. */
- else if (fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
- || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
- {
- size = 2, pcrel = 0;
- }
-#endif
- else
- {
- reloc_howto_type *reloc_howto
- = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
- assert (reloc_howto);
-
- size = bfd_get_reloc_size (reloc_howto);
- pcrel = reloc_howto->pc_relative;
- }
- assert (size >= 1 && size <= 4);
-
- fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
- &fixup->exp, pcrel, fixup->reloc);
- /* Turn off complaints that the addend is too large for some fixups */
- switch (fixup->reloc)
- {
- case BFD_RELOC_ALPHA_GPDISP_LO16:
-#ifdef OBJ_ECOFF
- case BFD_RELOC_ALPHA_LITERAL:
-#endif
-#ifdef OBJ_ELF
- case BFD_RELOC_ALPHA_ELF_LITERAL:
-#endif
- case BFD_RELOC_GPREL32:
- fixP->fx_no_overflow = 1;
- break;
- default:
- break;
- }
- }
-}
+ /* Leading comma with a parenthesized index register. */
+ case MACRO_CPIR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
-/* Given an opcode name and a pre-tokenized set of arguments, assemble
- the insn, but do not emit it.
+ /* Floating point register. */
+ case MACRO_FPR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_register
+ || !is_fpr_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
- Note that this implies no macros allowed, since we can't store more
- than one insn in an insn structure. */
+ /* Normal expression. */
+ case MACRO_EXP:
+ if (tokidx >= ntok)
+ goto match_failed;
+ switch (tok[tokidx].X_op)
+ {
+ case O_illegal:
+ case O_absent:
+ case O_register:
+ case O_pregister:
+ case O_cpregister:
+ case O_literal:
+ case O_lituse_base:
+ case O_lituse_bytoff:
+ case O_lituse_jsr:
+ case O_gpdisp:
+ case O_gprelhigh:
+ case O_gprellow:
+ case O_gprel:
+ case O_samegp:
+ goto match_failed;
-static void
-assemble_tokens_to_insn(opname, tok, ntok, insn)
- const char *opname;
- const expressionS *tok;
- int ntok;
- struct alpha_insn *insn;
-{
- const struct alpha_opcode *opcode;
+ default:
+ break;
+ }
+ ++tokidx;
+ break;
- /* search opcodes */
- opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
- if (opcode)
- {
- int cpumatch;
- opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
- if (opcode)
- {
- assemble_insn (opcode, tok, ntok, insn);
- return;
+ match_failed:
+ while (*arg != MACRO_EOA)
+ ++arg;
+ tokidx = 0;
+ break;
+ }
+ ++arg;
}
- else if (cpumatch)
- as_bad (_("inappropriate arguments for opcode `%s'"), opname);
- else
- as_bad (_("opcode `%s' not supported for target %s"), opname,
- alpha_target_name);
}
- else
- as_bad (_("unknown opcode `%s'"), opname);
+ while (++macro - alpha_macros < (int) alpha_num_macros
+ && !strcmp (macro->name, first_macro->name));
+
+ return NULL;
}
/* Given an opcode name and a pre-tokenized set of arguments, take the
opcode all the way through emission. */
static void
-assemble_tokens (opname, tok, ntok, local_macros_on)
- const char *opname;
- const expressionS *tok;
- int ntok;
- int local_macros_on;
+assemble_tokens (const char *opname,
+ const expressionS *tok,
+ int ntok,
+ int local_macros_on)
{
int found_something = 0;
const struct alpha_opcode *opcode;
const struct alpha_macro *macro;
int cpumatch = 1;
+ bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
- /* search macros */
+#ifdef RELOC_OP_P
+ /* If a user-specified relocation is present, this is not a macro. */
+ if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+ {
+ reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc;
+ ntok--;
+ }
+ else
+#endif
if (local_macros_on)
{
macro = ((const struct alpha_macro *)
}
}
- /* search opcodes */
+ /* Search opcodes. */
opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
if (opcode)
{
if (opcode)
{
struct alpha_insn insn;
- assemble_insn (opcode, tok, ntok, &insn);
+ assemble_insn (opcode, tok, ntok, &insn, reloc);
+
+ /* Copy the sequence number for the reloc from the reloc token. */
+ if (reloc != BFD_RELOC_UNUSED)
+ insn.sequence = tok[ntok].X_add_number;
+
emit_insn (&insn);
return;
}
}
if (found_something)
- if (cpumatch)
- as_bad (_("inappropriate arguments for opcode `%s'"), opname);
- else
- as_bad (_("opcode `%s' not supported for target %s"), opname,
- alpha_target_name);
+ {
+ if (cpumatch)
+ as_bad (_("inappropriate arguments for opcode `%s'"), opname);
+ else
+ as_bad (_("opcode `%s' not supported for target %s"), opname,
+ alpha_target_name);
+ }
else
as_bad (_("unknown opcode `%s'"), opname);
}
-
\f
-/* Some instruction sets indexed by lg(size) */
-static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
-static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
-static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
-static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
-static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
-static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
-static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
-static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
-static const char * const ldX_op[] = { "ldb", "ldw", "ldll", "ldq" };
-static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
-
-/* Implement the ldgp macro. */
-
-static void
-emit_ldgp (tok, ntok, unused)
- const expressionS *tok;
- int ntok;
- const PTR unused;
-{
-#ifdef OBJ_AOUT
-FIXME
-#endif
-#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
- /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
- with appropriate constants and relocations. */
- struct alpha_insn insn;
- expressionS newtok[3];
- expressionS addend;
-
- /* We're going to need this symbol in md_apply_fix(). */
- (void) section_symbol (absolute_section);
-
-#ifdef OBJ_ECOFF
- if (regno (tok[2].X_add_number) == AXP_REG_PV)
- ecoff_set_gp_prolog_size (0);
-#endif
-
- newtok[0] = tok[0];
- set_tok_const (newtok[1], 0);
- newtok[2] = tok[2];
-
- assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
-
- addend = tok[1];
-
-#ifdef OBJ_ECOFF
- assert (addend.X_op == O_constant);
- addend.X_op = O_symbol;
- addend.X_add_symbol = alpha_gp_symbol;
-#endif
-
- insn.nfixups = 1;
- insn.fixups[0].exp = addend;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
-
- emit_insn (&insn);
-
- set_tok_preg (newtok[2], tok[0].X_add_number);
-
- assemble_tokens_to_insn ("lda", newtok, 3, &insn);
-
-#ifdef OBJ_ECOFF
- addend.X_add_number += 4;
-#endif
-
- insn.nfixups = 1;
- insn.fixups[0].exp = addend;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
-
- emit_insn (&insn);
-#endif /* OBJ_ECOFF || OBJ_ELF */
-}
-
#ifdef OBJ_EVAX
/* Add symbol+addend to link pool.
Add new fixup only if offset isn't 16bit. */
-valueT
-add_to_link_pool (basesym, sym, addend)
- symbolS *basesym;
- symbolS *sym;
- offsetT addend;
+static symbolS *
+add_to_link_pool (symbolS *basesym,
+ symbolS *sym,
+ offsetT addend)
{
segT current_section = now_seg;
int current_subsec = now_subseg;
valueT offset;
- bfd_reloc_code_real_type reloc_type;
char *p;
segment_info_type *seginfo = seg_info (alpha_link_section);
fixS *fixp;
-
- offset = -basesym->sy_obj;
+ symbolS *linksym, *expsym;
+ expressionS e;
+
+ offset = 0; /* ??? DBR */
/* @@ This assumes all entries in a given section will be of the same
size... Probably correct, but unwise to rely on. */
if (seginfo->frchainP)
for (fixp = seginfo->frchainP->fix_root;
fixp != (fixS *) NULL;
- fixp = fixp->fx_next, offset += 8)
+ fixp = fixp->fx_next)
{
- if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
- {
- if (range_signed_16 (offset))
- {
- return offset;
- }
- }
+ if (fixp->tc_fix_data.info
+ && fixp->tc_fix_data.info->sym
+ && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym)
+ offset += 8;
+
+ if (fixp->fx_addsy == sym
+ && fixp->fx_offset == (valueT)addend
+ && fixp->tc_fix_data.info
+ && fixp->tc_fix_data.info->sym
+ && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym)
+ return fixp->tc_fix_data.info->sym;
}
/* Not found in 16bit signed range. */
subseg_set (alpha_link_section, 0);
+ linksym = symbol_new
+ (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
p = frag_more (8);
memset (p, 0, 8);
- fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
- BFD_RELOC_64);
+ e.X_op = O_subtract;
+ e.X_add_symbol = linksym;
+ e.X_op_symbol = basesym;
+ e.X_add_number = 0;
+ expsym = make_expr_symbol (&e);
+
+ fixp = fix_new
+ (frag_now, p-frag_now->fr_literal, 8, sym, addend, 0, BFD_RELOC_64);
+ fixp->tc_fix_data.info = get_alpha_reloc_tag (next_sequence_num--);
+ fixp->tc_fix_data.info->sym = expsym;
subseg_set (current_section, current_subsec);
seginfo->literal_pool_size += 8;
- return offset;
+ return expsym;
}
-
#endif /* OBJ_EVAX */
+\f
+/* Assembler directives. */
-/* Load a (partial) expression into a target register.
+/* Handle the .text pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
- If poffset is not null, after the call it will either contain
- O_constant 0, or a 16-bit offset appropriate for any MEM format
- instruction. In addition, pbasereg will be modified to point to
- the base register to use in that MEM format instruction.
+static void
+s_alpha_text (int i)
+{
+#ifdef OBJ_ELF
+ obj_elf_text (i);
+#else
+ s_text (i);
+#endif
+#ifdef OBJ_EVAX
+ {
+ symbolS * symbolP;
- In any case, *pbasereg should contain a base register to add to the
- expression. This will normally be either AXP_REG_ZERO or
- alpha_gp_register. Symbol addresses will always be loaded via $gp,
- so "foo($0)" is interpreted as adding the address of foo to $0;
- i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
- but this is what OSF/1 does.
+ symbolP = symbol_find (".text");
+ if (symbolP == NULL)
+ {
+ symbolP = symbol_make (".text");
+ S_SET_SEGMENT (symbolP, text_section);
+ symbol_table_insert (symbolP);
+ }
+ }
+#endif
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
- Finally, the return value is true if the calling macro may emit a
- LITUSE reloc if otherwise appropriate. */
+/* Handle the .data pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
-static int
-load_expression (targreg, exp, pbasereg, poffset)
- int targreg;
- const expressionS *exp;
- int *pbasereg;
- expressionS *poffset;
+static void
+s_alpha_data (int i)
{
- int emit_lituse = 0;
- offsetT addend = exp->X_add_number;
- int basereg = *pbasereg;
- struct alpha_insn insn;
- expressionS newtok[3];
+#ifdef OBJ_ELF
+ obj_elf_data (i);
+#else
+ s_data (i);
+#endif
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
- switch (exp->X_op)
- {
- case O_symbol:
- {
-#ifdef OBJ_ECOFF
- offsetT lit;
+#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
- /* attempt to reduce .lit load by splitting the offset from
- its symbol when possible, but don't create a situation in
- which we'd fail. */
- if (!range_signed_32 (addend) &&
- (alpha_noat_on || targreg == AXP_REG_AT))
- {
- lit = add_to_literal_pool (exp->X_add_symbol, addend,
- alpha_lita_section, 8);
- addend = 0;
- }
- else
- {
- lit = add_to_literal_pool (exp->X_add_symbol, 0,
- alpha_lita_section, 8);
- }
+/* Handle the OSF/1 and openVMS .comm pseudo quirks. */
- if (lit >= 0x8000)
- as_fatal (_("overflow in literal (.lita) table"));
+static void
+s_alpha_comm (int ignore ATTRIBUTE_UNUSED)
+{
+ char *name;
+ char c;
+ char *p;
+ offsetT size;
+ symbolS *symbolP;
+#ifdef OBJ_EVAX
+ offsetT temp;
+ int log_align = 0;
+#endif
- /* emit "ldq r, lit(gp)" */
+ name = input_line_pointer;
+ c = get_symbol_end ();
- if (basereg != alpha_gp_register && targreg == basereg)
- {
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
- if (targreg == AXP_REG_AT)
- as_bad (_("macro requires $at while $at in use"));
+ /* Just after name is now '\0'. */
+ p = input_line_pointer;
+ *p = c;
+
+ SKIP_WHITESPACE ();
+
+ /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
+ if (*input_line_pointer == ',')
+ {
+ input_line_pointer++;
+ SKIP_WHITESPACE ();
+ }
+ if ((size = get_absolute_expression ()) < 0)
+ {
+ as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
+ ignore_rest_of_line ();
+ return;
+ }
+
+ *p = 0;
+ symbolP = symbol_find_or_make (name);
+ *p = c;
+
+ if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
+ {
+ as_bad (_("Ignoring attempt to re-define symbol"));
+ ignore_rest_of_line ();
+ return;
+ }
+
+#ifdef OBJ_EVAX
+ if (*input_line_pointer != ',')
+ temp = 8; /* Default alignment. */
+ else
+ {
+ input_line_pointer++;
+ SKIP_WHITESPACE ();
+ temp = get_absolute_expression ();
+ }
- set_tok_reg (newtok[0], AXP_REG_AT);
- }
- else
- set_tok_reg (newtok[0], targreg);
- set_tok_sym (newtok[1], alpha_lita_symbol, lit);
- set_tok_preg (newtok[2], alpha_gp_register);
+ /* ??? Unlike on OSF/1, the alignment factor is not in log units. */
+ while ((temp >>= 1) != 0)
+ ++log_align;
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ if (*input_line_pointer == ',')
+ {
+ /* Extended form of the directive
- assert (insn.nfixups == 1);
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
-#endif /* OBJ_ECOFF */
-#ifdef OBJ_ELF
- /* emit "ldq r, gotoff(gp)" */
+ .comm symbol, size, alignment, section
- if (basereg != alpha_gp_register && targreg == basereg)
- {
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
- if (targreg == AXP_REG_AT)
- as_bad (_("macro requires $at while $at in use"));
+ where the "common" semantics is transferred to the section.
+ The symbol is effectively an alias for the section name. */
- set_tok_reg (newtok[0], AXP_REG_AT);
- }
- else
- set_tok_reg (newtok[0], targreg);
+ segT sec;
+ char *sec_name;
+ symbolS *sec_symbol;
+ segT current_seg = now_seg;
+ subsegT current_subseg = now_subseg;
+ int cur_size;
+
+ input_line_pointer++;
+ SKIP_WHITESPACE ();
+ sec_name = s_alpha_section_name ();
+ sec_symbol = symbol_find_or_make (sec_name);
+ sec = subseg_new (sec_name, 0);
+ S_SET_SEGMENT (sec_symbol, sec);
+ symbol_get_bfdsym (sec_symbol)->flags |= BSF_SECTION_SYM;
+ bfd_vms_set_section_flags (stdoutput, sec,
+ EGPS_S_V_OVR | EGPS_S_V_GBL | EGPS_S_V_NOMOD);
+ record_alignment (sec, log_align);
+
+ /* Reuse stab_string_size to store the size of the section. */
+ cur_size = seg_info (sec)->stabu.stab_string_size;
+ if ((int) size > cur_size)
+ {
+ char *pfrag
+ = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL,
+ (valueT)size - (valueT)cur_size, NULL);
+ *pfrag = 0;
+ seg_info (sec)->stabu.stab_string_size = (int)size;
+ }
- /* XXX: Disable this .got minimizing optimization so that we can get
- better instruction offset knowledge in the compiler. This happens
- very infrequently anyway. */
- if (1 || !range_signed_32 (addend)
- && (alpha_noat_on || targreg == AXP_REG_AT))
- {
- newtok[1] = *exp;
- addend = 0;
- }
- else
- {
- set_tok_sym (newtok[1], exp->X_add_symbol, 0);
- }
+ S_SET_SEGMENT (symbolP, sec);
- set_tok_preg (newtok[2], alpha_gp_register);
+ subseg_set (current_seg, current_subseg);
+ }
+ else
+ {
+ /* Regular form of the directive
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ .comm symbol, size, alignment
- assert (insn.nfixups == 1);
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
-#endif /* OBJ_ELF */
-#ifdef OBJ_EVAX
- offsetT link;
+ where the "common" semantics in on the symbol.
+ These symbols are assembled in the .bss section. */
- /* Find symbol or symbol pointer in link section. */
+ char *pfrag;
+ segT current_seg = now_seg;
+ subsegT current_subseg = now_subseg;
- if (exp->X_add_symbol == alpha_evax_proc.symbol)
- {
- if (range_signed_16 (addend))
- {
- set_tok_reg (newtok[0], targreg);
- set_tok_const (newtok[1], addend);
- set_tok_preg (newtok[2], basereg);
- assemble_tokens_to_insn ("lda", newtok, 3, &insn);
- addend = 0;
- }
- else
- {
- set_tok_reg (newtok[0], targreg);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], basereg);
- assemble_tokens_to_insn ("lda", newtok, 3, &insn);
- }
- }
- else
- {
- if (!range_signed_32 (addend))
- {
- link = add_to_link_pool (alpha_evax_proc.symbol,
- exp->X_add_symbol, addend);
- addend = 0;
- }
- else
- {
- link = add_to_link_pool (alpha_evax_proc.symbol,
- exp->X_add_symbol, 0);
- }
- set_tok_reg (newtok[0], targreg);
- set_tok_const (newtok[1], link);
- set_tok_preg (newtok[2], basereg);
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
- }
-#endif /* OBJ_EVAX */
+ subseg_set (bss_section, 1);
+ frag_align (log_align, 0, 0);
+ record_alignment (bss_section, log_align);
- emit_insn(&insn);
+ symbolP->sy_frag = frag_now;
+ pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP,
+ size, NULL);
+ *pfrag = 0;
+ S_SET_SEGMENT (symbolP, bss_section);
+
+ subseg_set (current_seg, current_subseg);
+ }
+#endif
+
+ if (S_GET_VALUE (symbolP))
+ {
+ if (S_GET_VALUE (symbolP) != (valueT) size)
+ as_bad ("Length of .comm \"%s\" is already %ld. Not changed to %ld.",
+ S_GET_NAME (symbolP),
+ (long) S_GET_VALUE (symbolP),
+ (long) size);
+ }
+ else
+ {
+#ifndef OBJ_EVAX
+ S_SET_VALUE (symbolP, (valueT) size);
+#endif
+ S_SET_EXTERNAL (symbolP);
+ }
+
#ifndef OBJ_EVAX
- emit_lituse = 1;
+ know (symbolP->sy_frag == &zero_address_frag);
+#endif
+ demand_empty_rest_of_line ();
+}
- if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
- {
- /* emit "addq r, base, r" */
+#endif /* ! OBJ_ELF */
- set_tok_reg (newtok[1], basereg);
- set_tok_reg (newtok[2], targreg);
- assemble_tokens ("addq", newtok, 3, 0);
- }
-#endif
+#ifdef OBJ_ECOFF
- basereg = targreg;
- }
- break;
+/* Handle the .rdata pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
- case O_constant:
- break;
+static void
+s_alpha_rdata (int ignore ATTRIBUTE_UNUSED)
+{
+ int temp;
- case O_subtract:
- /* Assume that this difference expression will be resolved to an
- absolute value and that that value will fit in 16 bits. */
+ temp = get_absolute_expression ();
+ subseg_new (".rdata", 0);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
- set_tok_reg (newtok[0], targreg);
- newtok[1] = *exp;
- set_tok_preg (newtok[2], basereg);
- assemble_tokens ("lda", newtok, 3, 0);
+#endif
- if (poffset)
- set_tok_const (*poffset, 0);
- return 0;
+#ifdef OBJ_ECOFF
- case O_big:
- if (exp->X_add_number > 0)
- as_bad (_("bignum invalid; zero assumed"));
- else
- as_bad (_("floating point number invalid; zero assumed"));
- addend = 0;
- break;
+/* Handle the .sdata pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
- default:
- abort();
- }
+static void
+s_alpha_sdata (int ignore ATTRIBUTE_UNUSED)
+{
+ int temp;
- if (!range_signed_32 (addend))
- {
- offsetT lit;
+ temp = get_absolute_expression ();
+ subseg_new (".sdata", 0);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
+#endif
- /* for 64-bit addends, just put it in the literal pool */
+#ifdef OBJ_ELF
+struct alpha_elf_frame_data
+{
+ symbolS *func_sym;
+ symbolS *func_end_sym;
+ symbolS *prologue_sym;
+ unsigned int mask;
+ unsigned int fmask;
+ int fp_regno;
+ int ra_regno;
+ offsetT frame_size;
+ offsetT mask_offset;
+ offsetT fmask_offset;
+
+ struct alpha_elf_frame_data *next;
+};
-#ifdef OBJ_EVAX
- /* emit "ldq targreg, lit(basereg)" */
- lit = add_to_link_pool (alpha_evax_proc.symbol,
- section_symbol (absolute_section), addend);
- set_tok_reg (newtok[0], targreg);
- set_tok_const (newtok[1], lit);
- set_tok_preg (newtok[2], alpha_gp_register);
- assemble_tokens ("ldq", newtok, 3, 0);
-#else
+static struct alpha_elf_frame_data *all_frame_data;
+static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data;
+static struct alpha_elf_frame_data *cur_frame_data;
- if (alpha_lit8_section == NULL)
- {
- create_literal_section (".lit8",
- &alpha_lit8_section,
- &alpha_lit8_symbol);
+/* Handle the .section pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
-#ifdef OBJ_ECOFF
- alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
- alpha_lita_section, 8);
- if (alpha_lit8_literal >= 0x8000)
- as_fatal (_("overflow in literal (.lita) table"));
-#endif
- }
+static void
+s_alpha_section (int ignore ATTRIBUTE_UNUSED)
+{
+ obj_elf_section (ignore);
- lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
- if (lit >= 0x8000)
- as_fatal (_("overflow in literal (.lit8) table"));
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
- /* emit "lda litreg, .lit8+0x8000" */
+static void
+s_alpha_ent (int dummy ATTRIBUTE_UNUSED)
+{
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_ent (0);
+ else
+ {
+ char *name, name_end;
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
- if (targreg == basereg)
+ if (! is_name_beginner (*name))
{
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
- if (targreg == AXP_REG_AT)
- as_bad (_("macro requires $at while $at in use"));
-
- set_tok_reg (newtok[0], AXP_REG_AT);
+ as_warn (_(".ent directive has no name"));
+ *input_line_pointer = name_end;
}
else
- set_tok_reg (newtok[0], targreg);
-#ifdef OBJ_ECOFF
- set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
-#endif
-#ifdef OBJ_ELF
- set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
-#endif
- set_tok_preg (newtok[2], alpha_gp_register);
+ {
+ symbolS *sym;
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ if (cur_frame_data)
+ as_warn (_("nested .ent directives"));
- assert (insn.nfixups == 1);
-#ifdef OBJ_ECOFF
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
-#endif
-#ifdef OBJ_ELF
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
-#endif
+ sym = symbol_find_or_make (name);
+ symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
- emit_insn (&insn);
+ cur_frame_data = calloc (1, sizeof (*cur_frame_data));
+ cur_frame_data->func_sym = sym;
- /* emit "ldq litreg, lit(litreg)" */
+ /* Provide sensible defaults. */
+ cur_frame_data->fp_regno = 30; /* sp */
+ cur_frame_data->ra_regno = 26; /* ra */
- set_tok_const (newtok[1], lit);
- set_tok_preg (newtok[2], newtok[0].X_add_number);
+ *plast_frame_data = cur_frame_data;
+ plast_frame_data = &cur_frame_data->next;
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ /* The .ent directive is sometimes followed by a number. Not sure
+ what it really means, but ignore it. */
+ *input_line_pointer = name_end;
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer == ',')
+ {
+ input_line_pointer++;
+ SKIP_WHITESPACE ();
+ }
+ if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
+ (void) get_absolute_expression ();
+ }
+ demand_empty_rest_of_line ();
+ }
+}
- assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
+static void
+s_alpha_end (int dummy ATTRIBUTE_UNUSED)
+{
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_end (0);
+ else
+ {
+ char *name, name_end;
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
+
+ if (! is_name_beginner (*name))
{
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
+ as_warn (_(".end directive has no name"));
+ *input_line_pointer = name_end;
}
- insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_constant;
- insn.fixups[0].exp.X_add_number = 1;
- emit_lituse = 0;
+ else
+ {
+ symbolS *sym;
- emit_insn (&insn);
+ sym = symbol_find (name);
+ if (!cur_frame_data)
+ as_warn (_(".end directive without matching .ent"));
+ else if (sym != cur_frame_data->func_sym)
+ as_warn (_(".end directive names different symbol than .ent"));
- /* emit "addq litreg, base, target" */
+ /* Create an expression to calculate the size of the function. */
+ if (sym && cur_frame_data)
+ {
+ OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym);
+ expressionS *exp = xmalloc (sizeof (expressionS));
- if (basereg != AXP_REG_ZERO)
- {
- set_tok_reg (newtok[1], basereg);
- set_tok_reg (newtok[2], targreg);
- assemble_tokens ("addq", newtok, 3, 0);
+ obj->size = exp;
+ exp->X_op = O_subtract;
+ exp->X_add_symbol = symbol_temp_new_now ();
+ exp->X_op_symbol = sym;
+ exp->X_add_number = 0;
+
+ cur_frame_data->func_end_sym = exp->X_add_symbol;
+ }
+
+ cur_frame_data = NULL;
+
+ *input_line_pointer = name_end;
}
-#endif /* !OBJ_EVAX */
+ demand_empty_rest_of_line ();
+ }
+}
- if (poffset)
- set_tok_const (*poffset, 0);
- *pbasereg = targreg;
+static void
+s_alpha_mask (int fp)
+{
+ if (ECOFF_DEBUGGING)
+ {
+ if (fp)
+ ecoff_directive_fmask (0);
+ else
+ ecoff_directive_mask (0);
}
else
{
- offsetT low, high, extra, tmp;
-
- /* for 32-bit operands, break up the addend */
+ long val;
+ offsetT offset;
- low = sign_extend_16 (addend);
- tmp = addend - low;
- high = sign_extend_16 (tmp >> 16);
+ if (!cur_frame_data)
+ {
+ if (fp)
+ as_warn (_(".fmask outside of .ent"));
+ else
+ as_warn (_(".mask outside of .ent"));
+ discard_rest_of_line ();
+ return;
+ }
- if (tmp - (high << 16))
+ if (get_absolute_expression_and_terminator (&val) != ',')
{
- extra = 0x4000;
- tmp -= 0x40000000;
- high = sign_extend_16 (tmp >> 16);
+ if (fp)
+ as_warn (_("bad .fmask directive"));
+ else
+ as_warn (_("bad .mask directive"));
+ --input_line_pointer;
+ discard_rest_of_line ();
+ return;
}
- else
- extra = 0;
- set_tok_reg (newtok[0], targreg);
- set_tok_preg (newtok[2], basereg);
+ offset = get_absolute_expression ();
+ demand_empty_rest_of_line ();
- if (extra)
+ if (fp)
{
- /* emit "ldah r, extra(r) */
- set_tok_const (newtok[1], extra);
- assemble_tokens ("ldah", newtok, 3, 0);
- set_tok_preg (newtok[2], basereg = targreg);
+ cur_frame_data->fmask = val;
+ cur_frame_data->fmask_offset = offset;
}
+ else
+ {
+ cur_frame_data->mask = val;
+ cur_frame_data->mask_offset = offset;
+ }
+ }
+}
- if (high)
+static void
+s_alpha_frame (int dummy ATTRIBUTE_UNUSED)
+{
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_frame (0);
+ else
+ {
+ long val;
+
+ if (!cur_frame_data)
{
- /* emit "ldah r, high(r) */
- set_tok_const (newtok[1], high);
- assemble_tokens ("ldah", newtok, 3, 0);
- basereg = targreg;
- set_tok_preg (newtok[2], basereg);
+ as_warn (_(".frame outside of .ent"));
+ discard_rest_of_line ();
+ return;
}
- if ((low && !poffset) || (!poffset && basereg != targreg))
+ cur_frame_data->fp_regno = tc_get_register (1);
+
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ','
+ || get_absolute_expression_and_terminator (&val) != ',')
{
- /* emit "lda r, low(base)" */
- set_tok_const (newtok[1], low);
- assemble_tokens ("lda", newtok, 3, 0);
- basereg = targreg;
- low = 0;
+ as_warn (_("bad .frame directive"));
+ --input_line_pointer;
+ discard_rest_of_line ();
+ return;
}
+ cur_frame_data->frame_size = val;
- if (poffset)
- set_tok_const (*poffset, low);
- *pbasereg = basereg;
- }
+ cur_frame_data->ra_regno = tc_get_register (0);
- return emit_lituse;
+ /* Next comes the "offset of saved $a0 from $sp". In gcc terms
+ this is current_function_pretend_args_size. There's no place
+ to put this value, so ignore it. */
+ s_ignore (42);
+ }
}
-/* The lda macro differs from the lda instruction in that it handles
- most simple expressions, particualrly symbol address loads and
- large constants. */
-
static void
-emit_lda (tok, ntok, unused)
- const expressionS *tok;
- int ntok;
- const PTR unused;
+s_alpha_prologue (int ignore ATTRIBUTE_UNUSED)
{
- int basereg;
+ symbolS *sym;
+ int arg;
- if (ntok == 2)
- basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ arg = get_absolute_expression ();
+ demand_empty_rest_of_line ();
+ alpha_prologue_label = symbol_new
+ (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
+
+ if (ECOFF_DEBUGGING)
+ sym = ecoff_get_cur_proc_sym ();
else
- basereg = tok[2].X_add_number;
+ sym = cur_frame_data ? cur_frame_data->func_sym : NULL;
+
+ if (sym == NULL)
+ {
+ as_bad (_(".prologue directive without a preceding .ent directive"));
+ return;
+ }
+
+ switch (arg)
+ {
+ case 0: /* No PV required. */
+ S_SET_OTHER (sym, STO_ALPHA_NOPV
+ | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
+ break;
+ case 1: /* Std GP load. */
+ S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
+ | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
+ break;
+ case 2: /* Non-std use of PV. */
+ break;
+
+ default:
+ as_bad (_("Invalid argument %d to .prologue."), arg);
+ break;
+ }
- (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL);
+ if (cur_frame_data)
+ cur_frame_data->prologue_sym = symbol_temp_new_now ();
}
-/* The ldah macro differs from the ldah instruction in that it has $31
- as an implied base register. */
+static char *first_file_directive;
static void
-emit_ldah (tok, ntok, unused)
- const expressionS *tok;
- int ntok;
- const PTR unused;
+s_alpha_file (int ignore ATTRIBUTE_UNUSED)
{
- expressionS newtok[3];
+ /* Save the first .file directive we see, so that we can change our
+ minds about whether ecoff debugging should or shouldn't be enabled. */
+ if (alpha_flag_mdebug < 0 && ! first_file_directive)
+ {
+ char *start = input_line_pointer;
+ size_t len;
- newtok[0] = tok[0];
- newtok[1] = tok[1];
- set_tok_preg (newtok[2], AXP_REG_ZERO);
+ discard_rest_of_line ();
- assemble_tokens ("ldah", newtok, 3, 0);
-}
+ len = input_line_pointer - start;
+ first_file_directive = xmalloc (len + 1);
+ memcpy (first_file_directive, start, len);
+ first_file_directive[len] = '\0';
-/* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
- etc. They differ from the real instructions in that they do simple
- expressions like the lda macro. */
+ input_line_pointer = start;
+ }
+
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_file (0);
+ else
+ dwarf2_directive_file (0);
+}
static void
-emit_ir_load (tok, ntok, opname)
- const expressionS *tok;
- int ntok;
- const PTR opname;
+s_alpha_loc (int ignore ATTRIBUTE_UNUSED)
{
- int basereg, lituse;
- expressionS newtok[3];
- struct alpha_insn insn;
-
- if (ntok == 2)
- basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_loc (0);
else
- basereg = tok[2].X_add_number;
-
- lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
- &newtok[1]);
+ dwarf2_directive_loc (0);
+}
- newtok[0] = tok[0];
- set_tok_preg (newtok[2], basereg);
+static void
+s_alpha_stab (int n)
+{
+ /* If we've been undecided about mdebug, make up our minds in favour. */
+ if (alpha_flag_mdebug < 0)
+ {
+ segT sec = subseg_new (".mdebug", 0);
+ bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
+ bfd_set_section_alignment (stdoutput, sec, 3);
- assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
+ ecoff_read_begin_hook ();
- if (lituse)
- {
- assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
+ if (first_file_directive)
{
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
+ char *save_ilp = input_line_pointer;
+ input_line_pointer = first_file_directive;
+ ecoff_directive_file (0);
+ input_line_pointer = save_ilp;
+ free (first_file_directive);
}
- insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_constant;
- insn.fixups[0].exp.X_add_number = 1;
- }
- emit_insn (&insn);
+ alpha_flag_mdebug = 1;
+ }
+ s_stab (n);
}
-/* Handle fp register loads, and both integer and fp register stores.
- Again, we handle simple expressions. */
-
static void
-emit_loadstore (tok, ntok, opname)
- const expressionS *tok;
- int ntok;
- const PTR opname;
+s_alpha_coff_wrapper (int which)
{
- int basereg, lituse;
- expressionS newtok[3];
- struct alpha_insn insn;
+ static void (* const fns[]) (int) = {
+ ecoff_directive_begin,
+ ecoff_directive_bend,
+ ecoff_directive_def,
+ ecoff_directive_dim,
+ ecoff_directive_endef,
+ ecoff_directive_scl,
+ ecoff_directive_tag,
+ ecoff_directive_val,
+ };
+
+ gas_assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
- if (ntok == 2)
- basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
- else
- basereg = tok[2].X_add_number;
-
- if (tok[1].X_op != O_constant || !range_signed_16(tok[1].X_add_number))
- {
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
-
- lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1]);
- }
+ if (ECOFF_DEBUGGING)
+ (*fns[which]) (0);
else
{
- newtok[1] = tok[1];
- lituse = 0;
+ as_bad (_("ECOFF debugging is disabled."));
+ ignore_rest_of_line ();
}
+}
- newtok[0] = tok[0];
- set_tok_preg (newtok[2], basereg);
+/* Called at the end of assembly. Here we emit unwind info for frames
+ unless the compiler has done it for us. */
- assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
+void
+alpha_elf_md_end (void)
+{
+ struct alpha_elf_frame_data *p;
- if (lituse)
- {
- assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
- }
- insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_constant;
- insn.fixups[0].exp.X_add_number = 1;
- }
+ if (cur_frame_data)
+ as_warn (_(".ent directive without matching .end"));
- emit_insn (&insn);
-}
+ /* If someone has generated the unwind info themselves, great. */
+ if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL)
+ return;
-/* Load a half-word or byte as an unsigned value. */
+ /* Generate .eh_frame data for the unwind directives specified. */
+ for (p = all_frame_data; p ; p = p->next)
+ if (p->prologue_sym)
+ {
+ /* Create a temporary symbol at the same location as our
+ function symbol. This prevents problems with globals. */
+ cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym),
+ S_GET_VALUE (p->func_sym),
+ symbol_get_frag (p->func_sym)));
+
+ cfi_set_return_column (p->ra_regno);
+ cfi_add_CFA_def_cfa_register (30);
+ if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size)
+ {
+ unsigned int mask;
+ offsetT offset;
+
+ cfi_add_advance_loc (p->prologue_sym);
+
+ if (p->fp_regno != 30)
+ if (p->frame_size != 0)
+ cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size);
+ else
+ cfi_add_CFA_def_cfa_register (p->fp_regno);
+ else if (p->frame_size != 0)
+ cfi_add_CFA_def_cfa_offset (p->frame_size);
+
+ mask = p->mask;
+ offset = p->mask_offset;
+
+ /* Recall that $26 is special-cased and stored first. */
+ if ((mask >> 26) & 1)
+ {
+ cfi_add_CFA_offset (26, offset);
+ offset += 8;
+ mask &= ~(1 << 26);
+ }
+ while (mask)
+ {
+ unsigned int i;
+ i = mask & -mask;
+ mask ^= i;
+ i = ffs (i) - 1;
+
+ cfi_add_CFA_offset (i, offset);
+ offset += 8;
+ }
+
+ mask = p->fmask;
+ offset = p->fmask_offset;
+ while (mask)
+ {
+ unsigned int i;
+ i = mask & -mask;
+ mask ^= i;
+ i = ffs (i) - 1;
+
+ cfi_add_CFA_offset (i + 32, offset);
+ offset += 8;
+ }
+ }
+
+ cfi_end_fde (p->func_end_sym);
+ }
+}
static void
-emit_ldXu (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_usepv (int unused ATTRIBUTE_UNUSED)
{
- if (alpha_target & AXP_OPCODE_BWX)
- emit_ir_load (tok, ntok, ldXu_op[(long)vlgsize]);
- else
- {
- expressionS newtok[3];
-
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
+ char *name, name_end;
+ char *which, which_end;
+ symbolS *sym;
+ int other;
- /* emit "lda $at, exp" */
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+ if (! is_name_beginner (*name))
+ {
+ as_bad (_(".usepv directive has no name"));
+ *input_line_pointer = name_end;
+ ignore_rest_of_line ();
+ return;
+ }
- /* emit "ldq_u targ, 0($at)" */
+ sym = symbol_find_or_make (name);
+ *input_line_pointer++ = name_end;
- newtok[0] = tok[0];
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ if (name_end != ',')
+ {
+ as_bad (_(".usepv directive has no type"));
+ ignore_rest_of_line ();
+ return;
+ }
- /* emit "extXl targ, $at, targ" */
+ SKIP_WHITESPACE ();
+ which = input_line_pointer;
+ which_end = get_symbol_end ();
- set_tok_reg (newtok[1], AXP_REG_AT);
- newtok[2] = newtok[0];
- assemble_tokens (extXl_op[(long)vlgsize], newtok, 3, 1);
+ if (strcmp (which, "no") == 0)
+ other = STO_ALPHA_NOPV;
+ else if (strcmp (which, "std") == 0)
+ other = STO_ALPHA_STD_GPLOAD;
+ else
+ {
+ as_bad (_("unknown argument for .usepv"));
+ other = 0;
}
+
+ *input_line_pointer = which_end;
+ demand_empty_rest_of_line ();
+
+ S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
}
+#endif /* OBJ_ELF */
-/* Load a half-word or byte as a signed value. */
+/* Standard calling conventions leaves the CFA at $30 on entry. */
-static void
-emit_ldX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+void
+alpha_cfi_frame_initial_instructions (void)
{
- emit_ldXu (tok, ntok, vlgsize);
- assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
+ cfi_add_CFA_def_cfa_register (30);
}
-/* Load an integral value from an unaligned address as an unsigned
- value. */
+#ifdef OBJ_EVAX
-static void
-emit_uldXu (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+/* Get name of section. */
+static char *
+s_alpha_section_name (void)
{
- long lgsize = (long)vlgsize;
- expressionS newtok[3];
+ char *name;
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer == '"')
+ {
+ int dummy;
- /* emit "lda $at, exp" */
+ name = demand_copy_C_string (&dummy);
+ if (name == NULL)
+ {
+ ignore_rest_of_line ();
+ return NULL;
+ }
+ }
+ else
+ {
+ char *end = input_line_pointer;
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+ while (0 == strchr ("\n\t,; ", *end))
+ end++;
+ if (end == input_line_pointer)
+ {
+ as_warn (_("missing name"));
+ ignore_rest_of_line ();
+ return NULL;
+ }
- /* emit "ldq_u $t9, 0($at)" */
+ name = xmalloc (end - input_line_pointer + 1);
+ memcpy (name, input_line_pointer, end - input_line_pointer);
+ name[end - input_line_pointer] = '\0';
+ input_line_pointer = end;
+ }
+ SKIP_WHITESPACE ();
+ return name;
+}
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+static flagword
+s_alpha_section_word (char *str, size_t len)
+{
+ int no = 0;
+ flagword flag = 0;
- /* emit "ldq_u $t10, size-1($at)" */
+ if (len == 5 && strncmp (str, "NO", 2) == 0)
+ {
+ no = 1;
+ str += 2;
+ len -= 2;
+ }
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_const (newtok[1], (1<<lgsize)-1);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ if (len == 3)
+ {
+ if (strncmp (str, "PIC", 3) == 0)
+ flag = EGPS_S_V_PIC;
+ else if (strncmp (str, "LIB", 3) == 0)
+ flag = EGPS_S_V_LIB;
+ else if (strncmp (str, "OVR", 3) == 0)
+ flag = EGPS_S_V_OVR;
+ else if (strncmp (str, "REL", 3) == 0)
+ flag = EGPS_S_V_REL;
+ else if (strncmp (str, "GBL", 3) == 0)
+ flag = EGPS_S_V_GBL;
+ else if (strncmp (str, "SHR", 3) == 0)
+ flag = EGPS_S_V_SHR;
+ else if (strncmp (str, "EXE", 3) == 0)
+ flag = EGPS_S_V_EXE;
+ else if (strncmp (str, "WRT", 3) == 0)
+ flag = EGPS_S_V_WRT;
+ else if (strncmp (str, "VEC", 3) == 0)
+ flag = EGPS_S_V_VEC;
+ else if (strncmp (str, "MOD", 3) == 0)
+ {
+ flag = no ? EGPS_S_V_NOMOD : EGPS_S_V_NOMOD << EGPS_S_V_NO_SHIFT;
+ no = 0;
+ }
+ else if (strncmp (str, "COM", 3) == 0)
+ flag = EGPS_S_V_COM;
+ }
+
+ if (flag == 0)
+ {
+ char c = str[len];
+ str[len] = 0;
+ as_warn (_("unknown section attribute %s"), str);
+ str[len] = c;
+ return 0;
+ }
+
+ if (no)
+ return flag << EGPS_S_V_NO_SHIFT;
+ else
+ return flag;
+}
- /* emit "extXl $t9, $at, $t9" */
+/* Handle the section specific pseudo-op. */
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_reg (newtok[1], AXP_REG_AT);
- set_tok_reg (newtok[2], AXP_REG_T9);
- assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
+#define EVAX_SECTION_COUNT 5
- /* emit "extXh $t10, $at, $t10" */
+static char *section_name[EVAX_SECTION_COUNT + 1] =
+ { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_reg (newtok[2], AXP_REG_T10);
- assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
+static void
+s_alpha_section (int secid)
+{
+ int temp;
+ char *name, *beg;
+ segT sec;
+ flagword vms_flags = 0;
+ symbolS *symbol;
- /* emit "or $t9, $t10, targ" */
+ if (secid == 0)
+ {
+ name = s_alpha_section_name ();
+ if (name == NULL)
+ return;
+ sec = subseg_new (name, 0);
+ if (*input_line_pointer == ',')
+ {
+ /* Skip the comma. */
+ ++input_line_pointer;
+ SKIP_WHITESPACE ();
+
+ do
+ {
+ char c;
+
+ SKIP_WHITESPACE ();
+ beg = input_line_pointer;
+ c = get_symbol_end ();
+ *input_line_pointer = c;
+
+ vms_flags |= s_alpha_section_word (beg, input_line_pointer - beg);
+
+ SKIP_WHITESPACE ();
+ }
+ while (*input_line_pointer++ == ',');
+ --input_line_pointer;
+ }
+
+ symbol = symbol_find_or_make (name);
+ S_SET_SEGMENT (symbol, sec);
+ symbol_get_bfdsym (symbol)->flags |= BSF_SECTION_SYM;
+ bfd_vms_set_section_flags (stdoutput, sec, vms_flags);
+ }
+ else
+ {
+ temp = get_absolute_expression ();
+ subseg_new (section_name[secid], 0);
+ }
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_reg (newtok[1], AXP_REG_T10);
- newtok[2] = tok[0];
- assemble_tokens ("or", newtok, 3, 1);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
}
-/* Load an integral value from an unaligned address as a signed value.
- Note that quads should get funneled to the unsigned load since we
- don't have to do the sign extension. */
-
static void
-emit_uldX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_literals (int ignore ATTRIBUTE_UNUSED)
{
- emit_uldXu (tok, ntok, vlgsize);
- assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
+ subseg_new (".literals", 0);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
}
-/* Implement the ldil macro. */
+/* Parse .ent directives. */
static void
-emit_ldil (tok, ntok, unused)
- const expressionS *tok;
- int ntok;
- const PTR unused;
+s_alpha_ent (int ignore ATTRIBUTE_UNUSED)
{
- expressionS newtok[2];
+ symbolS *symbol;
+ expressionS symexpr;
- memcpy (newtok, tok, sizeof(newtok));
- newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
+ alpha_evax_proc
+ = (struct alpha_evax_procs *) xmalloc (sizeof (struct alpha_evax_procs));
+
+ alpha_evax_proc->pdsckind = 0;
+ alpha_evax_proc->framereg = -1;
+ alpha_evax_proc->framesize = 0;
+ alpha_evax_proc->rsa_offset = 0;
+ alpha_evax_proc->ra_save = AXP_REG_RA;
+ alpha_evax_proc->fp_save = -1;
+ alpha_evax_proc->imask = 0;
+ alpha_evax_proc->fmask = 0;
+ alpha_evax_proc->prologue = 0;
+ alpha_evax_proc->type = 0;
+ alpha_evax_proc->handler = 0;
+ alpha_evax_proc->handler_data = 0;
- assemble_tokens ("lda", newtok, ntok, 1);
-}
+ expression (&symexpr);
-/* Store a half-word or byte. */
+ if (symexpr.X_op != O_symbol)
+ {
+ as_fatal (_(".ent directive has no symbol"));
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+ symbol = make_expr_symbol (&symexpr);
+ symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
+ alpha_evax_proc->symbol = symbol;
+
+ (void) hash_insert
+ (alpha_evax_proc_hash,
+ symbol_get_bfdsym (alpha_evax_proc->symbol)->name, (PTR)alpha_evax_proc);
+
+ demand_empty_rest_of_line ();
+}
static void
-emit_stX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_handler (int is_data)
{
- int lgsize = (int)(long)vlgsize;
-
- if (alpha_target & AXP_OPCODE_BWX)
- emit_loadstore (tok, ntok, stX_op[lgsize]);
+ if (is_data)
+ alpha_evax_proc->handler_data = get_absolute_expression ();
else
{
- expressionS newtok[3];
+ char *name, name_end;
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
- if (alpha_noat_on)
- as_bad(_("macro requires $at register while noat in effect"));
+ if (! is_name_beginner (*name))
+ {
+ as_warn (_(".handler directive has no name"));
+ *input_line_pointer = name_end;
+ }
+ else
+ {
+ symbolS *sym;
- /* emit "lda $at, exp" */
+ sym = symbol_find_or_make (name);
+ symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
+ alpha_evax_proc->handler = sym;
+ *input_line_pointer = name_end;
+ }
+ }
+ demand_empty_rest_of_line ();
+}
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+/* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
- /* emit "ldq_u $t9, 0($at)" */
+static void
+s_alpha_frame (int ignore ATTRIBUTE_UNUSED)
+{
+ long val;
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ alpha_evax_proc->framereg = tc_get_register (1);
- /* emit "insXl src, $at, $t10" */
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ','
+ || get_absolute_expression_and_terminator (&val) != ',')
+ {
+ as_warn (_("Bad .frame directive 1./2. param"));
+ --input_line_pointer;
+ demand_empty_rest_of_line ();
+ return;
+ }
- newtok[0] = tok[0];
- set_tok_reg (newtok[1], AXP_REG_AT);
- set_tok_reg (newtok[2], AXP_REG_T10);
- assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
+ alpha_evax_proc->framesize = val;
- /* emit "mskXl $t9, $at, $t9" */
+ (void) tc_get_register (1);
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ',')
+ {
+ as_warn (_("Bad .frame directive 3./4. param"));
+ --input_line_pointer;
+ demand_empty_rest_of_line ();
+ return;
+ }
+ alpha_evax_proc->rsa_offset = get_absolute_expression ();
+}
- set_tok_reg (newtok[0], AXP_REG_T9);
- newtok[2] = newtok[0];
- assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
+static void
+s_alpha_prologue (int ignore ATTRIBUTE_UNUSED)
+{
+ int arg;
- /* emit "or $t9, $t10, $t9" */
+ arg = get_absolute_expression ();
+ demand_empty_rest_of_line ();
+ alpha_prologue_label = symbol_new
+ (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
+}
- set_tok_reg (newtok[1], AXP_REG_T10);
- assemble_tokens ("or", newtok, 3, 1);
+static void
+s_alpha_pdesc (int ignore ATTRIBUTE_UNUSED)
+{
+ char *name;
+ char name_end;
+ register char *p;
+ expressionS exp;
+ symbolS *entry_sym;
+ fixS *fixp;
+ segment_info_type *seginfo = seg_info (alpha_link_section);
+ const char *entry_sym_name;
+ char *sym_name;
+ int len;
- /* emit "stq_u $t9, 0($at) */
+ if (now_seg != alpha_link_section)
+ {
+ as_bad (_(".pdesc directive not in link (.link) section"));
+ demand_empty_rest_of_line ();
+ return;
+ }
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("stq_u", newtok, 3, 1);
+ expression (&exp);
+ if (exp.X_op != O_symbol)
+ {
+ as_warn (_(".pdesc directive has no entry symbol"));
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+ entry_sym = make_expr_symbol (&exp);
+ entry_sym_name = symbol_get_bfdsym (entry_sym)->name;
+
+ len = strlen (entry_sym_name);
+ sym_name = (char *) xmalloc (len - 4 + 1);
+ strncpy (sym_name, entry_sym_name, len - 4);
+ sym_name [len - 4] = 0;
+
+ alpha_evax_proc = (struct alpha_evax_procs *)
+ hash_find (alpha_evax_proc_hash, sym_name);
+
+ if (!alpha_evax_proc || !S_IS_DEFINED (alpha_evax_proc->symbol))
+ {
+ as_fatal (_(".pdesc has no matching .ent"));
+ demand_empty_rest_of_line ();
+ return;
}
-}
-/* Store an integer to an unaligned address. */
+ *symbol_get_obj (alpha_evax_proc->symbol) =
+ (valueT) seginfo->literal_pool_size;
-static void
-emit_ustX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
-{
- int lgsize = (int)(long)vlgsize;
- expressionS newtok[3];
+ alpha_evax_proc->symbol->sy_obj = (valueT)seginfo->literal_pool_size;
+
+ /* Save bfd symbol of proc entry in function symbol. */
+ ((struct evax_private_udata_struct *)
+ symbol_get_bfdsym (alpha_evax_proc->symbol)->udata.p)->enbsym
+ = symbol_get_bfdsym (entry_sym);
+
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ',')
+ {
+ as_warn (_("No comma after .pdesc <entryname>"));
+ demand_empty_rest_of_line ();
+ return;
+ }
- /* emit "lda $at, exp" */
+ SKIP_WHITESPACE ();
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+ if (strncmp (name, "stack", 5) == 0)
+ alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_STACK;
- /* emit "ldq_u $9, 0($at)" */
+ else if (strncmp (name, "reg", 3) == 0)
+ alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_REGISTER;
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ else if (strncmp (name, "null", 4) == 0)
+ alpha_evax_proc->pdsckind = PDSC_S_K_KIND_NULL;
- /* emit "ldq_u $10, size-1($at)" */
+ else
+ {
+ as_fatal (_("unknown procedure kind"));
+ demand_empty_rest_of_line ();
+ return;
+ }
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_const (newtok[1], (1 << lgsize)-1);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ *input_line_pointer = name_end;
+ demand_empty_rest_of_line ();
- /* emit "insXl src, $at, $t11" */
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
+#endif
- newtok[0] = tok[0];
- set_tok_reg (newtok[1], AXP_REG_AT);
- set_tok_reg (newtok[2], AXP_REG_T11);
- assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
+ frag_align (3, 0, 0);
+ p = frag_more (16);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 16;
- /* emit "insXh src, $at, $t12" */
+ *p = alpha_evax_proc->pdsckind
+ | ((alpha_evax_proc->framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0)
+ | ((alpha_evax_proc->handler) ? PDSC_S_M_HANDLER_VALID : 0)
+ | ((alpha_evax_proc->handler_data) ? PDSC_S_M_HANDLER_DATA_VALID : 0);
+ *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
- set_tok_reg (newtok[2], AXP_REG_T12);
- assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
+ switch (alpha_evax_proc->pdsckind)
+ {
+ case PDSC_S_K_KIND_NULL:
+ *(p + 2) = 0;
+ *(p + 3) = 0;
+ break;
+ case PDSC_S_K_KIND_FP_REGISTER:
+ *(p + 2) = alpha_evax_proc->fp_save;
+ *(p + 3) = alpha_evax_proc->ra_save;
+ break;
+ case PDSC_S_K_KIND_FP_STACK:
+ md_number_to_chars (p + 2, (valueT) alpha_evax_proc->rsa_offset, 2);
+ break;
+ default: /* impossible */
+ break;
+ }
- /* emit "mskXl $t9, $at, $t9" */
+ *(p + 4) = 0;
+ *(p + 5) = alpha_evax_proc->type & 0x0f;
- set_tok_reg (newtok[0], AXP_REG_T9);
- newtok[2] = newtok[0];
- assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
+ /* Signature offset. */
+ md_number_to_chars (p + 6, (valueT) 0, 2);
- /* emit "mskXh $t10, $at, $t10" */
+ fix_new_exp (frag_now, p - frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
- set_tok_reg (newtok[0], AXP_REG_T10);
- newtok[2] = newtok[0];
- assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
+ if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_NULL)
+ return;
- /* emit "or $t9, $t11, $t9" */
+ /* Add dummy fix to make add_to_link_pool work. */
+ p = frag_more (6);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 6, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 6;
+
+ /* pdesc+16: Size. */
+ md_number_to_chars (p, (valueT) alpha_evax_proc->framesize, 4);
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_reg (newtok[1], AXP_REG_T11);
- newtok[2] = newtok[0];
- assemble_tokens ("or", newtok, 3, 1);
+ md_number_to_chars (p + 4, (valueT) 0, 2);
- /* emit "or $t10, $t12, $t10" */
+ /* Entry length. */
+ exp.X_op = O_subtract;
+ exp.X_add_symbol = alpha_prologue_label;
+ exp.X_op_symbol = entry_sym;
+ emit_expr (&exp, 2);
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_reg (newtok[1], AXP_REG_T12);
- newtok[2] = newtok[0];
- assemble_tokens ("or", newtok, 3, 1);
+ if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_FP_REGISTER)
+ return;
- /* emit "stq_u $t9, 0($at)" */
+ /* Add dummy fix to make add_to_link_pool work. */
+ p = frag_more (8);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 8;
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("stq_u", newtok, 3, 1);
+ /* pdesc+24: register masks. */
- /* emit "stq_u $t10, size-1($at)" */
+ md_number_to_chars (p, alpha_evax_proc->imask, 4);
+ md_number_to_chars (p + 4, alpha_evax_proc->fmask, 4);
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_const (newtok[1], (1 << lgsize)-1);
- assemble_tokens ("stq_u", newtok, 3, 1);
+ if (alpha_evax_proc->handler)
+ {
+ p = frag_more (8);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8,
+ alpha_evax_proc->handler, 0, 0, BFD_RELOC_64);
+ }
+
+ if (alpha_evax_proc->handler_data)
+ {
+ /* Add dummy fix to make add_to_link_pool work. */
+ p = frag_more (8);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 8;
+ md_number_to_chars (p, alpha_evax_proc->handler_data, 8);
+ }
}
-/* Sign extend a half-word or byte. The 32-bit sign extend is
- implemented as "addl $31, $r, $t" in the opcode table. */
+/* Support for crash debug on vms. */
static void
-emit_sextX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_name (int ignore ATTRIBUTE_UNUSED)
{
- long lgsize = (long)vlgsize;
+ char *p;
+ expressionS exp;
+ segment_info_type *seginfo = seg_info (alpha_link_section);
- if (alpha_target & AXP_OPCODE_BWX)
- assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
- else
+ if (now_seg != alpha_link_section)
{
- int bitshift = 64 - 8 * (1 << lgsize);
- expressionS newtok[3];
-
- /* emit "sll src,bits,dst" */
-
- newtok[0] = tok[0];
- set_tok_const (newtok[1], bitshift);
- newtok[2] = tok[ntok - 1];
- assemble_tokens ("sll", newtok, 3, 1);
-
- /* emit "sra dst,bits,dst" */
+ as_bad (_(".name directive not in link (.link) section"));
+ demand_empty_rest_of_line ();
+ return;
+ }
- newtok[0] = newtok[2];
- assemble_tokens ("sra", newtok, 3, 1);
+ expression (&exp);
+ if (exp.X_op != O_symbol)
+ {
+ as_warn (_(".name directive has no symbol"));
+ demand_empty_rest_of_line ();
+ return;
}
-}
-/* Implement the division and modulus macros. */
+ demand_empty_rest_of_line ();
-#ifdef OBJ_EVAX
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
+#endif
-/* Make register usage like in normal procedure call.
- Don't clobber PV and RA. */
+ frag_align (3, 0, 0);
+ p = frag_more (8);
+ seginfo->literal_pool_size += 8;
+
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
+}
static void
-emit_division (tok, ntok, symname)
- const expressionS *tok;
- int ntok;
- const PTR symname;
+s_alpha_linkage (int ignore ATTRIBUTE_UNUSED)
{
- /* DIVISION and MODULUS. Yech.
- *
- * Convert
- * OP x,y,result
- * to
- * mov x,R16 # if x != R16
- * mov y,R17 # if y != R17
- * lda AT,__OP
- * jsr AT,(AT),0
- * mov R0,result
- *
- * with appropriate optimizations if R0,R16,R17 are the registers
- * specified by the compiler.
- */
-
- int xr, yr, rr;
- symbolS *sym;
- expressionS newtok[3];
+ expressionS exp;
+ char *p;
+ fixS *fixp;
- xr = regno (tok[0].X_add_number);
- yr = regno (tok[1].X_add_number);
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
+#endif
- if (ntok < 3)
- rr = xr;
+ expression (&exp);
+ if (exp.X_op != O_symbol)
+ {
+ as_fatal (_("No symbol after .linkage"));
+ }
else
- rr = regno (tok[2].X_add_number);
-
- /* Move the operands into the right place */
- if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
{
- /* They are in exactly the wrong order -- swap through AT */
-
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
+ struct alpha_linkage_fixups *linkage_fixup;
+
+ p = frag_more (LKP_S_K_SIZE);
+ memset (p, 0, LKP_S_K_SIZE);
+ fixp = fix_new_exp
+ (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
+ BFD_RELOC_ALPHA_LINKAGE);
- set_tok_reg (newtok[0], AXP_REG_R16);
- set_tok_reg (newtok[1], AXP_REG_AT);
- assemble_tokens ("mov", newtok, 2, 1);
+ linkage_fixup = (struct alpha_linkage_fixups *)
+ xmalloc (sizeof (struct alpha_linkage_fixups));
- set_tok_reg (newtok[0], AXP_REG_R17);
- set_tok_reg (newtok[1], AXP_REG_R16);
- assemble_tokens ("mov", newtok, 2, 1);
+ linkage_fixup->fixp = fixp;
+ linkage_fixup->next = 0;
- set_tok_reg (newtok[0], AXP_REG_AT);
- set_tok_reg (newtok[1], AXP_REG_R17);
- assemble_tokens ("mov", newtok, 2, 1);
- }
- else
- {
- if (yr == AXP_REG_R16)
- {
- set_tok_reg (newtok[0], AXP_REG_R16);
- set_tok_reg (newtok[1], AXP_REG_R17);
- assemble_tokens ("mov", newtok, 2, 1);
- }
+ if (alpha_insn_label == 0)
+ alpha_insn_label = symbol_new
+ (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
+ linkage_fixup->label = alpha_insn_label;
- if (xr != AXP_REG_R16)
+ if (alpha_linkage_fixup_root == 0)
{
- set_tok_reg (newtok[0], xr);
- set_tok_reg (newtok[1], AXP_REG_R16);
- assemble_tokens ("mov", newtok, 2, 1);
+ alpha_linkage_fixup_root = alpha_linkage_fixup_tail = linkage_fixup;
+ alpha_linkage_fixup_tail->next = 0;
}
-
- if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
+ else
{
- set_tok_reg (newtok[0], yr);
- set_tok_reg (newtok[1], AXP_REG_R17);
- assemble_tokens ("mov", newtok, 2, 1);
+ alpha_linkage_fixup_tail->next = linkage_fixup;
+ alpha_linkage_fixup_tail = linkage_fixup;
+ alpha_linkage_fixup_tail->next = 0;
}
}
+ demand_empty_rest_of_line ();
+}
- sym = symbol_find_or_make ((const char *)symname);
-
- set_tok_reg (newtok[0], AXP_REG_AT);
- set_tok_sym (newtok[1], sym, 0);
- assemble_tokens ("lda", newtok, 2, 1);
+static void
+s_alpha_code_address (int ignore ATTRIBUTE_UNUSED)
+{
+ expressionS exp;
+ char *p;
- /* Call the division routine */
- set_tok_reg (newtok[0], AXP_REG_AT);
- set_tok_cpreg (newtok[1], AXP_REG_AT);
- set_tok_const (newtok[2], 0);
- assemble_tokens ("jsr", newtok, 3, 1);
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
+#endif
- /* Move the result to the right place */
- if (rr != AXP_REG_R0)
+ expression (&exp);
+ if (exp.X_op != O_symbol)
+ as_fatal (_("No symbol after .code_address"));
+ else
{
- set_tok_reg (newtok[0], AXP_REG_R0);
- set_tok_reg (newtok[1], rr);
- assemble_tokens ("mov", newtok, 2, 1);
+ p = frag_more (8);
+ memset (p, 0, 8);
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
+ BFD_RELOC_ALPHA_CODEADDR);
}
+ demand_empty_rest_of_line ();
}
-#else /* !OBJ_EVAX */
-
static void
-emit_division (tok, ntok, symname)
- const expressionS *tok;
- int ntok;
- const PTR symname;
+s_alpha_fp_save (int ignore ATTRIBUTE_UNUSED)
{
- /* DIVISION and MODULUS. Yech.
- * Convert
- * OP x,y,result
- * to
- * lda pv,__OP
- * mov x,t10
- * mov y,t11
- * jsr t9,(pv),__OP
- * mov t12,result
- *
- * with appropriate optimizations if t10,t11,t12 are the registers
- * specified by the compiler.
- */
-
- int xr, yr, rr;
- symbolS *sym;
- expressionS newtok[3];
- xr = regno (tok[0].X_add_number);
- yr = regno (tok[1].X_add_number);
+ alpha_evax_proc->fp_save = tc_get_register (1);
- if (ntok < 3)
- rr = xr;
- else
- rr = regno (tok[2].X_add_number);
+ demand_empty_rest_of_line ();
+}
- sym = symbol_find_or_make ((const char *)symname);
+static void
+s_alpha_mask (int ignore ATTRIBUTE_UNUSED)
+{
+ long val;
- /* Move the operands into the right place */
- if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
+ if (get_absolute_expression_and_terminator (&val) != ',')
{
- /* They are in exactly the wrong order -- swap through AT */
-
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
-
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_reg (newtok[1], AXP_REG_AT);
- assemble_tokens ("mov", newtok, 2, 1);
-
- set_tok_reg (newtok[0], AXP_REG_T11);
- set_tok_reg (newtok[1], AXP_REG_T10);
- assemble_tokens ("mov", newtok, 2, 1);
-
- set_tok_reg (newtok[0], AXP_REG_AT);
- set_tok_reg (newtok[1], AXP_REG_T11);
- assemble_tokens ("mov", newtok, 2, 1);
+ as_warn (_("Bad .mask directive"));
+ --input_line_pointer;
}
else
{
- if (yr == AXP_REG_T10)
- {
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_reg (newtok[1], AXP_REG_T11);
- assemble_tokens ("mov", newtok, 2, 1);
- }
-
- if (xr != AXP_REG_T10)
- {
- set_tok_reg (newtok[0], xr);
- set_tok_reg (newtok[1], AXP_REG_T10);
- assemble_tokens ("mov", newtok, 2, 1);
- }
-
- if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
- {
- set_tok_reg (newtok[0], yr);
- set_tok_reg (newtok[1], AXP_REG_T11);
- assemble_tokens ("mov", newtok, 2, 1);
- }
+ alpha_evax_proc->imask = val;
+ (void) get_absolute_expression ();
}
+ demand_empty_rest_of_line ();
+}
- /* Call the division routine */
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_sym (newtok[1], sym, 0);
- assemble_tokens ("jsr", newtok, 2, 1);
-
- /* Reload the GP register */
-#ifdef OBJ_AOUT
-FIXME
-#endif
-#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
- set_tok_reg (newtok[0], alpha_gp_register);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_T9);
- assemble_tokens ("ldgp", newtok, 3, 1);
-#endif
+static void
+s_alpha_fmask (int ignore ATTRIBUTE_UNUSED)
+{
+ long val;
- /* Move the result to the right place */
- if (rr != AXP_REG_T12)
+ if (get_absolute_expression_and_terminator (&val) != ',')
{
- set_tok_reg (newtok[0], AXP_REG_T12);
- set_tok_reg (newtok[1], rr);
- assemble_tokens ("mov", newtok, 2, 1);
+ as_warn (_("Bad .fmask directive"));
+ --input_line_pointer;
+ }
+ else
+ {
+ alpha_evax_proc->fmask = val;
+ (void) get_absolute_expression ();
}
+ demand_empty_rest_of_line ();
}
-#endif /* !OBJ_EVAX */
+static void
+s_alpha_end (int ignore ATTRIBUTE_UNUSED)
+{
+ char c;
-/* The jsr and jmp macros differ from their instruction counterparts
- in that they can load the target address and default most
- everything. */
+ c = get_symbol_end ();
+ *input_line_pointer = c;
+ demand_empty_rest_of_line ();
+ alpha_evax_proc = 0;
+}
static void
-emit_jsrjmp (tok, ntok, vopname)
- const expressionS *tok;
- int ntok;
- const PTR vopname;
+s_alpha_file (int ignore ATTRIBUTE_UNUSED)
{
- const char *opname = (const char *) vopname;
- struct alpha_insn insn;
- expressionS newtok[3];
- int r, tokidx = 0, lituse = 0;
+ symbolS *s;
+ int length;
+ static char case_hack[32];
- if (tokidx < ntok && tok[tokidx].X_op == O_register)
- r = regno (tok[tokidx++].X_add_number);
- else
- r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
+ sprintf (case_hack, "<CASE:%01d%01d>",
+ alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
- set_tok_reg (newtok[0], r);
+ s = symbol_find_or_make (case_hack);
+ symbol_get_bfdsym (s)->flags |= BSF_FILE;
- if (tokidx < ntok &&
- (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
- r = regno (tok[tokidx++].X_add_number);
-#ifdef OBJ_EVAX
- /* keep register if jsr $n.<sym> */
+ get_absolute_expression ();
+ s = symbol_find_or_make (demand_copy_string (&length));
+ symbol_get_bfdsym (s)->flags |= BSF_FILE;
+ demand_empty_rest_of_line ();
+}
+#endif /* OBJ_EVAX */
+
+/* Handle the .gprel32 pseudo op. */
+
+static void
+s_alpha_gprel32 (int ignore ATTRIBUTE_UNUSED)
+{
+ expressionS e;
+ char *p;
+
+ SKIP_WHITESPACE ();
+ expression (&e);
+
+#ifdef OBJ_ELF
+ switch (e.X_op)
+ {
+ case O_constant:
+ e.X_add_symbol = section_symbol (absolute_section);
+ e.X_op = O_symbol;
+ /* FALLTHRU */
+ case O_symbol:
+ break;
+ default:
+ abort ();
+ }
#else
- else
+#ifdef OBJ_ECOFF
+ switch (e.X_op)
{
- int basereg = alpha_gp_register;
- lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL);
+ case O_constant:
+ e.X_add_symbol = section_symbol (absolute_section);
+ /* fall through */
+ case O_symbol:
+ e.X_op = O_subtract;
+ e.X_op_symbol = alpha_gp_symbol;
+ break;
+ default:
+ abort ();
}
#endif
-
- set_tok_cpreg (newtok[1], r);
-
-#ifdef OBJ_EVAX
- /* FIXME: Add hint relocs to BFD for evax. */
-#else
- if (tokidx < ntok)
- newtok[2] = tok[tokidx];
- else
#endif
- set_tok_const (newtok[2], 0);
- assemble_tokens_to_insn (opname, newtok, 3, &insn);
-
- /* add the LITUSE fixup */
- if (lituse)
- {
- assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
- }
- insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_constant;
- insn.fixups[0].exp.X_add_number = 3;
- }
+ if (alpha_auto_align_on && alpha_current_align < 2)
+ alpha_align (2, (char *) NULL, alpha_insn_label, 0);
+ if (alpha_current_align > 2)
+ alpha_current_align = 2;
+ alpha_insn_label = NULL;
- emit_insn (&insn);
+ p = frag_more (4);
+ memset (p, 0, 4);
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
+ &e, 0, BFD_RELOC_GPREL32);
}
-/* The ret and jcr instructions differ from their instruction
- counterparts in that everything can be defaulted. */
+/* Handle floating point allocation pseudo-ops. This is like the
+ generic vresion, but it makes sure the current label, if any, is
+ correctly aligned. */
static void
-emit_retjcr (tok, ntok, vopname)
- const expressionS *tok;
- int ntok;
- const PTR vopname;
+s_alpha_float_cons (int type)
{
- const char *opname = (const char *)vopname;
- expressionS newtok[3];
- int r, tokidx = 0;
-
- if (tokidx < ntok && tok[tokidx].X_op == O_register)
- r = regno (tok[tokidx++].X_add_number);
- else
- r = AXP_REG_ZERO;
-
- set_tok_reg (newtok[0], r);
-
- if (tokidx < ntok &&
- (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
- r = regno (tok[tokidx++].X_add_number);
- else
- r = AXP_REG_RA;
-
- set_tok_cpreg (newtok[1], r);
-
- if (tokidx < ntok)
- newtok[2] = tok[tokidx];
- else
- set_tok_const (newtok[2], strcmp(opname, "ret") == 0);
+ int log_size;
- assemble_tokens (opname, newtok, 3, 0);
-}
-\f
-/* Assembler directives */
+ switch (type)
+ {
+ default:
+ case 'f':
+ case 'F':
+ log_size = 2;
+ break;
-/* Handle the .text pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
+ case 'd':
+ case 'D':
+ case 'G':
+ log_size = 3;
+ break;
-static void
-s_alpha_text (i)
- int i;
+ case 'x':
+ case 'X':
+ case 'p':
+ case 'P':
+ log_size = 4;
+ break;
+ }
-{
- s_text (i);
+ if (alpha_auto_align_on && alpha_current_align < log_size)
+ alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
+ if (alpha_current_align > log_size)
+ alpha_current_align = log_size;
alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
-}
-
-/* Handle the .data pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
-static void
-s_alpha_data (i)
- int i;
-{
- s_data (i);
- alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
+ float_cons (type);
}
-#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
-
-/* Handle the OSF/1 and openVMS .comm pseudo quirks.
- openVMS constructs a section for every common symbol. */
+/* Handle the .proc pseudo op. We don't really do much with it except
+ parse it. */
static void
-s_alpha_comm (ignore)
- int ignore;
+s_alpha_proc (int is_static ATTRIBUTE_UNUSED)
{
- register char *name;
- register char c;
- register char *p;
- offsetT temp;
- register symbolS *symbolP;
-
-#ifdef OBJ_EVAX
- segT current_section = now_seg;
- int current_subsec = now_subseg;
- segT new_seg;
-#endif
+ char *name;
+ char c;
+ char *p;
+ symbolS *symbolP;
+ int temp;
+ /* Takes ".proc name,nargs". */
+ SKIP_WHITESPACE ();
name = input_line_pointer;
c = get_symbol_end ();
-
- /* just after name is now '\0' */
p = input_line_pointer;
+ symbolP = symbol_find_or_make (name);
*p = c;
-
SKIP_WHITESPACE ();
-
- /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
- if (*input_line_pointer == ',')
+ if (*input_line_pointer != ',')
{
- input_line_pointer++;
- SKIP_WHITESPACE ();
+ *p = 0;
+ as_warn (_("Expected comma after name \"%s\""), name);
+ *p = c;
+ temp = 0;
+ ignore_rest_of_line ();
}
- if ((temp = get_absolute_expression ()) < 0)
+ else
{
- as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
- ignore_rest_of_line ();
- return;
+ input_line_pointer++;
+ temp = get_absolute_expression ();
}
+ /* *symbol_get_obj (symbolP) = (signed char) temp; */
+ as_warn (_("unhandled: .proc %s,%d"), name, temp);
+ demand_empty_rest_of_line ();
+}
- *p = 0;
- symbolP = symbol_find_or_make (name);
- *p = c;
+/* Handle the .set pseudo op. This is used to turn on and off most of
+ the assembler features. */
-#ifdef OBJ_EVAX
- /* Make a section for the common symbol. */
- new_seg = subseg_new (xstrdup (name), 0);
-#endif
+static void
+s_alpha_set (int x ATTRIBUTE_UNUSED)
+{
+ char *name, ch, *s;
+ int yesno = 1;
- if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
- {
- as_bad (_("Ignoring attempt to re-define symbol"));
- ignore_rest_of_line ();
- return;
- }
+ SKIP_WHITESPACE ();
+ name = input_line_pointer;
+ ch = get_symbol_end ();
-#ifdef OBJ_EVAX
- if (bfd_section_size (stdoutput, new_seg) > 0)
- {
- if (bfd_section_size (stdoutput, new_seg) != temp)
- as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
- S_GET_NAME (symbolP),
- (long) bfd_section_size (stdoutput, new_seg),
- (long) temp);
- }
-#else
- if (S_GET_VALUE (symbolP))
+ s = name;
+ if (s[0] == 'n' && s[1] == 'o')
{
- if (S_GET_VALUE (symbolP) != (valueT) temp)
- as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
- S_GET_NAME (symbolP),
- (long) S_GET_VALUE (symbolP),
- (long) temp);
+ yesno = 0;
+ s += 2;
}
-#endif
+ if (!strcmp ("reorder", s))
+ /* ignore */ ;
+ else if (!strcmp ("at", s))
+ alpha_noat_on = !yesno;
+ else if (!strcmp ("macro", s))
+ alpha_macros_on = yesno;
+ else if (!strcmp ("move", s))
+ /* ignore */ ;
+ else if (!strcmp ("volatile", s))
+ /* ignore */ ;
else
+ as_warn (_("Tried to .set unrecognized mode `%s'"), name);
+
+ *input_line_pointer = ch;
+ demand_empty_rest_of_line ();
+}
+
+/* Handle the .base pseudo op. This changes the assembler's notion of
+ the $gp register. */
+
+static void
+s_alpha_base (int ignore ATTRIBUTE_UNUSED)
+{
+ SKIP_WHITESPACE ();
+
+ if (*input_line_pointer == '$')
{
-#ifdef OBJ_EVAX
- subseg_set (new_seg, 0);
- p = frag_more (temp);
- new_seg->flags |= SEC_IS_COMMON;
- if (! S_IS_DEFINED (symbolP))
- symbolP->bsym->section = new_seg;
-#else
- S_SET_VALUE (symbolP, (valueT) temp);
-#endif
- S_SET_EXTERNAL (symbolP);
+ /* $rNN form. */
+ input_line_pointer++;
+ if (*input_line_pointer == 'r')
+ input_line_pointer++;
}
-#ifdef OBJ_EVAX
- subseg_set (current_section, current_subsec);
-#endif
-
- know (symbolP->sy_frag == &zero_address_frag);
+ alpha_gp_register = get_absolute_expression ();
+ if (alpha_gp_register < 0 || alpha_gp_register > 31)
+ {
+ alpha_gp_register = AXP_REG_GP;
+ as_warn (_("Bad base register, using $%d."), alpha_gp_register);
+ }
demand_empty_rest_of_line ();
}
-#endif /* ! OBJ_ELF */
-
-#ifdef OBJ_ECOFF
-
-/* Handle the .rdata pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
+/* Handle the .align pseudo-op. This aligns to a power of two. It
+ also adjusts any current instruction label. We treat this the same
+ way the MIPS port does: .align 0 turns off auto alignment. */
static void
-s_alpha_rdata (ignore)
- int ignore;
+s_alpha_align (int ignore ATTRIBUTE_UNUSED)
{
- int temp;
+ int align;
+ char fill, *pfill;
+ long max_alignment = 16;
+
+ align = get_absolute_expression ();
+ if (align > max_alignment)
+ {
+ align = max_alignment;
+ as_bad (_("Alignment too large: %d. assumed"), align);
+ }
+ else if (align < 0)
+ {
+ as_warn (_("Alignment negative: 0 assumed"));
+ align = 0;
+ }
+
+ if (*input_line_pointer == ',')
+ {
+ input_line_pointer++;
+ fill = get_absolute_expression ();
+ pfill = &fill;
+ }
+ else
+ pfill = NULL;
+
+ if (align != 0)
+ {
+ alpha_auto_align_on = 1;
+ alpha_align (align, pfill, alpha_insn_label, 1);
+ }
+ else
+ {
+ alpha_auto_align_on = 0;
+ }
- temp = get_absolute_expression ();
- subseg_new (".rdata", 0);
demand_empty_rest_of_line ();
- alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
}
-#endif
-
-#ifdef OBJ_ECOFF
-
-/* Handle the .sdata pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
+/* Hook the normal string processor to reset known alignment. */
static void
-s_alpha_sdata (ignore)
- int ignore;
+s_alpha_stringer (int terminate)
{
- int temp;
-
- temp = get_absolute_expression ();
- subseg_new (".sdata", 0);
- demand_empty_rest_of_line ();
- alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
alpha_current_align = 0;
+ alpha_insn_label = NULL;
+ stringer (8 + terminate);
}
-#endif
-#ifdef OBJ_ELF
-
-/* Handle the .section pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
+/* Hook the normal space processing to reset known alignment. */
static void
-s_alpha_section (ignore)
- int ignore;
+s_alpha_space (int ignore)
{
- obj_elf_section (ignore);
-
- alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
alpha_current_align = 0;
+ alpha_insn_label = NULL;
+ s_space (ignore);
}
-#endif
+/* Hook into cons for auto-alignment. */
-#ifdef OBJ_EVAX
-
-/* Handle the section specific pseudo-op. */
-
-static void
-s_alpha_section (secid)
- int secid;
+void
+alpha_cons_align (int size)
{
- int temp;
-#define EVAX_SECTION_COUNT 5
- static char *section_name[EVAX_SECTION_COUNT+1] =
- { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
+ int log_size;
- if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
- {
- as_fatal (_("Unknown section directive"));
- demand_empty_rest_of_line ();
- return;
- }
- temp = get_absolute_expression ();
- subseg_new (section_name[secid], 0);
- demand_empty_rest_of_line ();
+ log_size = 0;
+ while ((size >>= 1) != 0)
+ ++log_size;
+
+ if (alpha_auto_align_on && alpha_current_align < log_size)
+ alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
+ if (alpha_current_align > log_size)
+ alpha_current_align = log_size;
alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
}
-
-/* .prologue */
+/* Here come the .uword, .ulong, and .uquad explicitly unaligned
+ pseudos. We just turn off auto-alignment and call down to cons. */
static void
-s_alpha_prologue (ignore)
- int ignore;
+s_alpha_ucons (int bytes)
{
- demand_empty_rest_of_line ();
-
- return;
+ int hold = alpha_auto_align_on;
+ alpha_auto_align_on = 0;
+ cons (bytes);
+ alpha_auto_align_on = hold;
}
-
-/* Parse .ent directives. */
+/* Switch the working cpu type. */
static void
-s_alpha_ent (ignore)
- int ignore;
+s_alpha_arch (int ignored ATTRIBUTE_UNUSED)
{
- symbolS *symbol;
- expressionS symexpr;
+ char *name, ch;
+ const struct cpu_type *p;
+
+ SKIP_WHITESPACE ();
+ name = input_line_pointer;
+ ch = get_symbol_end ();
- alpha_evax_proc.pdsckind = 0;
- alpha_evax_proc.framereg = -1;
- alpha_evax_proc.framesize = 0;
- alpha_evax_proc.rsa_offset = 0;
- alpha_evax_proc.ra_save = AXP_REG_RA;
- alpha_evax_proc.fp_save = -1;
- alpha_evax_proc.imask = 0;
- alpha_evax_proc.fmask = 0;
- alpha_evax_proc.prologue = 0;
- alpha_evax_proc.type = 0;
+ for (p = cpu_types; p->name; ++p)
+ if (strcmp (name, p->name) == 0)
+ {
+ alpha_target_name = p->name, alpha_target = p->flags;
+ goto found;
+ }
+ as_warn ("Unknown CPU identifier `%s'", name);
- expression (&symexpr);
+found:
+ *input_line_pointer = ch;
+ demand_empty_rest_of_line ();
+}
+\f
+#ifdef DEBUG1
+/* print token expression with alpha specific extension. */
- if (symexpr.X_op != O_symbol)
+static void
+alpha_print_token (FILE *f, const expressionS *exp)
+{
+ switch (exp->X_op)
{
- as_fatal (_(".ent directive has no symbol"));
- demand_empty_rest_of_line ();
- return;
+ case O_cpregister:
+ putc (',', f);
+ /* FALLTHRU */
+ case O_pregister:
+ putc ('(', f);
+ {
+ expressionS nexp = *exp;
+ nexp.X_op = O_register;
+ print_expr_1 (f, &nexp);
+ }
+ putc (')', f);
+ break;
+ default:
+ print_expr_1 (f, exp);
+ break;
}
+}
+#endif
+\f
+/* The target specific pseudo-ops which we support. */
- symbol = make_expr_symbol (&symexpr);
- symbol->bsym->flags |= BSF_FUNCTION;
- alpha_evax_proc.symbol = symbol;
+const pseudo_typeS md_pseudo_table[] =
+{
+#ifdef OBJ_ECOFF
+ {"comm", s_alpha_comm, 0}, /* OSF1 compiler does this. */
+ {"rdata", s_alpha_rdata, 0},
+#endif
+ {"text", s_alpha_text, 0},
+ {"data", s_alpha_data, 0},
+#ifdef OBJ_ECOFF
+ {"sdata", s_alpha_sdata, 0},
+#endif
+#ifdef OBJ_ELF
+ {"section", s_alpha_section, 0},
+ {"section.s", s_alpha_section, 0},
+ {"sect", s_alpha_section, 0},
+ {"sect.s", s_alpha_section, 0},
+#endif
+#ifdef OBJ_EVAX
+ {"section", s_alpha_section, 0},
+ {"literals", s_alpha_literals, 0},
+ {"pdesc", s_alpha_pdesc, 0},
+ {"name", s_alpha_name, 0},
+ {"linkage", s_alpha_linkage, 0},
+ {"code_address", s_alpha_code_address, 0},
+ {"ent", s_alpha_ent, 0},
+ {"frame", s_alpha_frame, 0},
+ {"fp_save", s_alpha_fp_save, 0},
+ {"mask", s_alpha_mask, 0},
+ {"fmask", s_alpha_fmask, 0},
+ {"end", s_alpha_end, 0},
+ {"file", s_alpha_file, 0},
+ {"rdata", s_alpha_section, 1},
+ {"comm", s_alpha_comm, 0},
+ {"link", s_alpha_section, 3},
+ {"ctors", s_alpha_section, 4},
+ {"dtors", s_alpha_section, 5},
+ {"handler", s_alpha_handler, 0},
+ {"handler_data", s_alpha_handler, 1},
+#endif
+#ifdef OBJ_ELF
+ /* Frame related pseudos. */
+ {"ent", s_alpha_ent, 0},
+ {"end", s_alpha_end, 0},
+ {"mask", s_alpha_mask, 0},
+ {"fmask", s_alpha_mask, 1},
+ {"frame", s_alpha_frame, 0},
+ {"prologue", s_alpha_prologue, 0},
+ {"file", s_alpha_file, 5},
+ {"loc", s_alpha_loc, 9},
+ {"stabs", s_alpha_stab, 's'},
+ {"stabn", s_alpha_stab, 'n'},
+ {"usepv", s_alpha_usepv, 0},
+ /* COFF debugging related pseudos. */
+ {"begin", s_alpha_coff_wrapper, 0},
+ {"bend", s_alpha_coff_wrapper, 1},
+ {"def", s_alpha_coff_wrapper, 2},
+ {"dim", s_alpha_coff_wrapper, 3},
+ {"endef", s_alpha_coff_wrapper, 4},
+ {"scl", s_alpha_coff_wrapper, 5},
+ {"tag", s_alpha_coff_wrapper, 6},
+ {"val", s_alpha_coff_wrapper, 7},
+#else
+#ifdef OBJ_EVAX
+ {"prologue", s_alpha_prologue, 0},
+#else
+ {"prologue", s_ignore, 0},
+#endif
+#endif
+ {"gprel32", s_alpha_gprel32, 0},
+ {"t_floating", s_alpha_float_cons, 'd'},
+ {"s_floating", s_alpha_float_cons, 'f'},
+ {"f_floating", s_alpha_float_cons, 'F'},
+ {"g_floating", s_alpha_float_cons, 'G'},
+ {"d_floating", s_alpha_float_cons, 'D'},
- demand_empty_rest_of_line ();
- return;
-}
+ {"proc", s_alpha_proc, 0},
+ {"aproc", s_alpha_proc, 1},
+ {"set", s_alpha_set, 0},
+ {"reguse", s_ignore, 0},
+ {"livereg", s_ignore, 0},
+ {"base", s_alpha_base, 0}, /*??*/
+ {"option", s_ignore, 0},
+ {"aent", s_ignore, 0},
+ {"ugen", s_ignore, 0},
+ {"eflag", s_ignore, 0},
+ {"align", s_alpha_align, 0},
+ {"double", s_alpha_float_cons, 'd'},
+ {"float", s_alpha_float_cons, 'f'},
+ {"single", s_alpha_float_cons, 'f'},
+ {"ascii", s_alpha_stringer, 0},
+ {"asciz", s_alpha_stringer, 1},
+ {"string", s_alpha_stringer, 1},
+ {"space", s_alpha_space, 0},
+ {"skip", s_alpha_space, 0},
+ {"zero", s_alpha_space, 0},
-/* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
+/* Unaligned data pseudos. */
+ {"uword", s_alpha_ucons, 2},
+ {"ulong", s_alpha_ucons, 4},
+ {"uquad", s_alpha_ucons, 8},
-static void
-s_alpha_frame (ignore)
- int ignore;
-{
- long val;
+#ifdef OBJ_ELF
+/* Dwarf wants these versions of unaligned. */
+ {"2byte", s_alpha_ucons, 2},
+ {"4byte", s_alpha_ucons, 4},
+ {"8byte", s_alpha_ucons, 8},
+#endif
- alpha_evax_proc.framereg = tc_get_register (1);
+/* We don't do any optimizing, so we can safely ignore these. */
+ {"noalias", s_ignore, 0},
+ {"alias", s_ignore, 0},
- SKIP_WHITESPACE ();
- if (*input_line_pointer++ != ','
- || get_absolute_expression_and_terminator (&val) != ',')
- {
- as_warn (_("Bad .frame directive 1./2. param"));
- --input_line_pointer;
- demand_empty_rest_of_line ();
- return;
- }
+ {"arch", s_alpha_arch, 0},
- alpha_evax_proc.framesize = val;
+ {NULL, 0, 0},
+};
+\f
+#ifdef OBJ_ECOFF
- (void) tc_get_register (1);
- SKIP_WHITESPACE ();
- if (*input_line_pointer++ != ',')
- {
- as_warn (_("Bad .frame directive 3./4. param"));
- --input_line_pointer;
- demand_empty_rest_of_line ();
- return;
- }
- alpha_evax_proc.rsa_offset = get_absolute_expression ();
+/* @@@ GP selection voodoo. All of this seems overly complicated and
+ unnecessary; which is the primary reason it's for ECOFF only. */
- return;
+static inline void
+maybe_set_gp (asection *sec)
+{
+ bfd_vma vma;
+
+ if (!sec)
+ return;
+ vma = bfd_get_section_vma (foo, sec);
+ if (vma && vma < alpha_gp_value)
+ alpha_gp_value = vma;
}
static void
-s_alpha_pdesc (ignore)
- int ignore;
+select_gp_value (void)
{
- char *name;
- char name_end;
- long val;
- register char *p;
- expressionS exp;
- symbolS *entry_sym;
- fixS *fixp;
- segment_info_type *seginfo = seg_info (alpha_link_section);
+ gas_assert (alpha_gp_value == 0);
- if (now_seg != alpha_link_section)
- {
- as_bad (_(".pdesc directive not in link (.link) section"));
- demand_empty_rest_of_line ();
- return;
- }
+ /* Get minus-one in whatever width... */
+ alpha_gp_value = 0;
+ alpha_gp_value--;
- if ((alpha_evax_proc.symbol == 0)
- || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
- {
- as_fatal (_(".pdesc has no matching .ent"));
- demand_empty_rest_of_line ();
- return;
- }
+ /* Select the smallest VMA of these existing sections. */
+ maybe_set_gp (alpha_lita_section);
+
+/* @@ Will a simple 0x8000 work here? If not, why not? */
+#define GP_ADJUSTMENT (0x8000 - 0x10)
- alpha_evax_proc.symbol->sy_obj = (valueT)seginfo->literal_pool_size;
+ alpha_gp_value += GP_ADJUSTMENT;
- expression (&exp);
- if (exp.X_op != O_symbol)
- {
- as_warn (_(".pdesc directive has no entry symbol"));
- demand_empty_rest_of_line ();
- return;
- }
+ S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
+
+#ifdef DEBUG1
+ printf (_("Chose GP value of %lx\n"), alpha_gp_value);
+#endif
+}
+#endif /* OBJ_ECOFF */
- entry_sym = make_expr_symbol (&exp);
- /* Save bfd symbol of proc desc in function symbol. */
- alpha_evax_proc.symbol->bsym->udata.p = (PTR)entry_sym->bsym;
+#ifdef OBJ_ELF
+/* Map 's' to SHF_ALPHA_GPREL. */
- SKIP_WHITESPACE ();
- if (*input_line_pointer++ != ',')
- {
- as_warn (_("No comma after .pdesc <entryname>"));
- demand_empty_rest_of_line ();
- return;
- }
+bfd_vma
+alpha_elf_section_letter (int letter, char **ptr_msg)
+{
+ if (letter == 's')
+ return SHF_ALPHA_GPREL;
- SKIP_WHITESPACE ();
- name = input_line_pointer;
- name_end = get_symbol_end ();
+ *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
+ return -1;
+}
- if (strncmp(name, "stack", 5) == 0)
- {
- alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
- }
- else if (strncmp(name, "reg", 3) == 0)
- {
- alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
- }
- else if (strncmp(name, "null", 4) == 0)
- {
- alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
- }
- else
- {
- as_fatal (_("unknown procedure kind"));
- demand_empty_rest_of_line ();
- return;
- }
+/* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
- *input_line_pointer = name_end;
- demand_empty_rest_of_line ();
+flagword
+alpha_elf_section_flags (flagword flags, bfd_vma attr, int type ATTRIBUTE_UNUSED)
+{
+ if (attr & SHF_ALPHA_GPREL)
+ flags |= SEC_SMALL_DATA;
+ return flags;
+}
+#endif /* OBJ_ELF */
-#ifdef md_flush_pending_output
- md_flush_pending_output ();
-#endif
+/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
+ of an rs_align_code fragment. */
- frag_align (3, 0, 0);
- p = frag_more (16);
- fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
- fixp->fx_done = 1;
- seginfo->literal_pool_size += 16;
+void
+alpha_handle_align (fragS *fragp)
+{
+ static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f };
+ static char const nopunop[8] =
+ {
+ 0x1f, 0x04, 0xff, 0x47,
+ 0x00, 0x00, 0xfe, 0x2f
+ };
+
+ int bytes, fix;
+ char *p;
- *p = alpha_evax_proc.pdsckind
- | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
- *(p+1) = PDSC_S_M_NATIVE
- | PDSC_S_M_NO_JACKET;
+ if (fragp->fr_type != rs_align_code)
+ return;
+
+ bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
+ p = fragp->fr_literal + fragp->fr_fix;
+ fix = 0;
- switch (alpha_evax_proc.pdsckind)
+ if (bytes & 3)
{
- case PDSC_S_K_KIND_NULL:
- *(p+2) = 0;
- *(p+3) = 0;
- break;
- case PDSC_S_K_KIND_FP_REGISTER:
- *(p+2) = alpha_evax_proc.fp_save;
- *(p+3) = alpha_evax_proc.ra_save;
- break;
- case PDSC_S_K_KIND_FP_STACK:
- md_number_to_chars (p+2, (valueT)alpha_evax_proc.rsa_offset, 2);
- break;
- default: /* impossible */
- break;
+ fix = bytes & 3;
+ memset (p, 0, fix);
+ p += fix;
+ bytes -= fix;
}
- *(p+4) = 0;
- *(p+5) = alpha_evax_proc.type & 0x0f;
+ if (bytes & 4)
+ {
+ memcpy (p, unop, 4);
+ p += 4;
+ bytes -= 4;
+ fix += 4;
+ }
- /* Signature offset. */
- md_number_to_chars (p+6, (valueT)0, 2);
+ memcpy (p, nopunop, 8);
- fix_new_exp (frag_now, p-frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
+ fragp->fr_fix += fix;
+ fragp->fr_var = 8;
+}
+\f
+/* Public interface functions. */
- if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
- return;
+/* This function is called once, at assembler startup time. It sets
+ up all the tables, etc. that the MD part of the assembler will
+ need, that can be determined before arguments are parsed. */
- /* Add dummy fix to make add_to_link_pool work. */
- p = frag_more (8);
- fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
- fixp->fx_done = 1;
- seginfo->literal_pool_size += 8;
+void
+md_begin (void)
+{
+ unsigned int i;
- /* pdesc+16: Size. */
- md_number_to_chars (p, (valueT)alpha_evax_proc.framesize, 4);
+ /* Verify that X_op field is wide enough. */
+ {
+ expressionS e;
- md_number_to_chars (p+4, (valueT)0, 2);
+ e.X_op = O_max;
+ gas_assert (e.X_op == O_max);
+ }
- /* Entry length. */
- md_number_to_chars (p+6, alpha_evax_proc.prologue, 2);
+ /* Create the opcode hash table. */
+ alpha_opcode_hash = hash_new ();
- if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
- return;
+ for (i = 0; i < alpha_num_opcodes;)
+ {
+ const char *name, *retval, *slash;
- /* Add dummy fix to make add_to_link_pool work. */
- p = frag_more (8);
- fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
- fixp->fx_done = 1;
- seginfo->literal_pool_size += 8;
+ name = alpha_opcodes[i].name;
+ retval = hash_insert (alpha_opcode_hash, name, (void *) &alpha_opcodes[i]);
+ if (retval)
+ as_fatal (_("internal error: can't hash opcode `%s': %s"),
+ name, retval);
- /* pdesc+24: register masks. */
+ /* Some opcodes include modifiers of various sorts with a "/mod"
+ syntax, like the architecture manual suggests. However, for
+ use with gcc at least, we also need access to those same opcodes
+ without the "/". */
- md_number_to_chars (p, alpha_evax_proc.imask, 4);
- md_number_to_chars (p+4, alpha_evax_proc.fmask, 4);
+ if ((slash = strchr (name, '/')) != NULL)
+ {
+ char *p = xmalloc (strlen (name));
- return;
-}
+ memcpy (p, name, slash - name);
+ strcpy (p + (slash - name), slash + 1);
+ (void) hash_insert (alpha_opcode_hash, p, (void *) &alpha_opcodes[i]);
+ /* Ignore failures -- the opcode table does duplicate some
+ variants in different forms, like "hw_stq" and "hw_st/q". */
+ }
-/* Support for crash debug on vms. */
+ while (++i < alpha_num_opcodes
+ && (alpha_opcodes[i].name == name
+ || !strcmp (alpha_opcodes[i].name, name)))
+ continue;
+ }
-static void
-s_alpha_name (ignore)
- int ignore;
-{
- register char *p;
- expressionS exp;
- segment_info_type *seginfo = seg_info (alpha_link_section);
+ /* Create the macro hash table. */
+ alpha_macro_hash = hash_new ();
- if (now_seg != alpha_link_section)
+ for (i = 0; i < alpha_num_macros;)
{
- as_bad (_(".name directive not in link (.link) section"));
- demand_empty_rest_of_line ();
- return;
+ const char *name, *retval;
+
+ name = alpha_macros[i].name;
+ retval = hash_insert (alpha_macro_hash, name, (void *) &alpha_macros[i]);
+ if (retval)
+ as_fatal (_("internal error: can't hash macro `%s': %s"),
+ name, retval);
+
+ while (++i < alpha_num_macros
+ && (alpha_macros[i].name == name
+ || !strcmp (alpha_macros[i].name, name)))
+ continue;
}
- expression (&exp);
- if (exp.X_op != O_symbol)
+ /* Construct symbols for each of the registers. */
+ for (i = 0; i < 32; ++i)
{
- as_warn (_(".name directive has no symbol"));
- demand_empty_rest_of_line ();
- return;
- }
+ char name[4];
- demand_empty_rest_of_line ();
+ sprintf (name, "$%d", i);
+ alpha_register_table[i] = symbol_create (name, reg_section, i,
+ &zero_address_frag);
+ }
-#ifdef md_flush_pending_output
- md_flush_pending_output ();
-#endif
+ for (; i < 64; ++i)
+ {
+ char name[5];
- frag_align (3, 0, 0);
- p = frag_more (8);
- seginfo->literal_pool_size += 8;
+ sprintf (name, "$f%d", i - 32);
+ alpha_register_table[i] = symbol_create (name, reg_section, i,
+ &zero_address_frag);
+ }
- fix_new_exp (frag_now, p-frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
+ /* Create the special symbols and sections we'll be using. */
- return;
-}
+ /* So .sbss will get used for tiny objects. */
+ bfd_set_gp_size (stdoutput, g_switch_value);
+#ifdef OBJ_ECOFF
+ create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
-static void
-s_alpha_linkage (ignore)
- int ignore;
-{
- expressionS exp;
- char *p;
+ /* For handling the GP, create a symbol that won't be output in the
+ symbol table. We'll edit it out of relocs later. */
+ alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
+ &zero_address_frag);
+#endif
-#ifdef md_flush_pending_output
- md_flush_pending_output ();
+#ifdef OBJ_EVAX
+ create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
+ alpha_evax_proc_hash = hash_new ();
#endif
- expression (&exp);
- if (exp.X_op != O_symbol)
- {
- as_fatal (_("No symbol after .linkage"));
- }
- else
+#ifdef OBJ_ELF
+ if (ECOFF_DEBUGGING)
{
- p = frag_more (LKP_S_K_SIZE);
- memset (p, 0, LKP_S_K_SIZE);
- fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
- BFD_RELOC_ALPHA_LINKAGE);
+ segT sec = subseg_new (".mdebug", (subsegT) 0);
+ bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
+ bfd_set_section_alignment (stdoutput, sec, 3);
}
- demand_empty_rest_of_line ();
+#endif
+
+ /* Create literal lookup hash table. */
+ alpha_literal_hash = hash_new ();
- return;
+ subseg_set (text_section, 0);
}
+/* The public interface to the instruction assembler. */
-static void
-s_alpha_code_address (ignore)
- int ignore;
+void
+md_assemble (char *str)
{
- expressionS exp;
- char *p;
+ /* Current maximum is 13. */
+ char opname[32];
+ expressionS tok[MAX_INSN_ARGS];
+ int ntok, trunclen;
+ size_t opnamelen;
-#ifdef md_flush_pending_output
- md_flush_pending_output ();
-#endif
+ /* Split off the opcode. */
+ opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
+ trunclen = (opnamelen < sizeof (opname) - 1
+ ? opnamelen
+ : sizeof (opname) - 1);
+ memcpy (opname, str, trunclen);
+ opname[trunclen] = '\0';
- expression (&exp);
- if (exp.X_op != O_symbol)
- {
- as_fatal (_("No symbol after .code_address"));
- }
- else
+ /* Tokenize the rest of the line. */
+ if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
{
- p = frag_more (8);
- memset (p, 0, 8);
- fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
- BFD_RELOC_ALPHA_CODEADDR);
+ if (ntok != TOKENIZE_ERROR_REPORT)
+ as_bad (_("syntax error"));
+
+ return;
}
- demand_empty_rest_of_line ();
- return;
+ /* Finish it off. */
+ assemble_tokens (opname, tok, ntok, alpha_macros_on);
}
+/* Round up a section's size to the appropriate boundary. */
-static void
-s_alpha_fp_save (ignore)
- int ignore;
+valueT
+md_section_align (segT seg, valueT size)
{
+ int align = bfd_get_section_alignment (stdoutput, seg);
+ valueT mask = ((valueT) 1 << align) - 1;
- alpha_evax_proc.fp_save = tc_get_register (1);
-
- demand_empty_rest_of_line ();
- return;
+ return (size + mask) & ~mask;
}
+/* Turn a string in input_line_pointer into a floating point constant
+ of type TYPE, and store the appropriate bytes in *LITP. The number
+ of LITTLENUMS emitted is stored in *SIZEP. An error message is
+ returned, or NULL on OK. */
-static void
-s_alpha_mask (ignore)
- int ignore;
+char *
+md_atof (int type, char *litP, int *sizeP)
{
- long val;
+ extern char *vax_md_atof (int, char *, int *);
- if (get_absolute_expression_and_terminator (&val) != ',')
+ switch (type)
{
- as_warn (_("Bad .mask directive"));
- --input_line_pointer;
+ /* VAX floats. */
+ case 'G':
+ /* vax_md_atof() doesn't like "G" for some reason. */
+ type = 'g';
+ case 'F':
+ case 'D':
+ return vax_md_atof (type, litP, sizeP);
+
+ default:
+ return ieee_md_atof (type, litP, sizeP, FALSE);
}
- else
+}
+
+/* Take care of the target-specific command-line options. */
+
+int
+md_parse_option (int c, char *arg)
+{
+ switch (c)
{
- alpha_evax_proc.imask = val;
- (void)get_absolute_expression ();
- }
- demand_empty_rest_of_line ();
+ case 'F':
+ alpha_nofloats_on = 1;
+ break;
+
+ case OPTION_32ADDR:
+ alpha_addr32_on = 1;
+ break;
+
+ case 'g':
+ alpha_debug = 1;
+ break;
+
+ case 'G':
+ g_switch_value = atoi (arg);
+ break;
+
+ case 'm':
+ {
+ const struct cpu_type *p;
+
+ for (p = cpu_types; p->name; ++p)
+ if (strcmp (arg, p->name) == 0)
+ {
+ alpha_target_name = p->name, alpha_target = p->flags;
+ goto found;
+ }
+ as_warn (_("Unknown CPU identifier `%s'"), arg);
+ found:;
+ }
+ break;
+
+#ifdef OBJ_EVAX
+ case '+': /* For g++. Hash any name > 63 chars long. */
+ alpha_flag_hash_long_names = 1;
+ break;
- return;
-}
+ case 'H': /* Show new symbol after hash truncation. */
+ alpha_flag_show_after_trunc = 1;
+ break;
+ case 'h': /* For gnu-c/vax compatibility. */
+ break;
-static void
-s_alpha_fmask (ignore)
- int ignore;
-{
- long val;
+ case OPTION_REPLACE:
+ alpha_flag_replace = 1;
+ break;
- if (get_absolute_expression_and_terminator (&val) != ',')
- {
- as_warn (_("Bad .fmask directive"));
- --input_line_pointer;
- }
- else
- {
- alpha_evax_proc.fmask = val;
- (void) get_absolute_expression ();
- }
- demand_empty_rest_of_line ();
+ case OPTION_NOREPLACE:
+ alpha_flag_replace = 0;
+ break;
+#endif
- return;
-}
+ case OPTION_RELAX:
+ alpha_flag_relax = 1;
+ break;
-static void
-s_alpha_end (ignore)
- int ignore;
-{
- char c;
+#ifdef OBJ_ELF
+ case OPTION_MDEBUG:
+ alpha_flag_mdebug = 1;
+ break;
+ case OPTION_NO_MDEBUG:
+ alpha_flag_mdebug = 0;
+ break;
+#endif
- c = get_symbol_end ();
- *input_line_pointer = c;
- demand_empty_rest_of_line ();
- alpha_evax_proc.symbol = 0;
+ default:
+ return 0;
+ }
- return;
+ return 1;
}
+/* Print a description of the command-line options that we accept. */
-static void
-s_alpha_file (ignore)
- int ignore;
+void
+md_show_usage (FILE *stream)
{
- symbolS *s;
- int length;
- static char case_hack[32];
-
- extern char *demand_copy_string PARAMS ((int *lenP));
-
- sprintf (case_hack, "<CASE:%01d%01d>",
- alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
+ fputs (_("\
+Alpha options:\n\
+-32addr treat addresses as 32-bit values\n\
+-F lack floating point instructions support\n\
+-mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\
+ specify variant of Alpha architecture\n\
+-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\
+ these variants include PALcode opcodes\n"),
+ stream);
+#ifdef OBJ_EVAX
+ fputs (_("\
+VMS options:\n\
+-+ encode (don't truncate) names longer than 64 characters\n\
+-H show new symbol after hash truncation\n\
+-replace/-noreplace enable or disable the optimization of procedure calls\n"),
+ stream);
+#endif
+}
- s = symbol_find_or_make (case_hack);
- s->bsym->flags |= BSF_FILE;
+/* Decide from what point a pc-relative relocation is relative to,
+ relative to the pc-relative fixup. Er, relatively speaking. */
- get_absolute_expression ();
- s = symbol_find_or_make (demand_copy_string (&length));
- s->bsym->flags |= BSF_FILE;
- demand_empty_rest_of_line ();
+long
+md_pcrel_from (fixS *fixP)
+{
+ valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
- return;
+ switch (fixP->fx_r_type)
+ {
+ case BFD_RELOC_23_PCREL_S2:
+ case BFD_RELOC_ALPHA_HINT:
+ case BFD_RELOC_ALPHA_BRSGP:
+ return addr + 4;
+ default:
+ return addr;
+ }
}
-#endif /* OBJ_EVAX */
-/* Handle the .gprel32 pseudo op. */
+/* Attempt to simplify or even eliminate a fixup. The return value is
+ ignored; perhaps it was once meaningful, but now it is historical.
+ To indicate that a fixup has been eliminated, set fixP->fx_done.
-static void
-s_alpha_gprel32 (ignore)
- int ignore;
+ For ELF, here it is that we transform the GPDISP_HI16 reloc we used
+ internally into the GPDISP reloc used externally. We had to do
+ this so that we'd have the GPDISP_LO16 reloc as a tag to compute
+ the distance to the "lda" instruction for setting the addend to
+ GPDISP. */
+
+void
+md_apply_fix (fixS *fixP, valueT * valP, segT seg)
{
- expressionS e;
- char *p;
+ char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
+ valueT value = * valP;
+ unsigned image, size;
- SKIP_WHITESPACE ();
- expression (&e);
+ switch (fixP->fx_r_type)
+ {
+ /* The GPDISP relocations are processed internally with a symbol
+ referring to the current function's section; we need to drop
+ in a value which, when added to the address of the start of
+ the function, gives the desired GP. */
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ {
+ fixS *next = fixP->fx_next;
+ /* With user-specified !gpdisp relocations, we can be missing
+ the matching LO16 reloc. We will have already issued an
+ error message. */
+ if (next)
+ fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
+ - fixP->fx_frag->fr_address - fixP->fx_where);
+
+ value = (value - sign_extend_16 (value)) >> 16;
+ }
#ifdef OBJ_ELF
- switch (e.X_op)
- {
- case O_constant:
- e.X_add_symbol = section_symbol(absolute_section);
- e.X_op = O_symbol;
- /* FALLTHRU */
- case O_symbol:
- break;
- default:
- abort();
- }
-#else
-#ifdef OBJ_ECOFF
- switch (e.X_op)
- {
- case O_constant:
- e.X_add_symbol = section_symbol (absolute_section);
- /* fall through */
- case O_symbol:
- e.X_op = O_subtract;
- e.X_op_symbol = alpha_gp_symbol;
- break;
- default:
- abort ();
- }
-#endif
+ fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
#endif
+ goto do_reloc_gp;
- if (alpha_auto_align_on && alpha_current_align < 2)
- alpha_align (2, (char *) NULL, alpha_insn_label, 0);
- if (alpha_current_align > 2)
- alpha_current_align = 2;
- alpha_insn_label = NULL;
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ value = sign_extend_16 (value);
+ fixP->fx_offset = 0;
+#ifdef OBJ_ELF
+ fixP->fx_done = 1;
+#endif
- p = frag_more (4);
- memset (p, 0, 4);
- fix_new_exp (frag_now, p-frag_now->fr_literal, 4,
- &e, 0, BFD_RELOC_GPREL32);
-}
+ do_reloc_gp:
+ fixP->fx_addsy = section_symbol (seg);
+ md_number_to_chars (fixpos, value, 2);
+ break;
-/* Handle floating point allocation pseudo-ops. This is like the
- generic vresion, but it makes sure the current label, if any, is
- correctly aligned. */
+ case BFD_RELOC_16:
+ if (fixP->fx_pcrel)
+ fixP->fx_r_type = BFD_RELOC_16_PCREL;
+ size = 2;
+ goto do_reloc_xx;
-static void
-s_alpha_float_cons (type)
- int type;
-{
- int log_size;
+ case BFD_RELOC_32:
+ if (fixP->fx_pcrel)
+ fixP->fx_r_type = BFD_RELOC_32_PCREL;
+ size = 4;
+ goto do_reloc_xx;
- switch (type)
- {
- default:
- case 'f':
- case 'F':
- log_size = 2;
- break;
+ case BFD_RELOC_64:
+ if (fixP->fx_pcrel)
+ fixP->fx_r_type = BFD_RELOC_64_PCREL;
+ size = 8;
- case 'd':
- case 'D':
- case 'G':
- log_size = 3;
- break;
+ do_reloc_xx:
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ md_number_to_chars (fixpos, value, size);
+ goto done;
+ }
+ return;
- case 'x':
- case 'X':
- case 'p':
- case 'P':
- log_size = 4;
+#ifdef OBJ_ECOFF
+ case BFD_RELOC_GPREL32:
+ gas_assert (fixP->fx_subsy == alpha_gp_symbol);
+ fixP->fx_subsy = 0;
+ /* FIXME: inherited this obliviousness of `value' -- why? */
+ md_number_to_chars (fixpos, -alpha_gp_value, 4);
break;
- }
-
- if (alpha_auto_align_on && alpha_current_align < log_size)
- alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
- if (alpha_current_align > log_size)
- alpha_current_align = log_size;
- alpha_insn_label = NULL;
+#else
+ case BFD_RELOC_GPREL32:
+#endif
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ return;
- float_cons (type);
-}
+ case BFD_RELOC_23_PCREL_S2:
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ image = bfd_getl32 (fixpos);
+ image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
+ goto write_done;
+ }
+ return;
-/* Handle the .proc pseudo op. We don't really do much with it except
- parse it. */
+ case BFD_RELOC_ALPHA_HINT:
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ image = bfd_getl32 (fixpos);
+ image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
+ goto write_done;
+ }
+ return;
-static void
-s_alpha_proc (is_static)
- int is_static;
-{
- char *name;
- char c;
- char *p;
- symbolS *symbolP;
- int temp;
+#ifdef OBJ_ELF
+ case BFD_RELOC_ALPHA_BRSGP:
+ return;
- /* Takes ".proc name,nargs" */
- SKIP_WHITESPACE ();
- name = input_line_pointer;
- c = get_symbol_end ();
- p = input_line_pointer;
- symbolP = symbol_find_or_make (name);
- *p = c;
- SKIP_WHITESPACE ();
- if (*input_line_pointer != ',')
- {
- *p = 0;
- as_warn (_("Expected comma after name \"%s\""), name);
- *p = c;
- temp = 0;
- ignore_rest_of_line ();
- }
- else
- {
- input_line_pointer++;
- temp = get_absolute_expression ();
- }
- /* symbolP->sy_other = (signed char) temp; */
- as_warn (_("unhandled: .proc %s,%d"), name, temp);
- demand_empty_rest_of_line ();
-}
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ if (fixP->fx_addsy)
+ S_SET_THREAD_LOCAL (fixP->fx_addsy);
+ return;
+#endif
-/* Handle the .set pseudo op. This is used to turn on and off most of
- the assembler features. */
+#ifdef OBJ_ECOFF
+ case BFD_RELOC_ALPHA_LITERAL:
+ md_number_to_chars (fixpos, value, 2);
+ return;
+#endif
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ case BFD_RELOC_ALPHA_LITUSE:
+ case BFD_RELOC_ALPHA_LINKAGE:
+ case BFD_RELOC_ALPHA_CODEADDR:
+ return;
-static void
-s_alpha_set (x)
- int x;
-{
- char *name, ch, *s;
- int yesno = 1;
+#ifdef OBJ_EVAX
+ case BFD_RELOC_ALPHA_NOP:
+ value -= (8 + 4); /* PC-relative, base is jsr+4. */
+
+ /* From B.4.5.2 of the OpenVMS Linker Utility Manual:
+ "Finally, the ETIR$C_STC_BSR command passes the same address
+ as ETIR$C_STC_NOP (so that they will fail or succeed together),
+ and the same test is done again." */
+ if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
+ {
+ fixP->fx_addnumber = -value;
+ return;
+ }
- SKIP_WHITESPACE ();
- name = input_line_pointer;
- ch = get_symbol_end ();
+ if ((abs (value) >> 2) & ~0xfffff)
+ goto done;
+ else
+ {
+ /* Change to a nop. */
+ image = 0x47FF041F;
+ goto write_done;
+ }
- s = name;
- if (s[0] == 'n' && s[1] == 'o')
- {
- yesno = 0;
- s += 2;
- }
- if (!strcmp ("reorder", s))
- /* ignore */ ;
- else if (!strcmp ("at", s))
- alpha_noat_on = !yesno;
- else if (!strcmp ("macro", s))
- alpha_macros_on = yesno;
- else if (!strcmp ("move", s))
- /* ignore */ ;
- else if (!strcmp ("volatile", s))
- /* ignore */ ;
- else
- as_warn (_("Tried to .set unrecognized mode `%s'"), name);
+ case BFD_RELOC_ALPHA_LDA:
+ /* fixup_segment sets fixP->fx_addsy to NULL when it can pre-compute
+ the value for an O_subtract. */
+ if (fixP->fx_addsy
+ && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
+ {
+ fixP->fx_addnumber = symbol_get_bfdsym (fixP->fx_subsy)->value;
+ return;
+ }
- *input_line_pointer = ch;
- demand_empty_rest_of_line ();
-}
+ if ((abs (value)) & ~0x7fff)
+ goto done;
+ else
+ {
+ /* Change to an lda. */
+ image = 0x237B0000 | (value & 0xFFFF);
+ goto write_done;
+ }
-/* Handle the .base pseudo op. This changes the assembler's notion of
- the $gp register. */
+ case BFD_RELOC_ALPHA_BSR:
+ case BFD_RELOC_ALPHA_BOH:
+ value -= 4; /* PC-relative, base is jsr+4. */
-static void
-s_alpha_base (ignore)
- int ignore;
-{
-#if 0
- if (first_32bit_quadrant)
- {
- /* not fatal, but it might not work in the end */
- as_warn (_("File overrides no-base-register option."));
- first_32bit_quadrant = 0;
- }
+ /* See comment in the BFD_RELOC_ALPHA_NOP case above. */
+ if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
+ {
+ fixP->fx_addnumber = -value;
+ return;
+ }
+
+ if ((abs (value) >> 2) & ~0xfffff)
+ {
+ /* Out of range. */
+ if (fixP->fx_r_type == BFD_RELOC_ALPHA_BOH)
+ {
+ /* Add a hint. */
+ image = bfd_getl32(fixpos);
+ image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
+ goto write_done;
+ }
+ goto done;
+ }
+ else
+ {
+ /* Change to a branch. */
+ image = 0xD3400000 | ((value >> 2) & 0x1FFFFF);
+ goto write_done;
+ }
#endif
- SKIP_WHITESPACE ();
- if (*input_line_pointer == '$')
- { /* $rNN form */
- input_line_pointer++;
- if (*input_line_pointer == 'r')
- input_line_pointer++;
- }
+ case BFD_RELOC_VTABLE_INHERIT:
+ case BFD_RELOC_VTABLE_ENTRY:
+ return;
- alpha_gp_register = get_absolute_expression ();
- if (alpha_gp_register < 0 || alpha_gp_register > 31)
- {
- alpha_gp_register = AXP_REG_GP;
- as_warn (_("Bad base register, using $%d."), alpha_gp_register);
- }
+ default:
+ {
+ const struct alpha_operand *operand;
- demand_empty_rest_of_line ();
-}
+ if ((int) fixP->fx_r_type >= 0)
+ as_fatal (_("unhandled relocation type %s"),
+ bfd_get_reloc_code_name (fixP->fx_r_type));
-/* Handle the .align pseudo-op. This aligns to a power of two. It
- also adjusts any current instruction label. We treat this the same
- way the MIPS port does: .align 0 turns off auto alignment. */
+ gas_assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
+ operand = &alpha_operands[-(int) fixP->fx_r_type];
-static void
-s_alpha_align (ignore)
- int ignore;
-{
- int align;
- char fill, *pfill;
- long max_alignment = 15;
+ /* The rest of these fixups only exist internally during symbol
+ resolution and have no representation in the object file.
+ Therefore they must be completely resolved as constants. */
- align = get_absolute_expression ();
- if (align > max_alignment)
- {
- align = max_alignment;
- as_bad (_("Alignment too large: %d. assumed"), align);
- }
- else if (align < 0)
- {
- as_warn (_("Alignment negative: 0 assumed"));
- align = 0;
- }
+ if (fixP->fx_addsy != 0
+ && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("non-absolute expression in constant field"));
- if (*input_line_pointer == ',')
- {
- input_line_pointer++;
- fill = get_absolute_expression ();
- pfill = &fill;
+ image = bfd_getl32 (fixpos);
+ image = insert_operand (image, operand, (offsetT) value,
+ fixP->fx_file, fixP->fx_line);
+ }
+ goto write_done;
}
- else
- pfill = NULL;
- if (align != 0)
- {
- alpha_auto_align_on = 1;
- alpha_align (align, pfill, alpha_insn_label, 1);
- }
+ if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
+ return;
else
{
- alpha_auto_align_on = 0;
+ as_warn_where (fixP->fx_file, fixP->fx_line,
+ _("type %d reloc done?\n"), (int) fixP->fx_r_type);
+ goto done;
}
- demand_empty_rest_of_line ();
+write_done:
+ md_number_to_chars (fixpos, image, 4);
+
+done:
+ fixP->fx_done = 1;
}
-/* Hook the normal string processor to reset known alignment. */
+/* Look for a register name in the given symbol. */
-static void
-s_alpha_stringer (terminate)
- int terminate;
+symbolS *
+md_undefined_symbol (char *name)
{
- alpha_current_align = 0;
- alpha_insn_label = NULL;
- stringer (terminate);
-}
+ if (*name == '$')
+ {
+ int is_float = 0, num;
-/* Hook the normal space processing to reset known alignment. */
+ switch (*++name)
+ {
+ case 'f':
+ if (name[1] == 'p' && name[2] == '\0')
+ return alpha_register_table[AXP_REG_FP];
+ is_float = 32;
+ /* Fall through. */
-static void
-s_alpha_space (ignore)
- int ignore;
-{
- alpha_current_align = 0;
- alpha_insn_label = NULL;
- s_space (ignore);
+ case 'r':
+ if (!ISDIGIT (*++name))
+ break;
+ /* Fall through. */
+
+ case '0': case '1': case '2': case '3': case '4':
+ case '5': case '6': case '7': case '8': case '9':
+ if (name[1] == '\0')
+ num = name[0] - '0';
+ else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0')
+ {
+ num = (name[0] - '0') * 10 + name[1] - '0';
+ if (num >= 32)
+ break;
+ }
+ else
+ break;
+
+ if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
+ as_warn (_("Used $at without \".set noat\""));
+ return alpha_register_table[num + is_float];
+
+ case 'a':
+ if (name[1] == 't' && name[2] == '\0')
+ {
+ if (!alpha_noat_on)
+ as_warn (_("Used $at without \".set noat\""));
+ return alpha_register_table[AXP_REG_AT];
+ }
+ break;
+
+ case 'g':
+ if (name[1] == 'p' && name[2] == '\0')
+ return alpha_register_table[alpha_gp_register];
+ break;
+
+ case 's':
+ if (name[1] == 'p' && name[2] == '\0')
+ return alpha_register_table[AXP_REG_SP];
+ break;
+ }
+ }
+ return NULL;
}
-/* Hook into cons for auto-alignment. */
+#ifdef OBJ_ECOFF
+/* @@@ Magic ECOFF bits. */
void
-alpha_cons_align (size)
- int size;
+alpha_frob_ecoff_data (void)
{
- int log_size;
-
- log_size = 0;
- while ((size >>= 1) != 0)
- ++log_size;
-
- if (alpha_auto_align_on && alpha_current_align < log_size)
- alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
- if (alpha_current_align > log_size)
- alpha_current_align = log_size;
- alpha_insn_label = NULL;
+ select_gp_value ();
+ /* $zero and $f31 are read-only. */
+ alpha_gprmask &= ~1;
+ alpha_fprmask &= ~1;
}
+#endif
-/* Here come the .uword, .ulong, and .uquad explicitly unaligned
- pseudos. We just turn off auto-alignment and call down to cons. */
+/* Hook to remember a recently defined label so that the auto-align
+ code can adjust the symbol after we know what alignment will be
+ required. */
-static void
-s_alpha_ucons (bytes)
- int bytes;
+void
+alpha_define_label (symbolS *sym)
{
- int hold = alpha_auto_align_on;
- alpha_auto_align_on = 0;
- cons (bytes);
- alpha_auto_align_on = hold;
+ alpha_insn_label = sym;
+#ifdef OBJ_ELF
+ dwarf2_emit_label (sym);
+#endif
}
-/* Switch the working cpu type. */
+/* Return true if we must always emit a reloc for a type and false if
+ there is some hope of resolving it at assembly time. */
-static void
-s_alpha_arch (ignored)
- int ignored;
+int
+alpha_force_relocation (fixS *f)
{
- char *name, ch;
- const struct cpu_type *p;
+ if (alpha_flag_relax)
+ return 1;
- SKIP_WHITESPACE ();
- name = input_line_pointer;
- ch = get_symbol_end ();
+ switch (f->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ case BFD_RELOC_ALPHA_GPDISP:
+ case BFD_RELOC_ALPHA_LITERAL:
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ case BFD_RELOC_ALPHA_LITUSE:
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_GPREL32:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ case BFD_RELOC_ALPHA_LINKAGE:
+ case BFD_RELOC_ALPHA_CODEADDR:
+ case BFD_RELOC_ALPHA_BRSGP:
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+#ifdef OBJ_EVAX
+ case BFD_RELOC_ALPHA_NOP:
+ case BFD_RELOC_ALPHA_BSR:
+ case BFD_RELOC_ALPHA_LDA:
+ case BFD_RELOC_ALPHA_BOH:
+#endif
+ return 1;
- for (p = cpu_types; p->name; ++p)
- if (strcmp(name, p->name) == 0)
- {
- alpha_target_name = p->name, alpha_target = p->flags;
- goto found;
- }
- as_warn("Unknown CPU identifier `%s'", name);
+ default:
+ break;
+ }
-found:
- *input_line_pointer = ch;
- demand_empty_rest_of_line ();
+ return generic_force_reloc (f);
}
-\f
-
-#ifdef DEBUG1
-/* print token expression with alpha specific extension. */
+/* Return true if we can partially resolve a relocation now. */
-static void
-alpha_print_token(f, exp)
- FILE *f;
- const expressionS *exp;
+int
+alpha_fix_adjustable (fixS *f)
{
- switch (exp->X_op)
+ /* Are there any relocation types for which we must generate a
+ reloc but we can adjust the values contained within it? */
+ switch (f->fx_r_type)
{
- case O_cpregister:
- putc (',', f);
- /* FALLTHRU */
- case O_pregister:
- putc ('(', f);
- {
- expressionS nexp = *exp;
- nexp.X_op = O_register;
- print_expr (f, &nexp);
- }
- putc (')', f);
- break;
- default:
- print_expr (f, exp);
- break;
- }
- return;
-}
-#endif
-\f
-/* The target specific pseudo-ops which we support. */
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ case BFD_RELOC_ALPHA_GPDISP:
+ return 0;
-const pseudo_typeS md_pseudo_table[] =
-{
-#ifdef OBJ_ECOFF
- {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
- {"rdata", s_alpha_rdata, 0},
-#endif
- {"text", s_alpha_text, 0},
- {"data", s_alpha_data, 0},
-#ifdef OBJ_ECOFF
- {"sdata", s_alpha_sdata, 0},
-#endif
-#ifdef OBJ_ELF
- {"section", s_alpha_section, 0},
- {"section.s", s_alpha_section, 0},
- {"sect", s_alpha_section, 0},
- {"sect.s", s_alpha_section, 0},
-#endif
-#ifdef OBJ_EVAX
- { "pdesc", s_alpha_pdesc, 0},
- { "name", s_alpha_name, 0},
- { "linkage", s_alpha_linkage, 0},
- { "code_address", s_alpha_code_address, 0},
- { "ent", s_alpha_ent, 0},
- { "frame", s_alpha_frame, 0},
- { "fp_save", s_alpha_fp_save, 0},
- { "mask", s_alpha_mask, 0},
- { "fmask", s_alpha_fmask, 0},
- { "end", s_alpha_end, 0},
- { "file", s_alpha_file, 0},
- { "rdata", s_alpha_section, 1},
- { "comm", s_alpha_comm, 0},
- { "link", s_alpha_section, 3},
- { "ctors", s_alpha_section, 4},
- { "dtors", s_alpha_section, 5},
-#endif
- {"gprel32", s_alpha_gprel32, 0},
- {"t_floating", s_alpha_float_cons, 'd'},
- {"s_floating", s_alpha_float_cons, 'f'},
- {"f_floating", s_alpha_float_cons, 'F'},
- {"g_floating", s_alpha_float_cons, 'G'},
- {"d_floating", s_alpha_float_cons, 'D'},
+ case BFD_RELOC_ALPHA_LITERAL:
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ case BFD_RELOC_ALPHA_LITUSE:
+ case BFD_RELOC_ALPHA_LINKAGE:
+ case BFD_RELOC_ALPHA_CODEADDR:
+ return 1;
- {"proc", s_alpha_proc, 0},
- {"aproc", s_alpha_proc, 1},
- {"set", s_alpha_set, 0},
- {"reguse", s_ignore, 0},
- {"livereg", s_ignore, 0},
- {"base", s_alpha_base, 0}, /*??*/
- {"option", s_ignore, 0},
- {"prologue", s_ignore, 0},
- {"aent", s_ignore, 0},
- {"ugen", s_ignore, 0},
- {"eflag", s_ignore, 0},
+ case BFD_RELOC_VTABLE_ENTRY:
+ case BFD_RELOC_VTABLE_INHERIT:
+ return 0;
- {"align", s_alpha_align, 0},
- {"double", s_alpha_float_cons, 'd'},
- {"float", s_alpha_float_cons, 'f'},
- {"single", s_alpha_float_cons, 'f'},
- {"ascii", s_alpha_stringer, 0},
- {"asciz", s_alpha_stringer, 1},
- {"string", s_alpha_stringer, 1},
- {"space", s_alpha_space, 0},
- {"skip", s_alpha_space, 0},
- {"zero", s_alpha_space, 0},
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_GPREL32:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ case BFD_RELOC_23_PCREL_S2:
+ case BFD_RELOC_16:
+ case BFD_RELOC_32:
+ case BFD_RELOC_64:
+ case BFD_RELOC_ALPHA_HINT:
+ return 1;
-/* Unaligned data pseudos. */
- {"uword", s_alpha_ucons, 2},
- {"ulong", s_alpha_ucons, 4},
- {"uquad", s_alpha_ucons, 8},
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ /* ??? No idea why we can't return a reference to .tbss+10, but
+ we're preventing this in the other assemblers. Follow for now. */
+ return 0;
#ifdef OBJ_ELF
-/* Dwarf wants these versions of unaligned. */
- {"2byte", s_alpha_ucons, 2},
- {"4byte", s_alpha_ucons, 4},
- {"8byte", s_alpha_ucons, 8},
-#endif
+ case BFD_RELOC_ALPHA_BRSGP:
+ /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
+ let it get resolved at assembly time. */
+ {
+ symbolS *sym = f->fx_addsy;
+ const char *name;
+ int offset = 0;
-/* We don't do any optimizing, so we can safely ignore these. */
- {"noalias", s_ignore, 0},
- {"alias", s_ignore, 0},
+ if (generic_force_reloc (f))
+ return 0;
- {"arch", s_alpha_arch, 0},
+ switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD)
+ {
+ case STO_ALPHA_NOPV:
+ break;
+ case STO_ALPHA_STD_GPLOAD:
+ offset = 8;
+ break;
+ default:
+ if (S_IS_LOCAL (sym))
+ name = "<local>";
+ else
+ name = S_GET_NAME (sym);
+ as_bad_where (f->fx_file, f->fx_line,
+ _("!samegp reloc against symbol without .prologue: %s"),
+ name);
+ break;
+ }
+ f->fx_r_type = BFD_RELOC_23_PCREL_S2;
+ f->fx_offset += offset;
+ return 1;
+ }
+#endif
+#ifdef OBJ_EVAX
+ case BFD_RELOC_ALPHA_NOP:
+ case BFD_RELOC_ALPHA_BSR:
+ case BFD_RELOC_ALPHA_LDA:
+ case BFD_RELOC_ALPHA_BOH:
+ return 1;
+#endif
- {NULL, 0, 0},
-};
+ default:
+ return 1;
+ }
+}
-\f
-/* Build a BFD section with its flags set appropriately for the .lita,
- .lit8, or .lit4 sections. */
+/* Generate the BFD reloc to be stuck in the object file from the
+ fixup used internally in the assembler. */
-static void
-create_literal_section (name, secp, symp)
- const char *name;
- segT *secp;
- symbolS **symp;
+arelent *
+tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED,
+ fixS *fixp)
{
- segT current_section = now_seg;
- int current_subsec = now_subseg;
- segT new_sec;
+ arelent *reloc;
- *secp = new_sec = subseg_new (name, 0);
- subseg_set (current_section, current_subsec);
- bfd_set_section_alignment (stdoutput, new_sec, 4);
- bfd_set_section_flags (stdoutput, new_sec,
- SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
- | SEC_DATA);
+ reloc = xmalloc (sizeof (* reloc));
+ reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+ reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
- S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
-}
+ /* Make sure none of our internal relocations make it this far.
+ They'd better have been fully resolved by this point. */
+ gas_assert ((int) fixp->fx_r_type > 0);
-#ifdef OBJ_ECOFF
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+ if (reloc->howto == NULL)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("cannot represent `%s' relocation in object file"),
+ bfd_get_reloc_code_name (fixp->fx_r_type));
+ return NULL;
+ }
-/* @@@ GP selection voodoo. All of this seems overly complicated and
- unnecessary; which is the primary reason it's for ECOFF only. */
+ if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
+ as_fatal (_("internal error? cannot generate `%s' relocation"),
+ bfd_get_reloc_code_name (fixp->fx_r_type));
-static inline void
-maybe_set_gp (sec)
- asection *sec;
-{
- bfd_vma vma;
- if (!sec)
- return;
- vma = bfd_get_section_vma (foo, sec);
- if (vma && vma < alpha_gp_value)
- alpha_gp_value = vma;
-}
+ gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
-static void
-select_gp_value ()
-{
- assert (alpha_gp_value == 0);
+#ifdef OBJ_ECOFF
+ if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
+ /* Fake out bfd_perform_relocation. sigh. */
+ reloc->addend = -alpha_gp_value;
+ else
+#endif
+ {
+ reloc->addend = fixp->fx_offset;
+#ifdef OBJ_ELF
+ /* Ohhh, this is ugly. The problem is that if this is a local global
+ symbol, the relocation will entirely be performed at link time, not
+ at assembly time. bfd_perform_reloc doesn't know about this sort
+ of thing, and as a result we need to fake it out here. */
+ if ((S_IS_EXTERNAL (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)
+ || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)
+ || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_THREAD_LOCAL))
+ && !S_IS_COMMON (fixp->fx_addsy))
+ reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
+#endif
+ }
- /* Get minus-one in whatever width... */
- alpha_gp_value = 0; alpha_gp_value--;
+#ifdef OBJ_EVAX
+ switch (fixp->fx_r_type)
+ {
+ struct evax_private_udata_struct *udata;
+ const char *pname;
+ int pname_len;
- /* Select the smallest VMA of these existing sections. */
- maybe_set_gp (alpha_lita_section);
-#if 0
- /* These were disabled before -- should we use them? */
- maybe_set_gp (sdata);
- maybe_set_gp (lit8_sec);
- maybe_set_gp (lit4_sec);
-#endif
+ case BFD_RELOC_ALPHA_LINKAGE:
+ reloc->addend = fixp->fx_addnumber;
+ break;
-/* @@ Will a simple 0x8000 work here? If not, why not? */
-#define GP_ADJUSTMENT (0x8000 - 0x10)
+ case BFD_RELOC_ALPHA_NOP:
+ case BFD_RELOC_ALPHA_BSR:
+ case BFD_RELOC_ALPHA_LDA:
+ case BFD_RELOC_ALPHA_BOH:
+ pname = symbol_get_bfdsym (fixp->fx_addsy)->name;
- alpha_gp_value += GP_ADJUSTMENT;
+ /* We need the non-suffixed name of the procedure. Beware that
+ the main symbol might be equated so look it up and take its name. */
+ pname_len = strlen (pname);
+ if (pname_len > 4 && strcmp (pname + pname_len - 4, "..en") == 0)
+ {
+ symbolS *sym;
+ char *my_pname = xstrdup (pname);
+ my_pname [pname_len - 4] = 0;
+ sym = symbol_find (my_pname);
+ if (sym == NULL)
+ abort ();
+ while (symbol_equated_reloc_p (sym))
+ {
+ symbolS *n = symbol_get_value_expression (sym)->X_add_symbol;
- S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
+ /* We must avoid looping, as that can occur with a badly
+ written program. */
+ if (n == sym)
+ break;
+ sym = n;
+ }
+ pname = symbol_get_bfdsym (sym)->name;
+ }
-#ifdef DEBUG1
- printf (_("Chose GP value of %lx\n"), alpha_gp_value);
+ udata = (struct evax_private_udata_struct *)
+ xmalloc (sizeof (struct evax_private_udata_struct));
+ udata->enbsym = symbol_get_bfdsym (fixp->fx_addsy);
+ udata->bsym = symbol_get_bfdsym (fixp->tc_fix_data.info->psym);
+ udata->origname = (char *)pname;
+ udata->lkindex = ((struct evax_private_udata_struct *)
+ symbol_get_bfdsym (fixp->tc_fix_data.info->sym)->udata.p)->lkindex;
+ reloc->sym_ptr_ptr = (void *)udata;
+ reloc->addend = fixp->fx_addnumber;
+
+ default:
+ break;
+ }
#endif
+
+ return reloc;
}
-#endif /* OBJ_ECOFF */
-/* Called internally to handle all alignment needs. This takes care
- of eliding calls to frag_align if'n the cached current alignment
- says we've already got it, as well as taking care of the auto-align
- feature wrt labels. */
+/* Parse a register name off of the input_line and return a register
+ number. Gets md_undefined_symbol above to do the register name
+ matching for us.
-static void
-alpha_align (n, pfill, label, force)
- int n;
- char *pfill;
- symbolS *label;
- int force;
+ Only called as a part of processing the ECOFF .frame directive. */
+
+int
+tc_get_register (int frame ATTRIBUTE_UNUSED)
{
- if (alpha_current_align >= n)
- return;
+ int framereg = AXP_REG_SP;
- if (pfill == NULL)
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer == '$')
{
- if (n > 2
- && (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0)
- {
- static char const unop[4] = { 0x00, 0x00, 0xe0, 0x2f };
- static char const nopunop[8] = {
- 0x1f, 0x04, 0xff, 0x47,
- 0x00, 0x00, 0xe0, 0x2f
- };
-
- /* First, make sure we're on a four-byte boundary, in case
- someone has been putting .byte values into the text
- section. The DEC assembler silently fills with unaligned
- no-op instructions. This will zero-fill, then nop-fill
- with proper alignment. */
- if (alpha_current_align < 2)
- frag_align (2, 0, 0);
- if (alpha_current_align < 3)
- frag_align_pattern (3, unop, sizeof unop, 0);
- if (n > 3)
- frag_align_pattern (n, nopunop, sizeof nopunop, 0);
- }
- else
- frag_align (n, 0, 0);
+ char *s = input_line_pointer;
+ char c = get_symbol_end ();
+ symbolS *sym = md_undefined_symbol (s);
+
+ *strchr (s, '\0') = c;
+ if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
+ goto found;
}
- else
- frag_align (n, *pfill, 0);
+ as_warn (_("frame reg expected, using $%d."), framereg);
- alpha_current_align = n;
+found:
+ note_gpreg (framereg);
+ return framereg;
+}
- if (label != NULL)
- {
- assert (S_GET_SEGMENT (label) == now_seg);
- label->sy_frag = frag_now;
- S_SET_VALUE (label, (valueT) frag_now_fix ());
- }
+/* This is called before the symbol table is processed. In order to
+ work with gcc when using mips-tfile, we must keep all local labels.
+ However, in other cases, we want to discard them. If we were
+ called with -g, but we didn't see any debugging information, it may
+ mean that gcc is smuggling debugging information through to
+ mips-tfile, in which case we must generate all local labels. */
- record_alignment(now_seg, n);
+#ifdef OBJ_ECOFF
- /* ??? if alpha_flag_relax && force && elf, record the requested alignment
- in a reloc for the linker to see. */
+void
+alpha_frob_file_before_adjust (void)
+{
+ if (alpha_debug != 0
+ && ! ecoff_debugging_seen)
+ flag_keep_locals = 1;
}
+#endif /* OBJ_ECOFF */
+
/* The Alpha has support for some VAX floating point types, as well as for
IEEE floating point. We consider IEEE to be the primary floating point
format, and sneak in the VAX floating point support here. */
-#define md_atof vax_md_atof
#include "config/atof-vax.c"
projects / thirdparty / binutils-gdb.git / blobdiff