Update year range in copyright notice of binutils files

[thirdparty/binutils-gdb.git] / gas / config / tc-metag.c

diff --git a/gas/config/tc-metag.c b/gas/config/tc-metag.c
index 1c459241a6a86676dccca4bc3a41a28f3f6514fa..259230777954cd2ff339af7d7da74541353b9de4 100644 (file)
--- a/gas/config/tc-metag.c
+++ b/gas/config/tc-metag.c
@@ -1,5 +1,5 @@
 /* tc-metag.c -- Assembler for the Imagination Technologies Meta.
-   Copyright (C) 2013-2016 Free Software Foundation, Inc.
+   Copyright (C) 2013-2021 Free Software Foundation, Inc.
    Contributed by Imagination Technologies Ltd.
 
    This file is part of GAS, the GNU Assembler.
@@ -24,7 +24,6 @@
 #include "symcat.h"
 #include "safe-ctype.h"
 #include "hashtab.h"
-#include "libbfd.h"
 
 #include <stdio.h>
 
@@ -636,7 +635,7 @@ parse_addr_op (const char *line, metag_addr *addr)
   return NULL;
 }
 
-/* Parse the immediate portion of an addrssing mode.  */
+/* Parse the immediate portion of an addressing mode.  */
 static const char *
 parse_imm_addr (const char *line, metag_addr *addr)
 {
@@ -2041,6 +2040,7 @@ parse_swap (const char *line, metag_insn *insn,
          as_bad (_("PC, CT, TR and TT are treated as if they are a single unit but operands must be in different units"));
          return NULL;
        }
+      break;
 
     default:
       /* Registers must be in different units.  */
@@ -2683,6 +2683,7 @@ parse_alu (const char *line, metag_insn *insn,
              insn->bits |= (1 << 7);
              break;
            }
+         /* Fall through.  */
        default:
          as_bad (_("invalid quickrot register specified"));
          return NULL;
@@ -4098,7 +4099,7 @@ __parse_dsp_reg (const char *line, const metag_reg **reg, htab_t dsp_regtab)
   /* We don't entirely strip the register name because we might
      actually want to match whole string in the register table,
      e.g. "D0AW.1++" not just "D0AW.1". The string length of the table
-     entry limits our comaprison to a reasonable bound anyway.  */
+     entry limits our comparison to a reasonable bound anyway.  */
   while (is_register_char (*l) || *l == PLUS)
     {
       name[len] = *l;
@@ -4716,7 +4717,7 @@ parse_dtemplate (const char *line, metag_insn *insn,
   return l;
 }
 
-/* Parse a DSP Template definiton memory reference, e.g
+/* Parse a DSP Template definition memory reference, e.g
    [A0.7+A0.5++]. DSPRAM is set to true by this function if this
    template definition is a DSP RAM template definition.  */
 static const char *
@@ -4738,7 +4739,7 @@ template_mem_ref(const char *line, metag_addr *addr,
   return l;
 }
 
-/* Sets LOAD to TRUE if this is a Template load definiton (otherwise
+/* Sets LOAD to TRUE if this is a Template load definition (otherwise
    it's a store). Fills out ADDR, TEMPLATE_REG and ADDR_UNIT.  */
 static const char *
 parse_template_regs (const char *line, bfd_boolean *load,
@@ -5339,7 +5340,7 @@ parse_dalu (const char *line, metag_insn *insn,
              /* Only MOV instructions have a DSP register as a
                 destination. Set the MOV DSPe.r opcode. The simple
                 OR'ing is OK because the usual MOV opcode is 0x00.  */
-             insn->bits = (0x91 << 24);
+             insn->bits = 0x91u << 24;
              du_shift = 0;
              l1_shift = 2;
              regs_shift[0] = 19;
@@ -5454,7 +5455,7 @@ parse_dalu (const char *line, metag_insn *insn,
                          du_shift = 0;
                          l1_shift = 2;
                          regs_shift[1] = 14;
-                         insn->bits = (0x92 << 24); /* Set opcode.  */
+                         insn->bits = 0x92u << 24; /* Set opcode.  */
                        }
                    }
                }
@@ -5505,7 +5506,7 @@ parse_dalu (const char *line, metag_insn *insn,
          insn->bits |= (1 << 2);
        }
 
-      /* Check for template definitons.  */
+      /* Check for template definitions.  */
       if (IS_TEMPLATE_DEF (insn))
        {
          l = interpret_template_regs(l, insn, regs, regs_shift, &load,
@@ -5625,7 +5626,7 @@ parse_dalu (const char *line, metag_insn *insn,
   if ((template->meta_opcode >> 26) & 0x1)
     ls_shift = INVALID_SHIFT;
 
-  /* The Condition Is Always (CA) bit must be set if we're targetting a
+  /* The Condition Is Always (CA) bit must be set if we're targeting a
      Ux.r register as the destination. This means that we can't have
      any other condition bits set.  */
   if (!is_same_data_unit (regs[1]->unit, regs[0]->unit))
@@ -6416,7 +6417,7 @@ create_dspreg_htabs (void)
 
       /* Make sure there are no hash table collisions, which would
         require chaining entries.  */
-      BFD_ASSERT (*slot == NULL);
+      gas_assert (*slot == NULL);
       *slot = reg;
     }
 
@@ -6439,7 +6440,7 @@ create_dspreg_htabs (void)
 
          /* Make sure there are no hash table collisions, which would
             require chaining entries.  */
-         BFD_ASSERT (*slot == NULL);
+         gas_assert (*slot == NULL);
          *slot = reg;
        }
     }
@@ -6486,7 +6487,7 @@ create_scond_htab (void)
                                                        scond, INSERT);
       /* Make sure there are no hash table collisions, which would
         require chaining entries.  */
-      BFD_ASSERT (*slot == NULL);
+      gas_assert (*slot == NULL);
       *slot = scond;
     }
 }
@@ -6704,9 +6705,6 @@ md_number_to_chars (char * buf, valueT val, int n)
    emitted is stored in *sizeP .  An error message is returned, or NULL on OK.
 */
 
-/* Equal to MAX_PRECISION in atof-ieee.c */
-#define MAX_LITTLENUMS 6
-
 const char *
 md_atof (int type, char * litP, int * sizeP)
 {
@@ -6847,7 +6845,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, segT sec ATTRIBUTE_UNUSED,
 void
 metag_handle_align (fragS * fragP)
 {
-  static char const noop[4] = { 0xfe, 0xff, 0xff, 0xa0 };
+  static unsigned char const noop[4] = { 0xfe, 0xff, 0xff, 0xa0 };
   int bytes, fix;
   char *p;
 
@@ -7032,7 +7030,7 @@ tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
 static unsigned int
 md_chars_to_number (char *val, int n)
 {
-  int retval;
+  unsigned int retval;
   unsigned char * where = (unsigned char *) val;
 
   for (retval = 0; n--;)
@@ -7110,6 +7108,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
       break;
     case BFD_RELOC_64:
       md_number_to_chars (buf, value, 8);
+      break;
 
     case BFD_RELOC_METAG_RELBRANCH:
       if (!value)