/* tc-mn10300.c -- Assembler code for the Matsushita 10300
- Copyright (C) 1996-2015 Free Software Foundation, Inc.
+ Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
};
-/* Set linkrelax here to avoid fixups in most sections. */
-int linkrelax = 1;
-
static int current_machine;
/* Fixups. */
#define HAVE_AM30 (current_machine == AM30)
/* Opcode hash table. */
-static struct hash_control *mn10300_hash;
+static htab_t mn10300_hash;
/* This table is sorted. Suitable for searching by a binary search. */
static const struct reg_name data_registers[] =
#define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers)
/* Perform a binary search of the given register table REGS to see
- if NAME is a valid regiter name. Returns the register number from
+ if NAME is a valid register name. Returns the register number from
the array on success, or -1 on failure. */
static int
}
int
-md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED)
+md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED)
{
return 0;
}
return 0;
}
-char *
+const char *
md_atof (int type, char *litp, int *sizep)
{
return ieee_md_atof (type, litp, sizep, FALSE);
/* Create a fixup for the reversed conditional branch. */
sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
fix_new (fragP, fragP->fr_fix + 1, 1,
- symbol_new (buf, sec, 0, fragP->fr_next),
+ symbol_new (buf, sec, fragP->fr_next, 0),
fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
/* Now create the unconditional branch + fixup to the
/* Create a fixup for the reversed conditional branch. */
sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
fix_new (fragP, fragP->fr_fix + 1, 1,
- symbol_new (buf, sec, 0, fragP->fr_next),
+ symbol_new (buf, sec, fragP->fr_next, 0),
fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
/* Now create the unconditional branch + fixup to the
/* Create a fixup for the reversed conditional branch. */
sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
fix_new (fragP, fragP->fr_fix + 2, 1,
- symbol_new (buf, sec, 0, fragP->fr_next),
+ symbol_new (buf, sec, fragP->fr_next, 0),
fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
/* Now create the unconditional branch + fixup to the
/* Create a fixup for the reversed conditional branch. */
sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
fix_new (fragP, fragP->fr_fix + 2, 1,
- symbol_new (buf, sec, 0, fragP->fr_next),
+ symbol_new (buf, sec, fragP->fr_next, 0),
fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
/* Now create the unconditional branch + fixup to the
/* Create a fixup for the reversed conditional branch. */
sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
fix_new (fragP, fragP->fr_fix + 2, 1,
- symbol_new (buf, sec, 0, fragP->fr_next),
+ symbol_new (buf, sec, fragP->fr_next, 0),
fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
/* Now create the unconditional branch + fixup to the
/* Create a fixup for the reversed conditional branch. */
sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
fix_new (fragP, fragP->fr_fix + 2, 1,
- symbol_new (buf, sec, 0, fragP->fr_next),
+ symbol_new (buf, sec, fragP->fr_next, 0),
fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
/* Now create the unconditional branch + fixup to the
valueT
md_section_align (asection *seg, valueT addr)
{
- int align = bfd_get_section_alignment (stdoutput, seg);
+ int align = bfd_section_alignment (seg);
- return ((addr + (1 << align) - 1) & (-1 << align));
+ return ((addr + (1 << align) - 1) & -(1 << align));
}
void
md_begin (void)
{
- char *prev_name = "";
+ const char *prev_name = "";
const struct mn10300_opcode *op;
- mn10300_hash = hash_new ();
+ mn10300_hash = str_htab_create ();
/* Insert unique names into hash table. The MN10300 instruction set
has many identical opcode names that have different opcodes based
if (strcmp (prev_name, op->name))
{
prev_name = (char *) op->name;
- hash_insert (mn10300_hash, op->name, (char *) op);
+ str_hash_insert (mn10300_hash, op->name, op, 0);
}
op++;
}
current_machine = MN103;
#endif
+
+ /* Set linkrelax here to avoid fixups in most sections. */
+ linkrelax = 1;
}
static symbolS *GOT_symbol;
*s++ = '\0';
/* Find the first opcode with the proper name. */
- opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
+ opcode = (struct mn10300_opcode *) str_hash_find (mn10300_hash, str);
if (opcode == NULL)
{
as_bad (_("Unrecognized opcode: `%s'"), str);
break;
}
-keep_going:
+ keep_going:
str = input_line_pointer;
input_line_pointer = hold;
as the size of a pointer, so we need a union to convert
the opindex field of the fr_cgen structure into a char *
so that it can be stored in the frag. We do not have
- to worry about loosing accuracy as we are not going to
+ to worry about losing accuracy as we are not going to
be even close to the 32bit limit of the int. */
union
{
static arelent * relocs[MAX_RELOC_EXPANSION + 1];
arelent *reloc;
- reloc = xmalloc (sizeof (arelent));
+ reloc = XNEW (arelent);
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
if (reloc->howto == NULL)
even local symbols defined in the same section. */
if (ssec != absolute_section || asec != absolute_section)
{
- arelent * reloc2 = xmalloc (sizeof * reloc);
+ arelent * reloc2 = XNEW (arelent);
relocs[0] = reloc2;
relocs[1] = reloc;
reloc2->address = reloc->address;
reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF);
reloc2->addend = - S_GET_VALUE (fixp->fx_subsy);
- reloc2->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ reloc2->sym_ptr_ptr = XNEW (asymbol *);
*reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
reloc->addend = fixp->fx_offset;
}
else
{
- reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ reloc->sym_ptr_ptr = XNEW (asymbol *);
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
}
}
else
{
- reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ reloc->sym_ptr_ptr = XNEW (asymbol *);
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->addend = fixp->fx_offset;
}
/* Likewise, do not adjust symbols that won't be merged, or debug
symbols, because they too break relaxation. We do want to adjust
- other mergable symbols, like .rodata, because code relaxations
+ other mergeable symbols, like .rodata, because code relaxations
need section-relative symbols to properly relax them. */
if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE))
return FALSE;
}
static inline char *
-mn10300_end_of_match (char *cont, char *what)
+mn10300_end_of_match (char *cont, const char *what)
{
int len = strlen (what);
&& now_seg != bss_section
/* Do not create relocs for the merging sections - such
relocs will prevent the contents from being merged. */
- && (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0)
+ && (bfd_section_flags (now_seg) & SEC_MERGE) == 0)
/* Create a new fixup to record the alignment request. The symbol is
- irrelevent but must be present so we use the absolute section symbol.
+ irrelevant but must be present so we use the absolute section symbol.
The offset from the symbol is used to record the power-of-two alignment
value. The size is set to 0 because the frag may already be aligned,
thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
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