-@c Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
+@c Copyright (C) 1991-2014 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@cindex options, M680x0
@cindex M680x0 options
The Motorola 680x0 version of @code{@value{AS}} has a few machine
-dependent options.
+dependent options:
+
+@table @samp
+
+@cindex @samp{-march=} command line option, M680x0
+@item -march=@var{architecture}
+This option specifies a target architecture. The following
+architectures are recognized:
+@code{68000},
+@code{68010},
+@code{68020},
+@code{68030},
+@code{68040},
+@code{68060},
+@code{cpu32},
+@code{isaa},
+@code{isaaplus},
+@code{isab},
+@code{isac} and
+@code{cfv4e}.
+
+
+@cindex @samp{-mcpu=} command line option, M680x0
+@item -mcpu=@var{cpu}
+This option specifies a target cpu. When used in conjunction with the
+@option{-march} option, the cpu must be within the specified
+architecture. Also, the generic features of the architecture are used
+for instruction generation, rather than those of the specific chip.
+
+@cindex @samp{-m[no-]68851} command line option, M680x0
+@cindex @samp{-m[no-]68881} command line option, M680x0
+@cindex @samp{-m[no-]div} command line option, M680x0
+@cindex @samp{-m[no-]usp} command line option, M680x0
+@cindex @samp{-m[no-]float} command line option, M680x0
+@cindex @samp{-m[no-]mac} command line option, M680x0
+@cindex @samp{-m[no-]emac} command line option, M680x0
+@item -m[no-]68851
+@itemx -m[no-]68881
+@itemx -m[no-]div
+@itemx -m[no-]usp
+@itemx -m[no-]float
+@itemx -m[no-]mac
+@itemx -m[no-]emac
+
+Enable or disable various architecture specific features. If a chip
+or architecture by default supports an option (for instance
+@option{-march=isaaplus} includes the @option{-mdiv} option),
+explicitly disabling the option will override the default.
@cindex @samp{-l} option, M680x0
+@item -l
You can use the @samp{-l} option to shorten the size of references to undefined
symbols. If you do not use the @samp{-l} option, references to undefined
symbols are wide enough for a full @code{long} (32 bits). (Since
you know that the relevant symbols are always less than 17 bits away.
@cindex @samp{--register-prefix-optional} option, M680x0
+@item --register-prefix-optional
For some configurations, especially those where the compiler normally
does not prepend an underscore to the names of user variables, the
assembler requires a @samp{%} before any use of a register name. This
names.
@cindex @samp{--bitwise-or} option, M680x0
+@item --bitwise-or
Normally the character @samp{|} is treated as a comment character, which
means that it can not be used in expressions. The @samp{--bitwise-or}
option turns @samp{|} into a normal character. In this mode, you must
@cindex @samp{--base-size-default-16}
@cindex @samp{--base-size-default-32}
+@item --base-size-default-16 --base-size-default-32
If you use an addressing mode with a base register without specifying
the size, @code{@value{AS}} will normally use the full 32 bit value.
For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to
@cindex @samp{--disp-size-default-16}
@cindex @samp{--disp-size-default-32}
+@item --disp-size-default-16 --disp-size-default-32
If you use an addressing mode with a displacement, and the value of the
displacement is not known, @code{@value{AS}} will normally assume that
the value is 32 bits. For example, if the symbol @samp{disp} has not
@samp{disp} is a 16 bit value. You may use the
@samp{--disp-size-default-32} option to restore the default behaviour.
+@cindex @samp{--pcrel}
+@item --pcrel
+Always keep branches PC-relative. In the M680x0 architecture all branches
+are defined as PC-relative. However, on some processors they are limited
+to word displacements maximum. When @code{@value{AS}} needs a long branch
+that is not available, it normally emits an absolute jump instead. This
+option disables this substitution. When this option is given and no long
+branches are available, only word branches will be emitted. An error
+message will be generated if a word branch cannot reach its target. This
+option has no effect on 68020 and other processors that have long branches.
+@pxref{M68K-Branch,,Branch Improvement}.
+
@cindex @samp{-m68000} and related options
@cindex architecture options, M680x0
@cindex M680x0 architecture options
+@item -m68000
@code{@value{AS}} can assemble code for several different members of the
Motorola 680x0 family. The default depends upon how @code{@value{AS}}
was configured when it was built; normally, the default is to assemble
Assemble for the CPU32 family of chips.
@item -m5200
+@itemx -m5202
+@itemx -m5204
+@itemx -m5206
+@itemx -m5206e
+@itemx -m521x
+@itemx -m5249
+@itemx -m528x
+@itemx -m5307
+@itemx -m5407
+@itemx -m547x
+@itemx -m548x
+@itemx -mcfv4
+@itemx -mcfv4e
Assemble for the ColdFire family of chips.
@item -m68881
68000, 68010, and the CPU32. The 68040 accepts a somewhat different set
of MMU instructions.
@end table
+@end table
@node M68K-Syntax
@section Syntax
@item Address Register
@samp{%a0} through @samp{%a7}@*
-@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6}
+@samp{%a7} is also known as @samp{%sp}, i.e., the Stack Pointer. @code{%a6}
is also known as @samp{%fp}, the Frame Pointer.
@item Address Register Indirect
@table @dfn
@item Address Register Indirect
-@samp{(%a0)} through @samp{(%a7)}@*
-@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6}
+@samp{(%a0)} through @samp{(%a7)}@*
+@samp{%a7} is also known as @samp{%sp}, i.e., the Stack Pointer. @code{%a6}
is also known as @samp{%fp}, the Frame Pointer.
@item Address Register Postincrement
@cindex @code{skip} directive, M680x0
@item .skip
This directive is identical to a @code{.space} directive.
+
+@cindex @code{arch} directive, M680x0
+@item .arch @var{name}
+Select the target architecture and extension features. Valid values
+for @var{name} are the same as for the @option{-march} command line
+option. This directive cannot be specified after
+any instructions have been assembled. If it is given multiple times,
+or in conjunction with the @option{-march} option, all uses must be for
+the same architecture and extension set.
+
+@cindex @code{cpu} directive, M680x0
+@item .cpu @var{name}
+Select the target cpu. Valid valuse
+for @var{name} are the same as for the @option{-mcpu} command line
+option. This directive cannot be specified after
+any instructions have been assembled. If it is given multiple times,
+or in conjunction with the @option{-mopt} option, all uses must be for
+the same cpu.
+
@end table
@need 2000
@smallexample
Displacement
- +-------------------------------------------------
- | 68020 68000/10
-Pseudo-Op |BYTE WORD LONG LONG non-PC relative
- +-------------------------------------------------
- jbsr |bsrs bsr bsrl jsr jsr
- jra |bras bra bral jmp jmp
-* jXX |bXXs bXX bXXl bNXs;jmpl bNXs;jmp
-* dbXX |dbXX dbXX dbXX; bra; jmpl
-* fjXX |fbXXw fbXXw fbXXl fbNXw;jmp
+ +------------------------------------------------------------
+ | 68020 68000/10, not PC-relative OK
+Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP **
+ +------------------------------------------------------------
+ jbsr |bsrs bsrw bsrl jsr
+ jra |bras braw bral jmp
+* jXX |bXXs bXXw bXXl bNXs;jmp
+* dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp
+ fjXX | N/A fbXXw fbXXl N/A
XX: condition
NX: negative of condition XX
@end smallexample
@center @code{*}---see full description below
+@center @code{**}---this expansion mode is disallowed by @samp{--pcrel}
@table @code
@item jbsr
@itemx jra
These are the simplest jump pseudo-operations; they always map to one
particular machine instruction, depending on the displacement to the
-branch target.
+branch target. This instruction will be a byte or word branch is that
+is sufficient. Otherwise, a long branch will be emitted if available.
+If no long branches are available and the @samp{--pcrel} option is not
+given, an absolute long jump will be emitted instead. If no long
+branches are available, the @samp{--pcrel} option is given, and a word
+branch cannot reach the target, an error message is generated.
+
+In addition to standard branch operands, @code{@value{AS}} allows these
+pseudo-operations to have all operands that are allowed for jsr and jmp,
+substituting these instructions if the operand given is not valid for a
+branch instruction.
@item j@var{XX}
Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations,
jvs jpl jmi jge jlt jgt jle
@end smallexample
-For the cases of non-PC relative displacements and long displacements on
-the 68000 or 68010, @code{@value{AS}} issues a longer code fragment in terms of
-@var{NX}, the opposite condition to @var{XX}. For example, for the
-non-PC relative case:
+Usually, each of these pseudo-operations expands to a single branch
+instruction. However, if a word branch is not sufficient, no long branches
+are available, and the @samp{--pcrel} option is not given, @code{@value{AS}}
+issues a longer code fragment in terms of @var{NX}, the opposite condition
+to @var{XX}. For example, under these conditions:
@smallexample
j@var{XX} foo
@end smallexample
dbf dbra dbt
@end smallexample
-Other than for word and byte displacements, when the source reads
+Motorola @samp{db@var{XX}} instructions allow word displacements only. When
+a word displacement is sufficient, each of these pseudo-operations expands
+to the corresponding Motorola instruction. When a word displacement is not
+sufficient and long branches are available, when the source reads
@samp{db@var{XX} foo}, @code{@value{AS}} emits
@smallexample
db@var{XX} oo1
- bra oo2
- oo1:jmpl foo
+ bras oo2
+ oo1:bral foo
+ oo2:
+@end smallexample
+
+If, however, long branches are not available and the @samp{--pcrel} option is
+not given, @code{@value{AS}} emits
+@smallexample
+ db@var{XX} oo1
+ bras oo2
+ oo1:jmp foo
oo2:
@end smallexample
fjugt fjule fjult fjun
@end smallexample
-For branch targets that are not PC relative, @code{@value{AS}} emits
-@smallexample
- fb@var{NX} oof
- jmp foo
- oof:
-@end smallexample
-when it encounters @samp{fj@var{XX} foo}.
+Each of these pseudo-operations always expands to a single Motorola
+coprocessor branch instruction, word or long. All Motorola coprocessor
+branch instructions allow both word and long displacements.
@end table
@subsection Special Characters
@cindex special characters, M680x0
-@cindex M680x0 immediate character
-@cindex immediate character, M680x0
+
@cindex M680x0 line comment character
@cindex line comment character, M680x0
@cindex comments, M680x0
-The immediate character is @samp{#} for Sun compatibility. The
-line-comment character is @samp{|} (unless the @samp{--bitwise-or}
-option is used). If a @samp{#} appears at the beginning of a line, it
-is treated as a comment unless it looks like @samp{# line file}, in
-which case it is treated normally.
+Line comments are introduced by the @samp{|} character appearing
+anywhere on a line, unless the @option{--bitwise-or} command line option
+has been specified.
+
+An asterisk (@samp{*}) as the first character on a line marks the
+start of a line comment as well.
+
+@cindex M680x0 immediate character
+@cindex immediate character, M680x0
+
+A hash character (@samp{#}) as the first character on a line also
+marks the start of a line comment, but in this case it could also be a
+logical line number directive (@pxref{Comments}) or a preprocessor
+control command (@pxref{Preprocessing}). If the hash character
+appears elsewhere on a line it is used to introduce an immediate
+value. (This is for compatibility with Sun's assembler).
+
+@cindex M680x0 line separator
+@cindex line separator, M680x0
+Multiple statements on the same line can appear if they are separated
+by the @samp{;} character.
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