-@c Copyright 2002-2013 Free Software Foundation, Inc.
+@c Copyright (C) 2002-2021 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@table @code
@item -mmcu
-selects the mpu arch. If the architecture is 430Xv2 then this also
-enables NOP generation unless the @option{-mN} is also specified.
+selects the mcu architecture. If the architecture is 430Xv2 then this
+also enables NOP generation unless the @option{-mN} is also specified.
@item -mcpu
selects the cpu architecture. If the architecture is 430Xv2 then this
-also enables NOP generation unless the @option{-mN} is also
-specified.
+also enables NOP generation unless the @option{-mN} is also specified.
+
+@item -msilicon-errata=@var{name}[,@var{name}@dots{}]
+Implements a fixup for named silicon errata. Multiple silicon errata
+can be specified by multiple uses of the @option{-msilicon-errata}
+option and/or by including the errata names, separated by commas, on
+an individual @option{-msilicon-errata} option. Errata names
+currently recognised by the assembler are:
+
+@table @code
+@item cpu4
+@code{PUSH #4} and @option{PUSH #8} need longer encodings on the
+MSP430. This option is enabled by default, and cannot be disabled.
+@item cpu8
+Do not set the @code{SP} to an odd value.
+@item cpu11
+Do not update the @code{SR} and the @code{PC} in the same instruction.
+@item cpu12
+Do not use the @code{PC} in a @code{CMP} or @code{BIT} instruction.
+@item cpu13
+Do not use an arithmetic instruction to modify the @code{SR}.
+@item cpu19
+Insert @code{NOP} after @code{CPUOFF}.
+@end table
+
+@item -msilicon-errata-warn=@var{name}[,@var{name}@dots{}]
+Like the @option{-msilicon-errata} option except that instead of
+fixing the specified errata, a warning message is issued instead.
+This option can be used alongside @option{-msilicon-errata} to
+generate messages whenever a problem is fixed, or on its own in order
+to inspect code for potential problems.
@item -mP
enables polymorph instructions handler.
@item -ml
indicates that the input uses the large code model.
+@item -mn
+enables the generation of a NOP instruction following any instruction
+that might change the interrupts enabled/disabled state. The
+pipelined nature of the MSP430 core means that any instruction that
+changes the interrupt state (@code{EINT}, @code{DINT}, @code{BIC #8,
+SR}, @code{BIS #8, SR} or @code{MOV.W <>, SR}) must be
+followed by a NOP instruction in order to ensure the correct
+processing of interrupts. By default it is up to the programmer to
+supply these NOP instructions, but this command-line option enables
+the automatic insertion by the assembler, if they are missing.
+
@item -mN
disables the generation of a NOP instruction following any instruction
-that might change the interrupts enabled/disabled state. For the
-430Xv2 architecture the instructions: @code{EINT}, @code{DINT},
-@code{BIC #8, SR}, @code{BIS #8, SR} and @code{MOV.W <>, SR} must be
-followed by a NOP instruction in order to ensure the correct
-processing of interrupts. By default generation of the NOP
-instruction happens automatically, but this command line option
-disables this behaviour. It is then up to the programmer to ensure
-that interrupts are enabled and disabled correctly.
+that might change the interrupts enabled/disabled state. This is the
+default behaviour.
+
+@item -my
+tells the assembler to generate a warning message if a NOP does not
+immediately follow an instruction that enables or disables
+interrupts. This is the default.
+
+Note that this option can be stacked with the @option{-mn} option so
+that the assembler will both warn about missing NOP instructions and
+then insert them automatically.
+
+@item -mY
+disables warnings about missing NOP instructions.
@item -md
mark the object file as one that requires data to copied from ROM to
RAM at execution startup. Disabled by default.
+@item -mdata-region=@var{region}
+Select the region data will be placed in.
+Region placement is performed by the compiler and linker. The only effect this
+option will have on the assembler is that if @var{upper} or @var{either} is
+selected, then the symbols to initialise high data and bss will be defined.
+Valid @var{region} values are:
+@table @code
+@item none
+@item lower
+@item upper
+@item either
+@end table
+
@end table
@node MSP430 Syntax
@cindex @code{arch} directive, MSP 430
@item .arch
Sets the target microcontroller in the same way as the @option{-mmcu}
-command line option.
+command-line option.
@cindex @code{cpu} directive, MSP 430
@item .cpu
Sets the target architecture in the same way as the @option{-mcpu}
-command line option.
+command-line option.
@cindex @code{profiler} directive, MSP 430
@item .profiler
This directive instructs assembler to add new profile entry to the object file.
+@cindex @code{refsym} directive, MSP 430
+@item .refsym
+This directive instructs assembler to add an undefined reference to
+the symbol following the directive. The maximum symbol name length is
+1023 characters. No relocation is created for this symbol; it will
+exist purely for pulling in object files from archives. Note that
+this reloc is not sufficient to prevent garbage collection; use a
+KEEP() directive in the linker file to preserve such objects.
+
+@cindex @code{mspabi_attribute} directive, MSP430
+@item .mspabi_attribute
+This directive tells the assembler what the MSPABI build attributes for this
+file are. This is used for validating the command line options passed to
+the assembler against the options the original source file was compiled with.
+The expected format is:
+@samp{.mspabi_attribute tag_name, tag_value}
+For example, to set the tag @code{OFBA_MSPABI_Tag_ISA} to @code{MSP430X}:
+@samp{.mspabi_attribute 4, 2}
+
+See the @cite{MSP430 EABI, document slaa534} for the details on tag names and
+values.
@end table
@node MSP430 Opcodes