subg x1, x2, #0x3f0, -4
# STG/STZG/ST2G/LDG : Fail imm
- stg [x1, #15]
- stzg [x1, #-4097]!
- st2g [x1], #4096
+ stg x2, [x1, #15]
+ stzg x2, [x1, #-4097]!
+ st2g x2, [x1], #4096
ldg x1, [x2, #33]
ldg x1, [x2, #4112]
stzgm x2, [x3, #16]
stzgm x4, [x5, #16]!
+ # LDGM/STGM
+ ldgm x2, [x3, #16]
+ ldgm x4, [x5, #16]!
+ stgm x2, [x3, #16]
+ stgm x4, [x5, #16]!
+
# Illegal SP/XZR registers
irg xzr, x2, x3
irg x1, xzr, x3
subps x1, x2, xzr
cmpp xzr, x2
cmpp x2, xzr
- stg [xzr, #0]
- st2g [xzr, #0]!
- stzg [xzr], #0
- stz2g [xzr, #0]
+ stg x2, [xzr, #0]
+ st2g x2, [xzr, #0]!
+ stzg x2, [xzr], #0
+ stz2g x2, [xzr, #0]
+ stg xzr, [x2, #0]
+ st2g xzr, [x2, #0]!
+ stzg xzr, [x2], #0
+ stz2g xzr, [x2, #0]
stgp sp, x2, [x3]
stgp x1, sp, [x3]
stgp x0, x0, [xzr]
ldg x0, [xzr, #16]
stzgm x0, [xzr]
stzgm sp, [x3]
+ # Xt == Xn with writeback should not complain
+ st2g x2, [x2, #0]!
+ stzg x2, [x2], #0
+ ldgm x0, [xzr]
+ ldgm sp, [x3]
+ stgm x0, [xzr]
+ stgm sp, [x3]