/* illegal.s Test file for AArch64 instructions that should be rejected
by the assembler.
- Copyright 2011, 2012 Free Software Foundation, Inc. Contributed by ARM Ltd.
+ Copyright (C) 2011-2021 Free Software Foundation, Inc. Contributed by ARM Ltd.
This file is part of GAS.
saddlv q7, v31.2d
smaxv s7, v31.2s
sminv d7, v31.2d
- fmaxv h7, v31.8h
- fmaxv h7, v31.4h
+ fmaxv h7, v31.2h
+ fmaxv s7, v31.4h
fminv d7, v31.2d
abs b0, b31
sshr v0.4h, v1.4h, #20
shl v0.4s, v1.4s, #32
- fcvtzs v0.4h, v1.4h, #2
+ fcvtzs v0.2h, v1.2h, #2
uqshrn v0.2s, v1.2d, 33
uqrshrn v0.2s, v1.2s, 32
sshll v8.8h, v2.8b, #8
prfm PLDL3KEEP, [x9, x15, sxtx #2]
- mrs x5, S1_0_C13_C8_0
+ mrs x5, S1_0_C17_C8_0
msr S3_1_C13_C15_1, x7
msr S3_1_C11_C15_-1, x7
msr S3_1_11_15_1, x7
// No 16-byte relocation
ldr q0, =one_label
+ ands w0, w24, #0xffeefffffffffffd
+
one_label:
+
+ cinc w0, w1, al
+ cinc w0, w1, nv
+ cset w0, al
+ cset w0, nv
+ cinv w0, w1, al
+ cinv w0, w1, nv
+ csetm w0, al
+ csetm w0, nv
+ cneg w0, w1, al
+ cneg w0, w1, nv
+
+ mrs x5, S4_0_C12_C8_0
+ mrs x6, S0_8_C11_C7_5
+ mrs x7, S1_1_C16_C6_6
+ mrs x8, S2_2_C15_C16_7
+ mrs x9, S3_3_C14_C15_8
+
+ fmov s0, #-0.0
+ fmov s0, #0x40000000 // OK
+ fmov s0, #0x80000000
+ fmov s0, #0xc0000000 // OK
+ fmov d0, #-0.0
+ fmov d0, #0x4000000000000000 // OK
+ fmov d0, #0x8000000000000000
+ fmov d0, #0xc000000000000000 // OK
+
+ fcmgt v0.4s, v0.4s, #0.0 // OK
+ fcmgt v0.4s, v0.4s, #0 // OK
+ fcmgt v0.4s, v0.4s, #-0.0
+ fcmgt v0.2d, v0.2d, #0.0 // OK
+ fcmgt v0.2d, v0.2d, #0 // OK
+ fcmgt v0.2d, v0.2d, #-0.0
+
+ # PR 20319: FMOV instructions changing the size from 32 bits
+ # to 64 bits and vice versa are illegal.
+ fmov s9, x0
+ fmov d7, w1
+
+ st1 {v0.16b}[0],[x0]
+ st2 {v0.16b-v1.16b}[1],[x0]
+ st3 {v0.16b-v2.16b}[2],[x0]
+ st4 {v0.8b-v3.8b}[4],[x0]
+
+ // End (for errors during literal pool generation)