* config/sh/tm-sh.h (BELIEVE_PCC_PROMOTION): Define, so that

[thirdparty/binutils-gdb.git] / gas / testsuite / gas / tic80 / endmask.lst

diff --git a/gas/testsuite/gas/tic80/endmask.lst b/gas/testsuite/gas/tic80/endmask.lst
index e41f78652cea6e6659c1ce2eb596d70e237775a9..9103b33dd715d4432fd607690fe8f9c311b9bd78 100644 (file)
--- a/gas/testsuite/gas/tic80/endmask.lst
+++ b/gas/testsuite/gas/tic80/endmask.lst
@@ -1,45 +1,45 @@
-MVP MP Macro Assembler     Version 1.13     Mon Feb 10 17:00:29 1997\r
-Copyright (c) 1993-1995    Texas Instruments Incorporated \r
-\r
-endmask.s                                                            PAGE    1\r
-\r
-        1                     ;; Test all possible combinations of the endmask in bits 5-9.\r
-        2                     ;; The mask that is used is computed as 2**bits-1 where bits\r
-        3                     ;; are the bits 5-9 from the instruction.  Note that 0 and 32\r
-        4                     ;; are treated identically, and disassembled as 0.\r
-        5                     \r
-        6 00000000   49C70005         sl.iz   5,0,r7,r9\r
-        7 00000004   49C70025         sl.iz   5,1,r7,r9\r
-        8 00000008   49C70045         sl.iz   5,2,r7,r9\r
-        9 0000000C   49C70065         sl.iz   5,3,r7,r9\r
-       10 00000010   49C70085         sl.iz   5,4,r7,r9\r
-       11 00000014   49C700A5         sl.iz   5,5,r7,r9\r
-       12 00000018   49C700C5         sl.iz   5,6,r7,r9\r
-       13 0000001C   49C700E5         sl.iz   5,7,r7,r9\r
-       14 00000020   49C70105         sl.iz   5,8,r7,r9\r
-       15 00000024   49C70125         sl.iz   5,9,r7,r9\r
-       16 00000028   49C70145         sl.iz   5,10,r7,r9\r
-       17 0000002C   49C70165         sl.iz   5,11,r7,r9\r
-       18 00000030   49C70185         sl.iz   5,12,r7,r9\r
-       19 00000034   49C701A5         sl.iz   5,13,r7,r9\r
-       20 00000038   49C701C5         sl.iz   5,14,r7,r9\r
-       21 0000003C   49C701E5         sl.iz   5,15,r7,r9\r
-       22 00000040   49C70205         sl.iz   5,16,r7,r9\r
-       23 00000044   49C70225         sl.iz   5,17,r7,r9\r
-       24 00000048   49C70245         sl.iz   5,18,r7,r9\r
-       25 0000004C   49C70265         sl.iz   5,19,r7,r9\r
-       26 00000050   49C70285         sl.iz   5,20,r7,r9\r
-       27 00000054   49C702A5         sl.iz   5,21,r7,r9\r
-       28 00000058   49C702C5         sl.iz   5,22,r7,r9\r
-       29 0000005C   49C702E5         sl.iz   5,23,r7,r9\r
-       30 00000060   49C70305         sl.iz   5,24,r7,r9\r
-       31 00000064   49C70325         sl.iz   5,25,r7,r9\r
-       32 00000068   49C70345         sl.iz   5,26,r7,r9\r
-       33 0000006C   49C70365         sl.iz   5,27,r7,r9\r
-       34 00000070   49C70385         sl.iz   5,28,r7,r9\r
-       35 00000074   49C703A5         sl.iz   5,29,r7,r9\r
-       36 00000078   49C703C5         sl.iz   5,30,r7,r9\r
-       37 0000007C   49C703E5         sl.iz   5,31,r7,r9\r
-       38 00000080   49C70005         sl.iz   5,32,r7,r9\r
-\r
- No Errors,  No Warnings\r
+MVP MP Macro Assembler     Version 1.13     Mon Feb 10 17:00:29 1997
+Copyright (c) 1993-1995    Texas Instruments Incorporated 
+
+endmask.s                                                            PAGE    1
+
+        1                     ;; Test all possible combinations of the endmask in bits 5-9.
+        2                     ;; The mask that is used is computed as 2**bits-1 where bits
+        3                     ;; are the bits 5-9 from the instruction.  Note that 0 and 32
+        4                     ;; are treated identically, and disassembled as 0.
+        5                     
+        6 00000000   49C70005         sl.iz   5,0,r7,r9
+        7 00000004   49C70025         sl.iz   5,1,r7,r9
+        8 00000008   49C70045         sl.iz   5,2,r7,r9
+        9 0000000C   49C70065         sl.iz   5,3,r7,r9
+       10 00000010   49C70085         sl.iz   5,4,r7,r9
+       11 00000014   49C700A5         sl.iz   5,5,r7,r9
+       12 00000018   49C700C5         sl.iz   5,6,r7,r9
+       13 0000001C   49C700E5         sl.iz   5,7,r7,r9
+       14 00000020   49C70105         sl.iz   5,8,r7,r9
+       15 00000024   49C70125         sl.iz   5,9,r7,r9
+       16 00000028   49C70145         sl.iz   5,10,r7,r9
+       17 0000002C   49C70165         sl.iz   5,11,r7,r9
+       18 00000030   49C70185         sl.iz   5,12,r7,r9
+       19 00000034   49C701A5         sl.iz   5,13,r7,r9
+       20 00000038   49C701C5         sl.iz   5,14,r7,r9
+       21 0000003C   49C701E5         sl.iz   5,15,r7,r9
+       22 00000040   49C70205         sl.iz   5,16,r7,r9
+       23 00000044   49C70225         sl.iz   5,17,r7,r9
+       24 00000048   49C70245         sl.iz   5,18,r7,r9
+       25 0000004C   49C70265         sl.iz   5,19,r7,r9
+       26 00000050   49C70285         sl.iz   5,20,r7,r9
+       27 00000054   49C702A5         sl.iz   5,21,r7,r9
+       28 00000058   49C702C5         sl.iz   5,22,r7,r9
+       29 0000005C   49C702E5         sl.iz   5,23,r7,r9
+       30 00000060   49C70305         sl.iz   5,24,r7,r9
+       31 00000064   49C70325         sl.iz   5,25,r7,r9
+       32 00000068   49C70345         sl.iz   5,26,r7,r9
+       33 0000006C   49C70365         sl.iz   5,27,r7,r9
+       34 00000070   49C70385         sl.iz   5,28,r7,r9
+       35 00000074   49C703A5         sl.iz   5,29,r7,r9
+       36 00000078   49C703C5         sl.iz   5,30,r7,r9
+       37 0000007C   49C703E5         sl.iz   5,31,r7,r9
+       38 00000080   49C70005         sl.iz   5,32,r7,r9
+
+ No Errors,  No Warnings