+2021-10-22 Eric Gallager <egallager@gcc.gnu.org>
+
+ PR other/102663
+ * Makefile.in: Handle dvidir and install-dvi target.
+ * configure: Regenerate.
+ * configure.ac: Add install-dvi to target_list.
+
+2021-10-22 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/install.texi (Binaries): Convert mingw-w64.org to https.
+ (Specific): Ditto.
+
+2021-10-22 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102893
+ * tree-ssa-dce.c (find_obviously_necessary_stmts): Fix the
+ test for an exit edge.
+
+2021-10-22 Aldy Hernandez <aldyh@redhat.com>
+ Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::compute_phi_relations):
+ Kill any global relations we may know before registering a new
+ one.
+ * value-relation.cc (path_oracle::killing_def): New.
+ * value-relation.h (path_oracle::killing_def): New.
+
+2021-10-22 Richard Biener <rguenther@suse.de>
+
+ PR bootstrap/102681
+ * tree-ssa-sccvn.c (vn_phi_insert): For undefined SSA args
+ record VN_TOP.
+ (vn_phi_lookup): Likewise.
+
+2021-10-21 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/98667
+ * doc/invoke.texi: Document -fcf-protection requires i686 or
+ new.
+
+2021-10-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR middle-end/102764
+ * cfgexpand.c (expand_gimple_basic_block): Robustify latest change.
+
+2021-10-21 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/arm_neon.h (__STRUCTN): Delete function
+ macro and all invocations.
+
+2021-10-21 Andrew MacLeod <amacleod@redhat.com>
+
+ * doc/invoke.texi (ranger-debug): Document.
+ * flag-types.h (enum ranger_debug): New.
+ (enum evrp_mode): Remove debug values.
+ * gimple-range-cache.cc (DEBUG_RANGE_CACHE): Use new debug flag.
+ * gimple-range-gori.cc (gori_compute::gori_compute): Ditto.
+ * gimple-range.cc (gimple_ranger::gimple_ranger): Ditto.
+ * gimple-ssa-evrp.c (hybrid_folder::choose_value): Ditto.
+ (execute_early_vrp): Use evrp-mode directly.
+ * params.opt (enum evrp_mode): Remove debug values.
+ (ranger-debug): New.
+ (ranger-logical-depth): Relocate to be in alphabetical order.
+
+2021-10-21 Andrew MacLeod <amacleod@redhat.com>
+
+ * doc/invoke.texi: (vrp1-mode, vrp2-mode): Document.
+ * flag-types.h: (enum vrp_mode): New.
+ * params.opt: (vrp1-mode, vrp2-mode): New.
+ * tree-vrp.c (vrp_pass_num): New.
+ (pass_vrp::pass_vrp): Set pass number.
+ (pass_vrp::execute): Choose which VRP mode to execute.
+
+2021-10-21 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-ssa-evrp.c (class rvrp_folder): Move to tree-vrp.c.
+ (execute_early_vrp): For ranger only mode, invoke ranger_vrp.
+ * tree-vrp.c (class rvrp_folder): Relocate here.
+ (execute_ranger_vrp): New.
+ * tree-vrp.h (execute_ranger_vrp): Export.
+
+2021-10-21 Martin Liska <mliska@suse.cz>
+
+ PR debug/102585
+ PR bootstrap/102766
+ * opts.c (finish_options): Process flag_var_tracking* options
+ here as they can be adjusted by optimize attribute.
+ Process also flag_syntax_only and flag_gtoggle.
+ * toplev.c (process_options): Remove it here.
+ * common.opt: Make debug_nonbind_markers_p as PerFunction
+ attribute as it depends on optimization level.
+
+2021-10-21 Martin Jambor <mjambor@suse.cz>
+
+ PR tree-optimization/102505
+ * tree-sra.c (totally_scalarize_subtree): Check that the
+ encountered field fits within the acces we would like to put it
+ in.
+
+2021-10-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c
+ (back_threader::maybe_register_path): Remove circular paths check.
+
+2021-10-21 Richard Biener <rguenther@suse.de>
+
+ * toplev.c (process_options): Move the initial debug_hooks
+ setting ...
+ (toplev::main): ... before the call of the post_options
+ langhook.
+
+2021-10-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102847
+ * tree-vect-stmts.c (vect_model_load_cost): Add the scalar
+ load cost in the prologue for VMAT_INVARIANT.
+
+2021-10-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102847
+ * tree-vect-stmts.c (vect_model_load_cost): Explicitely
+ handle VMAT_INVARIANT as a splat in the prologue.
+
+2021-10-21 Hongyu Wang <hongyu.wang@intel.com>
+
+ PR target/102812
+ * config/i386/i386.c (ix86_get_ssemov): Adjust HFmode vector
+ move to use the same logic as HImode.
+
+2021-10-21 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_build_slp_tree_1): Remove
+ superfluous gimple_call_nothrow_p check.
+
+2021-10-21 Andrew Pinski <apinski@marvell.com>
+
+ * tree-cfg.c (maybe_remove_writeonly_store): Add dce_ssa_names argument.
+ Mark the ssa-name of the rhs as one to be removed.
+ (execute_fixup_cfg): Update call to maybe_remove_writeonly_store.
+ Call simple_dce_from_worklist at the end to a simple dce.
+
+2021-10-21 Andrew Pinski <apinski@marvell.com>
+
+ * tree-cfg.c (maybe_remove_writeonly_store): New function
+ factored out from ...
+ (execute_fixup_cfg): Here. Call maybe_remove_writeonly_store.
+
+2021-10-21 Andrew Pinski <apinski@marvell.com>
+
+ * tree-cfg.c (execute_fixup_cfg): Remove comment
+ about standalone pass.
+
+2021-10-21 Andrew Pinski <apinski@marvell.com>
+
+ * tree-cfg.c (execute_fixup_cfg): Output when the statement
+ is removed when it is a write only var.
+
+2021-10-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader::maybe_register_path):
+ Avoid threading circular paths.
+
+2021-10-20 Alex Coplan <alex.coplan@arm.com>
+
+ * calls.c (initialize_argument_information): Remove some dead
+ code, remove handling for function_arg returning const_int.
+ * doc/tm.texi: Delete documentation for unused target hooks.
+ * doc/tm.texi.in: Likewise.
+ * target.def (load_bounds_for_arg): Delete.
+ (store_bounds_for_arg): Delete.
+ (load_returned_bounds): Delete.
+ (store_returned_bounds): Delete.
+ * targhooks.c (default_load_bounds_for_arg): Delete.
+ (default_store_bounds_for_arg): Delete.
+ (default_load_returned_bounds): Delete.
+ (default_store_returned_bounds): Delete.
+ * targhooks.h (default_load_bounds_for_arg): Delete.
+ (default_store_bounds_for_arg): Delete.
+ (default_load_returned_bounds): Delete.
+ (default_store_returned_bounds): Delete.
+
+2021-10-20 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/extend.texi (Basic Asm): Clarify that asm is not an
+ extension in C++.
+ * doc/invoke.texi (-fno-asm): Fix description for C++.
+
+2021-10-20 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/install.texi: Remove link to old.html
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (*aarch64_cmtst_same_<mode>): New.
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (*aarch64_narrow_trunc<mode>): New.
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (aarch64_simd_ashr<mode>): Add case cmp
+ case.
+ * config/aarch64/constraints.md (D1): New.
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md
+ (*aarch64_<srn_op>topbits_shuffle<mode>_le): New.
+ (*aarch64_topbits_shuffle<mode>_le): New.
+ (*aarch64_<srn_op>topbits_shuffle<mode>_be): New.
+ (*aarch64_topbits_shuffle<mode>_be): New.
+ * config/aarch64/predicates.md
+ (aarch64_simd_shift_imm_vec_exact_top): New.
+
+2021-10-20 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>_vect,
+ *aarch64_<srn_op>shrn<mode>2_vect_le,
+ *aarch64_<srn_op>shrn<mode>2_vect_be): New.
+ * config/aarch64/iterators.md (srn_op): New.
+
+2021-10-20 Chung-Lin Tang <cltang@codesourcery.com>
+
+ * omp-low.c (omp_copy_decl_2): For !ctx, use record_vars to add new copy
+ as local variable.
+ (scan_sharing_clauses): Place copy of OMP_CLAUSE_IN_REDUCTION decl in
+ ctx->outer instead of ctx.
+
+2021-10-20 Martin Liska <mliska@suse.cz>
+
+ Revert:
+ 2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102374
+ * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p): Strip whitespaces.
+ * system.h (strip_whilespaces): New function.
+
+2021-10-20 Martin Liska <mliska@suse.cz>
+
+ Revert:
+ 2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102375
+ * config/aarch64/aarch64.c (aarch64_process_one_target_attr):
+ Strip whitespaces.
+
+2021-10-20 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_case_values_threshold):
+ Change to 8 with -Os, 11 otherwise.
+
+2021-10-20 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (neoversev1_tunings):
+ Enable AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND.
+ (neoversen2_tunings): Likewise.
+
+2021-10-20 Wilco Dijkstra <wdijkstr@arm.com>
+
+ PR target/100966
+ * config/aarch64/aarch64.md (frint_pattern): Update comment.
+ * config/aarch64/aarch64-simd-builtins.def: Change frintn to roundeven.
+ * config/aarch64/arm_fp16.h: Change frintn to roundeven.
+ * config/aarch64/arm_neon.h: Likewise.
+ * config/aarch64/iterators.md (frint_pattern): Use roundeven for FRINTN.
+
+2021-10-20 Martin Liska <mliska@suse.cz>
+
+ * config/arm/arm.c (arm_unwind_emit_sequence): Do not declare
+ already declared global variable.
+ (arm_unwind_emit_set): Use out_file as function argument.
+ (arm_unwind_emit): Likewise.
+ * config/darwin.c (machopic_output_data_section_indirection): Likewise.
+ (machopic_output_stub_indirection): Likewise.
+ (machopic_output_indirection): Likewise.
+ (machopic_finish): Likewise.
+ * config/i386/i386.c (ix86_asm_output_function_label): Likewise.
+ * config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise.
+ * config/ia64/ia64.c (process_epilogue): Likewise.
+ (process_cfa_adjust_cfa): Likewise.
+ (process_cfa_register): Likewise.
+ (process_cfa_offset): Likewise.
+ (ia64_asm_unwind_emit): Likewise.
+ * config/s390/s390.c (s390_asm_output_function_label): Likewise.
+
+2021-10-20 Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
+
+ * config/aarch64/aarch64-builtins.c
+ (aarch64_general_gimple_fold_builtin):
+ lower vld1 and vst1 variants of the neon builtins
+ * config/aarch64/aarch64-protos.h:
+ (aarch64_general_gimple_fold_builtin): Add gsi parameter.
+ * config/aarch64/aarch64.c (aarch64_general_gimple_fold_builtin):
+ Likwise.
+
+2021-10-20 Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
+
+ * match.pd: Generate IFN_TRUNC.
+
+2021-10-20 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102853
+ * tree-data-ref.c (split_constant_offset_1): Bail out
+ immediately if the expression traps on overflow.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader::~back_threader): Remove.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadupdate.c (back_jt_path_registry::adjust_paths_after_duplication):
+ Remove superflous debugging message.
+ (back_jt_path_registry::duplicate_thread_path): Same.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader_registry::back_threader_registry):
+ Remove.
+ (back_threader_registry::register_path): Remove m_threaded_paths.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/102814
+ * doc/invoke.texi: Document --param=max-fsm-thread-length.
+ * params.opt: Add --param=max-fsm-thread-length.
+ * tree-ssa-threadbackward.c
+ (back_threader_profitability::profitable_path_p): Fail on paths
+ longer than max-fsm-thread-length.
+
+2021-10-20 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR middle-end/102764
+ * cfgexpand.c (expand_gimple_basic_block): Disregard a final debug
+ statement to reset the current location for the outgoing edges.
+
+2021-10-20 Aldy Hernandez <aldyh@redhat.com>
+ Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-threadupdate.c (cancel_thread): Dump threading reason
+ on the same line as the threading cancellation.
+ (jt_path_registry::cancel_invalid_paths): Avoid rotating loops.
+ Avoid threading through loop headers where the path remains in the
+ loop.
+
+2021-10-20 Siddhesh Poyarekar <siddhesh@gotplt.org>
+
+ * tree-object-size.c (unknown): Make into a function. Adjust
+ all uses.
+ (unknown_object_size): Simplify implementation.
+
+2021-10-20 Hongtao Liu <hongtao.liu@intel.com>
+ Kewen Lin <linkw@linux.ibm.com>
+
+ * doc/sourcebuild.texi (Effective-Target Keywords): Document
+ vect_slp_v2qi_store, vect_slp_v4qi_store, vect_slp_v8qi_store,
+ vect_slp_v16qi_store, vect_slp_v2hi_store,
+ vect_slp_v4hi_store, vect_slp_v2si_store, vect_slp_v4si_store.
+
+2021-10-19 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/extend.texi (Basic PowerPC Built-in Functions): Fix typo.
+
+2021-10-19 Paul A. Clarke <pc@us.ibm.com>
+
+ PR target/101893
+ PR target/102719
+ * config/rs6000/emmintrin.h: Guard POWER8 intrinsics.
+ * config/rs6000/pmmintrin.h: Same.
+ * config/rs6000/smmintrin.h: Same.
+ * config/rs6000/tmmintrin.h: Same.
+
+2021-10-19 Paul A. Clarke <pc@us.ibm.com>
+
+ * config.gcc (extra_headers): Add nmmintrin.h.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vect_supportable_dr_alignment): Add
+ misalignment parameter.
+ * tree-vect-data-refs.c (vect_get_peeling_costs_all_drs):
+ Do not change DR_MISALIGNMENT in place, instead pass the
+ adjusted misalignment to vect_supportable_dr_alignment.
+ (vect_peeling_supportable): Likewise.
+ (vect_peeling_hash_get_lowest_cost): Adjust.
+ (vect_enhance_data_refs_alignment): Likewise.
+ (vect_vfa_access_size): Likewise.
+ (vect_supportable_dr_alignment): Add misalignment
+ parameter and simplify.
+ * tree-vect-stmts.c (get_negative_load_store_type): Adjust.
+ (get_group_load_store_type): Likewise.
+ (get_load_store_type): Likewise.
+
+2021-10-19 Clément Chigot <clement.chigot@atos.net>
+
+ * config/rs6000/rs6000.c (rs6000_xcoff_file_end): Move
+ __tls_get_addr reference to .text csect.
+
+2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102375
+ * config/aarch64/aarch64.c (aarch64_process_one_target_attr):
+ Strip whitespaces.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vect_get_store_cost): Adjust signature.
+ (vect_get_load_cost): Likewise.
+ * tree-vect-data-refs.c (vect_get_data_access_cost): Get
+ alignment support scheme and misalignment as arguments
+ and pass them down.
+ (vect_get_peeling_costs_all_drs): Compute that info here
+ and note that we shouldn't need to.
+ * tree-vect-stmts.c (vect_model_store_cost): Get
+ alignment support scheme and misalignment as arguments.
+ (vect_get_store_cost): Likewise.
+ (vect_model_load_cost): Likewise.
+ (vect_get_load_cost): Likewise.
+ (vectorizable_store): Pass down alignment support scheme
+ and misalignment to costing.
+ (vectorizable_load): Likewise.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (get_negative_load_store_type): Add
+ offset output parameter and initialize it.
+ (get_group_load_store_type): Likewise.
+ (get_load_store_type): Likewise.
+ (vectorizable_store): Use offset as computed by
+ get_load_store_type.
+ (vectorizable_load): Likewise.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102827
+ * tree-if-conv.c (predicate_statements): Add pe parameter
+ and use that edge to insert invariant stmts on.
+ (combine_blocks): Pass through pe.
+ (tree_if_conversion): Compute the edge to insert invariant
+ stmts on and pass it along.
+
+2021-10-19 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR target/102785
+ * config/bfin/bfin.md (addsubv2hi3, subaddv2hi3, ssaddsubv2hi3,
+ sssubaddv2hi3): Swap the order of operators in vec_concat.
+
+2021-10-19 Xionghu Luo <luoxhu@linux.ibm.com>
+
+ * config/rs6000/altivec.md (*altivec_vmrghb_internal): Delete.
+ (altivec_vmrghb_direct): New.
+ (*altivec_vmrghh_internal): Delete.
+ (altivec_vmrghh_direct): New.
+ (*altivec_vmrghw_internal): Delete.
+ (altivec_vmrghw_direct_<mode>): New.
+ (altivec_vmrghw_direct): Delete.
+ (*altivec_vmrglb_internal): Delete.
+ (altivec_vmrglb_direct): New.
+ (*altivec_vmrglh_internal): Delete.
+ (altivec_vmrglh_direct): New.
+ (*altivec_vmrglw_internal): Delete.
+ (altivec_vmrglw_direct_<mode>): New.
+ (altivec_vmrglw_direct): Delete.
+ * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Adjust.
+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const):
+ Adjust.
+ * config/rs6000/vsx.md (vsx_xxmrghw_<mode>): Adjust.
+ (vsx_xxmrglw_<mode>): Adjust.
+
+2021-10-19 Aldy Hernandez <aldyh@redhat.com>
+
+ * passes.def: Change threading comment before pass_ccp pass.
+
+2021-10-19 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ * config/rs6000/rs6000-call.c (altivec_expand_lxvr_builtin):
+ Modify the expansion for sign extension. All extensions are done
+ within VSX registers.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (get_group_load_store_type): Add
+ misalignment output parameter and initialize it.
+ (get_group_load_store_type): Likewise.
+ (vectorizable_store): Remove now redundant queries.
+ (vectorizable_load): Likewise.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vect_supportable_dr_alignment): Remove
+ check_aligned argument.
+ * tree-vect-data-refs.c (vect_supportable_dr_alignment):
+ Likewise.
+ (vect_peeling_hash_insert): Add supportable_if_not_aligned
+ argument and do not call vect_supportable_dr_alignment here.
+ (vect_peeling_supportable): Adjust.
+ (vect_enhance_data_refs_alignment): Compute whether the
+ access is supported with different alignment here and
+ pass that down to vect_peeling_hash_insert.
+ (vect_vfa_access_size): Adjust.
+ * tree-vect-stmts.c (vect_get_store_cost): Likewise.
+ (vect_get_load_cost): Likewise.
+ (get_negative_load_store_type): Likewise.
+ (get_group_load_store_type): Likewise.
+ (get_load_store_type): Likewise.
+
+2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102374
+ * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p): Strip whitespaces.
+ * system.h (strip_whilespaces): New function.
+
+2021-10-19 dianhong xu <dianhong.xu@intel.com>
+
+ * config/i386/avx512fp16intrin.h:
+ (_mm512_set1_pch): New intrinsic.
+ * config/i386/avx512fp16vlintrin.h:
+ (_mm256_set1_pch): New intrinsic.
+ (_mm_set1_pch): Ditto.
+
+2021-10-18 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/102796
+ * gimple-range.cc (gimple_ranger::range_on_edge): Process EH edges
+ normally. Return get_tree_range for non gimple_range_ssa_p names.
+ (gimple_ranger::range_of_stmt): Use get_tree_range for non
+ gimple_range_ssa_p names.
+
+2021-10-18 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/102761
+ * config/i386/i386.c (ix86_print_operand_address):
+ Error out for non-address_operand asm operands.
+
+2021-10-18 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_peeling_hash_insert): Do
+ not auto-convert dr_alignment_support to bool.
+ (vect_peeling_supportable): Likewise.
+ (vect_enhance_data_refs_alignment): Likewise.
+ (vect_supportable_dr_alignment): Commonize read/write case.
+ * tree-vect-stmts.c (vect_get_store_cost): Use
+ dr_alignment_support, not int, for the vect_supportable_dr_alignment
+ result.
+ (vect_get_load_cost): Likewise.
+
+2021-10-18 Siddhesh Poyarekar <siddhesh@gotplt.org>
+
+ * tree-object-size.c (object_sizes_execute): Consolidate LHS
+ null check and do it early.
+
+2021-10-18 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (vectorizable_store): Use the
+ computed alignment scheme instead of querying
+ aligned_access_p.
+
+2021-10-18 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (vectorizable_store): Do not recompute
+ alignment scheme already determined by get_load_store_type.
+
+2021-10-18 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (class pass_thread_jumps_full):
+ Clone corresponding pass.
+
+2021-10-18 Roger Sayle <roger@nextmovesoftware.com>
+
+ * combine.c (recog_for_combine): For an unrecognized move/set of
+ a constant, try force_const_mem to place it in the constant pool.
+ * cse.c (constant_pool_entries_cost, constant_pool_entries_regcost):
+ Delete global variables (that are no longer assigned a cost value).
+ (cse_insn): Simplify logic for deciding whether to place a folded
+ constant in the constant pool using force_const_mem.
+ (cse_main): Remove zero initialization of constant_pool_entries_cost
+ and constant_pool_entries_regcost.
+ * config/i386/i386.c (ix86_rtx_costs): Make memory accesses
+ fractionally more expensive, when optimizing for speed.
+
+2021-10-18 Martin Liska <mliska@suse.cz>
+
+ PR gcov-profile/102746
+ PR gcov-profile/102747
+ * gcov.c (main): Return return_code.
+ (output_gcov_file): Mark return_code when error happens.
+ (generate_results): Likewise.
+ (read_graph_file): Likewise.
+ (read_count_file): Likewise.
+
+2021-10-18 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/bfin/bfin.md (define_constants): Remove UNSPEC_ONES.
+ (define_insn "ones"): Replace UNSPEC_ONES with a truncate of
+ a popcount, allowing compile-time evaluation/simplification.
+ (popcountsi2, popcounthi2): New expanders using a "ones" insn.
+
+2021-10-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102788
+ * tree-vect-patterns.c (vect_init_pattern_stmt): Allow
+ a NULL vectype.
+ (vect_pattern_recog_1): Likewise.
+ (vect_recog_bool_pattern): Continue matching the pattern
+ even if we do not have a vector type for a conversion
+ result.
+
+2021-10-18 Roger Sayle <roger@nextmovesoftware.com>
+
+ * simplify-rtx.c (simplify_const_unary_operation) [SS_NEG, SS_ABS]:
+ Evalute SS_NEG and SS_ABS of a constant argument.
+
+2021-10-18 prathamesh.kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR target/93183
+ * gimple-match-head.c (try_conditional_simplification): Add case for single operand.
+ * internal-fn.def: Add entry for COND_NEG internal function.
+ * internal-fn.c (FOR_EACH_CODE_MAPPING): Add entry for
+ NEGATE_EXPR, COND_NEG mapping.
+ * optabs.def: Add entry for cond_neg_optab.
+ * match.pd (UNCOND_UNARY, COND_UNARY): New operator lists.
+ (vec_cond COND (foo A) B) -> (IFN_COND_FOO COND A B): New pattern.
+ (vec_cond COND B (foo A)) -> (IFN_COND_FOO ~COND A B): Likewise.
+
+2021-10-18 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-strlen.c (class strlen_pass): Rename from
+ strlen_dom_walker.
+ (handle_builtin_stxncpy_strncat): Move to strlen_pass.
+ (handle_assign): Same.
+ (adjust_last_stmt): Same.
+ (maybe_warn_overflow): Same.
+ (handle_builtin_strlen): Same.
+ (handle_builtin_strchr): Same.
+ (handle_builtin_strcpy): Same.
+ (handle_builtin_strncat): Same.
+ (handle_builtin_stxncpy_strncat): Same.
+ (handle_builtin_memcpy): Same.
+ (handle_builtin_strcat): Same.
+ (handle_alloc_call): Same.
+ (handle_builtin_memset): Same.
+ (handle_builtin_memcmp): Same.
+ (get_len_or_size): Same.
+ (strxcmp_eqz_result): Same.
+ (handle_builtin_string_cmp): Same.
+ (handle_pointer_plus): Same.
+ (count_nonzero_bytes_addr): Same.
+ (count_nonzero_bytes): Same.
+ (handle_store): Same.
+ (strlen_check_and_optimize_call): Same.
+ (handle_integral_assign): Same.
+ (check_and_optimize_stmt): Same.
+ (printf_strlen_execute): Rename strlen_dom_walker to strlen_pass.
+
+2021-10-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102798
+ * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref):
+ Only copy points-to info to newly generated SSA names.
+
+2021-10-18 Martin Liska <mliska@suse.cz>
+
+ * dbgcnt.c (dbg_cnt_process_opt): Remove unused but set variable.
+ * gcov.c (get_cycles_count): Likewise.
+ * lto-compress.c (lto_compression_zlib): Likewise.
+ (lto_uncompression_zlib): Likewise.
+ * targhooks.c (default_pch_valid_p): Likewise.
+
+2021-10-17 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-pass.h (make_pass_thread_jumps_full): New.
+ * tree-ssa-threadbackward.c (pass_thread_jumps::gate): Inline.
+ (try_thread_blocks): Add resolve and speed arguments.
+ (pass_thread_jumps::execute): Inline.
+ (do_early_thread_jumps): New.
+ (do_thread_jumps): New.
+ (make_pass_thread_jumps): Move.
+ (pass_early_thread_jumps::gate): Inline.
+ (pass_early_thread_jumps::execute): Inline.
+ (class pass_thread_jumps_full): New.
+
+2021-10-16 Piotr Kubaj <pkubaj@FreeBSD.org>
+
+ * configure.ac: Treat powerpc64*-*-freebsd* the same as
+ powerpc64-*-freebsd*.
+ * configure: Regenerate.
+
+2021-10-16 H.J. Lu <hjl.tools@gmail.com>
+
+ * value-query.cc (get_ssa_name_ptr_info_nonnull): Change
+ set_ptr_nonull to set_ptr_nonnull in comments.
+
+2021-10-16 Jan Hubicka <hubicka@ucw.cz>
+
+ PR tree-optimization/102720
+ * tree-ssa-structalias.c (compute_points_to_sets): Fix producing
+ of call used and clobbered sets.
+
+2021-10-15 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.h (LINK_COMMAND_SPEC_A): Update 'r' handling to
+ skip gomp and itm when r or nodefaultlibs is given.
+ (DSYMUTIL_SPEC): Do not call dsymutil for '-r' link lines.
+ Update ordering of exclusions, remove duplicate 'v' addition
+ (collect2 will add this from the main command line).
+
+2021-10-15 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-driver.c (darwin_driver_init): Revise comments, handle
+ filelist and framework options in specs instead of code.
+ * config/darwin.h (SUBTARGET_DRIVER_SELF_SPECS): Update to handle link
+ specs that are really driver ones.
+ (DARWIN_CC1_SPEC): Likewise.
+ (CPP_SPEC): Likewise.
+ (SYSROOT_SPEC): Append space.
+ (LINK_SYSROOT_SPEC): Remove most driver link specs.
+ (STANDARD_STARTFILE_PREFIX_2): Update link-related specs.
+ (STARTFILE_SPEC): Likewise.
+ (ASM_MMACOSX_VERSION_MIN_SPEC): Fix line wrap.
+ (ASM_SPEC): Update driver-related specs.
+ (ASM_FINAL_SPEC): Likewise.
+ * config/darwin.opt: Remove now unused option aliases.
+ * config/i386/darwin.h (EXTRA_ASM_OPTS): Ensure space after opt.
+ (ASM_SPEC): Update driver-related specs.
+
+2021-10-15 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/i386/i386.c (ix86_hardreg_mov_ok): For vector modes,
+ allow standard_sse_constant_p immediate constants.
+
+2021-10-15 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config.gcc: Add tm-dwarf2.h to tm_d-file.
+
+2021-10-15 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-fold.h (gimple_range_ssa_p): Don't process names
+ that occur in abnormal phis.
+ * gimple-range.cc (gimple_ranger::range_on_edge): Return false for
+ abnormal and EH edges.
+ * gimple-ssa-evrp.c (rvrp_folder::value_of_expr): Ditto.
+ (rvrp_folder::value_on_edge): Ditto.
+ (rvrp_folder::value_of_stmt): Ditto.
+ (hybrid_folder::value_of_expr): Ditto for ranger queries.
+ (hybrid_folder::value_on_edge): Ditto.
+ (hybrid_folder::value_of_stmt): Ditto.
+ * value-query.cc (gimple_range_global): Always return a range if
+ the type is supported.
+
+2021-10-15 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.md: Consistently use "rG" constraint for copy
+ instruction in move patterns.
+
+2021-10-15 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn-hsa.h (S_FIJI): Set unconditionally.
+ (S_900): Likewise.
+ (S_906): Likewise.
+ * config/gcn/gcn.c: Hard code SRAM ECC settings for old architectures.
+ * config/gcn/mkoffload.c (ELFABIVERSION_AMDGPU_HSA): Rename to ...
+ (ELFABIVERSION_AMDGPU_HSA_V3): ... this.
+ (ELFABIVERSION_AMDGPU_HSA_V4): New.
+ (SET_SRAM_ECC_UNSUPPORTED): New.
+ (copy_early_debug_info): Create elf flags to match the other objects.
+ (main): Just let the attribute flags pass through.
+
+2021-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * tree-loop-distribution.c (reduction_var_overflows_first):
+ Pass the type of reduction_var as first argument as it is also
+ done for the load type.
+ (loop_distribution::transform_reduction_loop): Add missing
+ TREE_TYPE while determining precission of reduction_var.
+
+2021-10-15 Richard Biener <rguenther@suse.de>
+
+ * defaults.h (PREFERRED_DEBUGGING_TYPE): Choose DWARF2_DEBUG
+ when not set.
+ * toplev.c (process_options): Warn when STABS debugging is
+ enabled but not the preferred format.
+ * config/pa/som.h (PREFERRED_DEBUGGING_TYPE): Define to
+ DBX_DEBUG.
+ * config/pdp11/pdp11.h (PREFERRED_DEBUGGING_TYPE): Likewise.
+
+2021-10-15 Richard Biener <rguenther@suse.de>
+
+ PR ipa/102762
+ * tree-inline.c (copy_bb): Avoid underflowing nargs.
+
+2021-10-15 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/i386-expand.c (ix86_expand_vec_perm): Convert
+ HFmode input operand to HImode.
+ (ix86_vectorize_vec_perm_const): Likewise.
+ * config/i386/sse.md (*avx512bw_permvar_truncv16siv16hi_1_hf):
+ New define_insn.
+ (*avx512f_permvar_truncv8siv8hi_1_hf):
+ Likewise.
+
+2021-10-15 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102682
+ * expmed.c (store_bit_field_1): Ensure a LHS subreg would
+ not create a paradoxical subreg.
+
+2021-10-15 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/i386-expand.c (ix86_expand_vector_init):
+ For half_vector concat for HFmode, handle them like HImode.
+
+2021-10-14 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (class back_threader): Add m_resolve.
+ (back_threader::back_threader): Same.
+ (back_threader::resolve_phi): Try to solve without looking back if
+ possible.
+ (back_threader::find_paths_to_names): Same.
+ (try_thread_blocks): Pass resolve argument to back threader.
+ (pass_early_thread_jumps::execute): Same.
+
+2021-10-14 Aldy Hernandez <aldyh@redhat.com>
+
+ * doc/invoke.texi: Remove max-fsm-thread-length,
+ max-fsm-thread-paths, and fsm-maximum-phi-arguments.
+ * params.opt: Same.
+ * tree-ssa-threadbackward.c (back_threader::back_threader): Remove
+ argument.
+ (back_threader_registry::back_threader_registry): Same.
+ (back_threader_profitability::profitable_path_p): Remove
+ param_max_fsm_thread-length.
+ (back_threader_registry::register_path): Remove
+ m_max_allowable_paths.
+
+2021-10-14 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (class back_threader): Make m_imports
+ an auto_bitmap.
+ (back_threader::~back_threader): Do not release m_path.
+
+2021-10-14 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/102738
+ * vr-values.c (simplify_using_ranges::simplify): Handle RSHIFT_EXPR.
+
+2021-10-14 Kwok Cheung Yeung <kcy@codesourcery.com>
+
+ * omp-general.c (omp_check_context_selector): Move from c-omp.c.
+ (omp_mark_declare_variant): Move from c-omp.c.
+ (omp_context_name_list_prop): Update for Fortran strings.
+ * omp-general.h (omp_check_context_selector): New prototype.
+ (omp_mark_declare_variant): New prototype.
+
+2021-10-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/rs6000/rs6000.c (rs6000_density_test): Move early
+ exit test further up the function.
+
+2021-10-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/arm/arm.c (arm_add_stmt_cost): Delete.
+ (TARGET_VECTORIZE_ADD_STMT_COST): Delete.
+
+2021-10-14 Martin Jambor <mjambor@suse.cz>
+
+ * doc/invoke.texi (Optimize Options): Add entry for
+ ipa-cp-recursive-freq-factor.
+
+2021-10-14 Tamar Christina <tamar.christina@arm.com>
+
+ * match.pd: New rule.
+
+2021-10-14 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/102557
+ * ipa-modref-tree.h (modref_access_node::update2):
+ Also check that parm_offset is unchanged.
+ (modref_ref_node::insert_access): Fix updating of
+ parameter.
+
+2021-10-14 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader::resolve_phi): Add
+ FIXME note.
+
+2021-10-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102659
+ * tree-if-conv.c (if_convertible_gimple_assign_stmt_p): Also
+ rewrite pointer typed undefined overflow operations.
+ (predicate_statements): Likewise. Make sure to emit invariant
+ conversions in the preheader.
+ * tree-vectorizer.c (vect_loop_vectorized_call): Look through
+ non-empty preheaders.
+ * tree-data-ref.c (dr_analyze_indices): Strip useless
+ conversions to the MEM_REF base type.
+
+2021-10-14 Martin Liska <mliska@suse.cz>
+
+ * common.opt: Stop using AUTODETECT_VALUE
+ and use EnabledBy where possible.
+ * opts.c: Enable OPT_fvar_tracking with optimize >= 1.
+ * toplev.c (AUTODETECT_VALUE): Remove macro.
+ (process_options): Simplify by using EnabledBy and
+ OPT_fvar_tracking. Use OPTION_SET_P macro instead of
+ AUTODETECT_VALUE.
+
+2021-10-14 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/arm_neon.h (vld1_s8_x3): Use signed type for
+ pointer parameter.
+ (vld1_s32_x3): Likewise.
+
+2021-10-14 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/102736
+ PR tree-optimization/102736
+ * gimple-range-path.cc (path_range_query::range_on_path_entry):
+ Assert that the requested range is defined outside the path.
+ (path_range_query::ssa_range_in_phi): Do not call
+ range_on_path_entry for SSA names that are defined within the
+ path.
+
+2021-10-14 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-driver.c (darwin_find_version_from_kernel):
+ Quote internal identifiers and avoid contractions in
+ warnings.
+ (darwin_default_min_version): Likewise.
+ (darwin_driver_init): Likewise.
+
+2021-10-14 Martin Jambor <mjambor@suse.cz>
+
+ * params.opt (ipa-cp-recursive-freq-factor): New.
+ * ipa-cp.c (ipcp_value): Switch to inline initialization. New members
+ scc_no, self_recursion_generated_level, same_scc and
+ self_recursion_generated_p.
+ (ipcp_lattice::add_value): Replaced parameter unlimited with
+ same_lat_gen_level, usit it determine limit of values and store it to
+ the value.
+ (ipcp_lattice<valtype>::print): Dump the new fileds.
+ (allocate_and_init_ipcp_value): Take same_lat_gen_level as a new
+ parameter and store it to the new value.
+ (self_recursively_generated_p): Removed.
+ (propagate_vals_across_arith_jfunc): Use self_recursion_generated_p
+ instead of self_recursively_generated_p, store self generation level
+ to such values.
+ (value_topo_info<valtype>::add_val): Set scc_no.
+ (value_topo_info<valtype>::propagate_effects): Multiply frequencies of
+ recursively feeding values and self generated values by appropriate
+ new factors.
+
+2021-10-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Remove
+ redundant test for flag_vect_cost_model.
+
+2021-10-14 Aldy Hernandez <aldyh@redhat.com>
+
+ * bitmap.c (debug): New overloaded function for auto_bitmaps.
+ * bitmap.h (debug): Same.
+
+2021-10-14 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm512_mask_fcmadd_pch):
+ Adjust builtin call.
+ (_mm512_mask3_fcmadd_pch): Likewise.
+ (_mm512_mask_fmadd_pch): Likewise
+ (_mm512_mask3_fmadd_pch): Likewise
+ (_mm512_mask_fcmadd_round_pch): Likewise
+ (_mm512_mask3_fcmadd_round_pch): Likewise
+ (_mm512_mask_fmadd_round_pch): Likewise
+ (_mm512_mask3_fmadd_round_pch): Likewise
+ (_mm_mask_fcmadd_sch): Likewise
+ (_mm_mask3_fcmadd_sch): Likewise
+ (_mm_mask_fmadd_sch): Likewise
+ (_mm_mask3_fmadd_sch): Likewise
+ (_mm_mask_fcmadd_round_sch): Likewise
+ (_mm_mask3_fcmadd_round_sch): Likewise
+ (_mm_mask_fmadd_round_sch): Likewise
+ (_mm_mask3_fmadd_round_sch): Likewise
+ (_mm_fcmadd_round_sch): Likewise
+ * config/i386/avx512fp16vlintrin.h (_mm_mask_fmadd_pch):
+ Adjust builtin call.
+ (_mm_mask3_fmadd_pch): Likewise
+ (_mm256_mask_fmadd_pch): Likewise
+ (_mm256_mask3_fmadd_pch): Likewise
+ (_mm_mask_fcmadd_pch): Likewise
+ (_mm_mask3_fcmadd_pch): Likewise
+ (_mm256_mask_fcmadd_pch): Likewise
+ (_mm256_mask3_fcmadd_pch): Likewise
+ * config/i386/i386-builtin.def: Add mask3 builtin for complex
+ fma, and adjust mask_builtin to corresponding expander.
+ * config/i386/i386-expand.c (ix86_expand_round_builtin):
+ Skip eraseing embedded rounding for expanders that emits
+ multiple insns.
+ * config/i386/sse.md (complexmove): New mode_attr.
+ (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): New expander.
+ (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Likewise.
+ (avx512fp16_fmaddcsh_v8hf_mask1<round_expand_name>): Likewise.
+ (avx512fp16_fcmaddcsh_v8hf_mask1<round_expand_name>): Likewise.
+ (avx512fp16_fcmaddcsh_v8hf_mask3<round_expand_name>): Likewise.
+ (avx512fp16_fmaddcsh_v8hf_mask3<round_expand_name>): Likewise.
+ * config/i386/subst.md (round_embedded_complex): New subst.
+
+2021-10-14 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.md (cbranchsf4): Disable if TARGET_SOFT_FLOAT.
+ (cbranchdf4): Likewise.
+ Add missing move patterns for TARGET_SOFT_FLOAT.
+
+2021-10-13 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/i386/i386-expand.c (ix86_expand_vector_move): Use a
+ pseudo intermediate when moving a SUBREG into a hard register,
+ by checking ix86_hardreg_mov_ok.
+ (ix86_expand_vector_extract): Store zero-extended SImode
+ intermediate in a pseudo, then set target using a SUBREG_PROMOTED
+ annotated subreg.
+ * config/i386/sse.md (mov<VMOVE>_internal): Prevent CSE creating
+ complex (SUBREG) sets of (vector) hard registers before reload, by
+ checking ix86_hardreg_mov_ok.
+
+2021-10-13 Indu Bhagat <indu.bhagat@oracle.com>
+
+ * ctfc.h (enum ctf_dtu_d_union_enum): Remove redundant comma.
+
+2021-10-13 Indu Bhagat <indu.bhagat@oracle.com>
+
+ * dwarf2ctf.c (gen_ctf_array_type): Fix typo in comment.
+
+2021-10-13 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/102630
+ * pointer-query.cc (compute_objsize_r): Handle named address spaces.
+
+2021-10-13 Iain Sandoe <iain@sandoe.co.uk>
+
+ * collect2.c (is_lto_object_file): Release simple-object
+ resources, close files.
+
+2021-10-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * config/arm/arm.c (thumb2_legitimate_address_p): Use VALID_MVE_MODE
+ when checking mve addressing modes.
+ (mve_vector_mem_operand): Fix the way we handle pre, post and offset
+ addressing modes.
+ (arm_print_operand): Fix printing of POST_ and PRE_MODIFY.
+ * config/arm/mve.md: Use mve_memory_operand predicate everywhere where
+ there is a single Ux constraint.
+
+2021-10-13 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.md (muldi3): Add support for inlining 64-bit
+ multiplication on 32-bit PA 1.1 and 2.0 targets.
+
+2021-10-13 Martin Liska <mliska@suse.cz>
+
+ PR gcov-profile/90364
+ * coverage.c (build_info): Emit checksum to the global variable.
+ (build_info_type): Add new field for checksum.
+ (coverage_obj_finish): Pass object_checksum.
+ (coverage_init): Use 0 as checksum for .gcno files.
+ * gcov-dump.c (dump_gcov_file): Dump also new checksum field.
+ * gcov.c (read_graph_file): Read also checksum.
+ * doc/invoke.texi: Document the behaviour change.
+
+2021-10-13 Richard Biener <rguenther@suse.de>
+
+ * gimple-iterator.h (gsi_iterator_update): Add GSI_LAST_NEW_STMT,
+ start at integer value 2.
+ * gimple-iterator.c (gsi_insert_seq_nodes_before): Update
+ the iterator for GSI_LAST_NEW_STMT.
+ (gsi_insert_seq_nodes_after): Likewise.
+ * tree-if-conv.c (predicate_statements): Use GSI_LAST_NEW_STMT.
+ * tree-ssa.c (execute_update_addresses_taken): Correct bogus
+ arguments to gsi_replace.
+
+2021-10-13 Martin Liska <mliska@suse.cz>
+
+ PR target/102688
+ * common.opt: Use EnabledBy instead of detection in
+ finish_options and process_options.
+ * opts.c (finish_options): Remove handling of
+ x_flag_unroll_all_loops.
+ * toplev.c (process_options): Likewise for flag_web and
+ flag_rename_registers.
+
+2021-10-13 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102659
+ * tree-if-conv.c (need_to_rewrite_undefined): New flag.
+ (if_convertible_gimple_assign_stmt_p): Mark the loop for
+ rewrite when stmts with undefined behavior on integer
+ overflow appear.
+ (combine_blocks): Predicate also when we need to rewrite stmts.
+ (predicate_statements): Rewrite affected stmts to something
+ with well-defined behavior on overflow.
+ (tree_if_conversion): Initialize need_to_rewrite_undefined.
+
+2021-10-13 Richard Biener <rguenther@suse.de>
+
+ PR ipa/102714
+ * ipa-sra.c (ptr_parm_has_nonarg_uses): Fix volatileness
+ check.
+
+2021-10-13 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * dwarf2ctf.c: Fix typo in comment.
+
+2021-10-12 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ PR target/101985
+ * config/rs6000/altivec.h (vec_cpsgn): Swap operand order.
+ * config/rs6000/rs6000-overload.def (VEC_COPYSIGN): Use SKIP to
+ avoid generating an automatic #define of vec_cpsgn. Use the
+ correct built-in for V4SFmode that doesn't depend on VSX.
+
+2021-10-12 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/85730
+ PR target/82524
+ * config/i386/i386.md (*add<mode>_1_slp): Rewrite as
+ define_insn_and_split pattern. Add alternative 1 and split it
+ post reload to insert operand 1 into the low part of operand 0.
+ (*sub<mode>_1_slp): Ditto.
+ (*and<mode>_1_slp): Ditto.
+ (*<any_or:code><mode>_1_slp): Ditto.
+ (*ashl<mode>3_1_slp): Ditto.
+ (*<any_shiftrt:insn><mode>3_1_slp): Ditto.
+ (*<any_rotate:insn><mode>3_1_slp): Ditto.
+ (*neg<mode>_1_slp): New insn_and_split pattern.
+ (*one_cmpl<mode>_1_slp): Ditto.
+
+2021-10-12 David Edelsohn <dje.gcc@gmail.com>
+
+ * doc/install.texi: Update MinGW and mingw-64 Binaries
+ download links.
+
+2021-10-12 Daniel Le Duc Khoi Nguyen <greenrecyclebin@gmail.com>
+
+ * doc/extend.texi (Common Variable Attributes): Fix typos in
+ alloc_size documentation.
+
+2021-10-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102696
+ * tree-vect-slp.c (vect_build_slp_tree_2): Properly mark
+ the tree fatally failed when we reject a BIT_FIELD_REF.
+
+2021-10-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102572
+ * tree-vect-stmts.c (vect_build_gather_load_calls): When
+ gathering the vectorized defs for the mask pass in the
+ desired mask vector type so invariants will be handled
+ correctly.
+
+2021-10-12 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-sve.md (*fcm<cmp_op><mode>_bic_combine,
+ *fcm<cmp_op><mode>_nor_combine, *fcmuo<mode>_bic_combine,
+ *fcmuo<mode>_nor_combine): New.
+
+2021-10-12 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR target/102588
+ * config/sparc/sparc-modes.def (OI): New integer mode.
+
+2021-10-12 Jakub Jelinek <jakub@redhat.com>
+
+ * gimple-fold.h (clear_padding_type_may_have_padding_p): Declare.
+ * gimple-fold.c (clear_padding_type_may_have_padding_p): No longer
+ static.
+
+2021-10-12 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-vectorizer.h (loop_cost_model): New function.
+ (unlimited_cost_model): Use it.
+ * tree-vect-loop.c (vect_analyze_loop_costing): Use loop_cost_model
+ call instead of flag_vect_cost_model.
+ * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
+ (vect_prune_runtime_alias_test_list): Likewise. Also use it instead
+ of flag_simd_cost_model.
+
+2021-10-12 liuhongt <hongtao.liu@intel.com>
+
+ PR target/102483
+ * config/i386/i386-expand.c (emit_reduc_half): Handle
+ V4QImode.
+ * config/i386/mmx.md (reduc_<code>_scal_v4qi): New expander.
+ (reduc_plus_scal_v4qi): Ditto.
+
+2021-10-12 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/smmintrin.h (_mm_cmpeq_epi64, _mm_cmpgt_epi64,
+ _mm_mullo_epi32, _mm_mul_epi32, _mm_packus_epi32): New.
+ * config/rs6000/nmmintrin.h: Copy from i386, tweak to suit.
+
+2021-10-12 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/smmintrin.h (_mm_cvtepi8_epi16, _mm_cvtepi8_epi32,
+ _mm_cvtepi8_epi64, _mm_cvtepi16_epi32, _mm_cvtepi16_epi64,
+ _mm_cvtepi32_epi64, _mm_cvtepu8_epi16, _mm_cvtepu8_epi32,
+ _mm_cvtepu8_epi64, _mm_cvtepu16_epi32, _mm_cvtepu16_epi64,
+ _mm_cvtepu32_epi64): New.
+
+2021-10-12 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/smmintrin.h (_mm_test_all_zeros,
+ _mm_test_all_ones, _mm_test_mix_ones_zeros): Rewrite as macro.
+
+2021-10-12 Paul A. Clarke <pc@us.ibm.com>
+
+ * config/rs6000/smmintrin.h (_mm_min_epi8, _mm_min_epu16,
+ _mm_min_epi32, _mm_min_epu32, _mm_max_epi8, _mm_max_epu16,
+ _mm_max_epi32, _mm_max_epu32): New.
+
+2021-10-11 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.h (struct modref_access_node): Revert
+ accidental change.
+ (struct modref_ref_node): Likewise.
+
+2021-10-11 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.h (modref_tree::global_access_p): New member
+ function.
+ * ipa-modref.c:
+ (implicint_const_eaf_flags,implicit_pure_eaf_flags,
+ ignore_stores_eaf_flags): Move to ipa-modref.h
+ (remove_useless_eaf_flags): Remove early exit on NOCLOBBER.
+ (modref_summary::global_memory_read_p): New member function.
+ (modref_summary::global_memory_written_p): New member function.
+ * ipa-modref.h (modref_summary::global_memory_read_p,
+ modref_summary::global_memory_written_p): Declare.
+ (implicint_const_eaf_flags,implicit_pure_eaf_flags,
+ ignore_stores_eaf_flags): move here.
+ * tree-ssa-structalias.c: Include ipa-modref-tree.h, ipa-modref.h
+ and attr-fnspec.h.
+ (handle_rhs_call): Rewrite.
+ (handle_call_arg): New function.
+ (determine_global_memory_access): New function.
+ (handle_const_call): Remove
+ (handle_pure_call): Remove
+ (find_func_aliases_for_call): Update use of handle_rhs_call.
+ (compute_points_to_sets): Handle global memory acccesses
+ selectively
+
+2021-10-11 Diane Meirowitz <diane.meirowitz@oracle.com>
+
+ * doc/invoke.texi: Add link to UndefinedBehaviorSanitizer
+ documentation, mention UBSAN_OPTIONS, similar to what is done
+ for AddressSanitizer.
+
+2021-10-11 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102683
+ * internal-fn.c (expand_DEFERRED_INIT): Check for mode
+ availability before building an integer type for storage
+ purposes.
+
+2021-10-11 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/101480
+ * gimple.c (gimple_call_fnspec): Do not mark operator new/delete
+ as const.
+
+2021-10-11 Martin Liska <mliska@suse.cz>
+
+ * common.opt: Remove Init(2) for some options.
+ * toplev.c (process_options): Do not use AUTODETECT_VALUE, but
+ use rather OPTION_SET_P.
+
+2021-10-11 Martin Liska <mliska@suse.cz>
+
+ * common.opt: Remove usage of IRA_REGION_AUTODETECT.
+ * flag-types.h (enum ira_region): Likewise.
+ * toplev.c (process_options): Use OPTION_SET_P instead of
+ IRA_REGION_AUTODETECT.
+
+2021-10-11 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-low.c (omp_runtime_api_call): Handle omp_get_max_teams,
+ omp_[sg]et_teams_thread_limit and omp_set_num_teams.
+
+2021-10-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * config/s390/s390-protos.h (s390_rawmemchr): Add prototype.
+ * config/s390/s390.c (s390_rawmemchr): New function.
+ * config/s390/s390.md (rawmemchr<SINT:mode>): New expander.
+ * config/s390/vector.md (@vec_vfees<mode>): Basically a copy of
+ the pattern vfees<mode> from vx-builtins.md.
+ * config/s390/vx-builtins.md (*vfees<mode>): Remove.
+
+2021-10-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * builtins.c (get_memory_rtx): Change to external linkage.
+ * builtins.h (get_memory_rtx): Add function prototype.
+ * doc/md.texi (rawmemchr<mode>): Document.
+ * internal-fn.c (expand_RAWMEMCHR): Define.
+ * internal-fn.def (RAWMEMCHR): Add.
+ * optabs.def (rawmemchr_optab): Add.
+ * tree-loop-distribution.c (find_single_drs): Change return code
+ behaviour by also returning true if no single store was found
+ but a single load.
+ (loop_distribution::classify_partition): Respect the new return
+ code behaviour of function find_single_drs.
+ (loop_distribution::execute): Call new function
+ transform_reduction_loop in order to replace rawmemchr or strlen
+ like loops by calls into builtins.
+ (generate_reduction_builtin_1): New function.
+ (generate_rawmemchr_builtin): New function.
+ (generate_strlen_builtin_1): New function.
+ (generate_strlen_builtin): New function.
+ (generate_strlen_builtin_using_rawmemchr): New function.
+ (reduction_var_overflows_first): New function.
+ (determine_reduction_stmt_1): New function.
+ (determine_reduction_stmt): New function.
+ (loop_distribution::transform_reduction_loop): New function.
+
+2021-10-11 Martin Liska <mliska@suse.cz>
+
+ * tree.c (cl_option_hasher::hash): Use cl_optimization_hash
+ and remove legacy hashing code.
+
+2021-10-11 Kito Cheng <kito.cheng@sifive.com>
+
+ PR target/100316
+ * builtins.c (maybe_emit_call_builtin___clear_cache): Allow
+ CONST_INT for BEGIN and END, and use gcc_assert rather than
+ error.
+
+2021-10-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/102441
+ * var-tracking.c (add_stores): For cselib_sp_derived_value_p values
+ use MO_VAL_SET if loc is not sp.
+
+2021-10-10 Andrew Pinski <apinski@marvell.com>
+
+ PR tree-optimization/102622
+ * match.pd: Swap the order of a?pow2cst:0 and a?-1:0 transformations.
+ Swap the order of a?0:pow2cst and a?0:-1 transformations.
+
+2021-10-09 liuhongt <hongtao.liu@intel.com>
+
+ PR target/102639
+ * config/i386/i386-expand.c (ix86_valid_mask_cmp_mode): Handle
+ HFmode.
+ (ix86_use_mask_cmp_p): Ditto.
+ (ix86_expand_sse_movcc): Ditto.
+ * config/i386/i386.md (setcc_hf_mask): New define_insn.
+ (movhf_mask): Ditto.
+ (UNSPEC_MOVCC_MASK): New unspec.
+ * config/i386/sse.md (UNSPEC_PCMP): Move to i386.md.
+
+2021-10-08 Vladimir N. Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/102627
+ * lra-constraints.c (split_reg): Use at least natural mode of hard reg.
+
+2021-10-08 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-cache.cc (non_null_ref::non_null_deref_p): Grow
+ bitmap if needed.
+
+2021-10-08 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-range.cc (irange::debug): New.
+ * value-range.h (irange::debug): New.
+
+2021-10-08 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/102385
+ * predict.h (change_edge_frequency): Declare.
+ * predict.c (change_edge_frequency): New function.
+ * tree-ssa-loop-manip.h (tree_transform_and_unroll_loop): Remove
+ edge argument.
+ (tree_unroll_loop): Likewise.
+ * gimple-loop-jam.c (tree_loop_unroll_and_jam): Update accordingly.
+ * tree-predcom.c (pcom_worker::tree_predictive_commoning_loop):
+ Likewise.
+ * tree-ssa-loop-prefetch.c (loop_prefetch_arrays): Likewise.
+ * tree-ssa-loop-manip.c (tree_unroll_loop): Likewise.
+ (tree_transform_and_unroll_loop): Likewise. Use single_dom_exit
+ to retrieve the exit edges. Make all the old profile update code
+ conditional on !single_loop_p -- the case it was written for --
+ and use a different approach for the single-loop case.
+
+2021-10-08 Martin Liska <mliska@suse.cz>
+
+ * config/alpha/alpha.c (alpha_option_override): Use new macro
+ OPTION_SET_P.
+ * config/arc/arc.c (arc_override_options): Likewise.
+ * config/arm/arm.c (arm_option_override): Likewise.
+ * config/bfin/bfin.c (bfin_load_pic_reg): Likewise.
+ * config/c6x/c6x.c (c6x_option_override): Likewise.
+ * config/csky/csky.c: Likewise.
+ * config/darwin.c (darwin_override_options): Likewise.
+ * config/frv/frv.c (frv_option_override): Likewise.
+ * config/i386/djgpp.h: Likewise.
+ * config/i386/i386.c (ix86_stack_protect_guard): Likewise.
+ (ix86_max_noce_ifcvt_seq_cost): Likewise.
+ * config/ia64/ia64.c (ia64_option_override): Likewise.
+ (ia64_override_options_after_change): Likewise.
+ * config/m32c/m32c.c (m32c_option_override): Likewise.
+ * config/m32r/m32r.c (m32r_init): Likewise.
+ * config/m68k/m68k.c (m68k_option_override): Likewise.
+ * config/microblaze/microblaze.c (microblaze_option_override): Likewise.
+ * config/mips/mips.c (mips_option_override): Likewise.
+ * config/nios2/nios2.c (nios2_option_override): Likewise.
+ * config/nvptx/nvptx.c (nvptx_option_override): Likewise.
+ * config/pa/pa.c (pa_option_override): Likewise.
+ * config/riscv/riscv.c (riscv_option_override): Likewise.
+ * config/rs6000/aix71.h: Likewise.
+ * config/rs6000/aix72.h: Likewise.
+ * config/rs6000/aix73.h: Likewise.
+ * config/rs6000/rs6000.c (darwin_rs6000_override_options): Likewise.
+ (rs6000_override_options_after_change): Likewise.
+ (rs6000_linux64_override_options): Likewise.
+ (glibc_supports_ieee_128bit): Likewise.
+ (rs6000_option_override_internal): Likewise.
+ (rs6000_file_start): Likewise.
+ (rs6000_darwin_file_start): Likewise.
+ * config/rs6000/rtems.h: Likewise.
+ * config/rs6000/sysv4.h: Likewise.
+ * config/rs6000/vxworks.h (SUB3TARGET_OVERRIDE_OPTIONS): Likewise.
+ * config/s390/s390.c (s390_option_override): Likewise.
+ * config/sh/linux.h: Likewise.
+ * config/sh/netbsd-elf.h (while): Likewise.
+ * config/sh/sh.c (sh_option_override): Likewise.
+ * config/sol2.c (solaris_override_options): Likewise.
+ * config/sparc/sparc.c (sparc_option_override): Likewise.
+ * config/tilegx/tilegx.c (tilegx_option_override): Likewise.
+ * config/visium/visium.c (visium_option_override): Likewise.
+ * config/vxworks.c (vxworks_override_options): Likewise.
+ * lto-opts.c (lto_write_options): Likewise.
+ * omp-expand.c (expand_omp_simd): Likewise.
+ * omp-general.c (omp_max_vf): Likewise.
+ * omp-offload.c (oacc_xform_loop): Likewise.
+ * opts.h (OPTION_SET_P): Likewise.
+ * targhooks.c (default_max_noce_ifcvt_seq_cost): Likewise.
+ * toplev.c (process_options): Likewise.
+ * tree-predcom.c: Likewise.
+ * tree-sra.c (analyze_all_variable_accesses): Likewise.
+
+2021-10-08 liuhongt <hongtao.liu@intel.com>
+
+ PR target/102464
+ * config/i386/i386.c (ix86_optab_supported_p):
+ Return true for HFmode.
+ * match.pd: Simplify (_Float16) ceil ((double) x) to
+ __builtin_ceilf16 (a) when a is _Float16 type and
+ direct_internal_fn_supported_p.
+
+2021-10-08 liuhongt <hongtao.liu@intel.com>
+
+ PR target/102494
+ * config/i386/i386-expand.c (emit_reduc_half): Hanlde V4HImode.
+ * config/i386/mmx.md (reduc_plus_scal_v4hi): New.
+ (reduc_<code>_scal_v4hi): New.
+
+2021-10-08 liuhongt <hongtao.liu@intel.com>
+
+ * common.opt (ftree-vectorize): Add Var(flag_tree_vectorize).
+ * doc/invoke.texi (Options That Control Optimization): Update
+ documents.
+ * opts.c (default_options_table): Enable auto-vectorization at
+ O2 with very-cheap cost model.
+ (finish_options): Use cheap cost model for
+ explicit -ftree{,-loop}-vectorize.
+
+2021-10-07 Indu Bhagat <indu.bhagat@oracle.com>
+
+ * ctfc.c (ctfc_delete_container): Free hash table contents.
+
+2021-10-07 Indu Bhagat <indu.bhagat@oracle.com>
+
+ * toplev.c (process_options): Do not warn for GNU GIMPLE.
+
+2021-10-07 Siddhesh Poyarekar <siddhesh@gotplt.org>
+
+ * tree-object-size.c (addr_object_size,
+ compute_builtin_object_size): Drop PDECL and POFF arguments.
+ (addr_object_size): Adjust calls.
+ * tree-object-size.h (compute_builtin_object_size): Drop PDECL
+ and POFF arguments.
+
+2021-10-07 Roger Sayle <roger@nextmovesoftware.com>
+
+ * rtl.def (SMUL_HIGHPART, UMUL_HIGHPART): New RTX codes for
+ representing signed and unsigned high-part multiplication resp.
+ * simplify-rtx.c (simplify_binary_operation_1) [SMUL_HIGHPART,
+ UMUL_HIGHPART]: Simplify high-part multiplications by zero.
+ [SS_PLUS, US_PLUS, SS_MINUS, US_MINUS, SS_MULT, US_MULT,
+ SS_DIV, US_DIV]: Similar simplifications for saturating
+ arithmetic.
+ (simplify_const_binary_operation) [SS_PLUS, US_PLUS, SS_MINUS,
+ US_MINUS, SS_MULT, US_MULT, SMUL_HIGHPART, UMUL_HIGHPART]:
+ Implement compile-time evaluation for constant operands.
+ * dwarf2out.c (mem_loc_descriptor): Skip SMUL_HIGHPART and
+ UMUL_HIGHPART.
+ * doc/rtl.texi (smul_highpart, umul_highpart): Document RTX codes.
+ * doc/md.texi (smul@var{m}3_highpart, umul@var{m3}_highpart):
+ Mention the new smul_highpart and umul_highpart RTX codes.
+ * doc/invoke.texi: Silence @xref "compilation" warnings.
+
+2021-10-07 Martin Jambor <mjambor@suse.cz>
+
+ PR ipa/102388
+ * ipa-prop.c (ipa_edge_args_sum_t::duplicate): Also handle the
+ case when the source reference description corresponds to a
+ referance taken in a function src->caller is inlined to.
+
+2021-10-07 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/102581
+ * ipa-modref-tree.h (modref_access_node::contains_p): Handle offsets
+ better.
+ (modref_access_node::try_merge_with): Add sanity check that there
+ are no redundant entries in the list.
+
+2021-10-07 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102608
+ * tree-ssa-sccvn.c (visit_stmt): Drop .DEFERRED_INIT to
+ varying.
+
+2021-10-07 Martin Liska <mliska@suse.cz>
+
+ * toplev.c (toplev::main): Make
+ save_opt_decoded_options a pointer type
+ * toplev.h: Likewise.
+
+2021-10-07 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn-valu.md (gather<mode>_insn_2offsets<exec>): Apply
+ HAVE_GCN_ASM_GLOBAL_LOAD_FIXED.
+ (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
+
+2021-10-07 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn-hsa.h (SRAMOPT): Include the whole option string.
+ Adjust for new -msram-ecc=any behaviour.
+ (ASM_SPEC): Adjust -mxnack and -msram-ecc usage.
+ * config/gcn/gcn.c (output_file_start): Implement -msram-ecc=any.
+ * config/gcn/mkoffload.c (EF_AMDGPU_XNACK): Rename to ...
+ (EF_AMDGPU_XNACK_V3): ... this.
+ (EF_AMDGPU_SRAM_ECC): Rename to ...
+ (EF_AMDGPU_SRAM_ECC_V3): ... this.
+ (EF_AMDGPU_FEATURE_XNACK_V4): New.
+ (EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4): New.
+ (EF_AMDGPU_FEATURE_XNACK_ANY_V4): New.
+ (EF_AMDGPU_FEATURE_XNACK_OFF_V4): New.
+ (EF_AMDGPU_FEATURE_XNACK_ON_V4): New.
+ (EF_AMDGPU_FEATURE_SRAMECC_V4): New.
+ (EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4): New.
+ (EF_AMDGPU_FEATURE_SRAMECC_ANY_V4): New.
+ (EF_AMDGPU_FEATURE_SRAMECC_OFF_V4): New.
+ (EF_AMDGPU_FEATURE_SRAMECC_ON_V4): New.
+ (SET_XNACK_ON): New.
+ (SET_XNACK_OFF): New.
+ (TEST_XNACK): New.
+ (SET_SRAM_ECC_ON): New.
+ (SET_SRAM_ECC_ANY): New.
+ (SET_SRAM_ECC_OFF): New.
+ (TEST_SRAM_ECC_ANY): New.
+ (TEST_SRAM_ECC_ON): New.
+ (main): Implement HSACOv4 and -msram-ecc=any.
+
+2021-10-07 Andrew Stubbs <ams@codesourcery.com>
+
+ * config.in: Regenerate.
+ * config/gcn/gcn-hsa.h (X_FIJI): New macro.
+ (X_900): New macro.
+ (X_906): New macro.
+ (X_908): New macro.
+ (A_FIJI): Rename to ...
+ (S_FIJI): ... this.
+ (A_900): Rename to ...
+ (S_900): ... this.
+ (A_906): Rename to ...
+ (S_906): ... this.
+ (A_908): Rename to ...
+ (S_908): ... this.
+ (SRAMOPT): New macro.
+ (ASM_SPEC): Adjust xnack option usage.
+ * config/gcn/gcn.c (output_file_start): Adjust amdgcn_target usage.
+ * configure: Regenerate.
+ * configure.ac: Detect LLVM assembler dialect.
+
+2021-10-07 Richard Biener <rguenther@suse.de>
+
+ * tree-pretty-print.c (dump_generic_node): Do not elide
+ printing '&' when dumping with -gimple.
+
+2021-10-06 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-cache.cc (non_null_ref::adjust_range): Call new
+ intersect routine.
+ * gimple-range-fold.cc (adjust_pointer_diff_expr): Ditto.
+ (adjust_imagpart_expr): Ditto.
+ * value-range.cc (irange::irange_intersect): Call new routine if
+ RHS is a single pair.
+ (irange::intersect): New wide_int version.
+ * value-range.h (class irange): New prototype.
+
+2021-10-06 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-edge.cc (gimple_outgoing_range::gimple_outgoing_range):
+ Add parameter to limit size when recognizing switches.
+ (gimple_outgoing_range::edge_range_p): Check size limit.
+ * gimple-range-edge.h (gimple_outgoing_range): Add size field.
+ * gimple-range-gori.cc (gori_map::calculate_gori): Ignore switches
+ that exceed the size limit.
+ (gori_compute::gori_compute): Add initializer.
+ * params.opt (evrp-switch-limit): New.
+ * doc/invoke.texi: Update docs.
+
+2021-10-06 Andrew MacLeod <amacleod@redhat.com>
+
+ * value-range.h (irange::set_varying): Use TYPE_MIN_VALUE and
+ TYPE_MAX_VALUE instead of creating new trees when possible.
+
+2021-10-06 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-cache.cc (non_null_ref::adjust_range): Check for
+ zero and non-zero more efficently.
+
+2021-10-06 Richard Biener <rguenther@suse.de>
+
+ PR c/102605
+ * dumpfile.h (TDF_GIMPLE_VAL): New.
+ (dump_flag): Re-order and adjust TDF_* flags. Make
+ the enum uint32_t. Use std::underlying_type in the
+ operator overloads.
+ (optgroup_flag): Likewise for the operator overloads.
+ * tree-pretty-print.c (dump_generic_node): Wrap ADDR_EXPR
+ in _Literal if TDF_GIMPLE_VAL.
+ * gimple-pretty-print.c (dump_gimple_assign): Add
+ TDF_GIMPLE_VAL to flags when dumping operands where only
+ is_gimple_val are allowed.
+ (dump_gimple_cond): Likewise.
+
+2021-10-06 prathamesh.kulkarni <prathamesh.kulkarni@linaro.org>
+
+ * gimple-isel.cc (gimple_expand_vec_cond_expr): Remove redundant if
+ condition.
+
+2021-10-05 qing zhao <qing.zhao@oracle.com>
+
+ PR middle-end/102359
+ * gimplify.c (gimplify_decl_expr): Not add initialization for an
+ auto variable when it has been initialized by frontend.
+
+2021-10-05 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadupdate.c (jt_path_registry::cancel_invalid_paths):
+ Loosen restrictions
+
+2021-10-05 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+
+ * common/config/avr/avr-common.c (avr_handle_option): Mark
+ argument as ATTRIBUTE_UNUSED.
+
+2021-10-05 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+
+ * config/lm32/uclinux-elf.h (LINK_GCC_C_SEQUENCE_SPEC):
+ Undefine before redefinition.
+
+2021-10-05 Richard Biener <rguenther@suse.de>
+
+ * toplev.c (no_backend): Remove global var.
+ (process_options): Pass in no_backend, move post_options
+ langhook call to toplev::main.
+ (do_compile): Pass in no_backend, move process_options call
+ to toplev::main.
+ (toplev::run_self_tests): Check no_backend at the caller.
+ (toplev::main): Call post_options and process_options
+ split out from do_compile, do self-tests only if
+ no_backend is initialized.
+
+2021-10-05 Richard Biener <rguenther@suse.de>
+
+ * tree-cfg.c (dump_function_to_file): Dump the UID of the
+ function as part of the name when requested.
+ * tree-pretty-print.c (dump_function_name): Dump the UID when
+ requested and the langhook produced the actual name.
+
+2021-10-05 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102587
+ PR middle-end/102285
+ * internal-fn.c (expand_DEFERRED_INIT): Fall back to
+ zero-initialization as last resort, use the constant
+ size as given by the DEFERRED_INIT argument to build
+ the initializer.
+
+2021-10-04 Marek Polacek <polacek@redhat.com>
+
+ PR c++/97573
+ * doc/invoke.texi: Document -Warray-compare.
+
+2021-10-04 Richard Biener <rguenther@suse.de>
+
+ * gimplify.c (is_var_need_auto_init): DECL_HARD_REGISTER
+ variables are not to be initialized.
+
+2021-10-04 Richard Biener <rguenther@suse.de>
+
+ * expr.h (non_mem_decl_p): Declare.
+ (mem_ref_refers_to_non_mem_p): Likewise.
+ * expr.c (non_mem_decl_p): Export.
+ (mem_ref_refers_to_non_mem_p): Likewise.
+ * internal-fn.c (expand_DEFERRED_INIT): Do not expand the LHS
+ but check the base with mem_ref_refers_to_non_mem_p
+ and non_mem_decl_p.
+
+2021-10-04 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102570
+ * tree-ssa-sccvn.h (vn_reference_op_struct): Document
+ we are using clique for the internal function code.
+ * tree-ssa-sccvn.c (vn_reference_op_eq): Compare the
+ internal function code.
+ (print_vn_reference_ops): Print the internal function code.
+ (vn_reference_op_compute_hash): Hash it.
+ (copy_reference_ops_from_call): Record it.
+ (visit_stmt): Remove the restriction around internal function
+ calls.
+ (fully_constant_vn_reference_p): Use fold_const_call and handle
+ internal functions.
+ (vn_reference_eq): Compare call return types.
+ * tree-ssa-pre.c (create_expression_by_pieces): Handle
+ generating calls to internal functions.
+ (compute_avail): Remove the restriction around internal function
+ calls.
+
+2021-10-04 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/102560
+ * gimple-ssa-warn-alloca.c (alloca_call_type): Remove static
+ marker for invalid_range.
+
+2021-10-04 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102587
+ * internal-fn.c (expand_DEFERRED_INIT): Guard register
+ initialization path an avoid initializing VLA registers
+ with it.
+
+2021-10-04 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/rs6000/vxworks.h (TARGET_INIT_LIBFUNCS): Delete.
+
+2021-10-03 Martin Liska <mliska@suse.cz>
+
+ * toplev.c (toplev::main): Check opt_index if it is a part
+ of cl_options.
+
+2021-10-02 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/102563
+ * range-op.cc (operator_lshift::op1_range): Do not clobber
+ range.
+
+2021-10-02 Martin Liska <mliska@suse.cz>
+
+ * toplev.c (toplev::main): save_decoded_options[0] is program
+ name and so it should be skipped.
+
+2021-10-01 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/102546
+ * range-op.cc (operator_lshift::op1_range): Teach range-ops that
+ X << Y is non-zero implies X is also non-zero.
+
+2021-10-01 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-cores.def (AARCH64_CORE): New
+ Cortex-X2 core.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi: Update docs.
+
+2021-10-01 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-cores.def (AARCH64_CORE): New
+ Cortex-A710 core.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi: Update docs.
+
+2021-10-01 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-cores.def (AARCH64_CORE): New
+ Cortex-A510 core.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi: Update docs.
+
+2021-10-01 Martin Sebor <msebor@redhat.com>
+
+ PR c/102103
+ * doc/invoke.texi (-Waddress): Update.
+ * gengtype.c (write_types): Avoid -Waddress.
+ * poly-int.h (POLY_SET_COEFF): Avoid using null.
+
+2021-10-01 John David Anglin <danglin@gcc.gnu.org>
+
+ PR debug/102373
+ * config/pa/pa.c (pa_option_override): Default to dwarf version 4
+ on hppa64-hpux.
+
+2021-10-01 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64.h (AARCH64_FL_V9): Update value.
+
+2021-10-01 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::compute_ranges): Use
+ get_path_oracle.
+ * gimple-range-path.h (class path_range_query): Remove shadowed
+ m_oracle field.
+ (path_range_query::get_path_oracle): New.
+
+2021-10-01 Jakub Jelinek <jakub@redhat.com>
+ Richard Biener <rguenther@suse.de>
+
+ PR sanitizer/102515
+ * doc/invoke.texi (-fsanitize=integer-divide-by-zero): Remove
+ INT_MIN / -1 division detection from here ...
+ (-fsanitize=signed-integer-overflow): ... and add it here.
+
+2021-10-01 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-arches.def (AARCH64_ARCH): Added
+ armv9-a.
+ * config/aarch64/aarch64.h (AARCH64_FL_V9): New.
+ (AARCH64_FL_FOR_ARCH9): New flags for Armv9-A.
+ (AARCH64_ISA_V9): New ISA flag.
+ * doc/invoke.texi: Update docs.
+
+2021-10-01 Martin Liska <mliska@suse.cz>
+
+ * toplev.c (toplev::main): Save decoded optimization options.
+ * toplev.h (save_opt_decoded_options): New.
+ * doc/extend.texi: Be more clear about optimize and target
+ attributes.
+
+2021-10-01 Eric Botcazou <ebotcazou@adacore.com>
+
+ * explow.c: Include langhooks.h.
+ (set_stack_check_libfunc): Build a proper function type.
+
+2021-10-01 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR c++/64697
+ * config/i386/i386.c (legitimate_pic_address_disp_p): For PE-COFF do
+ not return true for external weak function symbols in medium model.
+
+2021-10-01 Jakub Jelinek <jakub@redhat.com>
+
+ * tree.h (OMP_CLAUSE_ORDER_REPRODUCIBLE): Define.
+ * tree-pretty-print.c (dump_omp_clause) <case OMP_CLAUSE_ORDER>: Print
+ reproducible: for OMP_CLAUSE_ORDER_REPRODUCIBLE.
+ * omp-general.c (omp_extract_for_data): If OMP_CLAUSE_ORDER is seen
+ without OMP_CLAUSE_ORDER_UNCONSTRAINED, overwrite sched_kind to
+ OMP_CLAUSE_SCHEDULE_STATIC.
+
+2021-10-01 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102518
+ * tree-inline.c (setup_one_parameter): Avoid substituting
+ an invariant into contexts where a GIMPLE register is not valid.
+
+2021-09-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/arm/arm-cpus.in: Add Cortex-R52+ CPU.
+ * config/arm/arm-tables.opt: Regenerate.
+ * config/arm/arm-tune.md: Regenerate.
+ * doc/invoke.texi: Update docs.
+
+2021-09-30 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/89954
+ * config/i386/i386.md
+ (sign_extend:WIDE (any_logic:NARROW (memory, immediate)) splitters):
+ New splitters.
+
+2021-09-30 Tobias Burnus <tobias@codesourcery.com>
+
+ * omp-low.c (omp_runtime_api_call): Add omp_aligned_{,c}alloc and
+ omp_{c,re}alloc, fix omp_alloc/omp_free.
+
+2021-09-30 Martin Liska <mliska@suse.cz>
+
+ * defaults.h (ASM_OUTPUT_ASCII): Do not hide global variable
+ asm_out_file and stream directly to MYFILE.
+
+2021-09-30 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_update_misalignment_for_peel):
+ Restore and fix condition under which we apply npeel to
+ the DRs misalignment value.
+
+2021-09-30 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_update_misalignment_for_peel):
+ Fix npeel check for variable amount of peeling.
+
+2021-09-30 Aldy Hernandez <aldyh@redhat.com>
+
+ * lto-wrapper.c (run_gcc): Plug snprintf overflow.
+
+2021-09-30 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range.cc (gimple_ranger::debug): New.
+ * gimple-range.h (class gimple_ranger): Add debug.
+
+2021-09-30 Aldy Hernandez <aldyh@redhat.com>
+
+ PR middle-end/102519
+ * tree-vrp.c (hybrid_threader::~hybrid_threader): Free m_query.
+
+2021-09-29 Indu Bhagat <indu.bhagat@oracle.com>
+
+ PR debug/102507
+ * btfout.c (GTY): Add GTY (()) albeit for cosmetic only purpose.
+ (btf_finalize): Empty the hash_map btf_var_ids.
+
+2021-09-29 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-vrp.c (thread_through_all_blocks): Return bool.
+ (execute_vrp_threader): Return TODO_* flags.
+ (pass_data_vrp_threader): Set todo_flags_finish to 0.
+
+2021-09-29 Aldy Hernandez <aldyh@redhat.com>
+
+ * timevar.def (TV_TREE_VRP_THREADER): New.
+ * tree-vrp.c: Use TV_TREE_VRP_THREADER for VRP threader pass.
+
+2021-09-29 David Faust <david.faust@oracle.com>
+
+ * config.gcc (bpf-*-*): Do not overwrite extra_headers.
+
+2021-09-29 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/aarch64-builtins.c (TYPES_BINOP_PPU): Define
+ new type qualifier enum.
+ (TYPES_TERNOP_SSSU): Likewise.
+ (TYPES_TERNOP_PPPU): Likewise.
+ * config/aarch64/aarch64-simd-builtins.def: Define PPU, SSU,
+ PPPU and SSSU builtin generator macros for qtbl1 and qtbx1
+ Neon builtins.
+ * config/aarch64/arm_neon.h (vqtbl1_p8): Use type-qualified
+ builtin and remove casts.
+ (vqtbl1_s8): Likewise.
+ (vqtbl1q_p8): Likewise.
+ (vqtbl1q_s8): Likewise.
+ (vqtbx1_s8): Likewise.
+ (vqtbx1_p8): Likewise.
+ (vqtbx1q_s8): Likewise.
+ (vqtbx1q_p8): Likewise.
+ (vtbl1_p8): Likewise.
+ (vtbl2_p8): Likewise.
+ (vtbx2_p8): Likewise.
+
+2021-09-29 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_dr_misalign_for_aligned_access):
+ New helper.
+ (vect_update_misalignment_for_peel): Use it to update
+ misaligned to the value necessary for an aligned access.
+ (vect_get_peeling_costs_all_drs): Likewise.
+ (vect_enhance_data_refs_alignment): Likewise.
+
+2021-09-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_expand_cpymem): Count number of
+ emitted operations and adjust heuristic for code size.
+
+2021-09-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_expand_setmem): Count number of
+ emitted operations and adjust heuristic for code size.
+
+2021-09-29 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/102504
+ * gimplify.c (gimplify_scan_omp_clauses): Use omp_check_private even
+ in OMP_SCOPE clauses, not just on worksharing construct clauses.
+
+2021-09-28 Geng Qi <gengqi@linux.alibaba.com>
+
+ * config/riscv/riscv.md (mulv<mode>4): Call gen_smul<mode>3_highpart.
+ (<u>mulditi3): Call <su>muldi3_highpart.
+ (<u>muldi3_highpart): Rename to <su>muldi3_highpart.
+ (<u>mulsidi3): Call <su>mulsi3_highpart.
+ (<u>mulsi3_highpart): Rename to <su>mulsi3_highpart.
+
+2021-09-28 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.h (DSYMUTIL_SPEC): Recognize D sources.
+
+2021-09-28 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/rs6000/darwin.h (FIXED_R13): Add for PPC64.
+ (FIRST_SAVED_GP_REGNO): Save from R13 even when it is one
+ of the fixed regs.
+
+2021-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.h (AARCH64_FL_LS64): Define
+ (AARCH64_FL_V8_7): Likewise.
+ (AARCH64_FL_FOR_ARCH8_7): Likewise.
+ * config/aarch64/aarch64-arches.def (armv8.7-a): Define.
+ * config/aarch64/aarch64-option-extensions.def (ls64): Define.
+ * doc/invoke.texi: Document the above.
+
+2021-09-28 Aldy Hernandez <aldyh@redhat.com>
+
+ * dbgcnt.c (dbg_cnt_counter): New.
+ * dbgcnt.h (dbg_cnt_counter): New.
+ * dumpfile.c (dump_options): Add entry for TDF_THREADING.
+ * dumpfile.h (enum dump_flag): Add TDF_THREADING.
+ * gimple-range-path.cc (DEBUG_SOLVER): Use TDF_THREADING.
+ * tree-ssa-threadupdate.c (dump_jump_thread_path): Dump out
+ debug counter.
+
+2021-09-28 Aldy Hernandez <aldyh@redhat.com>
+
+ * cfgcleanup.c (pass_jump::execute): Check
+ flag_expensive_optimizations.
+ (pass_jump_after_combine::gate): Same.
+ * doc/invoke.texi (-fthread-jumps): Enable for -O1.
+ * opts.c (default_options_table): Enable -fthread-jumps at -O1.
+ * tree-ssa-threadupdate.c
+ (fwd_jt_path_registry::remove_jump_threads_including): Bail unless
+ flag_thread_jumps.
+
+2021-09-28 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * tree-ssa-reassoc.c (biased_names): New global.
+ (propagate_bias_p): New function.
+ (loop_carried_phi): Remove.
+ (propagate_rank): Propagate bias along single uses.
+ (get_rank): Update biased_names when needed.
+
+2021-09-28 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * passes.def (pass_reassoc): Rename parameter to early_p.
+ * tree-ssa-reassoc.c (reassoc_bias_loop_carried_phi_ranks_p):
+ New variable.
+ (phi_rank): Don't bias loop-carried phi ranks
+ before vectorization pass.
+ (execute_reassoc): Add bias_loop_carried_phi_ranks_p parameter.
+ (pass_reassoc::pass_reassoc): Add bias_loop_carried_phi_ranks_p
+ initializer.
+ (pass_reassoc::set_param): Set bias_loop_carried_phi_ranks_p
+ value.
+ (pass_reassoc::execute): Pass bias_loop_carried_phi_ranks_p to
+ execute_reassoc.
+ (pass_reassoc::bias_loop_carried_phi_ranks_p): New member.
+
+2021-09-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/102498
+ * config/i386/i386.c (standard_80387_constant_p): Don't recognize
+ special 80387 instruction XFmode constants if flag_rounding_math.
+
+2021-09-28 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/100112
+ * tree-ssa-sccvn.c (visit_reference_op_load): Record the
+ referece into the hashtable twice in case last_vuse is
+ different from the original vuse on the stmt.
+
+2021-09-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/102492
+ * gimplify.c (gimplify_adjust_omp_clauses_1): Don't call the
+ omp_finish_clause langhook on implicitly added OMP_CLAUSE_PRIVATE
+ clauses on SIMD constructs.
+
+2021-09-28 Aldy Hernandez <aldyh@redhat.com>
+
+ PR tree-optimization/102511
+ * gimple-range-path.cc (path_range_query::range_on_path_entry):
+ Return VARYING when nothing found.
+
+2021-09-28 Hongyu Wang <hongyu.wang@intel.com>
+
+ PR target/102230
+ * config/i386/i386.h (VALID_AVX512FP16_REG_MODE): Add
+ V2HF mode check.
+ (VALID_SSE2_REG_VHF_MODE): Add V4HFmode and V2HFmode.
+ (VALID_MMX_REG_MODE): Add V4HFmode.
+ (SSE_REG_MODE_P): Replace VALID_AVX512FP16_REG_MODE with
+ vector mode condition.
+ * config/i386/i386.c (classify_argument): Parse V4HF/V2HF
+ via sse regs.
+ (function_arg_32): Add V4HFmode.
+ (function_arg_advance_32): Likewise.
+ * config/i386/i386.md (mode): Add V4HF/V2HF.
+ (MODE_SIZE): Likewise.
+ * config/i386/mmx.md (MMXMODE): Add V4HF mode.
+ (V_32): Add V2HF mode.
+ (VHF_32_64): New mode iterator.
+ (*mov<mode>_internal): Adjust sse alternatives to support
+ V4HF mode move.
+ (*mov<mode>_internal): Adjust sse alternatives to support
+ V2HF mode move.
+ (<insn><mode>3): New define_insn for add/sub/mul/div.
+
+2021-09-28 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (pass_thread_jumps::gate): Check
+ flag_thread_jumps.
+ (pass_early_thread_jumps::gate): Same.
+ * tree-ssa-threadedge.c (jump_threader::thread_outgoing_edges):
+ Return if !flag_thread_jumps.
+ * tree-ssa-threadupdate.c
+ (jt_path_registry::register_jump_thread): Assert that
+ flag_thread_jumps is true.
+
+2021-09-28 liuhongt <hongtao.liu@intel.com>
+
+ * simplify-rtx.c
+ (simplify_context::simplify_binary_operation_1): Relax
+ condition of simplifying (vec_concat:M (vec_select op0
+ index0)(vec_select op1 index1)) to allow different modes
+ between op0 and M, but have same inner mode.
+
+2021-09-28 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386-expand.c (emit_reduc_half): Handle
+ V8HF/V16HF/V32HFmode.
+ * config/i386/sse.md (REDUC_SSE_PLUS_MODE): Add V8HF.
+ (REDUC_SSE_SMINMAX_MODE): Ditto.
+ (REDUC_PLUS_MODE): Add V16HF and V32HF.
+ (REDUC_SMINMAX_MODE): Ditto.
+
+2021-09-27 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc
+ (path_range_query::precompute_ranges_in_block): Rename to...
+ (path_range_query::compute_ranges_in_block): ...this.
+ (path_range_query::precompute_ranges): Rename to...
+ (path_range_query::compute_ranges): ...this.
+ (path_range_query::precompute_relations): Rename to...
+ (path_range_query::compute_relations): ...this.
+ (path_range_query::precompute_phi_relations): Rename to...
+ (path_range_query::compute_phi_relations): ...this.
+ * gimple-range-path.h: Rename precompute* to compute*.
+ * tree-ssa-threadbackward.c
+ (back_threader::find_taken_edge_switch): Same.
+ (back_threader::find_taken_edge_cond): Same.
+ * tree-ssa-threadedge.c
+ (hybrid_jt_simplifier::compute_ranges_from_state): Same.
+ (hybrid_jt_state::register_equivs_stmt): Inline...
+ * tree-ssa-threadedge.h: ...here.
+
+2021-09-27 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-vrp.c (lhs_of_dominating_assert): Remove.
+ (class vrp_jt_state): Remove.
+ (class vrp_jt_simplifier): Remove.
+ (vrp_jt_simplifier::simplify): Remove.
+ (class vrp_jump_threader): Remove.
+ (vrp_jump_threader::vrp_jump_threader): Remove.
+ (vrp_jump_threader::~vrp_jump_threader): Remove.
+ (vrp_jump_threader::before_dom_children): Remove.
+ (vrp_jump_threader::after_dom_children): Remove.
+
+2021-09-27 Aldy Hernandez <aldyh@redhat.com>
+
+ * passes.def (pass_vrp_threader): New.
+ * tree-pass.h (make_pass_vrp_threader): Add make_pass_vrp_threader.
+ * tree-ssa-threadedge.c (hybrid_jt_state::register_equivs_stmt): New.
+ (hybrid_jt_simplifier::hybrid_jt_simplifier): New.
+ (hybrid_jt_simplifier::simplify): New.
+ (hybrid_jt_simplifier::compute_ranges_from_state): New.
+ * tree-ssa-threadedge.h (class hybrid_jt_state): New.
+ (class hybrid_jt_simplifier): New.
+ * tree-vrp.c (execute_vrp): Remove ASSERT_EXPR based jump
+ threader.
+ (class hybrid_threader): New.
+ (hybrid_threader::hybrid_threader): New.
+ (hybrid_threader::~hybrid_threader): New.
+ (hybrid_threader::before_dom_children): New.
+ (hybrid_threader::after_dom_children): New.
+ (execute_vrp_threader): New.
+ (class pass_vrp_threader): New.
+ (make_pass_vrp_threader): New.
+
+2021-09-27 Martin Liska <mliska@suse.cz>
+
+ * output.h (enum section_flag): New.
+ (SECTION_FORGET): Remove.
+ (SECTION_ENTSIZE): Make it (1UL << 8) - 1.
+ (SECTION_STYLE_MASK): Define it based on other enum
+ values.
+ * varasm.c (switch_to_section): Remove unused handling of
+ SECTION_FORGET.
+
+2021-09-27 Martin Liska <mliska@suse.cz>
+
+ * common.opt: Add new variable flag_default_complex_method.
+ * opts.c (finish_options): Handle flags related to
+ x_flag_complex_method.
+ * toplev.c (process_options): Remove option handling related
+ to flag_complex_method.
+
+2021-09-27 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102450
+ * gimple-fold.c (gimple_fold_builtin_memory_op): Avoid using
+ type_for_size, instead use int_mode_for_size.
+
+2021-09-27 Andrew Pinski <apinski@marvell.com>
+
+ PR c/94726
+ * gimplify.c (gimplify_save_expr): Return early
+ if the type of val is error_mark_node.
+
+2021-09-27 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssanames.c (ssa_name_has_boolean_range): Use
+ get_range_query.
+
+2021-09-27 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-ssa-evrp-analyze.h (class evrp_range_analyzer): Remove
+ vrp_visit_cond_stmt.
+ * tree-ssa-dom.c (cprop_operand): Convert to range_query API.
+ (cprop_into_stmt): Same.
+ (dom_opt_dom_walker::optimize_stmt): Same.
+
+2021-09-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97351
+ PR tree-optimization/97352
+ PR tree-optimization/82426
+ * tree-vectorizer.h (dr_misalignment): Add vector type
+ argument.
+ (aligned_access_p): Likewise.
+ (known_alignment_for_access_p): Likewise.
+ (vect_supportable_dr_alignment): Likewise.
+ (vect_known_alignment_in_bytes): Likewise. Refactor.
+ (DR_MISALIGNMENT): Remove.
+ (vect_update_shared_vectype): Likewise.
+ * tree-vect-data-refs.c (dr_misalignment): Refactor, handle
+ a vector type with larger alignment requirement and apply
+ the negative step adjustment here.
+ (vect_calculate_target_alignment): Remove.
+ (vect_compute_data_ref_alignment): Get explicit vector type
+ argument, do not apply a negative step alignment adjustment
+ here.
+ (vect_slp_analyze_node_alignment): Re-analyze alignment
+ when we re-visit the DR with a bigger desired alignment but
+ keep more precise results from smaller alignments.
+ * tree-vect-slp.c (vect_update_shared_vectype): Remove.
+ (vect_slp_analyze_node_operations_1): Do not update the
+ shared vector type on stmts.
+ * tree-vect-stmts.c (vect_analyze_stmt): Push/pop the
+ vector type of an SLP node to the representative stmt-info.
+ (vect_transform_stmt): Likewise.
+
+2021-09-27 liuhongt <hongtao.liu@intel.com>
+
+ Revert:
+ 2021-09-09 liuhongt <hongtao.liu@intel.com>
+
+ PR target/101059
+ * config/i386/sse.md (reduc_plus_scal_<mode>): Split to ..
+ (reduc_plus_scal_v4sf): .. this, New define_expand.
+ (reduc_plus_scal_v2df): .. and this, New define_expand.
+
+2021-09-26 liuhongt <hongtao.liu@intel.com>
+
+ * doc/extend.texi (Half-Precision): Remove storage only
+ description for _Float16 w/o avx512fp16.
+
+2021-09-25 Dimitar Dimitrov <dimitar@dinux.eu>
+
+ * config/pru/constraints.md (Rrio): New constraint.
+ * config/pru/predicates.md (regio_operand): New predicate.
+ * config/pru/pru-pragma.c (pru_register_pragmas): Register
+ the __regio_symbol address space.
+ * config/pru/pru-protos.h (pru_symref2ioregno): Declaration.
+ * config/pru/pru.c (pru_symref2ioregno): New helper function.
+ (pru_legitimate_address_p): Remove.
+ (pru_addr_space_legitimate_address_p): Use the address space
+ aware hook variant.
+ (pru_nongeneric_pointer_addrspace): New helper function.
+ (pru_insert_attributes): New function to validate __regio_symbol
+ usage.
+ (TARGET_INSERT_ATTRIBUTES): New macro.
+ (TARGET_LEGITIMATE_ADDRESS_P): Remove.
+ (TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): New macro.
+ * config/pru/pru.h (enum reg_class): Add REGIO_REGS class.
+ * config/pru/pru.md (*regio_readsi): New pattern to read I/O
+ registers.
+ (*regio_nozext_writesi): New pattern to write to I/O registers.
+ (*regio_zext_write_r30<EQS0:mode>): Ditto.
+ * doc/extend.texi: Document the new PRU Named Address Space.
+
+2021-09-24 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/98216
+ PR c++/91292
+ * real.c (encode_ieee_double): Avoid unwanted sign extension.
+ (encode_ieee_quad): Likewise.
+
+2021-09-24 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/102147
+ * ira-build.c (ira_conflict_vector_profitable_p): Make
+ profitability calculation independent of host compiler pointer and
+ IRA_INT_BITS sizes.
+
+2021-09-24 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::path_range_query):
+ Move debugging header...
+ (path_range_query::precompute_ranges): ...here.
+ (path_range_query::internal_range_of_expr): Do not call
+ range_on_path_entry if NAME is defined in the current block.
+
+2021-09-24 Richard Biener <rguenther@suse.de>
+
+ * cfghooks.c (verify_flow_info): Verify unallocated BB and
+ edge flags are not set.
+
+2021-09-24 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadupdate.c (jt_path_registry::cancel_invalid_paths):
+ New.
+ (jt_path_registry::register_jump_thread): Call
+ cancel_invalid_paths.
+ * tree-ssa-threadupdate.h (class jt_path_registry): Add
+ cancel_invalid_paths.
+
+2021-09-24 Feng Xue <fxue@os.amperecomputing.com>
+
+ PR tree-optimization/102400
+ * tree-ssa-sccvn.c (vn_reference_insert_pieces): Initialize
+ result_vdef to zero value.
+
+2021-09-24 Feng Xue <fxue@os.amperecomputing.com>
+
+ PR tree-optimization/102451
+ * tree-ssa-dse.c (delete_dead_or_redundant_call): Record bb of stmt
+ before removal.
+
+2021-09-24 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/sse.md (cond_<insn><mode>): Extend to support
+ vector HFmodes.
+ (cond_mul<mode>): Likewise.
+ (cond_div<mode>): Likewise.
+ (cond_<code><mode>): Likewise.
+ (cond_fma<mode>): Likewise.
+ (cond_fms<mode>): Likewise.
+ (cond_fnma<mode>): Likewise.
+ (cond_fnms<mode>): Likewise.
+
+2021-09-23 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/102463
+ * gimple-range-fold.cc (fold_using_range::relation_fold_and_or): If
+ there is no range-ops handler, don't look for a relation.
+
+2021-09-23 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-cache.cc (ranger_cache::ranger_cache): Take
+ non-executable_edge flag as parameter.
+ * gimple-range-cache.h (ranger_cache): Adjust prototype.
+ * gimple-range-gori.cc (gori_compute::gori_compute): Take
+ non-executable_edge flag as parameter.
+ (gori_compute::outgoing_edge_range_p): Check new flag.
+ * gimple-range-gori.h (gori_compute): Adjust prototype.
+ * gimple-range.cc (gimple_ranger::gimple_ranger): Create new flag.
+ (gimple_ranger::range_on_edge): Check new flag.
+ * gimple-range.h (gimple_ranger::non_executable_edge_flag): New.
+ * gimple-ssa-evrp.c (rvrp_folder): Pass ranger flag to simplifer.
+ (hybrid_folder::hybrid_folder): Set ranger non-executable flag value.
+ (hybrid_folder::fold_stmt): Set flag value in the simplifer.
+ * vr-values.c (simplify_using_ranges::set_and_propagate_unexecutable):
+ Use not_executable flag if provided inmstead of EDGE_EXECUTABLE.
+ (simplify_using_ranges::simplify_switch_using_ranges): Clear
+ EDGE_EXECUTABLE like it originally did.
+ (simplify_using_ranges::cleanup_edges_and_switches): Clear any
+ NON_EXECUTABLE flags.
+ (simplify_using_ranges::simplify_using_ranges): Adjust.
+ * vr-values.h (class simplify_using_ranges): Adjust.
+ (simplify_using_ranges::set_range_query): Add non-executable flag param.
+
+2021-09-23 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ PR target/102024
+ * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Detect
+ zero-width bit fields and return indicator.
+ (rs6000_discover_homogeneous_aggregate): Diagnose when the
+ presence of a zero-width bit field changes parameter passing in
+ GCC 12.
+
+2021-09-23 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-fold.cc (fold_using_range::range_of_phi):
+ Remove dominator check.
+
+2021-09-23 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::precompute_relations):
+ Hoist edge calculations before using EDGE_SUCC.
+
+2021-09-23 Jonathan Wakely <jwakely@redhat.com>
+
+ * configure.ac: Fix --with-multilib-list description.
+ * configure: Regenerate.
+
+2021-09-23 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102448
+ * tree-vect-data-refs.c (vect_duplicate_ssa_name_ptr_info):
+ Clear alignment info copied from DR_PTR_INFO.
+
+2021-09-23 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/i386-expand.c (ix86_use_mask_cmp_p): Enable
+ HFmode mask_cmp.
+ * config/i386/sse.md (sseintvecmodelower): Add HF vector modes.
+ (<avx512>_store<mode>_mask): Extend to support HF vector modes.
+ (vec_cmp<mode><avx512fmaskmodelower>): Likewise.
+ (vcond_mask_<mode><avx512fmaskmodelower>): Likewise.
+ (vcond<mode><mode>): New expander.
+ (vcond<mode><sseintvecmodelower>): Likewise.
+ (vcond<sseintvecmodelower><mode>): Likewise.
+ (vcondu<mode><sseintvecmodelower>): Likewise.
+
+2021-09-23 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/sse.md (extend<ssePHmodelower><mode>2):
+ New expander.
+ (extendv4hf<mode>2): Likewise.
+ (extendv2hfv2df2): Likewise.
+ (trunc<mode><ssePHmodelower>2): Likewise.
+ (avx512fp16_vcvt<castmode>2ph_<mode>): Rename to ...
+ (trunc<mode>v4hf2): ... this, and drop constraints.
+ (avx512fp16_vcvtpd2ph_v2df): Rename to ...
+ (truncv2dfv2hf2): ... this, and likewise.
+
+2021-09-23 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/sse.md (float<floatunssuffix><mode><ssePHmodelower>2):
+ New expander.
+ (avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>):
+ Rename to ...
+ (float<floatunssuffix><mode>v4hf2): ... this, and drop constraints.
+ (avx512fp16_vcvt<floatsuffix>qq2ph_v2di): Rename to ...
+ (float<floatunssuffix>v2div2hf2): ... this, and likewise.
+
+2021-09-23 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/i386.md (fix<fixunssuffix>_trunchf<mode>2): New expander.
+ (fixuns_trunchfhi2): Likewise.
+ (*fixuns_trunchfsi2zext): New define_insn.
+ * config/i386/sse.md (ssePHmodelower): New mode_attr.
+ (fix<fixunssuffix>_trunc<ssePHmodelower><mode>2):
+ New expander for same element vector fix_truncate.
+ (fix<fixunssuffix>_trunc<ssePHmodelower><mode>2):
+ Likewise for V4HF to V4SI/V4DI fix_truncate.
+ (fix<fixunssuffix>_truncv2hfv2di2):
+ Likeise for V2HF to V2DI fix_truncate.
+
+2021-09-23 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/i386.md (<code>hf3): New expander.
+
+2021-09-23 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/sse.md (FMAMODEM): extend to handle FP16.
+ (VFH_SF_AVX512VL): Extend to handle HFmode.
+ (VF_SF_AVX512VL): Deleted.
+
+2021-09-23 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386.md (rinthf2): New expander.
+ (nearbyinthf2): New expander.
+
+2021-09-23 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-dom.c (class dom_jump_threader_simplifier): Rename...
+ (class dom_jt_state): ...this and provide virtual overrides.
+ (dom_jt_state::register_equiv): New.
+ (class dom_jt_simplifier): Rename from
+ dom_jump_threader_simplifier.
+ (dom_jump_threader_simplifier::simplify): Rename...
+ (dom_jt_simplifier::simplify): ...to this.
+ (pass_dominator::execute): Use dom_jt_simplifier and
+ dom_jt_state.
+ * tree-ssa-threadedge.c (jump_threader::jump_threader):
+ Clean-up.
+ (jt_state::register_equivs_stmt): Abstract out...
+ (jump_threader::record_temporary_equivalences_from_stmts_at_dest):
+ ...from here.
+ (jump_threader::thread_around_empty_blocks): Update state.
+ (jump_threader::thread_through_normal_block): Same.
+ (jt_state::jt_state): Remove.
+ (jt_state::push): Remove pass specific bits. Keep block vector
+ updated.
+ (jt_state::append_path): New.
+ (jt_state::pop): Remove pass specific bits.
+ (jt_state::register_equiv): Same.
+ (jt_state::record_ranges_from_stmt): Same.
+ (jt_state::register_equivs_on_edge): Same. Rename...
+ (jt_state::register_equivs_edge): ...to this.
+ (jt_state::dump): New.
+ (jt_state::debug): New.
+ (jump_threader_simplifier::simplify): Remove.
+ (jt_state::get_path): New.
+ * tree-ssa-threadedge.h (class jt_simplifier): Make into a base
+ class. Expose common functionality as virtual methods.
+ (class jump_threader_simplifier): Same. Rename...
+ (class jt_simplifier): ...to this.
+ * tree-vrp.c (class vrp_jump_threader_simplifier): Rename...
+ (class vrp_jt_simplifier): ...to this. Provide pass specific
+ overrides.
+ (class vrp_jt_state): New.
+ (vrp_jump_threader_simplifier::simplify): Rename...
+ (vrp_jt_simplifier::simplify): ...to this. Inline code from
+ what used to be the base class.
+ (vrp_jump_threader::vrp_jump_threader): Use vrp_jt_state and
+ vrp_jt_simplifier.
+
+2021-09-22 Tobias Burnus <tobias@codesourcery.com>
+
+ PR fortran/55534
+ * doc/invoke.texi (-Wno-missing-include-dirs.): Document Fortran
+ behavior.
+
+2021-09-22 Roger Sayle <roger@nextmovesoftware.com>
+ Richard Biener <rguenther@suse.de>
+
+ * match.pd (negation simplifications): Implement some negation
+ folding transformations from fold-const.c's fold_negate_expr.
+ * tree-ssa-sccvn.c (vn_nary_build_or_lookup_1): Add a SIMPLIFY
+ argument, to control whether the op should be simplified prior
+ to looking up/assigning a value number.
+ (vn_nary_build_or_lookup): Update call to vn_nary_build_or_lookup_1.
+ (vn_nary_simplify): Likewise.
+ (visit_nary_op): Likewise, but when constructing a NEGATE_EXPR
+ now call vn_nary_build_or_lookup_1 disabling simplification.
+
+2021-09-22 Jiufu Guo <guojiufu@linux.ibm.com>
+
+ PR tree-optimization/102087
+ * tree-ssa-loop-niter.c (number_of_iterations_until_wrap):
+ Update bound/cmp/control for niter.
+
+2021-09-22 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-fold.cc (fold_using_range::range_of_range_op):
+ Move check for non-empty BB here.
+ (fur_source::register_outgoing_edges): ...from here.
+
+2021-09-22 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::internal_range_of_expr):
+ Remove call to improve_range_with_equivs.
+ (path_range_query::improve_range_with_equivs): Remove
+ * gimple-range-path.h: Remove improve_range_with_equivs.
+
+2021-09-22 dianhong xu <dianhong.xu@intel.com>
+
+ * config/i386/avx512fp16intrin.h:
+ (_mm512_mask_blend_ph): New intrinsic.
+ (_mm512_permutex2var_ph): Ditto.
+ (_mm512_permutexvar_ph): Ditto.
+ * config/i386/avx512fp16vlintrin.h:
+ (_mm256_mask_blend_ph): New intrinsic.
+ (_mm256_permutex2var_ph): Ditto.
+ (_mm256_permutexvar_ph): Ditto.
+ (_mm_mask_blend_ph): Ditto.
+ (_mm_permutex2var_ph): Ditto.
+ (_mm_permutexvar_ph): Ditto.
+
+2021-09-22 dianhong xu <dianhong.xu@intel.com>
+
+ * config/i386/avx512fp16intrin.h: Add new intrinsics.
+ (_mm512_conj_pch): New intrinsic.
+ (_mm512_mask_conj_pch): Ditto.
+ (_mm512_maskz_conj_pch): Ditto.
+ * config/i386/avx512fp16vlintrin.h: Add new intrinsics.
+ (_mm256_conj_pch): New intrinsic.
+ (_mm256_mask_conj_pch): Ditto.
+ (_mm256_maskz_conj_pch): Ditto.
+ (_mm_conj_pch): Ditto.
+ (_mm_mask_conj_pch): Ditto.
+ (_mm_maskz_conj_pch): Ditto.
+
+2021-09-22 dianhong xu <dianhong.xu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_MM512_REDUCE_OP): New macro
+ (_mm512_reduce_add_ph): New intrinsic.
+ (_mm512_reduce_mul_ph): Ditto.
+ (_mm512_reduce_min_ph): Ditto.
+ (_mm512_reduce_max_ph): Ditto.
+ * config/i386/avx512fp16vlintrin.h
+ (_MM256_REDUCE_OP/_MM_REDUCE_OP): New macro.
+ (_mm256_reduce_add_ph): New intrinsic.
+ (_mm256_reduce_mul_ph): Ditto.
+ (_mm256_reduce_min_ph): Ditto.
+ (_mm256_reduce_max_ph): Ditto.
+ (_mm_reduce_add_ph): Ditto.
+ (_mm_reduce_mul_ph): Ditto.
+ (_mm_reduce_min_ph): Ditto.
+ (_mm_reduce_max_ph): Ditto.
+
+2021-09-22 dianhong xu <dianhong.xu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (__m512h_u, __m256h_u,
+ __m128h_u): New typedef.
+ (_mm512_load_ph): New intrinsic.
+ (_mm256_load_ph): Ditto.
+ (_mm_load_ph): Ditto.
+ (_mm512_loadu_ph): Ditto.
+ (_mm256_loadu_ph): Ditto.
+ (_mm_loadu_ph): Ditto.
+ (_mm512_store_ph): Ditto.
+ (_mm256_store_ph): Ditto.
+ (_mm_store_ph): Ditto.
+ (_mm512_storeu_ph): Ditto.
+ (_mm256_storeu_ph): Ditto.
+ (_mm_storeu_ph): Ditto.
+ (_mm512_abs_ph): Ditto.
+ * config/i386/avx512fp16vlintrin.h
+ (_mm_abs_ph): Ditto.
+ (_mm256_abs_ph): Ditto.
+
+2021-09-22 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ * config/s390/tpf.md (prologue_tpf, epilogue_tpf): Add cc clobber.
+
+2021-09-22 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ PR target/102222
+ * config/s390/s390.c (s390_expand_insv): Emit a normal move if it
+ is actually a full copy of the source operand into the target.
+ Don't emit a strict low part move if source and target mode match.
+
+2021-09-22 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/102415
+ * omp-expand.c (expand_omp_single): If region->exit is NULL,
+ assert region->entry is GIMPLE_OMP_SCOPE region and return.
+
+2021-09-22 Jakub Jelinek <jakub@redhat.com>
+
+ * tree.h (OMP_CLAUSE_ALLOCATE_ALIGN): Define.
+ * tree.c (omp_clause_num_ops): Change number of OMP_CLAUSE_ALLOCATE
+ arguments from 2 to 3.
+ * tree-pretty-print.c (dump_omp_clause): Print allocator() around
+ allocate clause allocator and print align if present.
+ * omp-low.c (scan_sharing_clauses): Force allocate_map entry even
+ for omp_default_mem_alloc if align modifier is present. If align
+ modifier is present, use TREE_LIST to encode both allocator and
+ align.
+ (lower_private_allocate, lower_rec_input_clauses, create_task_copyfn):
+ Handle align modifier on allocator clause if present.
+
+2021-09-22 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386.md (define_attr "isa"): Add
+ fma_or_avx512vl.
+ (define_attr "enabled"): Correspond fma_or_avx512vl to
+ TARGET_FMA || TARGET_AVX512VL.
+ * config/i386/mmx.md (fmav2sf4): Extend to AVX512 fma.
+ (fmsv2sf4): Ditto.
+ (fnmav2sf4): Ditto.
+ (fnmsv2sf4): Ditto.
+
+2021-09-22 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386.md (cstorehf3): New define_expand.
+
+2021-09-22 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386.md (<rounding_insn>hf2): New expander.
+ (sse4_1_round<mode>2): Extend from MODEF to MODEFH.
+ * config/i386/sse.md (*sse4_1_round<ssescalarmodesuffix>):
+ Extend from VF_128 to VFH_128.
+
+2021-09-22 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386-features.c (i386-features.c): Handle
+ E_HFmode.
+ * config/i386/i386.md (sqrthf2): New expander.
+ (*sqrthf2): New define_insn.
+ * config/i386/sse.md
+ (*<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>):
+ Extend to VFH_128.
+
+2021-09-22 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_mask_fcmadd_sch):
+ New intrinsic.
+ (_mm_mask3_fcmadd_sch): Likewise.
+ (_mm_maskz_fcmadd_sch): Likewise.
+ (_mm_fcmadd_sch): Likewise.
+ (_mm_mask_fmadd_sch): Likewise.
+ (_mm_mask3_fmadd_sch): Likewise.
+ (_mm_maskz_fmadd_sch): Likewise.
+ (_mm_fmadd_sch): Likewise.
+ (_mm_mask_fcmadd_round_sch): Likewise.
+ (_mm_mask3_fcmadd_round_sch): Likewise.
+ (_mm_maskz_fcmadd_round_sch): Likewise.
+ (_mm_fcmadd_round_sch): Likewise.
+ (_mm_mask_fmadd_round_sch): Likewise.
+ (_mm_mask3_fmadd_round_sch): Likewise.
+ (_mm_maskz_fmadd_round_sch): Likewise.
+ (_mm_fmadd_round_sch): Likewise.
+ (_mm_fcmul_sch): Likewise.
+ (_mm_mask_fcmul_sch): Likewise.
+ (_mm_maskz_fcmul_sch): Likewise.
+ (_mm_fmul_sch): Likewise.
+ (_mm_mask_fmul_sch): Likewise.
+ (_mm_maskz_fmul_sch): Likewise.
+ (_mm_fcmul_round_sch): Likewise.
+ (_mm_mask_fcmul_round_sch): Likewise.
+ (_mm_maskz_fcmul_round_sch): Likewise.
+ (_mm_fmul_round_sch): Likewise.
+ (_mm_mask_fmul_round_sch): Likewise.
+ (_mm_maskz_fmul_round_sch): Likewise.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/sse.md
+ (avx512fp16_fmaddcsh_v8hf_maskz<round_expand_name>): New expander.
+ (avx512fp16_fcmaddcsh_v8hf_maskz<round_expand_name>): Ditto.
+ (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
+ New define insn.
+ (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Ditto.
+ (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
+ Ditto.
+ * config/i386/subst.md (mask_scalarcz_name): New.
+ (mask_scalarc_name): Ditto.
+ (mask_scalarc_operand3): Ditto.
+ (mask_scalarcz_operand4): Ditto.
+ (round_scalarcz_name): Ditto.
+ (round_scalarc_mask_operand3): Ditto.
+ (round_scalarcz_mask_operand4): Ditto.
+ (round_scalarc_mask_op3): Ditto.
+ (round_scalarcz_mask_op4): Ditto.
+ (round_scalarcz_constraint): Ditto.
+ (round_scalarcz_nimm_predicate): Ditto.
+ (mask_scalarcz): Ditto.
+ (mask_scalarc): Ditto.
+ (round_scalarcz): Ditto.
+
+2021-09-22 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm512_fcmadd_pch):
+ New intrinsic.
+ (_mm512_mask_fcmadd_pch): Likewise.
+ (_mm512_mask3_fcmadd_pch): Likewise.
+ (_mm512_maskz_fcmadd_pch): Likewise.
+ (_mm512_fmadd_pch): Likewise.
+ (_mm512_mask_fmadd_pch): Likewise.
+ (_mm512_mask3_fmadd_pch): Likewise.
+ (_mm512_maskz_fmadd_pch): Likewise.
+ (_mm512_fcmadd_round_pch): Likewise.
+ (_mm512_mask_fcmadd_round_pch): Likewise.
+ (_mm512_mask3_fcmadd_round_pch): Likewise.
+ (_mm512_maskz_fcmadd_round_pch): Likewise.
+ (_mm512_fmadd_round_pch): Likewise.
+ (_mm512_mask_fmadd_round_pch): Likewise.
+ (_mm512_mask3_fmadd_round_pch): Likewise.
+ (_mm512_maskz_fmadd_round_pch): Likewise.
+ (_mm512_fcmul_pch): Likewise.
+ (_mm512_mask_fcmul_pch): Likewise.
+ (_mm512_maskz_fcmul_pch): Likewise.
+ (_mm512_fmul_pch): Likewise.
+ (_mm512_mask_fmul_pch): Likewise.
+ (_mm512_maskz_fmul_pch): Likewise.
+ (_mm512_fcmul_round_pch): Likewise.
+ (_mm512_mask_fcmul_round_pch): Likewise.
+ (_mm512_maskz_fcmul_round_pch): Likewise.
+ (_mm512_fmul_round_pch): Likewise.
+ (_mm512_mask_fmul_round_pch): Likewise.
+ (_mm512_maskz_fmul_round_pch): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_fmadd_pch):
+ New intrinsic.
+ (_mm_mask_fmadd_pch): Likewise.
+ (_mm_mask3_fmadd_pch): Likewise.
+ (_mm_maskz_fmadd_pch): Likewise.
+ (_mm256_fmadd_pch): Likewise.
+ (_mm256_mask_fmadd_pch): Likewise.
+ (_mm256_mask3_fmadd_pch): Likewise.
+ (_mm256_maskz_fmadd_pch): Likewise.
+ (_mm_fcmadd_pch): Likewise.
+ (_mm_mask_fcmadd_pch): Likewise.
+ (_mm_mask3_fcmadd_pch): Likewise.
+ (_mm_maskz_fcmadd_pch): Likewise.
+ (_mm256_fcmadd_pch): Likewise.
+ (_mm256_mask_fcmadd_pch): Likewise.
+ (_mm256_mask3_fcmadd_pch): Likewise.
+ (_mm256_maskz_fcmadd_pch): Likewise.
+ (_mm_fmul_pch): Likewise.
+ (_mm_mask_fmul_pch): Likewise.
+ (_mm_maskz_fmul_pch): Likewise.
+ (_mm256_fmul_pch): Likewise.
+ (_mm256_mask_fmul_pch): Likewise.
+ (_mm256_maskz_fmul_pch): Likewise.
+ (_mm_fcmul_pch): Likewise.
+ (_mm_mask_fcmul_pch): Likewise.
+ (_mm_maskz_fcmul_pch): Likewise.
+ (_mm256_fcmul_pch): Likewise.
+ (_mm256_mask_fcmul_pch): Likewise.
+ (_mm256_maskz_fcmul_pch): Likewise.
+ * config/i386/i386-builtin-types.def (V8HF_FTYPE_V8HF_V8HF_V8HF,
+ V8HF_FTYPE_V16HF_V16HF_V16HF, V16HF_FTYPE_V16HF_V16HF_V16HF_UQI,
+ V32HF_FTYPE_V32HF_V32HF_V32HF_INT,
+ V32HF_FTYPE_V32HF_V32HF_V32HF_UHI_INT): Add new builtin types.
+ * config/i386/i386-builtin.def: Add new builtins.
+ * config/i386/i386-expand.c: Handle new builtin types.
+ * config/i386/subst.md (SUBST_CV): New.
+ (maskc_name): Ditto.
+ (maskc_operand3): Ditto.
+ (maskc): Ditto.
+ (sdc_maskz_name): Ditto.
+ (sdc_mask_op4): Ditto.
+ (sdc_mask_op5): Ditto.
+ (sdc_mask_mode512bit_condition): Ditto.
+ (sdc): Ditto.
+ (round_maskc_operand3): Ditto.
+ (round_sdc_mask_operand4): Ditto.
+ (round_maskc_op3): Ditto.
+ (round_sdc_mask_op4): Ditto.
+ (round_saeonly_sdc_mask_operand5): Ditto.
+ * config/i386/sse.md (unspec): Add complex fma unspecs.
+ (avx512fmaskcmode): New.
+ (UNSPEC_COMPLEX_F_C_MA): Ditto.
+ (UNSPEC_COMPLEX_F_C_MUL): Ditto.
+ (complexopname): Ditto.
+ (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): New expander.
+ (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
+ (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): New
+ define insn.
+ (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
+ (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Ditto.
+
+2021-09-22 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.opt (rs6000-density-pct-threshold,
+ rs6000-density-size-threshold, rs6000-density-penalty,
+ rs6000-density-load-pct-threshold,
+ rs6000-density-load-num-threshold): New parameter.
+ * config/rs6000/rs6000.c (rs6000_density_test): Adjust with
+ corresponding parameters.
+
+2021-09-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::defined_outside_path):
+ New.
+ (path_range_query::range_on_path_entry): New.
+ (path_range_query::internal_range_of_expr): Resolve unknowns
+ with ranger.
+ (path_range_query::improve_range_with_equivs): New.
+ (path_range_query::ssa_range_in_phi): Resolve unknowns with
+ ranger.
+ * gimple-range-path.h (class path_range_query): Add
+ defined_outside_path, range_on_path_entry, and
+ improve_range_with_equivs.
+
+2021-09-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::add_to_imports): New.
+ (path_range_query::add_copies_to_imports): New.
+ (path_range_query::precompute_ranges): Call
+ add_copies_to_imports.
+ * gimple-range-path.h (class path_range_query): Add prototypes
+ for add_copies_to_imports and add_to_imports.
+
+2021-09-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::range_defined_in_block):
+ Remove useless code.
+
+2021-09-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-fold.h (class fur_source): Make oracle protected.
+ * gimple-range-path.cc (path_range_query::path_range_query): Add
+ resolve argument. Initialize oracle.
+ (path_range_query::~path_range_query): Delete oracle.
+ (path_range_query::range_of_stmt): Adapt to use relations.
+ (path_range_query::precompute_ranges): Pre-compute relations.
+ (class jt_fur_source): New
+ (jt_fur_source::jt_fur_source): New.
+ (jt_fur_source::register_relation): New.
+ (jt_fur_source::query_relation): New.
+ (path_range_query::precompute_relations): New.
+ (path_range_query::precompute_phi_relations): New.
+ * gimple-range-path.h (path_range_query): Add resolve argument.
+ Add oracle, precompute_relations, precompute_phi_relations.
+ * tree-ssa-threadbackward.c (back_threader::back_threader): Pass
+ resolve argument to solver.
+
+2021-09-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-fold.cc (fold_using_range::range_of_range_op):
+ Rename postfold_gcond_edges to register_outgoing_edges and
+ adapt.
+ (fold_using_range::postfold_gcond_edges): Rename...
+ (fur_source::register_outgoing_edges): ...to this.
+ * gimple-range-fold.h (postfold_gcond_edges): Rename to
+ register_outgoing_edges and move to fur_source.
+
+2021-09-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-fold.cc (fold_using_range::range_of_phi): Check
+ dom_info_available_p.
+
+2021-09-21 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-cache.cc (non_null_ref::non_null_ref): Use create
+ and quick_grow_cleared instead of safe_grow_cleared.
+
+2021-09-21 Thomas Schwinge <thomas@codesourcery.com>
+
+ PR other/102408
+ * omp-oacc-neuter-broadcast.cc (oacc_do_neutering): Evaluate
+ 'random ()' to '0'.
+
+2021-09-21 Richard Earnshaw <rearnsha@arm.com>
+
+ * configure.ac: Detect when the assembler supports new-style
+ architecture extensions.
+ * common/config/arm/arm-common.c (arm_rewrite_mcpu): Return
+ the full CPU string if the assembler can grok it.
+ (arm_rewrite_march): Likewise but for the architecture.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+
+2021-09-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102421
+ * tree-vect-loop.c (vect_dissolve_slp_only_groups): Copy and
+ adjust alignment info.
+
+2021-09-21 Kewen Lin <linkw@linux.ibm.com>
+
+ * ipa-fnsummary.c (ipa_fn_summary_write): Remove inconsistent
+ bitfield stream out.
+
+2021-09-20 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-fold.cc (fold_using_range::range_of_phi): Ignore
+ undefined edges, apply an equivalence if appropriate.
+ * gimple-range-gori.cc (gori_compute::outgoing_edge_range_p): Return
+ UNDEFINED if EDGE_EXECUTABLE is not set.
+ * gimple-range.cc (gimple_ranger::gimple_ranger): Set all edges
+ as EXECUTABLE upon startup.
+ (gimple_ranger::range_on_edge): Return UNDEFINED for edges without
+ EDGE_EXECUTABLE set.
+ * vr-values.c (set_and_propagate_unexecutable): New.
+ (simplify_using_ranges::fold_cond): Call set_and_propagate.
+ (simplify_using_ranges::simplify_switch_using_ranges): Ditto.
+ * vr-values.h: Add prototype.
+
+2021-09-20 Andrew MacLeod <amacleod@redhat.com>
+
+ * value-relation.cc (equiv_oracle::register_initial_def): New.
+ (equiv_oracle::register_relation): Call register_initial_def.
+ (equiv_oracle::add_equiv_to_block): New. Split register_relation.
+ (relation_oracle::register_stmt): Check def block of PHI arguments.
+ * value-relation.h (equiv_oracle): Add new prototypes.
+
+2021-09-20 Matthias Kretz <m.kretz@gsi.de>
+
+ * cppbuiltin.c (define_builtin_macros_for_compilation_flags):
+ Define __RECIPROCAL_MATH__, __NO_SIGNED_ZEROS__,
+ __NO_TRAPPING_MATH__, __ASSOCIATIVE_MATH__, and
+ __ROUNDING_MATH__ according to their corresponding flags.
+ * doc/cpp.texi: Document __RECIPROCAL_MATH__,
+ __NO_SIGNED_ZEROS__, __NO_TRAPPING_MATH__, __ASSOCIATIVE_MATH__,
+ and __ROUNDING_MATH__.
+
+2021-09-20 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (vectorizable_load): Use the vectype
+ from the SLP node.
+
+2021-09-20 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_duplicate_ssa_name_ptr_info):
+ Do not compute alignment of the vectorized access here.
+
+2021-09-20 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
+ Store -1 for runtime alias peeling iterations.
+
+2021-09-20 Richard Biener <rguenther@suse.de>
+
+ * config.gcc: Obsolete hppa[12]*-*-hpux10* and hppa[12]*-*-hpux11*.
+
+2021-09-20 Thomas Schwinge <thomas@codesourcery.com>
+
+ * input.c (string_concat_db::record_string_concatenation)
+ (string_concat_db::get_string_concatenation): Skip for
+ 'RESERVED_LOCATION_P'.
+
+2021-09-20 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/65206
+ * tree-data-ref.h (struct data_reference): Add alt_indices,
+ order it last.
+ * tree-data-ref.c (free_data_ref): Release alt_indices.
+ (dr_analyze_indices): Work on struct indices and get DR_REF as tree.
+ (create_data_ref): Adjust.
+ (initialize_data_dependence_relation): Split into head
+ and tail. When the base objects fail to match up try
+ again with pointer-based analysis of indices.
+ * tree-vectorizer.c (vec_info_shared::check_datarefs): Do
+ not compare the lazily computed alternate set of indices.
+
+2021-09-20 Iain Sandoe <iain@sandoe.co.uk>
+
+ * gcc.c: Test for execute OK when we find the
+ programs for assembler linker and dsymutil and those
+ were specified at configure-time.
+
+2021-09-19 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/102403
+ * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
+ Correct a function pre/postcondition.
+
+2021-09-19 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/102243
+ * tree-ssa-strlen.c (get_range): Handle null cfun.
+
+2021-09-19 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.h (LINK_COMMAND_SPEC_A): Use Darwin10
+ unwinder shim as a convenience library.
+
+2021-09-19 Andrew Pinski <apinski@marvell.com>
+
+ * doc/install.texi: Add note about
+ binutils 2.35 is required for LTO usage.
+
+2021-09-19 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c
+ (back_threader_registry::register_path): Use push_edge.
+ * tree-ssa-threadedge.c
+ (jump_threader::thread_around_empty_blocks): Same.
+ (jump_threader::thread_through_normal_block): Same.
+ (jump_threader::thread_across_edge): Same. Also, use auto_bitmap.
+ Tidy up code.
+ * tree-ssa-threadupdate.c
+ (jt_path_registry::allocate_thread_edge): Remove.
+ (jt_path_registry::push_edge): New.
+ (dump_jump_thread_path): Make static.
+ * tree-ssa-threadupdate.h (allocate_thread_edge): Remove.
+ (push_edge): New.
+
+2021-09-19 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::path_range_query): Add
+ header.
+ (path_range_query::dump): Remove extern declaration of dump_ranger.
+ * gimple-range-trace.cc (dump_ranger): Add DEBUG_FUNCTION marker.
+ * gimple-range-trace.h (dump_ranger): Add prototype.
+
+2021-09-19 John Ericson <git@JohnEricson.me>
+
+ * gcc.c (find_a_program): New function, factored out of...
+ (find_a_file): Here.
+ (execute): Use find_a_program when looking for programs rather
+ than find_a_file.
+
+2021-09-19 Matwey V. Kornilov <matwey.kornilov@gmail.com>
+
+ * config/avr/avr-mcus.def: Add atmega324pb.
+ * doc/avr-mmcu.texi: Corresponding changes.
+
+2021-09-19 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR middle-end/88173
+ * match.pd (cmp @0 REAL_CST@1): When @0 is also REAL_CST, apply
+ the same transformations as to @1. For comparisons against NaN,
+ don't check HONOR_SNANS but confirm that neither operand is a
+ signaling NaN.
+
+2021-09-19 Benjamin Peterson <benjamin@locrian.net>
+
+ * attribs.c (make_unique_name): Delete.
+ * attribs.h (make_unique_name): Delete.
+
+2021-09-19 Andrew Pinski <apinski@marvell.com>
+
+ * lra-constraints.c (check_and_process_move): Assert
+ that dclass and sclass are greater than or equal to NO_REGS.
+
+2021-09-18 Jakub Jelinek <jakub@redhat.com>
+
+ * tree.h (OMP_CLAUSE_ORDER_UNCONSTRAINED): Define.
+ * tree-pretty-print.c (dump_omp_clause): Print unconstrained:
+ for OMP_CLAUSE_ORDER_UNCONSTRAINED.
+
+2021-09-18 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386-features.c (remove_partial_avx_dependency):
+ Restrict TARGET_USE_VECTOR_FP_CONVERTS and
+ TARGET_USE_VECTOR_CONVERTS to conversion instructions only.
+
+2021-09-18 Jakub Jelinek <jakub@redhat.com>
+
+ * gimplify.c (omp_default_clause): For C/C++ default({,first}private),
+ if file/namespace scope variable doesn't have predetermined sharing,
+ treat it as if there was default(none).
+
+2021-09-18 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_fmadd_sh):
+ New intrinsic.
+ (_mm_mask_fmadd_sh): Likewise.
+ (_mm_mask3_fmadd_sh): Likewise.
+ (_mm_maskz_fmadd_sh): Likewise.
+ (_mm_fmadd_round_sh): Likewise.
+ (_mm_mask_fmadd_round_sh): Likewise.
+ (_mm_mask3_fmadd_round_sh): Likewise.
+ (_mm_maskz_fmadd_round_sh): Likewise.
+ (_mm_fnmadd_sh): Likewise.
+ (_mm_mask_fnmadd_sh): Likewise.
+ (_mm_mask3_fnmadd_sh): Likewise.
+ (_mm_maskz_fnmadd_sh): Likewise.
+ (_mm_fnmadd_round_sh): Likewise.
+ (_mm_mask_fnmadd_round_sh): Likewise.
+ (_mm_mask3_fnmadd_round_sh): Likewise.
+ (_mm_maskz_fnmadd_round_sh): Likewise.
+ (_mm_fmsub_sh): Likewise.
+ (_mm_mask_fmsub_sh): Likewise.
+ (_mm_mask3_fmsub_sh): Likewise.
+ (_mm_maskz_fmsub_sh): Likewise.
+ (_mm_fmsub_round_sh): Likewise.
+ (_mm_mask_fmsub_round_sh): Likewise.
+ (_mm_mask3_fmsub_round_sh): Likewise.
+ (_mm_maskz_fmsub_round_sh): Likewise.
+ (_mm_fnmsub_sh): Likewise.
+ (_mm_mask_fnmsub_sh): Likewise.
+ (_mm_mask3_fnmsub_sh): Likewise.
+ (_mm_maskz_fnmsub_sh): Likewise.
+ (_mm_fnmsub_round_sh): Likewise.
+ (_mm_mask_fnmsub_round_sh): Likewise.
+ (_mm_mask3_fnmsub_round_sh): Likewise.
+ (_mm_maskz_fnmsub_round_sh): Likewise.
+ * config/i386/i386-builtin-types.def
+ (V8HF_FTYPE_V8HF_V8HF_V8HF_UQI_INT): New builtin type.
+ * config/i386/i386-builtin.def: Add new builtins.
+ * config/i386/i386-expand.c: Handle new builtin type.
+ * config/i386/sse.md (fmai_vmfmadd_<mode><round_name>):
+ Ajdust to support FP16.
+ (fmai_vmfmsub_<mode><round_name>): Ditto.
+ (fmai_vmfnmadd_<mode><round_name>): Ditto.
+ (fmai_vmfnmsub_<mode><round_name>): Ditto.
+ (*fmai_fmadd_<mode>): Ditto.
+ (*fmai_fmsub_<mode>): Ditto.
+ (*fmai_fnmadd_<mode><round_name>): Ditto.
+ (*fmai_fnmsub_<mode><round_name>): Ditto.
+ (avx512f_vmfmadd_<mode>_mask<round_name>): Ditto.
+ (avx512f_vmfmadd_<mode>_mask3<round_name>): Ditto.
+ (avx512f_vmfmadd_<mode>_maskz<round_expand_name>): Ditto.
+ (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Ditto.
+ (*avx512f_vmfmsub_<mode>_mask<round_name>): Ditto.
+ (avx512f_vmfmsub_<mode>_mask3<round_name>): Ditto.
+ (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Ditto.
+ (*avx512f_vmfnmsub_<mode>_mask<round_name>): Ditto.
+ (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Ditto.
+ (*avx512f_vmfnmsub_<mode>_mask<round_name>): Ditto.
+ (*avx512f_vmfnmadd_<mode>_mask<round_name>): Renamed to ...
+ (avx512f_vmfnmadd_<mode>_mask<round_name>) ... this, and
+ adjust to support FP16.
+ (avx512f_vmfnmadd_<mode>_mask3<round_name>): Ditto.
+ (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Ditto.
+ (avx512f_vmfnmadd_<mode>_maskz<round_expand_name>): New
+ expander.
+
+2021-09-18 H.J. Lu <hjl.tools@gmail.com>
+
+ * config/i386/sse.md (avx512fmaskmodelower): Extend to support
+ HF modes.
+ (maskload<mode><avx512fmaskmodelower>): Ditto.
+ (maskstore<mode><avx512fmaskmodelower>): Ditto.
+
+2021-09-18 H.J. Lu <hjl.tools@gmail.com>
+
+ * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
+ Handle HFmode.
+ (ix86_expand_copysign): Ditto.
+ (ix86_expand_xorsign): Ditto.
+ * config/i386/i386.c (ix86_build_const_vector): Handle HF vector
+ modes.
+ (ix86_build_signbit_mask): Ditto.
+ (ix86_can_change_mode_class): Ditto.
+ * config/i386/i386.md
+ (SSEMODEF): Add HFmode.
+ (ssevecmodef): Ditto.
+ (<code>hf2): New define_expand.
+ (*<code>hf2_1): New define_insn_and_split.
+ (copysign<mode>): Extend to support HFmode under AVX512FP16.
+ (xorsign<mode>): Ditto.
+ * config/i386/sse.md (VFB): New mode iterator.
+ (VFB_128_256): Ditto.
+ (VFB_512): Ditto.
+ (sseintvecmode2): Support HF vector mode.
+ (<code><mode>2): Use new mode iterator.
+ (*<code><mode>2): Ditto.
+ (copysign<mode>3): Ditto.
+ (xorsign<mode>3): Ditto.
+ (<code><mode>3<mask_name>): Ditto.
+ (<code><mode>3<mask_name>): Ditto.
+ (<sse>_andnot<mode>3<mask_name>): Adjust for HF vector mode.
+ (<sse>_andnot<mode>3<mask_name>): Ditto.
+ (*<code><mode>3<mask_name>): Ditto.
+ (*<code><mode>3<mask_name>): Ditto.
+
+2021-09-18 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm512_mask_fmadd_ph):
+ New intrinsic.
+ (_mm512_mask3_fmadd_ph): Likewise.
+ (_mm512_maskz_fmadd_ph): Likewise.
+ (_mm512_fmadd_round_ph): Likewise.
+ (_mm512_mask_fmadd_round_ph): Likewise.
+ (_mm512_mask3_fmadd_round_ph): Likewise.
+ (_mm512_maskz_fmadd_round_ph): Likewise.
+ (_mm512_fnmadd_ph): Likewise.
+ (_mm512_mask_fnmadd_ph): Likewise.
+ (_mm512_mask3_fnmadd_ph): Likewise.
+ (_mm512_maskz_fnmadd_ph): Likewise.
+ (_mm512_fnmadd_round_ph): Likewise.
+ (_mm512_mask_fnmadd_round_ph): Likewise.
+ (_mm512_mask3_fnmadd_round_ph): Likewise.
+ (_mm512_maskz_fnmadd_round_ph): Likewise.
+ (_mm512_fmsub_ph): Likewise.
+ (_mm512_mask_fmsub_ph): Likewise.
+ (_mm512_mask3_fmsub_ph): Likewise.
+ (_mm512_maskz_fmsub_ph): Likewise.
+ (_mm512_fmsub_round_ph): Likewise.
+ (_mm512_mask_fmsub_round_ph): Likewise.
+ (_mm512_mask3_fmsub_round_ph): Likewise.
+ (_mm512_maskz_fmsub_round_ph): Likewise.
+ (_mm512_fnmsub_ph): Likewise.
+ (_mm512_mask_fnmsub_ph): Likewise.
+ (_mm512_mask3_fnmsub_ph): Likewise.
+ (_mm512_maskz_fnmsub_ph): Likewise.
+ (_mm512_fnmsub_round_ph): Likewise.
+ (_mm512_mask_fnmsub_round_ph): Likewise.
+ (_mm512_mask3_fnmsub_round_ph): Likewise.
+ (_mm512_maskz_fnmsub_round_ph): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm256_fmadd_ph):
+ New intrinsic.
+ (_mm256_mask_fmadd_ph): Likewise.
+ (_mm256_mask3_fmadd_ph): Likewise.
+ (_mm256_maskz_fmadd_ph): Likewise.
+ (_mm_fmadd_ph): Likewise.
+ (_mm_mask_fmadd_ph): Likewise.
+ (_mm_mask3_fmadd_ph): Likewise.
+ (_mm_maskz_fmadd_ph): Likewise.
+ (_mm256_fnmadd_ph): Likewise.
+ (_mm256_mask_fnmadd_ph): Likewise.
+ (_mm256_mask3_fnmadd_ph): Likewise.
+ (_mm256_maskz_fnmadd_ph): Likewise.
+ (_mm_fnmadd_ph): Likewise.
+ (_mm_mask_fnmadd_ph): Likewise.
+ (_mm_mask3_fnmadd_ph): Likewise.
+ (_mm_maskz_fnmadd_ph): Likewise.
+ (_mm256_fmsub_ph): Likewise.
+ (_mm256_mask_fmsub_ph): Likewise.
+ (_mm256_mask3_fmsub_ph): Likewise.
+ (_mm256_maskz_fmsub_ph): Likewise.
+ (_mm_fmsub_ph): Likewise.
+ (_mm_mask_fmsub_ph): Likewise.
+ (_mm_mask3_fmsub_ph): Likewise.
+ (_mm_maskz_fmsub_ph): Likewise.
+ (_mm256_fnmsub_ph): Likewise.
+ (_mm256_mask_fnmsub_ph): Likewise.
+ (_mm256_mask3_fnmsub_ph): Likewise.
+ (_mm256_maskz_fnmsub_ph): Likewise.
+ (_mm_fnmsub_ph): Likewise.
+ (_mm_mask_fnmsub_ph): Likewise.
+ (_mm_mask3_fnmsub_ph): Likewise.
+ (_mm_maskz_fnmsub_ph): Likewise.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/sse.md
+ (<avx512>_fmadd_<mode>_maskz<round_expand_name>): Adjust to
+ support HF vector modes.
+ (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1): Ditto.
+ (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2): Ditto.
+ (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3): Ditto.
+ (<avx512>_fmadd_<mode>_mask<round_name>): Ditto.
+ (<avx512>_fmadd_<mode>_mask3<round_name>): Ditto.
+ (<avx512>_fmsub_<mode>_maskz<round_expand_name>): Ditto.
+ (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1): Ditto.
+ (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_2): Ditto.
+ (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_3): Ditto.
+ (<avx512>_fmsub_<mode>_mask<round_name>): Ditto.
+ (<avx512>_fmsub_<mode>_mask3<round_name>): Ditto.
+ (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1): Ditto.
+ (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_2): Ditto.
+ (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_3): Ditto.
+ (<avx512>_fnmadd_<mode>_mask<round_name>): Ditto.
+ (<avx512>_fnmadd_<mode>_mask3<round_name>): Ditto.
+ (<avx512>_fnmsub_<mode>_maskz<round_expand_name>): Ditto.
+ (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Ditto.
+ (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_2): Ditto.
+ (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_3): Ditto.
+ (<avx512>_fnmsub_<mode>_mask<round_name>): Ditto.
+ (<avx512>_fnmsub_<mode>_mask3<round_name>): Ditto.
+
+2021-09-18 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm512_fmaddsub_ph):
+ New intrinsic.
+ (_mm512_mask_fmaddsub_ph): Likewise.
+ (_mm512_mask3_fmaddsub_ph): Likewise.
+ (_mm512_maskz_fmaddsub_ph): Likewise.
+ (_mm512_fmaddsub_round_ph): Likewise.
+ (_mm512_mask_fmaddsub_round_ph): Likewise.
+ (_mm512_mask3_fmaddsub_round_ph): Likewise.
+ (_mm512_maskz_fmaddsub_round_ph): Likewise.
+ (_mm512_mask_fmsubadd_ph): Likewise.
+ (_mm512_mask3_fmsubadd_ph): Likewise.
+ (_mm512_maskz_fmsubadd_ph): Likewise.
+ (_mm512_fmsubadd_round_ph): Likewise.
+ (_mm512_mask_fmsubadd_round_ph): Likewise.
+ (_mm512_mask3_fmsubadd_round_ph): Likewise.
+ (_mm512_maskz_fmsubadd_round_ph): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm256_fmaddsub_ph):
+ New intrinsic.
+ (_mm256_mask_fmaddsub_ph): Likewise.
+ (_mm256_mask3_fmaddsub_ph): Likewise.
+ (_mm256_maskz_fmaddsub_ph): Likewise.
+ (_mm_fmaddsub_ph): Likewise.
+ (_mm_mask_fmaddsub_ph): Likewise.
+ (_mm_mask3_fmaddsub_ph): Likewise.
+ (_mm_maskz_fmaddsub_ph): Likewise.
+ (_mm256_fmsubadd_ph): Likewise.
+ (_mm256_mask_fmsubadd_ph): Likewise.
+ (_mm256_mask3_fmsubadd_ph): Likewise.
+ (_mm256_maskz_fmsubadd_ph): Likewise.
+ (_mm_fmsubadd_ph): Likewise.
+ (_mm_mask_fmsubadd_ph): Likewise.
+ (_mm_mask3_fmsubadd_ph): Likewise.
+ (_mm_maskz_fmsubadd_ph): Likewise.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/sse.md (VFH_SF_AVX512VL): New mode iterator.
+ * (<avx512>_fmsubadd_<mode>_maskz<round_expand_name>): New expander.
+ * (<avx512>_fmaddsub_<mode>_maskz<round_expand_name>): Use
+ VFH_SF_AVX512VL.
+ * (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ * (<avx512>_fmaddsub_<mode>_mask<round_name>): Ditto.
+ * (<avx512>_fmaddsub_<mode>_mask3<round_name>): Ditto.
+ * (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
+ Ditto.
+ * (<avx512>_fmsubadd_<mode>_mask<round_name>): Ditto.
+ * (<avx512>_fmsubadd_<mode>_mask3<round_name>): Ditto.
+
+2021-09-18 liuhongt <hongtao.liu@intel.com>
+
+ PR target/87767
+ * config/i386/i386.c (ix86_print_operand): Handle
+ V8HF/V16HF/V32HFmode.
+ * config/i386/i386.h (VALID_BCST_MODE_P): Add HFmode.
+ * config/i386/sse.md (avx512bcst): Remove.
+
+2021-09-17 Martin Sebor <msebor@redhat.com>
+
+ * Makefile.in (OBJS): Add gimple-predicate-analysis.o.
+ * tree-ssa-uninit.c (max_phi_args): Move to gimple-predicate-analysis.
+ (MASK_SET_BIT, MASK_TEST_BIT, MASK_EMPTY): Same.
+ (check_defs): Add comment.
+ (can_skip_redundant_opnd): Update comment.
+ (compute_uninit_opnds_pos): Adjust to namespace change.
+ (find_pdom): Move to gimple-predicate-analysis.cc.
+ (find_dom): Same.
+ (struct uninit_undef_val_t): New.
+ (is_non_loop_exit_postdominating): Move to gimple-predicate-analysis.cc.
+ (find_control_equiv_block): Same.
+ (MAX_NUM_CHAINS, MAX_CHAIN_LEN, MAX_POSTDOM_CHECK): Same.
+ (MAX_SWITCH_CASES): Same.
+ (compute_control_dep_chain): Same.
+ (find_uninit_use): Use predicate analyzer.
+ (struct pred_info): Move to gimple-predicate-analysis.
+ (convert_control_dep_chain_into_preds): Same.
+ (find_predicates): Same.
+ (collect_phi_def_edges): Same.
+ (warn_uninitialized_phi): Use predicate analyzer.
+ (find_def_preds): Move to gimple-predicate-analysis.
+ (dump_pred_info): Same.
+ (dump_pred_chain): Same.
+ (dump_predicates): Same.
+ (destroy_predicate_vecs): Remove.
+ (execute_late_warn_uninitialized): New.
+ (get_cmp_code): Move to gimple-predicate-analysis.
+ (is_value_included_in): Same.
+ (value_sat_pred_p): Same.
+ (find_matching_predicate_in_rest_chains): Same.
+ (is_use_properly_guarded): Same.
+ (prune_uninit_phi_opnds): Same.
+ (find_var_cmp_const): Same.
+ (use_pred_not_overlap_with_undef_path_pred): Same.
+ (pred_equal_p): Same.
+ (is_neq_relop_p): Same.
+ (is_neq_zero_form_p): Same.
+ (pred_expr_equal_p): Same.
+ (is_pred_expr_subset_of): Same.
+ (is_pred_chain_subset_of): Same.
+ (is_included_in): Same.
+ (is_superset_of): Same.
+ (pred_neg_p): Same.
+ (simplify_pred): Same.
+ (simplify_preds_2): Same.
+ (simplify_preds_3): Same.
+ (simplify_preds_4): Same.
+ (simplify_preds): Same.
+ (push_pred): Same.
+ (push_to_worklist): Same.
+ (get_pred_info_from_cmp): Same.
+ (is_degenerated_phi): Same.
+ (normalize_one_pred_1): Same.
+ (normalize_one_pred): Same.
+ (normalize_one_pred_chain): Same.
+ (normalize_preds): Same.
+ (can_one_predicate_be_invalidated_p): Same.
+ (can_chain_union_be_invalidated_p): Same.
+ (uninit_uses_cannot_happen): Same.
+ (pass_late_warn_uninitialized::execute): Define.
+ * gimple-predicate-analysis.cc: New file.
+ * gimple-predicate-analysis.h: New file.
+
+2021-09-17 Julian Brown <julian@codesourcery.com>
+
+ * config/gcn/gcn.c (gimple.h): Include.
+ (gcn_fork_join): Emit barrier for worker-level joins.
+ * omp-oacc-neuter-broadcast.cc (find_local_vars_to_propagate): Add
+ writes_gang_private bitmap parameter. Set bit for blocks
+ containing gang-private variable writes.
+ (worker_single_simple): Don't emit barrier after predicated block.
+ (worker_single_copy): Don't emit barrier if we're not broadcasting
+ anything and the block contains no gang-private writes.
+ (neuter_worker_single): Don't predicate blocks that only contain
+ NOPs or internal marker functions. Pass has_gang_private_write
+ argument to worker_single_copy.
+ (oacc_do_neutering): Add writes_gang_private bitmap handling.
+
+2021-09-17 Julian Brown <julian@codesourcery.com>
+
+ * config/gcn/gcn-protos.h
+ (gcn_goacc_create_worker_broadcast_record): Update prototype.
+ * config/gcn/gcn-tree.c (gcn_goacc_get_worker_red_decl): Use
+ preallocated block of LDS memory. Do not cache/share decls for
+ reduction temporaries between invocations.
+ (gcn_goacc_reduction_teardown): Unshare VAR on second use.
+ (gcn_goacc_create_worker_broadcast_record): Add OFFSET parameter
+ and return temporary LDS space at that offset. Return pointer in
+ "sender" case.
+ * config/gcn/gcn.c (acc_lds_size, gang_private_hwm, lds_allocs):
+ New global vars.
+ (ACC_LDS_SIZE): Define as acc_lds_size.
+ (gcn_init_machine_status): Don't initialise lds_allocated,
+ lds_allocs, reduc_decls fields of machine function struct.
+ (gcn_option_override): Handle default size for gang-private
+ variables and -mgang-private-size option.
+ (gcn_expand_prologue): Use LDS_SIZE instead of LDS_SIZE-1 when
+ initialising M0_REG.
+ (gcn_shared_mem_layout): New function.
+ (gcn_print_lds_decl): Update comment. Use global lds_allocs map and
+ gang_private_hwm variable.
+ (TARGET_GOACC_SHARED_MEM_LAYOUT): Define target hook.
+ * config/gcn/gcn.h (machine_function): Remove lds_allocated,
+ lds_allocs, reduc_decls. Add reduction_base, reduction_limit.
+ * config/gcn/gcn.opt (gang_private_size_opt): New global.
+ (mgang-private-size=): New option.
+ * doc/tm.texi.in (TARGET_GOACC_SHARED_MEM_LAYOUT): Place
+ documentation hook.
+ * doc/tm.texi: Regenerate.
+ * omp-oacc-neuter-broadcast.cc (targhooks.h, diagnostic-core.h):
+ Add includes.
+ (build_sender_ref): Handle sender_decl being pointer.
+ (worker_single_copy): Add PLACEMENT and ISOLATE_BROADCASTS
+ parameters. Pass placement argument to
+ create_worker_broadcast_record hook invocations. Handle
+ sender_decl being pointer and isolate_broadcasts inserting extra
+ barriers.
+ (blk_offset_map_t): Add typedef.
+ (neuter_worker_single): Add BLK_OFFSET_MAP parameter. Pass
+ preallocated range to worker_single_copy call.
+ (dfs_broadcast_reachable_1): New function.
+ (idx_decl_pair_t, used_range_vec_t): New typedefs.
+ (sort_size_descending): New function.
+ (addr_range): New class.
+ (splay_tree_compare_addr_range, splay_tree_free_key)
+ (first_fit_range, merge_ranges_1, merge_ranges): New functions.
+ (execute_omp_oacc_neuter_broadcast): Rename to...
+ (oacc_do_neutering): ... this. Add BOUNDS_LO, BOUNDS_HI
+ parameters. Arrange layout of shared memory for broadcast
+ operations.
+ (execute_omp_oacc_neuter_broadcast): New function.
+ (pass_omp_oacc_neuter_broadcast::gate): Remove num_workers==1
+ handling from here. Enable pass for all OpenACC routines in order
+ to call shared memory-layout hook.
+ * target.def (create_worker_broadcast_record): Add OFFSET
+ parameter.
+ (shared_mem_layout): New hook.
+
+2021-09-17 Julian Brown <julian@codesourcery.com>
+ Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-oacc-neuter-broadcast.cc
+ (pass_omp_oacc_neuter_broadcast::gate): Disable if num_workers is
+ 1.
+ (execute_omp_oacc_neuter_broadcast): Adjust.
+
+2021-09-17 Andrew MacLeod <amacleod@redhat.com>
+
+ * value-relation.cc (class equiv_chain): Move to header file.
+ (path_oracle::path_oracle): New.
+ (path_oracle::~path_oracle): New.
+ (path_oracle::register_relation): New.
+ (path_oracle::query_relation): New.
+ (path_oracle::reset_path): New.
+ (path_oracle::dump): New.
+ * value-relation.h (class equiv_chain): Move to here.
+ (class path_oracle): New.
+
+2021-09-17 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-cache.cc (ranger_cache::ranger_cache): Create a DOM
+ based oracle.
+ * gimple-range-fold.cc (fur_depend::register_relation): Use
+ register_stmt/edge routines.
+ * value-relation.cc (equiv_chain::find): Relocate from equiv_oracle.
+ (equiv_oracle::equiv_oracle): Create self equivalence cache.
+ (equiv_oracle::~equiv_oracle): Release same.
+ (equiv_oracle::equiv_set): Return entry from self equiv cache if there
+ are no equivalences.
+ (equiv_oracle::find_equiv_block): Move list find to equiv_chain.
+ (equiv_oracle::register_relation): Rename from register_equiv.
+ (relation_chain_head::find_relation): Relocate from dom_oracle.
+ (relation_oracle::register_stmt): New.
+ (relation_oracle::register_edge): New.
+ (dom_oracle::*): Rename from relation_oracle.
+ (dom_oracle::register_relation): Adjust to call equiv_oracle.
+ (dom_oracle::set_one_relation): Split from register_relation.
+ (dom_oracle::register_transitives): Consolidate 2 methods.
+ (dom_oracle::find_relation_block): Move core to relation_chain.
+ (dom_oracle::query_relation): Rename from find_relation_dom and adjust.
+ * value-relation.h (class relation_oracle): New pure virtual base.
+ (class equiv_oracle): Inherit from relation_oracle and adjust.
+ (class dom_oracle): Rename from old relation_oracle and adjust.
+
+2021-09-17 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/102200
+ * pointer-query.cc (access_ref::inform_access): Handle MIN/MAX_EXPR.
+ (handle_min_max_size): Change argument. Store original SSA_NAME for
+ operands to potentially distinct (sub)objects.
+ (compute_objsize_r): Adjust call to the above.
+
+2021-09-17 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000-builtins.h): New include.
+ (rs6000_new_builtin_vectorized_function): New function.
+ (rs6000_new_builtin_md_vectorized_function): Likewise.
+ (rs6000_builtin_vectorized_function): Call
+ rs6000_new_builtin_vectorized_function.
+ (rs6000_builtin_md_vectorized_function): Call
+ rs6000_new_builtin_md_vectorized_function.
+
+2021-09-17 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def (ASSEMBLE_ACC): Add mmaint flag.
+ (ASSEMBLE_PAIR): Likewise.
+ (BUILD_ACC): Likewise.
+ (DISASSEMBLE_ACC): Likewise.
+ (DISASSEMBLE_PAIR): Likewise.
+ (PMXVBF16GER2): Likewise.
+ (PMXVBF16GER2NN): Likewise.
+ (PMXVBF16GER2NP): Likewise.
+ (PMXVBF16GER2PN): Likewise.
+ (PMXVBF16GER2PP): Likewise.
+ (PMXVF16GER2): Likewise.
+ (PMXVF16GER2NN): Likewise.
+ (PMXVF16GER2NP): Likewise.
+ (PMXVF16GER2PN): Likewise.
+ (PMXVF16GER2PP): Likewise.
+ (PMXVF32GER): Likewise.
+ (PMXVF32GERNN): Likewise.
+ (PMXVF32GERNP): Likewise.
+ (PMXVF32GERPN): Likewise.
+ (PMXVF32GERPP): Likewise.
+ (PMXVF64GER): Likewise.
+ (PMXVF64GERNN): Likewise.
+ (PMXVF64GERNP): Likewise.
+ (PMXVF64GERPN): Likewise.
+ (PMXVF64GERPP): Likewise.
+ (PMXVI16GER2): Likewise.
+ (PMXVI16GER2PP): Likewise.
+ (PMXVI16GER2S): Likewise.
+ (PMXVI16GER2SPP): Likewise.
+ (PMXVI4GER8): Likewise.
+ (PMXVI4GER8PP): Likewise.
+ (PMXVI8GER4): Likewise.
+ (PMXVI8GER4PP): Likewise.
+ (PMXVI8GER4SPP): Likewise.
+ (XVBF16GER2): Likewise.
+ (XVBF16GER2NN): Likewise.
+ (XVBF16GER2NP): Likewise.
+ (XVBF16GER2PN): Likewise.
+ (XVBF16GER2PP): Likewise.
+ (XVF16GER2): Likewise.
+ (XVF16GER2NN): Likewise.
+ (XVF16GER2NP): Likewise.
+ (XVF16GER2PN): Likewise.
+ (XVF16GER2PP): Likewise.
+ (XVF32GER): Likewise.
+ (XVF32GERNN): Likewise.
+ (XVF32GERNP): Likewise.
+ (XVF32GERPN): Likewise.
+ (XVF32GERPP): Likewise.
+ (XVF64GER): Likewise.
+ (XVF64GERNN): Likewise.
+ (XVF64GERNP): Likewise.
+ (XVF64GERPN): Likewise.
+ (XVF64GERPP): Likewise.
+ (XVI16GER2): Likewise.
+ (XVI16GER2PP): Likewise.
+ (XVI16GER2S): Likewise.
+ (XVI16GER2SPP): Likewise.
+ (XVI4GER8): Likewise.
+ (XVI4GER8PP): Likewise.
+ (XVI8GER4): Likewise.
+ (XVI8GER4PP): Likewise.
+ (XVI8GER4SPP): Likewise.
+ (XXMFACC): Likewise.
+ (XXMTACC): Likewise.
+ (XXSETACCZ): Likewise.
+ (ASSEMBLE_PAIR_V): Likewise.
+ (BUILD_PAIR): Likewise.
+ (DISASSEMBLE_PAIR_V): Likewise.
+ (LXVP): New.
+ (STXVP): New.
+ * config/rs6000/rs6000-call.c (rs6000_gimple_fold_new_mma_builtin):
+ Handle RS6000_BIF_LXVP and RS6000_BIF_STXVP.
+ * config/rs6000/rs6000-gen-builtins.c (attrinfo): Add ismmaint.
+ (parse_bif_attrs): Handle ismmaint.
+ (write_decls): Add bif_mmaint_bit and bif_is_mmaint.
+ (write_bif_static_init): Handle ismmaint.
+
+2021-09-17 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-call.c (rs6000_gimple_fold_new_builtin): New
+ forward decl.
+ (rs6000_gimple_fold_builtin): Call rs6000_gimple_fold_new_builtin.
+ (rs6000_new_builtin_valid_without_lhs): New function.
+ (rs6000_gimple_fold_new_mma_builtin): Likewise.
+ (rs6000_gimple_fold_new_builtin): Likewise.
+
+2021-09-17 Thomas Schwinge <thomas@codesourcery.com>
+
+ * hash-table.h (hash_table<Descriptor, Lazy, Allocator>::expand):
+ Destruct stale Value objects.
+ * hash-map-tests.c (test_map_of_type_with_ctor_and_dtor_expand):
+ Update.
+
+2021-09-17 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR c/102245
+ * match.pd (shift optimizations): Disable recent sign-changing
+ optimization for shifts by zero, these will be folded later.
+
+2021-09-17 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def (__builtin_mffsl): Move from
+ [power9] to [always].
+
+2021-09-17 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (vectorizable_load): Do not frob
+ stmt_info for SLP.
+
+2021-09-17 H.J. Lu <hjl.tools@gmail.com>
+
+ * config/i386/i386-features.c (remove_partial_avx_dependency):
+ Also check TARGET_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY and
+ and TARGET_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY before generating
+ vxorps.
+ * config/i386/i386.h (TARGET_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY):
+ New.
+ (TARGET_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Likewise.
+ * config/i386/i386.md (SSE FP to FP splitters): Replace
+ TARGET_SSE_PARTIAL_REG_DEPENDENCY with
+ TARGET_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY.
+ (SSE INT to FP splitter): Replace TARGET_SSE_PARTIAL_REG_DEPENDENCY
+ with TARGET_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY.
+ * config/i386/x86-tune.def
+ (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): New.
+ (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Likewise.
+
+2021-09-17 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/101900
+ * config/i386/i386-features.c (remove_partial_avx_dependency):
+ Check TARGET_USE_VECTOR_FP_CONVERTS and TARGET_USE_VECTOR_CONVERTS
+ before generating vxorps.
+
+2021-09-17 H.J. Lu <hjl.tools@gmail.com>
+
+ * config/i386/i386-options.c (processor_cost_table): Use
+ tremont_cost for Tremont.
+ * config/i386/x86-tune-costs.h (tremont_memcpy): New.
+ (tremont_memset): Likewise.
+ (tremont_cost): Likewise.
+ * config/i386/x86-tune.def (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB):
+ Enable for Tremont.
+
+2021-09-17 H.J. Lu <hjl.tools@gmail.com>
+
+ * common/config/i386/i386-common.c: Use Haswell scheduling model
+ for Tremont.
+ * config/i386/i386.c (ix86_sched_init_global): Prepare for Tremont
+ scheduling pass.
+ * config/i386/x86-tune-sched.c (ix86_issue_rate): Change Tremont
+ issue rate to 4.
+ (ix86_adjust_cost): Handle Tremont.
+ * config/i386/x86-tune.def (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY):
+ Enable for Tremont.
+ (X86_TUNE_USE_LEAVE): Likewise.
+ (X86_TUNE_PUSH_MEMORY): Likewise.
+ (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Likewise.
+ (X86_TUNE_USE_CLTD): Likewise.
+ (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Likewise.
+ (X86_TUNE_AVOID_MFENCE): Likewise.
+ (X86_TUNE_SSE_TYPELESS_STORES): Likewise.
+ (X86_TUNE_SSE_LOAD0_BY_PXOR): Likewise.
+ (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Disable for Tremont.
+ (X86_TUNE_FOUR_JUMP_LIMIT): Likewise.
+ (X86_TUNE_OPT_AGU): Likewise.
+ (X86_TUNE_AVOID_LEA_FOR_ADDR): Likewise.
+ (X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE): Likewise.
+ (X86_TUNE_EXPAND_ABS): Likewise.
+ (X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS): Likewise.
+ (X86_TUNE_SLOW_PSHUFB): Likewise.
+
+2021-09-17 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR rtl-optimization/102306
+ * combine.c (try_combine): Abort the combination if we are about to
+ duplicate volatile references.
+
+2021-09-17 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_undefined_ph):
+ New intrinsic.
+ (_mm256_undefined_ph): Likewise.
+ (_mm512_undefined_ph): Likewise.
+ (_mm_cvtsh_h): Likewise.
+ (_mm256_cvtsh_h): Likewise.
+ (_mm512_cvtsh_h): Likewise.
+ (_mm512_castph_ps): Likewise.
+ (_mm512_castph_pd): Likewise.
+ (_mm512_castph_si512): Likewise.
+ (_mm512_castph512_ph128): Likewise.
+ (_mm512_castph512_ph256): Likewise.
+ (_mm512_castph128_ph512): Likewise.
+ (_mm512_castph256_ph512): Likewise.
+ (_mm512_zextph128_ph512): Likewise.
+ (_mm512_zextph256_ph512): Likewise.
+ (_mm512_castps_ph): Likewise.
+ (_mm512_castpd_ph): Likewise.
+ (_mm512_castsi512_ph): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_castph_ps):
+ New intrinsic.
+ (_mm256_castph_ps): Likewise.
+ (_mm_castph_pd): Likewise.
+ (_mm256_castph_pd): Likewise.
+ (_mm_castph_si128): Likewise.
+ (_mm256_castph_si256): Likewise.
+ (_mm_castps_ph): Likewise.
+ (_mm256_castps_ph): Likewise.
+ (_mm_castpd_ph): Likewise.
+ (_mm256_castpd_ph): Likewise.
+ (_mm_castsi128_ph): Likewise.
+ (_mm256_castsi256_ph): Likewise.
+ (_mm256_castph256_ph128): Likewise.
+ (_mm256_castph128_ph256): Likewise.
+ (_mm256_zextph128_ph256): Likewise.
+
+2021-09-17 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_cvtsh_ss):
+ New intrinsic.
+ (_mm_mask_cvtsh_ss): Likewise.
+ (_mm_maskz_cvtsh_ss): Likewise.
+ (_mm_cvtsh_sd): Likewise.
+ (_mm_mask_cvtsh_sd): Likewise.
+ (_mm_maskz_cvtsh_sd): Likewise.
+ (_mm_cvt_roundsh_ss): Likewise.
+ (_mm_mask_cvt_roundsh_ss): Likewise.
+ (_mm_maskz_cvt_roundsh_ss): Likewise.
+ (_mm_cvt_roundsh_sd): Likewise.
+ (_mm_mask_cvt_roundsh_sd): Likewise.
+ (_mm_maskz_cvt_roundsh_sd): Likewise.
+ (_mm_cvtss_sh): Likewise.
+ (_mm_mask_cvtss_sh): Likewise.
+ (_mm_maskz_cvtss_sh): Likewise.
+ (_mm_cvtsd_sh): Likewise.
+ (_mm_mask_cvtsd_sh): Likewise.
+ (_mm_maskz_cvtsd_sh): Likewise.
+ (_mm_cvt_roundss_sh): Likewise.
+ (_mm_mask_cvt_roundss_sh): Likewise.
+ (_mm_maskz_cvt_roundss_sh): Likewise.
+ (_mm_cvt_roundsd_sh): Likewise.
+ (_mm_mask_cvt_roundsd_sh): Likewise.
+ (_mm_maskz_cvt_roundsd_sh): Likewise.
+ * config/i386/i386-builtin-types.def
+ (V8HF_FTYPE_V2DF_V8HF_V8HF_UQI_INT,
+ V8HF_FTYPE_V4SF_V8HF_V8HF_UQI_INT,
+ V2DF_FTYPE_V8HF_V2DF_V2DF_UQI_INT,
+ V4SF_FTYPE_V8HF_V4SF_V4SF_UQI_INT): Add new builtin types.
+ * config/i386/i386-builtin.def: Add corrresponding new builtins.
+ * config/i386/i386-expand.c: Handle new builtin types.
+ * config/i386/sse.md (VF48_128): New mode iterator.
+ (avx512fp16_vcvtsh2<ssescalarmodesuffix><mask_scalar_name><round_saeonly_scalar_name>):
+ New.
+ (avx512fp16_vcvt<ssescalarmodesuffix>2sh<mask_scalar_name><round_scalar_name>):
+ Ditto.
+
+2021-09-17 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm512_cvtph_pd):
+ New intrinsic.
+ (_mm512_mask_cvtph_pd): Likewise.
+ (_mm512_maskz_cvtph_pd): Likewise.
+ (_mm512_cvt_roundph_pd): Likewise.
+ (_mm512_mask_cvt_roundph_pd): Likewise.
+ (_mm512_maskz_cvt_roundph_pd): Likewise.
+ (_mm512_cvtxph_ps): Likewise.
+ (_mm512_mask_cvtxph_ps): Likewise.
+ (_mm512_maskz_cvtxph_ps): Likewise.
+ (_mm512_cvtx_roundph_ps): Likewise.
+ (_mm512_mask_cvtx_roundph_ps): Likewise.
+ (_mm512_maskz_cvtx_roundph_ps): Likewise.
+ (_mm512_cvtxps_ph): Likewise.
+ (_mm512_mask_cvtxps_ph): Likewise.
+ (_mm512_maskz_cvtxps_ph): Likewise.
+ (_mm512_cvtx_roundps_ph): Likewise.
+ (_mm512_mask_cvtx_roundps_ph): Likewise.
+ (_mm512_maskz_cvtx_roundps_ph): Likewise.
+ (_mm512_cvtpd_ph): Likewise.
+ (_mm512_mask_cvtpd_ph): Likewise.
+ (_mm512_maskz_cvtpd_ph): Likewise.
+ (_mm512_cvt_roundpd_ph): Likewise.
+ (_mm512_mask_cvt_roundpd_ph): Likewise.
+ (_mm512_maskz_cvt_roundpd_ph): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_cvtph_pd):
+ New intrinsic.
+ (_mm_mask_cvtph_pd): Likewise.
+ (_mm_maskz_cvtph_pd): Likewise.
+ (_mm256_cvtph_pd): Likewise.
+ (_mm256_mask_cvtph_pd): Likewise.
+ (_mm256_maskz_cvtph_pd): Likewise.
+ (_mm_cvtxph_ps): Likewise.
+ (_mm_mask_cvtxph_ps): Likewise.
+ (_mm_maskz_cvtxph_ps): Likewise.
+ (_mm256_cvtxph_ps): Likewise.
+ (_mm256_mask_cvtxph_ps): Likewise.
+ (_mm256_maskz_cvtxph_ps): Likewise.
+ (_mm_cvtxps_ph): Likewise.
+ (_mm_mask_cvtxps_ph): Likewise.
+ (_mm_maskz_cvtxps_ph): Likewise.
+ (_mm256_cvtxps_ph): Likewise.
+ (_mm256_mask_cvtxps_ph): Likewise.
+ (_mm256_maskz_cvtxps_ph): Likewise.
+ (_mm_cvtpd_ph): Likewise.
+ (_mm_mask_cvtpd_ph): Likewise.
+ (_mm_maskz_cvtpd_ph): Likewise.
+ (_mm256_cvtpd_ph): Likewise.
+ (_mm256_mask_cvtpd_ph): Likewise.
+ (_mm256_maskz_cvtpd_ph): Likewise.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-expand.c: Handle new builtin types.
+ * config/i386/sse.md
+ (VF4_128_8_256): New.
+ (VF48H_AVX512VL): Ditto.
+ (ssePHmode): Add HF vector modes.
+ (castmode): Add new convertable modes.
+ (qq2phsuff): Ditto.
+ (ph2pssuffix): New.
+ (avx512fp16_vcvt<castmode>2ph_<mode><mask_name><round_name>): Ditto.
+ (avx512fp16_vcvt<castmode>2ph_<mode>): Ditto.
+ (*avx512fp16_vcvt<castmode>2ph_<mode>): Ditto.
+ (avx512fp16_vcvt<castmode>2ph_<mode>_mask): Ditto.
+ (*avx512fp16_vcvt<castmode>2ph_<mode>_mask): Ditto.
+ (*avx512fp16_vcvt<castmode>2ph_<mode>_mask_1): Ditto.
+ (avx512fp16_float_extend_ph<mode>2<mask_name><round_saeonly_name>):
+ Ditto.
+ (avx512fp16_float_extend_ph<mode>2<mask_name>): Ditto.
+ (*avx512fp16_float_extend_ph<mode>2_load<mask_name>): Ditto.
+ (avx512fp16_float_extend_phv2df2<mask_name>): Ditto.
+ (*avx512fp16_float_extend_phv2df2_load<mask_name>): Ditto.
+
+2021-09-17 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_cvttsh_i32):
+ New intrinsic.
+ (_mm_cvttsh_u32): Likewise.
+ (_mm_cvtt_roundsh_i32): Likewise.
+ (_mm_cvtt_roundsh_u32): Likewise.
+ (_mm_cvttsh_i64): Likewise.
+ (_mm_cvttsh_u64): Likewise.
+ (_mm_cvtt_roundsh_i64): Likewise.
+ (_mm_cvtt_roundsh_u64): Likewise.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/sse.md
+ (avx512fp16_fix<fixunssuffix>_trunc<mode>2<round_saeonly_name>):
+ New.
+
+2021-09-17 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm512_cvttph_epi32):
+ New intrinsic.
+ (_mm512_mask_cvttph_epi32): Likewise.
+ (_mm512_maskz_cvttph_epi32): Likewise.
+ (_mm512_cvtt_roundph_epi32): Likewise.
+ (_mm512_mask_cvtt_roundph_epi32): Likewise.
+ (_mm512_maskz_cvtt_roundph_epi32): Likewise.
+ (_mm512_cvttph_epu32): Likewise.
+ (_mm512_mask_cvttph_epu32): Likewise.
+ (_mm512_maskz_cvttph_epu32): Likewise.
+ (_mm512_cvtt_roundph_epu32): Likewise.
+ (_mm512_mask_cvtt_roundph_epu32): Likewise.
+ (_mm512_maskz_cvtt_roundph_epu32): Likewise.
+ (_mm512_cvttph_epi64): Likewise.
+ (_mm512_mask_cvttph_epi64): Likewise.
+ (_mm512_maskz_cvttph_epi64): Likewise.
+ (_mm512_cvtt_roundph_epi64): Likewise.
+ (_mm512_mask_cvtt_roundph_epi64): Likewise.
+ (_mm512_maskz_cvtt_roundph_epi64): Likewise.
+ (_mm512_cvttph_epu64): Likewise.
+ (_mm512_mask_cvttph_epu64): Likewise.
+ (_mm512_maskz_cvttph_epu64): Likewise.
+ (_mm512_cvtt_roundph_epu64): Likewise.
+ (_mm512_mask_cvtt_roundph_epu64): Likewise.
+ (_mm512_maskz_cvtt_roundph_epu64): Likewise.
+ (_mm512_cvttph_epi16): Likewise.
+ (_mm512_mask_cvttph_epi16): Likewise.
+ (_mm512_maskz_cvttph_epi16): Likewise.
+ (_mm512_cvtt_roundph_epi16): Likewise.
+ (_mm512_mask_cvtt_roundph_epi16): Likewise.
+ (_mm512_maskz_cvtt_roundph_epi16): Likewise.
+ (_mm512_cvttph_epu16): Likewise.
+ (_mm512_mask_cvttph_epu16): Likewise.
+ (_mm512_maskz_cvttph_epu16): Likewise.
+ (_mm512_cvtt_roundph_epu16): Likewise.
+ (_mm512_mask_cvtt_roundph_epu16): Likewise.
+ (_mm512_maskz_cvtt_roundph_epu16): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_cvttph_epi32):
+ New intirnsic.
+ (_mm_mask_cvttph_epi32): Likewise.
+ (_mm_maskz_cvttph_epi32): Likewise.
+ (_mm256_cvttph_epi32): Likewise.
+ (_mm256_mask_cvttph_epi32): Likewise.
+ (_mm256_maskz_cvttph_epi32): Likewise.
+ (_mm_cvttph_epu32): Likewise.
+ (_mm_mask_cvttph_epu32): Likewise.
+ (_mm_maskz_cvttph_epu32): Likewise.
+ (_mm256_cvttph_epu32): Likewise.
+ (_mm256_mask_cvttph_epu32): Likewise.
+ (_mm256_maskz_cvttph_epu32): Likewise.
+ (_mm_cvttph_epi64): Likewise.
+ (_mm_mask_cvttph_epi64): Likewise.
+ (_mm_maskz_cvttph_epi64): Likewise.
+ (_mm256_cvttph_epi64): Likewise.
+ (_mm256_mask_cvttph_epi64): Likewise.
+ (_mm256_maskz_cvttph_epi64): Likewise.
+ (_mm_cvttph_epu64): Likewise.
+ (_mm_mask_cvttph_epu64): Likewise.
+ (_mm_maskz_cvttph_epu64): Likewise.
+ (_mm256_cvttph_epu64): Likewise.
+ (_mm256_mask_cvttph_epu64): Likewise.
+ (_mm256_maskz_cvttph_epu64): Likewise.
+ (_mm_cvttph_epi16): Likewise.
+ (_mm_mask_cvttph_epi16): Likewise.
+ (_mm_maskz_cvttph_epi16): Likewise.
+ (_mm256_cvttph_epi16): Likewise.
+ (_mm256_mask_cvttph_epi16): Likewise.
+ (_mm256_maskz_cvttph_epi16): Likewise.
+ (_mm_cvttph_epu16): Likewise.
+ (_mm_mask_cvttph_epu16): Likewise.
+ (_mm_maskz_cvttph_epu16): Likewise.
+ (_mm256_cvttph_epu16): Likewise.
+ (_mm256_mask_cvttph_epu16): Likewise.
+ (_mm256_maskz_cvttph_epu16): Likewise.
+ * config/i386/i386-builtin.def: Add new builtins.
+ * config/i386/sse.md
+ (avx512fp16_fix<fixunssuffix>_trunc<mode>2<mask_name><round_saeonly_name>):
+ New.
+ (avx512fp16_fix<fixunssuffix>_trunc<mode>2<mask_name>): Ditto.
+ (*avx512fp16_fix<fixunssuffix>_trunc<mode>2_load<mask_name>): Ditto.
+ (avx512fp16_fix<fixunssuffix>_truncv2di2<mask_name>): Ditto.
+ (avx512fp16_fix<fixunssuffix>_truncv2di2_load<mask_name>): Ditto.
+
+2021-09-17 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_cvtsh_i32): New intrinsic.
+ (_mm_cvtsh_u32): Likewise.
+ (_mm_cvt_roundsh_i32): Likewise.
+ (_mm_cvt_roundsh_u32): Likewise.
+ (_mm_cvtsh_i64): Likewise.
+ (_mm_cvtsh_u64): Likewise.
+ (_mm_cvt_roundsh_i64): Likewise.
+ (_mm_cvt_roundsh_u64): Likewise.
+ (_mm_cvti32_sh): Likewise.
+ (_mm_cvtu32_sh): Likewise.
+ (_mm_cvt_roundi32_sh): Likewise.
+ (_mm_cvt_roundu32_sh): Likewise.
+ (_mm_cvti64_sh): Likewise.
+ (_mm_cvtu64_sh): Likewise.
+ (_mm_cvt_roundi64_sh): Likewise.
+ (_mm_cvt_roundu64_sh): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c (ix86_expand_round_builtin):
+ Handle new builtin types.
+ * config/i386/sse.md
+ (avx512fp16_vcvtsh2<sseintconvertsignprefix>si<rex64namesuffix><round_name>):
+ New define_insn.
+ (avx512fp16_vcvtsh2<sseintconvertsignprefix>si<rex64namesuffix>_2): Likewise.
+ (avx512fp16_vcvt<floatsuffix>si2sh<rex64namesuffix><round_name>): Likewise.
+
+2021-09-16 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-c.c (rs6000-builtins.h): New include.
+ (altivec_resolve_new_overloaded_builtin): New forward decl.
+ (rs6000_new_builtin_type_compatible): New function.
+ (altivec_resolve_overloaded_builtin): Call
+ altivec_resolve_new_overloaded_builtin.
+ (altivec_build_new_resolved_builtin): New function.
+ (altivec_resolve_new_overloaded_builtin): Likewise.
+ * config/rs6000/rs6000-call.c (rs6000_new_builtin_is_supported):
+ Likewise.
+ * config/rs6000/rs6000-gen-builtins.c (write_decls): Remove _p from
+ name of rs6000_new_builtin_is_supported.
+
+2021-09-16 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-protos.h (ix86_decompose_address):
+ Change return type to bool.
+ * config/i386/i386.c (ix86_decompose_address): Ditto.
+
+2021-09-16 Tobias Burnus <tobias@codesourcery.com>
+
+ PR target/102353
+ * config/rs6000/t-rs6000 (build/rs6000-gen-builtins.o, build/rbtree.o):
+ Added 'build/' to target, use build/%.o rule.
+ (build/rs6000-gen-builtins$(build_exeext)): Add 'build/' and
+ '$(build_exeext)' to target and 'build/' for the *.o files.
+ (rs6000-builtins.c): Update for those changes; run rs6000-gen-builtins
+ with $(RUN_GEN).
+
+2021-09-16 Martin Jambor <mjambor@suse.cz>
+
+ * cgraph.c (cgraph_node::dump): Do not check caller count sums if
+ the body has been removed. Remove trailing whitespace.
+
+2021-09-16 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102360
+ * internal-fn.c (expand_DEFERRED_INIT): Make pattern-init
+ of non-memory more robust.
+
+2021-09-16 Daniel Cederman <cederman@gaisler.com>
+
+ * config/sparc/sparc-opts.h (enum sparc_processor_type): Add LEON5
+ * config/sparc/sparc.c (struct processor_costs): Add LEON5 costs
+ (leon5_adjust_cost): Increase cost of store with data dependency
+ on ALU instruction and FPU anti-dependencies.
+ (sparc_option_override): Add LEON5 costs
+ (sparc_adjust_cost): Add LEON5 cost adjustments
+ * config/sparc/sparc.h: Add LEON5
+ * config/sparc/sparc.md: Include LEON5 scheduling information
+ * config/sparc/sparc.opt: Add LEON5
+ * doc/invoke.texi: Add LEON5
+ * config/sparc/leon5.md: New file.
+
+2021-09-16 Daniel Cederman <cederman@gaisler.com>
+
+ * config/sparc/sparc.md (stack_protect_set32): Add NOP to prevent
+ sensitive sequence for B2BST errata workaround.
+
+2021-09-16 Daniel Cederman <cederman@gaisler.com>
+
+ * config/sparc/sparc.c (sparc_do_work_around_errata): Do not begin
+ functions with atomic instruction in the UT700 errata workaround.
+
+2021-09-16 Daniel Cederman <cederman@gaisler.com>
+
+ * config/sparc/sparc.c (next_active_non_empty_insn): New function
+ that returns next active non empty assembly instruction.
+ (sparc_do_work_around_errata): Use new function.
+
+2021-09-16 Daniel Cederman <cederman@gaisler.com>
+
+ * config/sparc/sparc.c (store_insn_p): Add predicate for store
+ attributes.
+ (load_insn_p): Add predicate for load attributes.
+ (sparc_do_work_around_errata): Use new predicates.
+
+2021-09-16 Andreas Larsson <andreas@gaisler.com>
+
+ * config/sparc/sparc.c (dump_target_flag_bits): Print bit names for
+ LEON and LEON3.
+
+2021-09-16 Martin Liska <mliska@suse.cz>
+
+ * config/mips/netbsd.h: Fix typo in name of a macro.
+
+2021-09-16 liuhongt <hongtao.liu@intel.com>
+
+ PR middle-end/102080
+ * match.pd: Check mask type when doing cond_op related gimple
+ simplification.
+ * tree.c (is_truth_type_for): New function.
+ * tree.h (is_truth_type_for): New declaration.
+
+2021-09-16 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm512_cvtepi32_ph): New
+ intrinsic.
+ (_mm512_mask_cvtepi32_ph): Likewise.
+ (_mm512_maskz_cvtepi32_ph): Likewise.
+ (_mm512_cvt_roundepi32_ph): Likewise.
+ (_mm512_mask_cvt_roundepi32_ph): Likewise.
+ (_mm512_maskz_cvt_roundepi32_ph): Likewise.
+ (_mm512_cvtepu32_ph): Likewise.
+ (_mm512_mask_cvtepu32_ph): Likewise.
+ (_mm512_maskz_cvtepu32_ph): Likewise.
+ (_mm512_cvt_roundepu32_ph): Likewise.
+ (_mm512_mask_cvt_roundepu32_ph): Likewise.
+ (_mm512_maskz_cvt_roundepu32_ph): Likewise.
+ (_mm512_cvtepi64_ph): Likewise.
+ (_mm512_mask_cvtepi64_ph): Likewise.
+ (_mm512_maskz_cvtepi64_ph): Likewise.
+ (_mm512_cvt_roundepi64_ph): Likewise.
+ (_mm512_mask_cvt_roundepi64_ph): Likewise.
+ (_mm512_maskz_cvt_roundepi64_ph): Likewise.
+ (_mm512_cvtepu64_ph): Likewise.
+ (_mm512_mask_cvtepu64_ph): Likewise.
+ (_mm512_maskz_cvtepu64_ph): Likewise.
+ (_mm512_cvt_roundepu64_ph): Likewise.
+ (_mm512_mask_cvt_roundepu64_ph): Likewise.
+ (_mm512_maskz_cvt_roundepu64_ph): Likewise.
+ (_mm512_cvtepi16_ph): Likewise.
+ (_mm512_mask_cvtepi16_ph): Likewise.
+ (_mm512_maskz_cvtepi16_ph): Likewise.
+ (_mm512_cvt_roundepi16_ph): Likewise.
+ (_mm512_mask_cvt_roundepi16_ph): Likewise.
+ (_mm512_maskz_cvt_roundepi16_ph): Likewise.
+ (_mm512_cvtepu16_ph): Likewise.
+ (_mm512_mask_cvtepu16_ph): Likewise.
+ (_mm512_maskz_cvtepu16_ph): Likewise.
+ (_mm512_cvt_roundepu16_ph): Likewise.
+ (_mm512_mask_cvt_roundepu16_ph): Likewise.
+ (_mm512_maskz_cvt_roundepu16_ph): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_cvtepi32_ph): New
+ intrinsic.
+ (_mm_mask_cvtepi32_ph): Likewise.
+ (_mm_maskz_cvtepi32_ph): Likewise.
+ (_mm256_cvtepi32_ph): Likewise.
+ (_mm256_mask_cvtepi32_ph): Likewise.
+ (_mm256_maskz_cvtepi32_ph): Likewise.
+ (_mm_cvtepu32_ph): Likewise.
+ (_mm_mask_cvtepu32_ph): Likewise.
+ (_mm_maskz_cvtepu32_ph): Likewise.
+ (_mm256_cvtepu32_ph): Likewise.
+ (_mm256_mask_cvtepu32_ph): Likewise.
+ (_mm256_maskz_cvtepu32_ph): Likewise.
+ (_mm_cvtepi64_ph): Likewise.
+ (_mm_mask_cvtepi64_ph): Likewise.
+ (_mm_maskz_cvtepi64_ph): Likewise.
+ (_mm256_cvtepi64_ph): Likewise.
+ (_mm256_mask_cvtepi64_ph): Likewise.
+ (_mm256_maskz_cvtepi64_ph): Likewise.
+ (_mm_cvtepu64_ph): Likewise.
+ (_mm_mask_cvtepu64_ph): Likewise.
+ (_mm_maskz_cvtepu64_ph): Likewise.
+ (_mm256_cvtepu64_ph): Likewise.
+ (_mm256_mask_cvtepu64_ph): Likewise.
+ (_mm256_maskz_cvtepu64_ph): Likewise.
+ (_mm_cvtepi16_ph): Likewise.
+ (_mm_mask_cvtepi16_ph): Likewise.
+ (_mm_maskz_cvtepi16_ph): Likewise.
+ (_mm256_cvtepi16_ph): Likewise.
+ (_mm256_mask_cvtepi16_ph): Likewise.
+ (_mm256_maskz_cvtepi16_ph): Likewise.
+ (_mm_cvtepu16_ph): Likewise.
+ (_mm_mask_cvtepu16_ph): Likewise.
+ (_mm_maskz_cvtepu16_ph): Likewise.
+ (_mm256_cvtepu16_ph): Likewise.
+ (_mm256_mask_cvtepu16_ph): Likewise.
+ (_mm256_maskz_cvtepu16_ph): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtin types.
+ (ix86_expand_round_builtin): Ditto.
+ * config/i386/i386-modes.def: Declare V2HF and V6HF.
+ * config/i386/sse.md (VI2H_AVX512VL): New.
+ (qq2phsuff): Ditto.
+ (sseintvecmode): Add HF vector modes.
+ (avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode><mask_name><round_name>):
+ New.
+ (avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>): Ditto.
+ (*avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>): Ditto.
+ (avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>_mask): Ditto.
+ (*avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>_mask): Ditto.
+ (*avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>_mask_1): Ditto.
+ (avx512fp16_vcvt<floatsuffix>qq2ph_v2di): Ditto.
+ (*avx512fp16_vcvt<floatsuffix>qq2ph_v2di): Ditto.
+ (avx512fp16_vcvt<floatsuffix>qq2ph_v2di_mask): Ditto.
+ (*avx512fp16_vcvt<floatsuffix>qq2ph_v2di_mask): Ditto.
+ (*avx512fp16_vcvt<floatsuffix>qq2ph_v2di_mask_1): Ditto.
+ * config/i386/subst.md (round_qq2phsuff): New subst_attr.
+
+2021-09-16 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm512_cvtph_epi32):
+ New intrinsic/
+ (_mm512_mask_cvtph_epi32): Likewise.
+ (_mm512_maskz_cvtph_epi32): Likewise.
+ (_mm512_cvt_roundph_epi32): Likewise.
+ (_mm512_mask_cvt_roundph_epi32): Likewise.
+ (_mm512_maskz_cvt_roundph_epi32): Likewise.
+ (_mm512_cvtph_epu32): Likewise.
+ (_mm512_mask_cvtph_epu32): Likewise.
+ (_mm512_maskz_cvtph_epu32): Likewise.
+ (_mm512_cvt_roundph_epu32): Likewise.
+ (_mm512_mask_cvt_roundph_epu32): Likewise.
+ (_mm512_maskz_cvt_roundph_epu32): Likewise.
+ (_mm512_cvtph_epi64): Likewise.
+ (_mm512_mask_cvtph_epi64): Likewise.
+ (_mm512_maskz_cvtph_epi64): Likewise.
+ (_mm512_cvt_roundph_epi64): Likewise.
+ (_mm512_mask_cvt_roundph_epi64): Likewise.
+ (_mm512_maskz_cvt_roundph_epi64): Likewise.
+ (_mm512_cvtph_epu64): Likewise.
+ (_mm512_mask_cvtph_epu64): Likewise.
+ (_mm512_maskz_cvtph_epu64): Likewise.
+ (_mm512_cvt_roundph_epu64): Likewise.
+ (_mm512_mask_cvt_roundph_epu64): Likewise.
+ (_mm512_maskz_cvt_roundph_epu64): Likewise.
+ (_mm512_cvtph_epi16): Likewise.
+ (_mm512_mask_cvtph_epi16): Likewise.
+ (_mm512_maskz_cvtph_epi16): Likewise.
+ (_mm512_cvt_roundph_epi16): Likewise.
+ (_mm512_mask_cvt_roundph_epi16): Likewise.
+ (_mm512_maskz_cvt_roundph_epi16): Likewise.
+ (_mm512_cvtph_epu16): Likewise.
+ (_mm512_mask_cvtph_epu16): Likewise.
+ (_mm512_maskz_cvtph_epu16): Likewise.
+ (_mm512_cvt_roundph_epu16): Likewise.
+ (_mm512_mask_cvt_roundph_epu16): Likewise.
+ (_mm512_maskz_cvt_roundph_epu16): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_cvtph_epi32):
+ New intrinsic.
+ (_mm_mask_cvtph_epi32): Likewise.
+ (_mm_maskz_cvtph_epi32): Likewise.
+ (_mm256_cvtph_epi32): Likewise.
+ (_mm256_mask_cvtph_epi32): Likewise.
+ (_mm256_maskz_cvtph_epi32): Likewise.
+ (_mm_cvtph_epu32): Likewise.
+ (_mm_mask_cvtph_epu32): Likewise.
+ (_mm_maskz_cvtph_epu32): Likewise.
+ (_mm256_cvtph_epu32): Likewise.
+ (_mm256_mask_cvtph_epu32): Likewise.
+ (_mm256_maskz_cvtph_epu32): Likewise.
+ (_mm_cvtph_epi64): Likewise.
+ (_mm_mask_cvtph_epi64): Likewise.
+ (_mm_maskz_cvtph_epi64): Likewise.
+ (_mm256_cvtph_epi64): Likewise.
+ (_mm256_mask_cvtph_epi64): Likewise.
+ (_mm256_maskz_cvtph_epi64): Likewise.
+ (_mm_cvtph_epu64): Likewise.
+ (_mm_mask_cvtph_epu64): Likewise.
+ (_mm_maskz_cvtph_epu64): Likewise.
+ (_mm256_cvtph_epu64): Likewise.
+ (_mm256_mask_cvtph_epu64): Likewise.
+ (_mm256_maskz_cvtph_epu64): Likewise.
+ (_mm_cvtph_epi16): Likewise.
+ (_mm_mask_cvtph_epi16): Likewise.
+ (_mm_maskz_cvtph_epi16): Likewise.
+ (_mm256_cvtph_epi16): Likewise.
+ (_mm256_mask_cvtph_epi16): Likewise.
+ (_mm256_maskz_cvtph_epi16): Likewise.
+ (_mm_cvtph_epu16): Likewise.
+ (_mm_mask_cvtph_epu16): Likewise.
+ (_mm_maskz_cvtph_epu16): Likewise.
+ (_mm256_cvtph_epu16): Likewise.
+ (_mm256_mask_cvtph_epu16): Likewise.
+ (_mm256_maskz_cvtph_epu16): Likewise.
+ * config/i386/i386-builtin-types.def: Add new builtin types.
+ * config/i386/i386-builtin.def: Add new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtin types.
+ (ix86_expand_round_builtin): Ditto.
+ * config/i386/sse.md (sseintconvert): New.
+ (ssePHmode): Ditto.
+ (UNSPEC_US_FIX_NOTRUNC): Ditto.
+ (sseintconvertsignprefix): Ditto.
+ (avx512fp16_vcvtph2<sseintconvertsignprefix><sseintconvert>_<mode><mask_name><round_name>):
+ Ditto.
+
+2021-09-16 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h: (_mm_cvtsi16_si128):
+ New intrinsic.
+ (_mm_cvtsi128_si16): Likewise.
+ (_mm_mask_load_sh): Likewise.
+ (_mm_maskz_load_sh): Likewise.
+ (_mm_mask_store_sh): Likewise.
+ (_mm_move_sh): Likewise.
+ (_mm_mask_move_sh): Likewise.
+ (_mm_maskz_move_sh): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_special_args_builtin): Handle new builtin types.
+ (ix86_expand_vector_init_one_nonzero): Adjust for FP16 target.
+ * config/i386/sse.md (VI2F): New mode iterator.
+ (vec_set<mode>_0): Use new mode iterator.
+ (avx512f_mov<ssescalarmodelower>_mask): Adjust for HF vector mode.
+ (avx512f_store<mode>_mask): Ditto.
+
+2021-09-16 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.opt (-mtoc-fusion): Remove.
+
+2021-09-15 David Edelsohn <dje.gcc@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_xcoff_encode_section_info):
+ Proceed if no symbol summary or the symbol alias flag is false.
+
+2021-09-15 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/88578
+ PR c++/102295
+ * varasm.c (output_constructor_regular_field): Instead of assertion
+ that array_size_for_constructor result is equal to size of
+ TREE_TYPE (local->val) in bytes, assert that the type size is greater
+ or equal to array_size_for_constructor result and use type size as
+ fieldsize.
+
+2021-09-15 Martin Liska <mliska@suse.cz>
+
+ PR target/102351
+ * config/i386/vxworks.h: Use new macro TARGET_CPU_P.
+
+2021-09-15 Martin Liska <mliska@suse.cz>
+
+ PR target/102349
+ * config/rs6000/rs6000.c (rs6000_xcoff_encode_section_info):
+ Check that we have a symbol summary for a symbol.
+
+2021-09-15 Richard Biener <rguenther@suse.de>
+
+ PR target/102348
+ * config/rs6000/lynx.h: Remove undef of PREFERRED_DEBUGGING_TYPE
+ to inherit from elfos.h
+
+2021-09-15 liuhongt <hongtao.liu@intel.com>
+
+ PR target/102327
+ * config/i386/i386-expand.c
+ (ix86_expand_vector_init_interleave): Use puncklwd to pack 2
+ HFmodes.
+ (ix86_expand_vector_set): Use blendw instead of pinsrw.
+ * config/i386/i386.c (ix86_can_change_mode_class): Adjust for
+ AVX512FP16 which supports 16bit vector load.
+ * config/i386/sse.md (avx512bw_interleave_highv32hi<mask_name>):
+ Rename to ..
+ (avx512bw_interleave_high<mode><mask_name>): .. this, and
+ extend to V32HFmode.
+ (avx2_interleave_highv16hi<mask_name>): Rename to ..
+ (avx2_interleave_high<mode><mask_name>): .. this, and extend
+ to V16HFmode.
+ (vec_interleave_highv8hi<mask_name>): Rename to ..
+ (vec_interleave_high<mode><mask_name>): .. this, and extend to V8HFmode.
+ (<mask_codefor>avx512bw_interleave_lowv32hi<mask_name>):
+ Rename to ..
+ (<mask_codefor>avx512bw_interleave_low<mode><mask_name>):
+ this, and extend to V32HFmode.
+ (avx2_interleave_lowv16hi<mask_name>): Rename to ..
+ (avx2_interleave_low<mode><mask_name>): .. this, and extend to V16HFmode.
+ (vec_interleave_lowv8hi<mask_name>): Rename to ..
+ (vec_interleave_low<mode><mask_name>): .. this, and extend to V8HFmode.
+ (sse4_1_pblendw): Rename to ..
+ (sse4_1_pblend<blendsuf>): .. this, and extend to V8HFmode.
+ (avx2_pblendph): New define_expand.
+ (<sse2p4_1>_pinsr<ssemodesuffix>): Refactor, use
+ sseintmodesuffix instead of ssemodesuffix.
+ (blendsuf): New mode attr.
+
+2021-09-15 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (dr_misalignment): Move out of line.
+ (dr_target_alignment): New.
+ (DR_TARGET_ALIGNMENT): Wrap dr_target_alignment.
+ (set_dr_target_alignment): New.
+ (SET_DR_TARGET_ALIGNMENT): Wrap set_dr_target_alignment.
+ * tree-vect-data-refs.c (dr_misalignment): Compute and
+ return the group members misalignment.
+ (vect_compute_data_ref_alignment): Use SET_DR_TARGET_ALIGNMENT.
+ (vect_analyze_data_refs_alignment): Compute alignment only
+ for the first element of a DR group.
+ (vect_slp_analyze_node_alignment): Likewise.
+
+2021-09-15 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/avx512fp16intrin.h: Adjust all builtin calls.
+ * config/i386/avx512fp16vlintrin.h: Likewise.
+ * config/i386/i386-builtin.def: Adjust builtin name and
+ enumeration to match AVX512F style.
+
+2021-09-15 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102318
+ * tree-vect-loop.c (vect_transform_cycle_phi): Revert
+ previous change and do the mode conversion separately from
+ the sign conversion.
+
+2021-09-15 Hongtao Liu <hongtao.liu@intel.com>
+ Peter Cordes <peter@cordes.ca>
+
+ PR target/91103
+ * config/i386/sse.md (extract_suf): Add V8SF/V8SI/V4DF/V4DI.
+ (*vec_extract<mode><ssescalarmodelower>_valign): Output
+ vextract{i,f}{32x4,64x2} instruction when byte_offset % 16 ==
+ 0.
+
+2021-09-15 Richard Biener <rguenther@suse.de>
+
+ * config.gcc: Remove vax-*-openbsd* configuration.
+
+2021-09-15 Richard Biener <rguenther@suse.de>
+
+ * config.gcc: Remove m68k-openbsd.
+
+2021-09-15 Max Filippov <jcmvbkbc@gmail.com>
+
+ PR target/102336
+ * config/xtensa/t-xtensa (TM_H): Add include/xtensa-config.h.
+
+2021-09-14 Peter Bergner <bergner@linux.ibm.com>
+
+ * config/rs6000/mma.md (unspec): Delete UNSPEC_MMA_XXSETACCZ.
+ (unspecv): Add UNSPECV_MMA_XXSETACCZ.
+ (*mma_xxsetaccz): Delete.
+ (mma_xxsetaccz): Change to define_insn. Remove operand 1.
+ Use UNSPECV_MMA_XXSETACCZ. Update comment.
+ * config/rs6000/rs6000.c (rs6000_rtx_costs): Use UNSPECV_MMA_XXSETACCZ.
+
+2021-09-14 Iain Sandoe <iain@sandoe.co.uk>
+
+ * Makefile.in: Remove variables related to applying no-PIE
+ to the exes on $build.
+ * configure: Regenerate.
+ * configure.ac: Remove configuration related to applying
+ no-PIE to the exes on $build.
+
+2021-09-14 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.md (doloop_end): Add missing mode.
+ (loop_end): Likewise.
+
+2021-09-14 Jakub Jelinek <jakub@redhat.com>
+
+ * gimplify.c (goa_stabilize_expr): Add depth argument, propagate
+ it to recursive calls, for depth above 7 just gimplify or return.
+ Perform a test even for MODIFY_EXPR, ADDR_EXPR, COMPOUND_EXPR with
+ __builtin_clear_padding and TARGET_EXPR.
+ (gimplify_omp_atomic): Adjust goa_stabilize_expr callers.
+
+2021-09-14 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_fpclass_sh_mask):
+ New intrinsic.
+ (_mm_mask_fpclass_sh_mask): Likewise.
+ (_mm512_mask_fpclass_ph_mask): Likewise.
+ (_mm512_fpclass_ph_mask): Likewise.
+ (_mm_getexp_sh): Likewise.
+ (_mm_mask_getexp_sh): Likewise.
+ (_mm_maskz_getexp_sh): Likewise.
+ (_mm512_getexp_ph): Likewise.
+ (_mm512_mask_getexp_ph): Likewise.
+ (_mm512_maskz_getexp_ph): Likewise.
+ (_mm_getexp_round_sh): Likewise.
+ (_mm_mask_getexp_round_sh): Likewise.
+ (_mm_maskz_getexp_round_sh): Likewise.
+ (_mm512_getexp_round_ph): Likewise.
+ (_mm512_mask_getexp_round_ph): Likewise.
+ (_mm512_maskz_getexp_round_ph): Likewise.
+ (_mm_getmant_sh): Likewise.
+ (_mm_mask_getmant_sh): Likewise.
+ (_mm_maskz_getmant_sh): Likewise.
+ (_mm512_getmant_ph): Likewise.
+ (_mm512_mask_getmant_ph): Likewise.
+ (_mm512_maskz_getmant_ph): Likewise.
+ (_mm_getmant_round_sh): Likewise.
+ (_mm_mask_getmant_round_sh): Likewise.
+ (_mm_maskz_getmant_round_sh): Likewise.
+ (_mm512_getmant_round_ph): Likewise.
+ (_mm512_mask_getmant_round_ph): Likewise.
+ (_mm512_maskz_getmant_round_ph): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_mask_fpclass_ph_mask):
+ New intrinsic.
+ (_mm_fpclass_ph_mask): Likewise.
+ (_mm256_mask_fpclass_ph_mask): Likewise.
+ (_mm256_fpclass_ph_mask): Likewise.
+ (_mm256_getexp_ph): Likewise.
+ (_mm256_mask_getexp_ph): Likewise.
+ (_mm256_maskz_getexp_ph): Likewise.
+ (_mm_getexp_ph): Likewise.
+ (_mm_mask_getexp_ph): Likewise.
+ (_mm_maskz_getexp_ph): Likewise.
+ (_mm256_getmant_ph): Likewise.
+ (_mm256_mask_getmant_ph): Likewise.
+ (_mm256_maskz_getmant_ph): Likewise.
+ (_mm_getmant_ph): Likewise.
+ (_mm_mask_getmant_ph): Likewise.
+ (_mm_maskz_getmant_ph): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtin types.
+ (ix86_expand_round_builtin): Ditto.
+ * config/i386/sse.md (vecmemsuffix): Add HF vector modes.
+ (<avx512>_getexp<mode><mask_name><round_saeonly_name>): Adjust
+ to support HF vector modes.
+ (avx512f_sgetexp<mode><mask_scalar_name><round_saeonly_scalar_name):
+ Ditto.
+ (avx512dq_fpclass<mode><mask_scalar_merge_name>): Ditto.
+ (avx512dq_vmfpclass<mode><mask_scalar_merge_name>): Ditto.
+ (<avx512>_getmant<mode><mask_name><round_saeonly_name>): Ditto.
+ (avx512f_vgetmant<mode><mask_scalar_name><round_saeonly_scalar_name>):
+ Ditto.
+
+2021-09-14 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm512_reduce_ph):
+ New intrinsic.
+ (_mm512_mask_reduce_ph): Likewise.
+ (_mm512_maskz_reduce_ph): Likewise.
+ (_mm512_reduce_round_ph): Likewise.
+ (_mm512_mask_reduce_round_ph): Likewise.
+ (_mm512_maskz_reduce_round_ph): Likewise.
+ (_mm_reduce_sh): Likewise.
+ (_mm_mask_reduce_sh): Likewise.
+ (_mm_maskz_reduce_sh): Likewise.
+ (_mm_reduce_round_sh): Likewise.
+ (_mm_mask_reduce_round_sh): Likewise.
+ (_mm_maskz_reduce_round_sh): Likewise.
+ (_mm512_roundscale_ph): Likewise.
+ (_mm512_mask_roundscale_ph): Likewise.
+ (_mm512_maskz_roundscale_ph): Likewise.
+ (_mm512_roundscale_round_ph): Likewise.
+ (_mm512_mask_roundscale_round_ph): Likewise.
+ (_mm512_maskz_roundscale_round_ph): Likewise.
+ (_mm_roundscale_sh): Likewise.
+ (_mm_mask_roundscale_sh): Likewise.
+ (_mm_maskz_roundscale_sh): Likewise.
+ (_mm_roundscale_round_sh): Likewise.
+ (_mm_mask_roundscale_round_sh): Likewise.
+ (_mm_maskz_roundscale_round_sh): Likewise.
+ * config/i386/avx512fp16vlintrin.h: (_mm_reduce_ph):
+ New intrinsic.
+ (_mm_mask_reduce_ph): Likewise.
+ (_mm_maskz_reduce_ph): Likewise.
+ (_mm256_reduce_ph): Likewise.
+ (_mm256_mask_reduce_ph): Likewise.
+ (_mm256_maskz_reduce_ph): Likewise.
+ (_mm_roundscale_ph): Likewise.
+ (_mm_mask_roundscale_ph): Likewise.
+ (_mm_maskz_roundscale_ph): Likewise.
+ (_mm256_roundscale_ph): Likewise.
+ (_mm256_mask_roundscale_ph): Likewise.
+ (_mm256_maskz_roundscale_ph): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtin types.
+ (ix86_expand_round_builtin): Ditto.
+ * config/i386/sse.md (<mask_codefor>reducep<mode><mask_name>):
+ Renamed to ...
+ (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
+ ... this, and adjust for round operands.
+ (reduces<mode><mask_scalar_name>): Likewise, with ...
+ (reduces<mode><mask_scalar_name><round_saeonly_scalar_name):
+ ... this.
+ (<avx512>_rndscale<mode><mask_name><round_saeonly_name>):
+ Adjust for HF vector modes.
+ (avx512f_rndscale<mode><mask_scalar_name><round_saeonly_scalar_name>):
+ Ditto.
+ (*avx512f_rndscale<mode><round_saeonly_name>): Ditto.
+
+2021-09-14 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h: (_mm512_rcp_ph):
+ New intrinsic.
+ (_mm512_mask_rcp_ph): Likewise.
+ (_mm512_maskz_rcp_ph): Likewise.
+ (_mm_rcp_sh): Likewise.
+ (_mm_mask_rcp_sh): Likewise.
+ (_mm_maskz_rcp_sh): Likewise.
+ (_mm512_scalef_ph): Likewise.
+ (_mm512_mask_scalef_ph): Likewise.
+ (_mm512_maskz_scalef_ph): Likewise.
+ (_mm512_scalef_round_ph): Likewise.
+ (_mm512_mask_scalef_round_ph): Likewise.
+ (_mm512_maskz_scalef_round_ph): Likewise.
+ (_mm_scalef_sh): Likewise.
+ (_mm_mask_scalef_sh): Likewise.
+ (_mm_maskz_scalef_sh): Likewise.
+ (_mm_scalef_round_sh): Likewise.
+ (_mm_mask_scalef_round_sh): Likewise.
+ (_mm_maskz_scalef_round_sh): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_rcp_ph):
+ New intrinsic.
+ (_mm256_rcp_ph): Likewise.
+ (_mm_mask_rcp_ph): Likewise.
+ (_mm256_mask_rcp_ph): Likewise.
+ (_mm_maskz_rcp_ph): Likewise.
+ (_mm256_maskz_rcp_ph): Likewise.
+ (_mm_scalef_ph): Likewise.
+ (_mm256_scalef_ph): Likewise.
+ (_mm_mask_scalef_ph): Likewise.
+ (_mm256_mask_scalef_ph): Likewise.
+ (_mm_maskz_scalef_ph): Likewise.
+ (_mm256_maskz_scalef_ph): Likewise.
+ * config/i386/i386-builtin.def: Add new builtins.
+ * config/i386/sse.md (VFH_AVX512VL): New.
+ (avx512fp16_rcp<mode>2<mask_name>): Ditto.
+ (avx512fp16_vmrcpv8hf2<mask_scalar_name>): Ditto.
+ (avx512f_vmscalef<mode><mask_scalar_name><round_scalar_name>):
+ Adjust to support HF vector modes.
+ (<avx512>_scalef<mode><mask_name><round_name>): Ditto.
+
+2021-09-14 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h: (_mm512_sqrt_ph):
+ New intrinsic.
+ (_mm512_mask_sqrt_ph): Likewise.
+ (_mm512_maskz_sqrt_ph): Likewise.
+ (_mm512_sqrt_round_ph): Likewise.
+ (_mm512_mask_sqrt_round_ph): Likewise.
+ (_mm512_maskz_sqrt_round_ph): Likewise.
+ (_mm512_rsqrt_ph): Likewise.
+ (_mm512_mask_rsqrt_ph): Likewise.
+ (_mm512_maskz_rsqrt_ph): Likewise.
+ (_mm_rsqrt_sh): Likewise.
+ (_mm_mask_rsqrt_sh): Likewise.
+ (_mm_maskz_rsqrt_sh): Likewise.
+ (_mm_sqrt_sh): Likewise.
+ (_mm_mask_sqrt_sh): Likewise.
+ (_mm_maskz_sqrt_sh): Likewise.
+ (_mm_sqrt_round_sh): Likewise.
+ (_mm_mask_sqrt_round_sh): Likewise.
+ (_mm_maskz_sqrt_round_sh): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_sqrt_ph): New intrinsic.
+ (_mm256_sqrt_ph): Likewise.
+ (_mm_mask_sqrt_ph): Likewise.
+ (_mm256_mask_sqrt_ph): Likewise.
+ (_mm_maskz_sqrt_ph): Likewise.
+ (_mm256_maskz_sqrt_ph): Likewise.
+ (_mm_rsqrt_ph): Likewise.
+ (_mm256_rsqrt_ph): Likewise.
+ (_mm_mask_rsqrt_ph): Likewise.
+ (_mm256_mask_rsqrt_ph): Likewise.
+ (_mm_maskz_rsqrt_ph): Likewise.
+ (_mm256_maskz_rsqrt_ph): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtins.
+ (ix86_expand_round_builtin): Ditto.
+ * config/i386/sse.md (VF_AVX512FP16VL): New.
+ (sqrt<mode>2): Adjust for HF vector modes.
+ (<sse>_sqrt<mode>2<mask_name><round_name>): Likewise.
+ (<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>):
+ Likewise.
+ (<sse>_rsqrt<mode>2<mask_name>): New.
+ (avx512fp16_vmrsqrtv8hf2<mask_scalar_name>): Likewise.
+
+2021-09-13 Thomas Schwinge <thomas@codesourcery.com>
+
+ PR bootstrap/101574
+ * diagnostic-spec.c (warning_suppressed_at, copy_warning): Handle
+ 'RESERVED_LOCATION_P' locations.
+ * warning-control.cc (get_nowarn_spec, suppress_warning)
+ (copy_warning): Likewise.
+
+2021-09-13 Thomas Schwinge <thomas@codesourcery.com>
+
+ * diagnostic-spec.h (typedef xint_hash_t): Use 'location_t' instead of...
+ (typedef key_type_t): ... this. Remove.
+ (nowarn_map): Document.
+ * diagnostic-spec.c (nowarn_map): Likewise.
+ * warning-control.cc (convert_to_key): Evolve functions into...
+ (get_location): ... these. Adjust all users.
+
+2021-09-13 Thomas Schwinge <thomas@codesourcery.com>
+
+ * warning-control.cc (copy_warning): Remove 'nowarn_map' setup.
+
+2021-09-13 Jason Merrill <jason@redhat.com>
+
+ * params.opt: Add destructive-interference-size and
+ constructive-interference-size.
+ * doc/invoke.texi: Document them.
+ * config/aarch64/aarch64.c (aarch64_override_options_internal):
+ Set them.
+ * config/arm/arm.c (arm_option_override): Set them.
+ * config/i386/i386-options.c (ix86_option_override_internal):
+ Set them.
+
+2021-09-13 Martin Liska <mliska@suse.cz>
+ H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/101696
+ * common/config/i386/cpuinfo.h (cpu_indicator_init): Add support
+ for x86-64 micro levels for __builtin_cpu_supports.
+ * common/config/i386/i386-cpuinfo.h (enum feature_priority):
+ Add priorities for the micro-arch levels.
+ (enum processor_features): Add new features.
+ * common/config/i386/i386-isas.h: Add micro-arch features.
+ * config/i386/i386-builtins.c (get_builtin_code_for_version):
+ Support the micro-arch levels by callsing
+ __builtin_cpu_supports.
+ * doc/extend.texi: Document that the levels are support by
+ __builtin_cpu_supports.
+
+2021-09-13 Andrew Pinski <apinski@marvell.com>
+
+ PR target/95969
+ * config/aarch64/aarch64-builtins.c (aarch64_fold_builtin_lane_check):
+ New function.
+ (aarch64_general_fold_builtin): Handle AARCH64_SIMD_BUILTIN_LANE_CHECK.
+ (aarch64_general_gimple_fold_builtin): Likewise.
+
+2021-09-13 Andrew Pinski <apinski@marvell.com>
+
+ * config.gcc: Add m32r-*-linux* and m32rle-*-linux*
+ to the Unsupported targets list.
+ Remove support for m32r-*-linux* and m32rle-*-linux*.
+ * config/m32r/linux.h: Removed.
+ * config/m32r/t-linux: Removed.
+
+2021-09-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/102252
+ * config/aarch64/aarch64.c (aarch64_classify_address): Don't allow
+ register index for SVE predicate modes.
+
+2021-09-13 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c
+ (back_threader_profitability::profitable_path_p): Remove FSM
+ references.
+ (back_threader_registry::register_path): Same.
+ * tree-ssa-threadedge.c
+ (jump_threader::simplify_control_stmt_condition): Same.
+ * tree-ssa-threadupdate.c (jt_path_registry::jt_path_registry):
+ Add backedge_threads argument.
+ (fwd_jt_path_registry::fwd_jt_path_registry): Pass
+ backedge_threads argument.
+ (back_jt_path_registry::back_jt_path_registry): Same.
+ (dump_jump_thread_path): Adjust for FSM removal.
+ (back_jt_path_registry::rewire_first_differing_edge): Same.
+ (back_jt_path_registry::adjust_paths_after_duplication): Same.
+ (back_jt_path_registry::update_cfg): Same.
+ (jt_path_registry::register_jump_thread): Same.
+ * tree-ssa-threadupdate.h (enum jump_thread_edge_type): Remove
+ EDGE_FSM_THREAD.
+ (class back_jt_path_registry): Add backedge_threads to
+ constructor.
+
+2021-09-13 Martin Liska <mliska@suse.cz>
+
+ PR c++/101331
+ * asan.h (sanitize_coverage_p): Handle when fn == NULL.
+
+2021-09-13 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/101935
+ * config/i386/i386.h (TARGET_AVX256_MOVE_BY_PIECES): New.
+ (TARGET_AVX256_STORE_BY_PIECES): Likewise.
+ (MOVE_MAX): Check TARGET_AVX256_MOVE_BY_PIECES and
+ TARGET_AVX256_STORE_BY_PIECES instead of
+ TARGET_AVX256_SPLIT_UNALIGNED_LOAD and
+ TARGET_AVX256_SPLIT_UNALIGNED_STORE.
+ (STORE_MAX_PIECES): Check TARGET_AVX256_STORE_BY_PIECES instead
+ of TARGET_AVX256_SPLIT_UNALIGNED_STORE.
+ * config/i386/x86-tune.def (X86_TUNE_AVX256_MOVE_BY_PIECES): New.
+ (X86_TUNE_AVX256_STORE_BY_PIECES): Likewise.
+
+2021-09-13 liuhongt <hongtao.liu@intel.com>
+
+ PR bootstrap/102302
+ * expmed.c (extract_bit_field_using_extv): Use
+ gen_lowpart_if_possible instead of gen_lowpart to avoid ICE.
+
+2021-09-13 Aldy Hernandez <aldyh@redhat.com>
+
+ * Makefile.in (OBJS): Add value-pointer-equiv.o.
+ * gimple-ssa-evrp.c (class ssa_equiv_stack): Move to
+ value-pointer-equiv.*.
+ (ssa_equiv_stack::ssa_equiv_stack): Same.
+ (ssa_equiv_stack::enter): Same.
+ (ssa_equiv_stack::leave): Same.
+ (ssa_equiv_stack::push_replacement): Same.
+ (ssa_equiv_stack::get_replacement): Same.
+ (is_pointer_ssa): Same.
+ (class pointer_equiv_analyzer): Same.
+ (pointer_equiv_analyzer::pointer_equiv_analyzer): Same.
+ (pointer_equiv_analyzer::~pointer_equiv_analyzer): Same.
+ (pointer_equiv_analyzer::set_global_equiv): Same.
+ (pointer_equiv_analyzer::set_cond_equiv): Same.
+ (pointer_equiv_analyzer::get_equiv): Same.
+ (pointer_equiv_analyzer::enter): Same.
+ (pointer_equiv_analyzer::leave): Same.
+ (pointer_equiv_analyzer::get_equiv_expr): Same.
+ (pta_valueize): Same.
+ (pointer_equiv_analyzer::visit_stmt): Same.
+ (pointer_equiv_analyzer::visit_edge): Same.
+ (hybrid_folder::value_of_expr): Same.
+ (hybrid_folder::value_on_edge): Same.
+ * value-pointer-equiv.cc: New file.
+ * value-pointer-equiv.h: New file.
+
+2021-09-13 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/102125
+ * gimple-fold.c (gimple_fold_builtin_memory_op): Allow folding
+ memcpy if the size is not more than MOVE_MAX * MOVE_RATIO.
+
+2021-09-13 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/102125
+ * config/arm/arm.md (movmisaligndi): New define_expand.
+ * config/arm/vec-common.md (movmisalign<mode>): Iterate over VDQ mode.
+
+2021-09-13 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/102125
+ * emit-rtl.c (gen_highpart): Use adjust_address to handle
+ MEM rather than calling simplify_gen_subreg.
+
+2021-09-13 Jan-Benedict Glaw <jbglaw@ług-owl.de>
+
+ * config/alpha/vms.h (INIT_CUMULATIVE_ARGS): Wrap multi-statment
+ define into a block.
+
+2021-09-13 Richard Biener <rguenther@suse.de>
+
+ * config/darwin.h (DARWIN_PREFER_DWARF): Do not define.
+ * config/i386/darwin.h (PREFERRED_DEBUGGING_TYPE): Do not
+ change based on DARWIN_PREFER_DWARF not being defined.
+
+2021-09-13 Richard Biener <rguenther@suse.de>
+
+ * config/i386/lynx.h: Remove undef of PREFERRED_DEBUGGING_TYPE
+ to inherit from elfos.h
+
+2021-09-13 Richard Biener <rguenther@suse.de>
+
+ * config.gcc: Add cr16-*-* to the list of obsoleted targets.
+
+2021-09-13 Richard Biener <rguenther@suse.de>
+
+ * config/avr/elf.h (PREFERRED_DEBUGGING_TYPE): Remove
+ override, pick up DWARF2_DEBUG define from elfos.h
+
+2021-09-13 Richard Biener <rguenther@suse.de>
+
+ * config/rx/rx.h (PREFERRED_DEBUGGING_TYPE): Always define to
+ DWARF2_DEBUG.
+
+2021-09-13 Richard Biener <rguenther@suse.de>
+
+ * config/alpha/vms.h (PREFERRED_DEBUGGING_TYPE): Define to
+ DWARF2_DEBUG.
+
+2021-09-13 Richard Biener <rguenther@suse.de>
+
+ * config/i386/cygming.h: Always default to DWARF2 debugging.
+ Do not define DBX_DEBUGGING_INFO, that's done via dbxcoff.h
+ already.
+ * doc/install.texi: Document binutils 2.16 as minimum
+ requirement for mingw.
+
+2021-09-13 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (struct rs6000_cost_data): New members
+ nstmts, nloads and extra_ctor_cost.
+ (rs6000_density_test): Add load density related heuristics. Do
+ extra costing on vector construction statements if need.
+ (rs6000_init_cost): Init new members.
+ (rs6000_update_target_cost_per_stmt): New function.
+ (rs6000_add_stmt_cost): Factor vect_nonmem hunk out to function
+ rs6000_update_target_cost_per_stmt and call it.
+
+2021-09-13 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (struct rs6000_cost_data): Remove typedef.
+ (rs6000_init_cost): Adjust.
+
+2021-09-13 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386.md: (UNSPEC_COPYSIGN): Remove.
+ (UNSPEC_XORSIGN): Ditto.
+
+2021-09-12 Roger Sayle <roger@nextmovesoftware.com>
+
+ * expr.c (convert_move): Preserve SUBREG_PROMOTED_VAR_P when
+ creating a (wider) partial subreg from a SUBREG_PROMOTED_VAR_P
+ subreg.
+
+2021-09-11 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (class back_threader_registry): Use
+ back_jt_path_registry.
+ * tree-ssa-threadedge.c (jump_threader::jump_threader): Use
+ fwd_jt_path_registry.
+ * tree-ssa-threadedge.h (class jump_threader): Same..
+ * tree-ssa-threadupdate.c
+ (jump_thread_path_registry::jump_thread_path_registry): Rename...
+ (jt_path_registry::jt_path_registry): ...to this.
+ (jump_thread_path_registry::~jump_thread_path_registry): Rename...
+ (jt_path_registry::~jt_path_registry): ...this.
+ (fwd_jt_path_registry::fwd_jt_path_registry): New.
+ (fwd_jt_path_registry::~fwd_jt_path_registry): New.
+ (jump_thread_path_registry::allocate_thread_edge): Rename...
+ (jt_path_registry::allocate_thread_edge): ...to this.
+ (jump_thread_path_registry::allocate_thread_path): Rename...
+ (jt_path_registry::allocate_thread_path): ...to this.
+ (jump_thread_path_registry::lookup_redirection_data): Rename...
+ (fwd_jt_path_registry::lookup_redirection_data): ...to this.
+ (jump_thread_path_registry::thread_block_1): Rename...
+ (fwd_jt_path_registry::thread_block_1): ...to this.
+ (jump_thread_path_registry::thread_block): Rename...
+ (fwd_jt_path_registry::thread_block): ...to this.
+ (jt_path_registry::thread_through_loop_header): Rename...
+ (fwd_jt_path_registry::thread_through_loop_header): ...to this.
+ (jump_thread_path_registry::mark_threaded_blocks): Rename...
+ (fwd_jt_path_registry::mark_threaded_blocks): ...to this.
+ (jump_thread_path_registry::debug_path): Rename...
+ (jt_path_registry::debug_path): ...to this.
+ (jump_thread_path_registry::dump): Rename...
+ (jt_path_registry::debug): ...to this.
+ (jump_thread_path_registry::rewire_first_differing_edge): Rename...
+ (back_jt_path_registry::rewire_first_differing_edge): ...to this.
+ (jump_thread_path_registry::adjust_paths_after_duplication): Rename...
+ (back_jt_path_registry::adjust_paths_after_duplication): ...to this.
+ (jump_thread_path_registry::duplicate_thread_path): Rename...
+ (back_jt_path_registry::duplicate_thread_path): ...to this. Also,
+ drop ill-formed candidates.
+ (jump_thread_path_registry::remove_jump_threads_including): Rename...
+ (fwd_jt_path_registry::remove_jump_threads_including): ...to this.
+ (jt_path_registry::thread_through_all_blocks): New.
+ (back_jt_path_registry::update_cfg): New.
+ (fwd_jt_path_registry::update_cfg): New.
+ (jump_thread_path_registry::register_jump_thread): Rename...
+ (jt_path_registry::register_jump_thread): ...to this.
+ * tree-ssa-threadupdate.h (class jump_thread_path_registry):
+ Abstract to...
+ (class jt_path_registry): ...here.
+ (class fwd_jt_path_registry): New.
+ (class back_jt_path_registry): New.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ Revert:
+ 2021-09-01 liuhongt <hongtao.liu@intel.com>
+
+ * emit-rtl.c (validate_subreg): Get rid of all float-int
+ special cases.
+
+2021-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-core.h (enum omp_memory_order): Add OMP_MEMORY_ORDER_MASK,
+ OMP_FAIL_MEMORY_ORDER_UNSPECIFIED, OMP_FAIL_MEMORY_ORDER_RELAXED,
+ OMP_FAIL_MEMORY_ORDER_ACQUIRE, OMP_FAIL_MEMORY_ORDER_RELEASE,
+ OMP_FAIL_MEMORY_ORDER_ACQ_REL, OMP_FAIL_MEMORY_ORDER_SEQ_CST and
+ OMP_FAIL_MEMORY_ORDER_MASK enumerators.
+ (OMP_FAIL_MEMORY_ORDER_SHIFT): Define.
+ * gimple-pretty-print.c (dump_gimple_omp_atomic_load,
+ dump_gimple_omp_atomic_store): Print [weak] for weak atomic
+ load/store.
+ * gimple.h (enum gf_mask): Change GF_OMP_ATOMIC_MEMORY_ORDER
+ to 6-bit mask, adjust GF_OMP_ATOMIC_NEED_VALUE value and add
+ GF_OMP_ATOMIC_WEAK.
+ (gimple_omp_atomic_weak_p, gimple_omp_atomic_set_weak): New inline
+ functions.
+ * tree.h (OMP_ATOMIC_WEAK): Define.
+ * tree-pretty-print.c (dump_omp_atomic_memory_order): Adjust for
+ fail memory order being encoded in the same enum and also print
+ fail clause if present.
+ (dump_generic_node): Print weak clause if OMP_ATOMIC_WEAK.
+ * gimplify.c (goa_stabilize_expr): Add target_expr and rhs arguments,
+ handle pre_p == NULL case as a test mode that only returns value
+ but doesn't change gimplify nor change anything otherwise, adjust
+ recursive calls, add MODIFY_EXPR, ADDR_EXPR, COND_EXPR, TARGET_EXPR
+ and CALL_EXPR handling, adjust COMPOUND_EXPR handling for
+ __builtin_clear_padding calls, for !rhs gimplify as lvalue rather
+ than rvalue.
+ (gimplify_omp_atomic): Adjust goa_stabilize_expr caller. Handle
+ COND_EXPR rhs. Set weak flag on gimple load/store for
+ OMP_ATOMIC_WEAK.
+ * omp-expand.c (omp_memory_order_to_fail_memmodel): New function.
+ (omp_memory_order_to_memmodel): Adjust for fail clause encoded
+ in the same enum.
+ (expand_omp_atomic_cas): New function.
+ (expand_omp_atomic_pipeline): Use omp_memory_order_to_fail_memmodel
+ function.
+ (expand_omp_atomic): Attempt to optimize atomic compare and exchange
+ using expand_omp_atomic_cas.
+
+2021-09-10 Aldy Hernandez <aldyh@redhat.com>
+ Michael Matz <matz@suse.de>
+
+ * tree-pass.h (PROP_loop_opts_done): New.
+ * gimple-range-path.cc (path_range_query::internal_range_of_expr):
+ Intersect with global range.
+ * tree-ssa-loop.c (tree_ssa_loop_done): Set PROP_loop_opts_done.
+ * tree-ssa-threadbackward.c
+ (back_threader_profitability::profitable_path_p): Disable
+ threading through latches until after loop optimizations have run.
+
+2021-09-10 David Faust <david.faust@oracle.com>
+
+ * doc/invoke.texi: Document BPF -mcpu, -mjmpext, -mjmp32 and -malu32
+ options.
+
+2021-09-10 David Faust <david.faust@oracle.com>
+
+ * config/bpf/bpf-opts.h (bpf_isa_version): New enum.
+ * config/bpf/bpf-protos.h (bpf_expand_cbranch): New.
+ * config/bpf/bpf.c (bpf_option_override): Handle -mcpu option.
+ (bpf_expand_cbranch): New function.
+ * config/bpf/bpf.md (AM mode iterator): Conditionalize support for SI
+ mode.
+ (zero_extendsidi2): Only use mov32 instruction if it is available.
+ (SIM mode iterator): Conditionalize support for SI mode.
+ (JM mode iterator): New.
+ (cbranchdi4): Update name, use new JM iterator. Use bpf_expand_cbranch.
+ (*branch_on_di): Update name, use new JM iterator.
+ * config/bpf/bpf.opt: (mjmpext): New option.
+ (malu32): Likewise.
+ (mjmp32): Likewise.
+ (mcpu): Likewise.
+ (bpf_isa): New enum.
+
+2021-09-10 David Faust <david.faust@oracle.com>
+
+ * config/bpf/bpf.md (zero_extendhidi2): Add new output template
+ for register-to-register extensions.
+ (zero_extendqidi2): Likewise.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102273
+ * internal-fn.c (expand_DEFERRED_INIT): Always expand non-SSA vars.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102269
+ * gimplify.c (is_var_need_auto_init): Empty types do not need
+ initialization.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ * configure.ac (--with-stabs): Remove.
+ * configure: Regenerate.
+ * doc/install.texi: Remove --with-stabs documentation.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h: (_mm512_cmp_ph_mask):
+ New intrinsic.
+ (_mm512_mask_cmp_ph_mask): Likewise.
+ (_mm512_cmp_round_ph_mask): Likewise.
+ (_mm512_mask_cmp_round_ph_mask): Likewise.
+ (_mm_cmp_sh_mask): Likewise.
+ (_mm_mask_cmp_sh_mask): Likewise.
+ (_mm_cmp_round_sh_mask): Likewise.
+ (_mm_mask_cmp_round_sh_mask): Likewise.
+ (_mm_comieq_sh): Likewise.
+ (_mm_comilt_sh): Likewise.
+ (_mm_comile_sh): Likewise.
+ (_mm_comigt_sh): Likewise.
+ (_mm_comige_sh): Likewise.
+ (_mm_comineq_sh): Likewise.
+ (_mm_ucomieq_sh): Likewise.
+ (_mm_ucomilt_sh): Likewise.
+ (_mm_ucomile_sh): Likewise.
+ (_mm_ucomigt_sh): Likewise.
+ (_mm_ucomige_sh): Likewise.
+ (_mm_ucomineq_sh): Likewise.
+ (_mm_comi_round_sh): Likewise.
+ (_mm_comi_sh): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_cmp_ph_mask): New intrinsic.
+ (_mm_mask_cmp_ph_mask): Likewise.
+ (_mm256_cmp_ph_mask): Likewise.
+ (_mm256_mask_cmp_ph_mask): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtin types.
+ (ix86_expand_round_builtin): Ditto.
+ * config/i386/i386.md (ssevecmode): Add HF mode.
+ (MODEFH): New mode iterator.
+ * config/i386/sse.md
+ (V48H_AVX512VL): New mode iterator to support HF vector modes.
+ Ajdust corresponding description.
+ (ssecmpintprefix): New.
+ (VI12_AVX512VL): Adjust to support HF vector modes.
+ (cmp_imm_predicate): Likewise.
+ (<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>):
+ Likewise.
+ (avx512f_vmcmp<mode>3<round_saeonly_name>): Likewise.
+ (avx512f_vmcmp<mode>3_mask<round_saeonly_name>): Likewise.
+ (<sse>_<unord>comi<round_saeonly_name>): Likewise.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h: (_mm512_max_ph): New intrinsic.
+ (_mm512_mask_max_ph): Likewise.
+ (_mm512_maskz_max_ph): Likewise.
+ (_mm512_min_ph): Likewise.
+ (_mm512_mask_min_ph): Likewise.
+ (_mm512_maskz_min_ph): Likewise.
+ (_mm512_max_round_ph): Likewise.
+ (_mm512_mask_max_round_ph): Likewise.
+ (_mm512_maskz_max_round_ph): Likewise.
+ (_mm512_min_round_ph): Likewise.
+ (_mm512_mask_min_round_ph): Likewise.
+ (_mm512_maskz_min_round_ph): Likewise.
+ (_mm_max_sh): Likewise.
+ (_mm_mask_max_sh): Likewise.
+ (_mm_maskz_max_sh): Likewise.
+ (_mm_min_sh): Likewise.
+ (_mm_mask_min_sh): Likewise.
+ (_mm_maskz_min_sh): Likewise.
+ (_mm_max_round_sh): Likewise.
+ (_mm_mask_max_round_sh): Likewise.
+ (_mm_maskz_max_round_sh): Likewise.
+ (_mm_min_round_sh): Likewise.
+ (_mm_mask_min_round_sh): Likewise.
+ (_mm_maskz_min_round_sh): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_max_ph): New intrinsic.
+ (_mm256_max_ph): Likewise.
+ (_mm_mask_max_ph): Likewise.
+ (_mm256_mask_max_ph): Likewise.
+ (_mm_maskz_max_ph): Likewise.
+ (_mm256_maskz_max_ph): Likewise.
+ (_mm_min_ph): Likewise.
+ (_mm256_min_ph): Likewise.
+ (_mm_mask_min_ph): Likewise.
+ (_mm256_mask_min_ph): Likewise.
+ (_mm_maskz_min_ph): Likewise.
+ (_mm256_maskz_min_ph): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtin types.
+ * config/i386/sse.md
+ (<code><mode>3<mask_name><round_saeonly_name>): Adjust to
+ support HF vector modes.
+ (*<code><mode>3<mask_name><round_saeonly_name>): Likewise.
+ (ieee_<ieee_maxmin><mode>3<mask_name><round_saeonly_name>):
+ Likewise.
+ (<sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>):
+ Likewise.
+ * config/i386/subst.md (round_saeonly_mode512bit_condition):
+ Adjust for HF vector modes.
+
+2021-09-10 Liu, Hongtao <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_add_sh): New intrinsic.
+ (_mm_mask_add_sh): Likewise.
+ (_mm_maskz_add_sh): Likewise.
+ (_mm_sub_sh): Likewise.
+ (_mm_mask_sub_sh): Likewise.
+ (_mm_maskz_sub_sh): Likewise.
+ (_mm_mul_sh): Likewise.
+ (_mm_mask_mul_sh): Likewise.
+ (_mm_maskz_mul_sh): Likewise.
+ (_mm_div_sh): Likewise.
+ (_mm_mask_div_sh): Likewise.
+ (_mm_maskz_div_sh): Likewise.
+ (_mm_add_round_sh): Likewise.
+ (_mm_mask_add_round_sh): Likewise.
+ (_mm_maskz_add_round_sh): Likewise.
+ (_mm_sub_round_sh): Likewise.
+ (_mm_mask_sub_round_sh): Likewise.
+ (_mm_maskz_sub_round_sh): Likewise.
+ (_mm_mul_round_sh): Likewise.
+ (_mm_mask_mul_round_sh): Likewise.
+ (_mm_maskz_mul_round_sh): Likewise.
+ (_mm_div_round_sh): Likewise.
+ (_mm_mask_div_round_sh): Likewise.
+ (_mm_maskz_div_round_sh): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_round_builtin): Handle new builtins.
+ * config/i386/sse.md (VF_128): Change description.
+ (<sse>_vm<plusminus_insn><mode>3<mask_scalar_name><round_scalar_name>):
+ Adjust to support HF vector modes.
+ (<sse>_vm<multdiv_mnemonic><mode>3<mask_scalar_name><round_scalar_name>):
+ Likewise.
+
+2021-09-10 H.J. Lu <hjl.tools@gmail.com>
+
+ * config/i386/i386-expand.c
+ (ix86_avx256_split_vector_move_misalign): Handle V16HF mode.
+ * config/i386/i386.c
+ (ix86_preferred_simd_mode): Handle HF mode.
+ * config/i386/sse.md (V_256H): New mode iterator.
+ (avx_vextractf128<mode>): Use it.
+ (VEC_INIT_MODE): Align vector HFmode condition to vector
+ HImodes since there're no real HF instruction used.
+ (VEC_INIT_HALF_MODE): Ditto.
+ (VIHF): Ditto.
+ (VIHF_AVX512BW): Ditto.
+ (*vec_extracthf): Ditto.
+ (VEC_EXTRACT_MODE): Ditto.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ PR target/102255
+ * config/dbx.h: Remove.
+ * config/dbxcoff.h: Do not define PREFERRED_DEBUGGING_TYPE.
+ * config/lynx.h: Likewise.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386-expand.c (ix86_expand_copysign): Expand
+ right into ANDNOT + AND + IOR, using paradoxical subregs.
+ (ix86_split_copysign_const): Remove.
+ (ix86_split_copysign_var): Ditto.
+ * config/i386/i386-protos.h (ix86_split_copysign_const): Dotto.
+ (ix86_split_copysign_var): Ditto.
+ * config/i386/i386.md (@copysign<mode>3_const): Ditto.
+ (@copysign<mode>3_var): Ditto.
+
+2021-09-09 qing zhao <qing.zhao@oracle.com>
+
+ * builtins.c (expand_builtin_memset): Make external visible.
+ * builtins.h (expand_builtin_memset): Declare extern.
+ * common.opt (ftrivial-auto-var-init=): New option.
+ * doc/extend.texi: Document the uninitialized attribute.
+ * doc/invoke.texi: Document -ftrivial-auto-var-init.
+ * flag-types.h (enum auto_init_type): New enumerated type
+ auto_init_type.
+ * gimple-fold.c (clear_padding_type): Add one new parameter.
+ (clear_padding_union): Likewise.
+ (clear_padding_emit_loop): Likewise.
+ (clear_type_padding_in_mask): Likewise.
+ (gimple_fold_builtin_clear_padding): Handle this new parameter.
+ * gimplify.c (gimple_add_init_for_auto_var): New function.
+ (gimple_add_padding_init_for_auto_var): New function.
+ (is_var_need_auto_init): New function.
+ (gimplify_decl_expr): Add initialization to automatic variables per
+ users' requests.
+ (gimplify_call_expr): Add one new parameter for call to
+ __builtin_clear_padding.
+ (gimplify_init_constructor): Add padding initialization in the end.
+ * internal-fn.c (INIT_PATTERN_VALUE): New macro.
+ (expand_DEFERRED_INIT): New function.
+ * internal-fn.def (DEFERRED_INIT): New internal function.
+ * tree-cfg.c (verify_gimple_call): Verify calls to .DEFERRED_INIT.
+ * tree-sra.c (generate_subtree_deferred_init): New function.
+ (scan_function): Avoid setting cannot_scalarize_away_bitmap for
+ calls to .DEFERRED_INIT.
+ (sra_modify_deferred_init): New function.
+ (sra_modify_function_body): Handle calls to DEFERRED_INIT specially.
+ * tree-ssa-structalias.c (find_func_aliases_for_call): Likewise.
+ * tree-ssa-uninit.c (warn_uninit): Handle calls to DEFERRED_INIT
+ specially.
+ (check_defs): Likewise.
+ (warn_uninitialized_vars): Likewise.
+ * tree-ssa.c (ssa_undefined_value_p): Likewise.
+ * tree.c (build_common_builtin_nodes): Build tree node for
+ BUILT_IN_CLEAR_PADDING when needed.
+
+2021-09-09 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-loop-im.c (fill_always_executed_in_1): Walk
+ into all subloops.
+
+2021-09-09 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-loop-im.c (fill_always_executed_in_1): Integrate
+ DOM walk from get_loop_body_in_dom_order using a worklist
+ approach.
+
+2021-09-09 liuhongt <hongtao.liu@intel.com>
+
+ * config.gcc: Add avx512fp16vlintrin.h.
+ * config/i386/avx512fp16intrin.h: (_mm512_add_ph): New intrinsic.
+ (_mm512_mask_add_ph): Likewise.
+ (_mm512_maskz_add_ph): Likewise.
+ (_mm512_sub_ph): Likewise.
+ (_mm512_mask_sub_ph): Likewise.
+ (_mm512_maskz_sub_ph): Likewise.
+ (_mm512_mul_ph): Likewise.
+ (_mm512_mask_mul_ph): Likewise.
+ (_mm512_maskz_mul_ph): Likewise.
+ (_mm512_div_ph): Likewise.
+ (_mm512_mask_div_ph): Likewise.
+ (_mm512_maskz_div_ph): Likewise.
+ (_mm512_add_round_ph): Likewise.
+ (_mm512_mask_add_round_ph): Likewise.
+ (_mm512_maskz_add_round_ph): Likewise.
+ (_mm512_sub_round_ph): Likewise.
+ (_mm512_mask_sub_round_ph): Likewise.
+ (_mm512_maskz_sub_round_ph): Likewise.
+ (_mm512_mul_round_ph): Likewise.
+ (_mm512_mask_mul_round_ph): Likewise.
+ (_mm512_maskz_mul_round_ph): Likewise.
+ (_mm512_div_round_ph): Likewise.
+ (_mm512_mask_div_round_ph): Likewise.
+ (_mm512_maskz_div_round_ph): Likewise.
+ * config/i386/avx512fp16vlintrin.h: New header.
+ * config/i386/i386-builtin-types.def (V16HF, V8HF, V32HF):
+ Add new builtin types.
+ * config/i386/i386-builtin.def: Add corresponding builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtin types.
+ (ix86_expand_round_builtin): Likewise.
+ * config/i386/immintrin.h: Include avx512fp16vlintrin.h
+ * config/i386/sse.md (VFH): New mode_iterator.
+ (VF2H): Likewise.
+ (avx512fmaskmode): Add HF vector modes.
+ (avx512fmaskhalfmode): Likewise.
+ (<plusminus_insn><mode>3<mask_name><round_name>): Adjust to for
+ HF vector modes.
+ (*<plusminus_insn><mode>3<mask_name><round_name>): Likewise.
+ (mul<mode>3<mask_name><round_name>): Likewise.
+ (*mul<mode>3<mask_name><round_name>): Likewise.
+ (div<mode>3): Likewise.
+ (<sse>_div<mode>3<mask_name><round_name>): Likewise.
+ * config/i386/subst.md (SUBST_V): Add HF vector modes.
+ (SUBST_A): Likewise.
+ (round_mode512bit_condition): Adjust for V32HFmode.
+
+2021-09-09 liuhongt <hongtao.liu@intel.com>
+
+ PR target/101059
+ * config/i386/sse.md (reduc_plus_scal_<mode>): Split to ..
+ (reduc_plus_scal_v4sf): .. this, New define_expand.
+ (reduc_plus_scal_v2df): .. and this, New define_expand.
+
+2021-09-09 liuhongt <hongtao.liu@intel.com>
+
+ PR target/91103
+ * config/i386/sse.md (*vec_extract<mode><ssescalarmodelower>_valign):
+ New define_insn.
+
+2021-09-08 Jonathan Wakely <jwakely@redhat.com>
+
+ PR c++/60318
+ * doc/trouble.texi (Copy Assignment): Fix description of
+ behaviour and fix code in example.
+
+2021-09-08 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR target/102107
+ * config/rs6000/rs6000-logue.c (rs6000_emit_epilogue): For ELFv2 use
+ r11 instead of r12 for restoring CR.
+
+2021-09-08 Jakub Jelinek <jakub@redhat.com>
+ liuhongt <hongtao.liu@intel.com>
+
+ PR target/89984
+ * config/i386/i386.md (@xorsign<mode>3_1): Remove.
+ * config/i386/i386-expand.c (ix86_expand_xorsign): Expand right away
+ into AND with mask and XOR, using paradoxical subregs.
+ (ix86_split_xorsign): Remove.
+ * config/i386/i386-protos.h (ix86_split_xorsign): Remove.
+
+2021-09-08 Di Zhao <dizhao@os.amperecomputing.com>
+
+ * tree-ssa-sccvn.c (vn_nary_op_insert_into): fix result compare
+
+2021-09-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/102224
+ * config/i386/i386.md (xorsign<mode>3): If operands[1] is equal to
+ operands[2], emit abs<mode>2 instead.
+ (@xorsign<mode>3_1): Add early-clobbers for output operand, enable
+ first alternative even for avx, add another alternative with
+ =&Yv <- 0, Yv, Yvm constraints.
+ * config/i386/i386-expand.c (ix86_split_xorsign): If op0 is equal
+ to op1, emit vpandn instead.
+
+2021-09-08 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_set_ph): New intrinsic.
+ (_mm256_set_ph): Likewise.
+ (_mm512_set_ph): Likewise.
+ (_mm_setr_ph): Likewise.
+ (_mm256_setr_ph): Likewise.
+ (_mm512_setr_ph): Likewise.
+ (_mm_set1_ph): Likewise.
+ (_mm256_set1_ph): Likewise.
+ (_mm512_set1_ph): Likewise.
+ (_mm_setzero_ph): Likewise.
+ (_mm256_setzero_ph): Likewise.
+ (_mm512_setzero_ph): Likewise.
+ (_mm_set_sh): Likewise.
+ (_mm_load_sh): Likewise.
+ (_mm_store_sh): Likewise.
+ * config/i386/i386-builtin-types.def (V8HF): New type.
+ (DEF_FUNCTION_TYPE (V8HF, V8HI)): New builtin function type
+ * config/i386/i386-expand.c (ix86_expand_vector_init_duplicate):
+ Support vector HFmodes.
+ (ix86_expand_vector_init_one_nonzero): Likewise.
+ (ix86_expand_vector_init_one_var): Likewise.
+ (ix86_expand_vector_init_interleave): Likewise.
+ (ix86_expand_vector_init_general): Likewise.
+ (ix86_expand_vector_set): Likewise.
+ (ix86_expand_vector_extract): Likewise.
+ (ix86_expand_vector_init_concat): Likewise.
+ (ix86_expand_sse_movcc): Handle vector HFmodes.
+ (ix86_expand_vector_set_var): Ditto.
+ * config/i386/i386-modes.def: Add HF vector modes in comment.
+ * config/i386/i386.c (classify_argument): Add HF vector modes.
+ (ix86_hard_regno_mode_ok): Allow HF vector modes for AVX512FP16.
+ (ix86_vector_mode_supported_p): Likewise.
+ (ix86_set_reg_reg_cost): Handle vector HFmode.
+ (ix86_get_ssemov): Handle vector HFmode.
+ (function_arg_advance_64): Pass unamed V16HFmode and V32HFmode
+ by stack.
+ (function_arg_advance_32): Pass V8HF/V16HF/V32HF by sse reg for 32bit
+ mode.
+ (function_arg_advance_32): Ditto.
+ * config/i386/i386.h (VALID_AVX512FP16_REG_MODE): New.
+ (VALID_AVX256_REG_OR_OI_MODE): Rename to ..
+ (VALID_AVX256_REG_OR_OI_VHF_MODE): .. this, and add V16HF.
+ (VALID_SSE2_REG_VHF_MODE): New.
+ (VALID_AVX512VL_128_REG_MODE): Add V8HF and TImode.
+ (SSE_REG_MODE_P): Add vector HFmode.
+ * config/i386/i386.md (mode): Add HF vector modes.
+ (MODE_SIZE): Likewise.
+ (ssemodesuffix): Add ph suffix for HF vector modes.
+ * config/i386/sse.md (VFH_128): New mode iterator.
+ (VMOVE): Adjust for HF vector modes.
+ (V): Likewise.
+ (V_256_512): Likewise.
+ (avx512): Likewise.
+ (avx512fmaskmode): Likewise.
+ (shuffletype): Likewise.
+ (sseinsnmode): Likewise.
+ (ssedoublevecmode): Likewise.
+ (ssehalfvecmode): Likewise.
+ (ssehalfvecmodelower): Likewise.
+ (ssePScmode): Likewise.
+ (ssescalarmode): Likewise.
+ (ssescalarmodelower): Likewise.
+ (sseintprefix): Likewise.
+ (i128): Likewise.
+ (bcstscalarsuff): Likewise.
+ (xtg_mode): Likewise.
+ (VI12HF_AVX512VL): New mode_iterator.
+ (VF_AVX512FP16): Likewise.
+ (VIHF): Likewise.
+ (VIHF_256): Likewise.
+ (VIHF_AVX512BW): Likewise.
+ (V16_256): Likewise.
+ (V32_512): Likewise.
+ (sseintmodesuffix): New mode_attr.
+ (sse): Add scalar and vector HFmodes.
+ (ssescalarmode): Add vector HFmode mapping.
+ (ssescalarmodesuffix): Add sh suffix for HFmode.
+ (*<sse>_vm<insn><mode>3): Use VFH_128.
+ (*<sse>_vm<multdiv_mnemonic><mode>3): Likewise.
+ (*ieee_<ieee_maxmin><mode>3): Likewise.
+ (<avx512>_blendm<mode>): New define_insn.
+ (vec_setv8hf): New define_expand.
+ (vec_set<mode>_0): New define_insn for HF vector set.
+ (*avx512fp16_movsh): Likewise.
+ (avx512fp16_movsh): Likewise.
+ (vec_extract_lo_v32hi): Rename to ...
+ (vec_extract_lo_<mode>): ... this, and adjust to allow HF
+ vector modes.
+ (vec_extract_hi_v32hi): Likewise.
+ (vec_extract_hi_<mode>): Likewise.
+ (vec_extract_lo_v16hi): Likewise.
+ (vec_extract_lo_<mode>): Likewise.
+ (vec_extract_hi_v16hi): Likewise.
+ (vec_extract_hi_<mode>): Likewise.
+ (vec_set_hi_v16hi): Likewise.
+ (vec_set_hi_<mode>): Likewise.
+ (vec_set_lo_v16hi): Likewise.
+ (vec_set_lo_<mode>): Likewise.
+ (*vec_extract<mode>_0): New define_insn_and_split for HF
+ vector extract.
+ (*vec_extracthf): New define_insn.
+ (VEC_EXTRACT_MODE): Add HF vector modes.
+ (PINSR_MODE): Add V8HF.
+ (sse2p4_1): Likewise.
+ (pinsr_evex_isa): Likewise.
+ (<sse2p4_1>_pinsr<ssemodesuffix>): Adjust to support
+ insert for V8HFmode.
+ (pbroadcast_evex_isa): Add HF vector modes.
+ (AVX2_VEC_DUP_MODE): Likewise.
+ (VEC_INIT_MODE): Likewise.
+ (VEC_INIT_HALF_MODE): Likewise.
+ (avx2_pbroadcast<mode>): Adjust to support HF vector mode
+ broadcast.
+ (avx2_pbroadcast<mode>_1): Likewise.
+ (<avx512>_vec_dup<mode>_1): Likewise.
+ (<avx512>_vec_dup<mode><mask_name>): Likewise.
+ (<mask_codefor><avx512>_vec_dup_gpr<mode><mask_name>):
+ Likewise.
+
+2021-09-08 Guo, Xuepeng <xuepeng.guo@intel.com>
+ H.J. Lu <hongjiu.lu@intel.com>
+ Liu Hongtao <hongtao.liu@intel.com>
+ Wang Hongyu <hongyu.wang@intel.com>
+ Xu Dianhong <dianhong.xu@intel.com>
+
+ * common/config/i386/cpuinfo.h (get_available_features):
+ Detect FEATURE_AVX512FP16.
+ * common/config/i386/i386-common.c
+ (OPTION_MASK_ISA_AVX512FP16_SET,
+ OPTION_MASK_ISA_AVX512FP16_UNSET,
+ OPTION_MASK_ISA2_AVX512FP16_SET,
+ OPTION_MASK_ISA2_AVX512FP16_UNSET): New.
+ (OPTION_MASK_ISA2_AVX512BW_UNSET,
+ OPTION_MASK_ISA2_AVX512BF16_UNSET): Add AVX512FP16.
+ (ix86_handle_option): Handle -mavx512fp16.
+ * common/config/i386/i386-cpuinfo.h (enum processor_features):
+ Add FEATURE_AVX512FP16.
+ * common/config/i386/i386-isas.h: Add entry for AVX512FP16.
+ * config.gcc: Add avx512fp16intrin.h.
+ * config/i386/avx512fp16intrin.h: New intrinsic header.
+ * config/i386/cpuid.h: Add bit_AVX512FP16.
+ * config/i386/i386-builtin-types.def: (FLOAT16): New primitive type.
+ * config/i386/i386-builtins.c: Support _Float16 type for i386
+ backend.
+ (ix86_register_float16_builtin_type): New function.
+ (ix86_float16_type_node): New.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Define
+ __AVX512FP16__.
+ * config/i386/i386-expand.c (ix86_expand_branch): Support
+ HFmode.
+ (ix86_prepare_fp_compare_args): Adjust TARGET_SSE_MATH &&
+ SSE_FLOAT_MODE_P to SSE_FLOAT_MODE_SSEMATH_OR_HF_P.
+ (ix86_expand_fp_movcc): Ditto.
+ * config/i386/i386-isa.def: Add PTA define for AVX512FP16.
+ * config/i386/i386-options.c (isa2_opts): Add -mavx512fp16.
+ (ix86_valid_target_attribute_inner_p): Add avx512fp16 attribute.
+ * config/i386/i386.c (ix86_get_ssemov): Use
+ vmovdqu16/vmovw/vmovsh for HFmode/HImode scalar or vector.
+ (ix86_get_excess_precision): Use
+ FLT_EVAL_METHOD_PROMOTE_TO_FLOAT16 when TARGET_AVX512FP16
+ existed.
+ (sse_store_index): Use SFmode cost for HFmode cost.
+ (inline_memory_move_cost): Add HFmode, and perfer SSE cost over
+ GPR cost for HFmode.
+ (ix86_hard_regno_mode_ok): Allow HImode in sse register.
+ (ix86_mangle_type): Add manlging for _Float16 type.
+ (inline_secondary_memory_needed): No memory is needed for
+ 16bit movement between gpr and sse reg under
+ TARGET_AVX512FP16.
+ (ix86_multiplication_cost): Adjust TARGET_SSE_MATH &&
+ SSE_FLOAT_MODE_P to SSE_FLOAT_MODE_SSEMATH_OR_HF_P.
+ (ix86_division_cost): Ditto.
+ (ix86_rtx_costs): Ditto.
+ (ix86_add_stmt_cost): Ditto.
+ (ix86_optab_supported_p): Ditto.
+ * config/i386/i386.h (VALID_AVX512F_SCALAR_MODE): Add HFmode.
+ (SSE_FLOAT_MODE_SSEMATH_OR_HF_P): Add HFmode.
+ (PTA_SAPPHIRERAPIDS): Add PTA_AVX512FP16.
+ * config/i386/i386.md (mode): Add HFmode.
+ (MODE_SIZE): Add HFmode.
+ (isa): Add avx512fp16.
+ (enabled): Handle avx512fp16.
+ (ssemodesuffix): Add sh suffix for HFmode.
+ (comm): Add mult, div.
+ (plusminusmultdiv): New code iterator.
+ (insn): Add mult, div.
+ (*movhf_internal): Adjust for avx512fp16 instruction.
+ (*movhi_internal): Ditto.
+ (*cmpi<unord>hf): New define_insn for HFmode.
+ (*ieee_s<ieee_maxmin>hf3): Likewise.
+ (extendhf<mode>2): Likewise.
+ (trunc<mode>hf2): Likewise.
+ (float<floatunssuffix><mode>hf2): Likewise.
+ (*<insn>hf): Likewise.
+ (cbranchhf4): New expander.
+ (movhfcc): Likewise.
+ (<insn>hf3): Likewise.
+ (mulhf3): Likewise.
+ (divhf3): Likewise.
+ * config/i386/i386.opt: Add mavx512fp16.
+ * config/i386/immintrin.h: Include avx512fp16intrin.h.
+ * doc/invoke.texi: Add mavx512fp16.
+ * doc/extend.texi: Add avx512fp16 Usage Notes.
+
+2021-09-08 liuhongt <hongtao.liu@intel.com>
+
+ * common.opt: Support -fexcess-precision=16.
+ * config/aarch64/aarch64.c (aarch64_excess_precision): Return
+ FLT_EVAL_METHOD_PROMOTE_TO_FLOAT16 when
+ EXCESS_PRECISION_TYPE_FLOAT16.
+ * config/arm/arm.c (arm_excess_precision): Ditto.
+ * config/i386/i386.c (ix86_get_excess_precision): Ditto.
+ * config/m68k/m68k.c (m68k_excess_precision): Issue an error
+ when EXCESS_PRECISION_TYPE_FLOAT16.
+ * config/s390/s390.c (s390_excess_precision): Ditto.
+ * coretypes.h (enum excess_precision_type): Add
+ EXCESS_PRECISION_TYPE_FLOAT16.
+ * doc/tm.texi (TARGET_C_EXCESS_PRECISION): Update documents.
+ * doc/tm.texi.in (TARGET_C_EXCESS_PRECISION): Ditto.
+ * doc/extend.texi (Half-Precision): Document
+ -fexcess-precision=16.
+ * flag-types.h (enum excess_precision): Add
+ EXCESS_PRECISION_FLOAT16.
+ * target.def (excess_precision): Update document.
+ * tree.c (excess_precision_type): Set excess_precision_type to
+ EXCESS_PRECISION_FLOAT16 when -fexcess-precision=16.
+
+2021-09-08 liuhongt <hongtao.liu@intel.com>
+
+ * doc/extend.texi: (@node Floating Types): Adjust the wording.
+ (@node Half-Precision): Ditto.
+
+2021-09-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
+
+ PR target/102115
+ * config/xtensa/xtensa.c (xtensa_emit_move_sequence): Add
+ 'CONST_INT_P (src)' to the condition of the block that tries to
+ eliminate literal when loading integer contant.
+
+2021-09-07 David Faust <david.faust@oracle.com>
+
+ * doc/extend.texi (BPF Type Attributes) New node.
+ Document new preserve_access_index attribute.
+ Document new preserve_access_index builtin.
+ * doc/invoke.texi: Document -mco-re and -mno-co-re options.
+
+2021-09-07 David Faust <david.faust@oracle.com>
+
+ * config/bpf/bpf.c: Adjust includes.
+ (bpf_handle_preserve_access_index_attribute): New function.
+ (bpf_attribute_table): Use it here.
+ (bpf_builtins): Add BPF_BUILTIN_PRESERVE_ACCESS_INDEX.
+ (bpf_option_override): Handle "-mco-re" option.
+ (bpf_asm_init_sections): New.
+ (TARGET_ASM_INIT_SECTIONS): Redefine.
+ (bpf_file_end): New.
+ (TARGET_ASM_FILE_END): Redefine.
+ (bpf_init_builtins): Add "__builtin_preserve_access_index".
+ (bpf_core_compute, bpf_core_get_index): New.
+ (is_attr_preserve_access): New.
+ (bpf_expand_builtin): Handle new builtins.
+ (bpf_core_newdecl, bpf_core_is_maybe_aggregate_access): New.
+ (bpf_core_walk): New.
+ (bpf_resolve_overloaded_builtin): New.
+ (TARGET_RESOLVE_OVERLOADED_BUILTIN): Redefine.
+ (handle_attr): New.
+ (pass_bpf_core_attr): New RTL pass.
+ * config/bpf/bpf-passes.def: New file.
+ * config/bpf/bpf-protos.h (make_pass_bpf_core_attr): New.
+ * config/bpf/coreout.c: New file.
+ * config/bpf/coreout.h: Likewise.
+ * config/bpf/t-bpf (TM_H): Add $(srcdir)/config/bpf/coreout.h.
+ (coreout.o): New rule.
+ (PASSES_EXTRA): Add $(srcdir)/config/bpf/bpf-passes.def.
+ * config.gcc (bpf): Add coreout.h to extra_headers.
+ Add coreout.o to extra_objs.
+ Add $(srcdir)/config/bpf/coreout.c to target_gtfiles.
+
+2021-09-07 David Faust <david.faust@oracle.com>
+
+ * btfout.c (get_btf_id): Function is no longer static.
+ * ctfc.h: Expose it here.
+
+2021-09-07 David Faust <david.faust@oracle.com>
+
+ * ctfc.c (ctf_lookup_tree_type): New function.
+ * ctfc.h: Likewise.
+
+2021-09-07 David Faust <david.faust@oracle.com>
+
+ * ctfc.c (ctf_dtd_lookup): Function is no longer static.
+ * ctfc.h: Analogous change.
+
+2021-09-07 David Faust <david.faust@oracle.com>
+
+ * dwarf2out.c (lookup_type_die): Function is no longer static.
+ * dwarf2out.h: Expose it here.
+
+2021-09-07 Indu Bhagat <indu.bhagat@oracle.com>
+
+ * dwarf2ctf.c (ctf_debug_finalize): Make it static.
+ (ctf_debug_early_finish): New definition.
+ (ctf_debug_finish): Likewise.
+ * dwarf2ctf.h (ctf_debug_finalize): Remove declaration.
+ (ctf_debug_early_finish): New declaration.
+ (ctf_debug_finish): Likewise.
+ * dwarf2out.c (dwarf2out_finish): Invoke ctf_debug_finish.
+ (dwarf2out_early_finish): Invoke ctf_debug_early_finish.
+
+2021-09-07 Indu Bhagat <indu.bhagat@oracle.com>
+
+ * config/bpf/bpf.c (bpf_option_override): For BPF backend, disable LTO
+ support when compiling for CO-RE.
+ * config/bpf/bpf.opt: Add new command line option -mco-re.
+
+2021-09-07 Indu Bhagat <indu.bhagat@oracle.com>
+
+ * flag-types.h (enum debug_info_type): Add new enum
+ DINFO_TYPE_BTF_WITH_CORE.
+ (BTF_WITH_CORE_DEBUG): New bitmask.
+ * flags.h (btf_with_core_debuginfo_p): New declaration.
+ * opts.c (btf_with_core_debuginfo_p): New definition.
+
+2021-09-07 Jason Merrill <jason@redhat.com>
+
+ * tree.h (error_operand_p): Change to inline function.
+
+2021-09-07 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadedge.c (forwarder_block_p): Rename to...
+ (empty_block_with_phis_p): ...this.
+ (potentially_threadable_block): Same.
+ (jump_threader::thread_through_normal_block): Same.
+
+2021-09-07 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR debug/101947
+ * dwarf2out.c (mark_base_types): New overloaded function.
+ (dwarf2out_early_finish): Invoke it on the COMDAT type list as well
+ as the compilation unit, and call move_marked_base_types afterward.
+
+2021-09-07 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/85819
+ * config/i386/i386-expand.c (ix86_expand_convert_uns_sisf_sse):
+ Enable FMA.
+ (ix86_expand_vector_convert_uns_vsivsf): Likewise.
+
+2021-09-07 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102226
+ * tree-vect-loop.c (vect_transform_cycle_phi): Record
+ the converted value for the epilogue PHI use.
+
+2021-09-07 Martin Liska <mliska@suse.cz>
+
+ PR gcov-profile/80223
+ * ipa-inline.c (can_inline_edge_p): Similarly to sanitizer
+ options, do not inline when no_profile_instrument_function
+ attributes are different in early inliner. It's fine to inline
+ it after PGO instrumentation.
+
+2021-09-07 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/101555
+ * tree-ssa-pre.c (translate_vuse_through_block): Do not
+ perform an alias walk to determine the validity of the
+ mem at the start of the block which is already guaranteed
+ by means of prune_clobbered_mems.
+ (phi_translate_1): Pass edge to translate_vuse_through_block.
+
+2021-09-07 Xionghu Luo <luoxhu@linux.ibm.com>
+
+ PR target/97142
+ * config/rs6000/rs6000.md (fmod<mode>3): New define_expand.
+ (remainder<mode>3): Likewise.
+
+2021-09-07 YunQiang Su <yunqiang.su@cipunited.com>
+
+ * config/mips/mips.c (mips_file_start): add .module for
+ arch and ase.
+
+2021-09-06 Roger Sayle <roger@nextmovesoftware.com>
+
+ * wide-int.cc (wi::clz): Reorder tests to ensure the result
+ is zero for all negative values.
+
+2021-09-06 Tobias Burnus <tobias@codesourcery.com>
+
+ * doc/invoke.texi (-foffload-options): Fix @opindex.
+
+2021-09-06 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/89984
+ * config/i386/i386-expand.c (ix86_split_xorsign): Use operands[2].
+ * config/i386/i386.md (@xorsign<mode>3_1): Add non-destructive
+ source alternative for AVX.
+
+2021-09-06 liuhongt <hongtao.liu@intel.com>
+
+ PR middle-end/102182
+ * optabs.c (expand_fix): Add from1 to avoid from being
+ overwritten.
+
+2021-09-06 Eric Botcazou <ebotcazou@adacore.com>
+
+ * dwarf2out.c (modified_type_die): Deal with all array types earlier
+ and use local variable consistently throughout the function.
+
+2021-09-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/102207
+ * match.pd: Don't demote operands of IFN_{ADD,SUB,MUL}_OVERFLOW if they
+ were promoted from signed to wider unsigned type.
+
+2021-09-06 Andrew Pinski <apinski@marvell.com>
+
+ PR tree-optimization/63184
+ * match.pd: Add simplification of pointer_diff of two pointer_plus
+ with addr_expr in the first operand of each pointer_plus.
+ Add simplificatoin of ne/eq of two pointer_plus with addr_expr
+ in the first operand of each pointer_plus.
+
+2021-09-06 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102176
+ * tree-vect-slp.c (vect_slp_gather_vectorized_scalar_stmts):
+ New function.
+ (vect_bb_slp_scalar_cost): Use the computed set of
+ vectorized scalar stmts instead of relying on the out-of-date
+ and not accurate PURE_SLP_STMT.
+ (vect_bb_vectorization_profitable_p): Compute the set
+ of vectorized scalar stmts.
+
+2021-09-05 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::range_of_stmt): Remove
+ GIMPLE_COND special casing.
+ (path_range_query::range_defined_in_block): Use range_of_stmt
+ instead of calling fold_range directly.
+
+2021-09-05 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::range_of_expr): Set
+ m_undefined_path when appropriate.
+ (path_range_query::internal_range_of_expr): Copy from range_of_expr.
+ (path_range_query::unreachable_path_p): New.
+ (path_range_query::precompute_ranges): Set m_undefined_path.
+ * gimple-range-path.h (path_range_query::unreachable_path_p): New.
+ (path_range_query::internal_range_of_expr): New.
+ * tree-ssa-threadbackward.c (back_threader::find_taken_edge_cond):
+ Use unreachable_path_p.
+
+2021-09-05 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader::maybe_register_path):
+ Remove argument and call find_taken_edge.
+ (back_threader::resolve_phi): Do not calculate taken edge before
+ calling maybe_register_path.
+ (back_threader::find_paths_to_names): Same.
+
+2021-09-05 Jeff Law <jlaw@localhost.localdomain>
+
+ * config/h8300/h8300.md (QHSI2 mode iterator): New mode iterator.
+ * config/h8300/testcompare.md (store_c): Update name, use new
+ QHSI2 iterator.
+ (store_neg_c, store_shifted_c): New patterns.
+
+2021-09-03 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR target/102107
+ * config/rs6000/rs6000-logue.c (rs6000_emit_prologue): On ELFv2 use r11
+ instead of r12 for CR save, in all cases.
+
+2021-09-03 Andrew Pinski <apinski@marvell.com>
+
+ * config/aarch64/aarch64-sve-builtins.cc (register_vector_type):
+ Handle error_mark_node as the type of the type_decl.
+
+2021-09-03 Andrew Pinski <apinski@marvell.com>
+
+ * config/aarch64/aarch64-builtins.c (struct aarch64_simd_type_info):
+ Mark with GTY.
+ (aarch64_simd_types): Likewise.
+ (aarch64_simd_intOI_type_node): Likewise.
+ (aarch64_simd_intCI_type_node): Likewise.
+ (aarch64_simd_intXI_type_node): Likewise.
+ * config/aarch64/aarch64.h (aarch64_fp16_type_node): Likewise.
+ (aarch64_fp16_ptr_type_node): Likewise.
+ (aarch64_bf16_type_node): Likewise.
+ (aarch64_bf16_ptr_type_node): Likewise.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * range-op.cc (operator_minus::op1_op2_relation_effect): Abstract
+ out to...
+ (minus_op1_op2_relation_effect): ...here.
+ (class operator_pointer_diff): New.
+ (operator_pointer_diff::op1_op2_relation_effect): Call
+ minus_op1_op2_relation_effect.
+ (integral_table::integral_table): Add entry for POINTER_DIFF_EXPR.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader::thread_through_all_blocks):
+ Add may_peel_loop_headers.
+ (back_threader_registry::thread_through_all_blocks): Same.
+ (try_thread_blocks): Pass may_peel_loop_headers argument.
+ (pass_early_thread_jumps::execute): Same.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadedge.c (has_phis_p): New.
+ (forwarder_block_p): New.
+ (potentially_threadable_block): Call forwarder_block_p.
+ (jump_threader::thread_around_empty_blocks): Call has_phis_p.
+ (jump_threader::thread_through_normal_block): Call
+ forwarder_block_p.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadbackward.c (back_threader::dump): New.
+ (back_threader::debug): New.
+ (back_threader_profitability::profitable_path_p): Dump blocks
+ even if we are bailing early.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadupdate.c (cancel_thread): New.
+ (jump_thread_path_registry::thread_block_1): Use cancel_thread.
+ (jump_thread_path_registry::mark_threaded_blocks): Same.
+ (jump_thread_path_registry::register_jump_thread): Same.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadedge.c (jt_state::push): Only call methods for
+ which objects are available.
+ (jt_state::pop): Same.
+ (jt_state::register_equiv): Same.
+ (jt_state::register_equivs_on_edge): Same.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadedge.c (jump_threader::thread_across_edge):
+ Move pop until after a thread is registered.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-threadupdate.c (debug): New.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-trace.cc (push_dump_file::push_dump_file): New.
+ (push_dump_file::~push_dump_file): New.
+ (dump_ranger): Change dump_file temporarily while dumping
+ ranger.
+ * gimple-range-trace.h (class push_dump_file): New.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-trace.cc (debug_seed_ranger): Remove static.
+ (dump_ranger): Dump function name.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::range_defined_in_block):
+ Adjust for non-null.
+ (path_range_query::adjust_for_non_null_uses): New.
+ (path_range_query::precompute_ranges): Call
+ adjust_for_non_null_uses.
+ * gimple-range-path.h: Add m_non_null and
+ adjust_for_non_null_uses.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-path.cc (path_range_query::dump): Dump path
+ length.
+ (path_range_query::precompute_ranges): Dump entire path.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * value-relation.cc (relation_oracle::debug): New.
+ * value-relation.h (relation_oracle::debug): New.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * tree-ssa-loop-ch.c: Remove unnecessary include file.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-fold.cc (fold_using_range::postfold_gcond_edges):
+ Skip statements with no defining BB.
+ * gimple-range-path.cc (path_range_query::range_defined_in_block):
+ Do not get confused by statements with no defining BB.
+
+2021-09-03 Aldy Hernandez <aldyh@redhat.com>
+
+ * gimple-range-fold.cc (adjust_imagpart_expr): Move from
+ gimple_range_adjustment. Add support for constants.
+ (adjust_realpart_expr): New.
+ (gimple_range_adjustment): Move IMAGPART_EXPR code to
+ adjust_imagpart_expr.
+ * range-op.cc (integral_table::integral_table): Add entry for
+ REALPART_CST.
+
+2021-09-03 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-expand.c (expand_omp_atomic_pipeline): Use
+ IFN_ATOMIC_COMPARE_EXCHANGE instead of
+ BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_? so that memory order
+ can be provided.
+
+2021-09-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/102024
+ * tree.h (DECL_FIELD_ABI_IGNORED): Changed into rvalue only macro
+ that is false if DECL_BIT_FIELD.
+ (SET_DECL_FIELD_ABI_IGNORED, DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD,
+ SET_DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD): Define.
+ * tree-streamer-out.c (pack_ts_decl_common_value_fields): For
+ DECL_BIT_FIELD stream DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD instead
+ of DECL_FIELD_ABI_IGNORED.
+ * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Use
+ SET_DECL_FIELD_ABI_IGNORED instead of writing to
+ DECL_FIELD_ABI_IGNORED and for DECL_BIT_FIELD use
+ SET_DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD instead.
+ * lto-streamer-out.c (hash_tree): For DECL_BIT_FIELD hash
+ DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD instead of DECL_FIELD_ABI_IGNORED.
+
+2021-09-03 liuhongt <hongtao.liu@intel.com>
+
+ PR target/102166
+ * config/i386/amxbf16intrin.h : Remove macro check for __AMX_BF16__.
+ * config/i386/amxint8intrin.h : Remove macro check for __AMX_INT8__.
+ * config/i386/amxtileintrin.h : Remove macro check for __AMX_TILE__.
+
+2021-09-02 Martin Sebor <msebor@redhat.com>
+
+ PR tree-optimization/17506
+ PR testsuite/37182
+ * tree-ssa-uninit.c (warn_uninit): Remove conditional guarding note.
+
+2021-09-02 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-loop-im.c (fill_always_executed_in_1): Refine
+ fix for PR78185 and continue processing when leaving
+ finite inner loops.
+
+2021-09-02 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/99591
+ * match.pd: Demote operands of IFN_{ADD,SUB,MUL}_OVERFLOW if they
+ were promoted.
+
+2021-09-02 Richard Biener <rguenther@suse.de>
+
+ Revert:
+ 2021-09-02 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102155
+ * tree-ssa-loop-im.c (fill_always_executed_in_1): Iterate
+ over a part of the RPO array and do not recurse here.
+ Dump blocks marked as always executed.
+ (fill_always_executed_in): Walk over the RPO array and
+ process loops whose header we run into.
+ (loop_invariant_motion_in_fun): Compute the first RPO
+ using rev_post_order_and_mark_dfs_back_seme in iteration
+ order and pass that to fill_always_executed_in.
+
+2021-09-02 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386-modes.def (FLOAT_MODE): Define ieee HFmode.
+ * config/i386/i386.c (enum x86_64_reg_class): Add
+ X86_64_SSEHF_CLASS.
+ (merge_classes): Handle X86_64_SSEHF_CLASS.
+ (examine_argument): Ditto.
+ (construct_container): Ditto.
+ (classify_argument): Ditto, and set HFmode/HCmode to
+ X86_64_SSEHF_CLASS.
+ (function_value_32): Return _FLoat16/Complex Float16 by
+ %xmm0.
+ (function_value_64): Return _Float16/Complex Float16 by SSE
+ register.
+ (ix86_print_operand): Handle CONST_DOUBLE HFmode.
+ (ix86_secondary_reload): Require gpr as intermediate register
+ to store _Float16 from sse register when sse4 is not
+ available.
+ (ix86_libgcc_floating_mode_supported_p): Enable _FLoat16 under
+ sse2.
+ (ix86_scalar_mode_supported_p): Ditto.
+ (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Defined.
+ * config/i386/i386.h (VALID_SSE2_REG_MODE): Add HFmode.
+ (VALID_INT_MODE_P): Add HFmode and HCmode.
+ * config/i386/i386.md (*pushhf_rex64): New define_insn.
+ (*pushhf): Ditto.
+ (*movhf_internal): Ditto.
+ * doc/extend.texi (Half-Precision Floating Point): Documemt
+ _Float16 for x86.
+
+2021-09-02 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102155
+ * tree-ssa-loop-im.c (fill_always_executed_in_1): Iterate
+ over a part of the RPO array and do not recurse here.
+ Dump blocks marked as always executed.
+ (fill_always_executed_in): Walk over the RPO array and
+ process loops whose header we run into.
+ (loop_invariant_motion_in_fun): Compute the first RPO
+ using rev_post_order_and_mark_dfs_back_seme in iteration
+ order and pass that to fill_always_executed_in.
+
+2021-09-02 YunQiang Su <syq@debian.org>
+
+ Revert:
+ 2021-08-31 YunQiang Su <yunqiang.su@cipunited.com>
+
+ * config/mips/mips.c (mips_module_isa_name): New.
+ mips_file_start: add .module mipsREV to all asm output
+
+2021-09-01 Jeff Law <jlaw@localhost.localdomain>
+
+ PR tree-optimization/102152
+ * tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Reduce a vector
+ comparison to a scalar comparison before calling
+ update_stmt_if_modified.
+
+2021-09-01 Andrew Pinski <apinski@marvell.com>
+
+ PR target/101934
+ * config/aarch64/aarch64.c (aarch64_expand_setmem):
+ Check STRICT_ALIGNMENT before creating an overlapping
+ store.
+
+2021-09-01 Martin Sebor <msebor@redhat.com>
+
+ * gimple-ssa-warn-access.cc (get_size_range): Add argument.
+ (check_access): Pass additional argument.
+ (check_memop_access): Remove template and make a member function.
+ (maybe_check_dealloc_call): Make a pass_waccess member function.
+ (class pass_waccess): Add, rename, and remove members.
+ (pass_waccess::pass_waccess): Adjust to name change.
+ (pass_waccess::~pass_waccess): Same.
+ (check_alloca): Make a member function.
+ (check_alloc_size_call): Same.
+ (check_strcat): Same.
+ (check_strncat): Same.
+ (check_stxcpy): Same.
+ (check_stxncpy): Same.
+ (check_strncmp): Same.
+ (maybe_warn_rdwr_sizes): Rename...
+ (pass_waccess::maybe_check_access_sizes): ...to this.
+ (pass_waccess::check_call): Adjust to name changes.
+ (pass_waccess::maybe_check_dealloc_call): Make a pass_waccess member
+ function.
+ (pass_waccess::execute): Adjust to name changes.
+ * gimple-ssa-warn-access.h (check_memop_access): Remove.
+ * pointer-query.cc (access_ref::phi): Handle null pointer.
+ (access_ref::inform_access): Same.
+ (pointer_query::put_ref): Modify a cached value, not a copy of it.
+ (pointer_query::dump): New function.
+ (compute_objsize_r): Avoid overwriting access_ref::bndrng. Cache
+ more results.
+ * pointer-query.h (pointer_query::dump): Declare.
+ * tree-ssa-strlen.c (get_range): Simplify. Use function query.
+ (dump_strlen_info): Use function query.
+ (printf_strlen_execute): Factor code out into pointer_query::put_ref.
+
+2021-09-01 Thomas Schwinge <thomas@codesourcery.com>
+
+ * tree.c (walk_tree_1) <OMP_CLAUSE>: Simplify.
+
+2021-09-01 Iain Sandoe <iain@sandoe.co.uk>
+
+ * doc/extend.texi: Document unavailable attribute.
+ * print-tree.c (print_node): Handle unavailable attribute.
+ * tree-core.h (struct tree_base): Add a bit to carry unavailability.
+ * tree.c (error_unavailable_use): New.
+ * tree.h (TREE_UNAVAILABLE): New.
+ (error_unavailable_use): New.
+
+2021-09-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/102124
+ * tree-vect-patterns.c (vect_recog_widen_op_pattern): For ORIG_CODE
+ MINUS_EXPR, if itype is unsigned with smaller precision than type,
+ add an extra cast to signed variant of itype to ensure sign-extension.
+
+2021-09-01 Martin Liska <mliska@suse.cz>
+
+ * graph.c (draw_cfg_node_succ_edges): Do not color fallthru
+ edges and rather use colors for TRUE and FALSE edges.
+
+2021-09-01 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/93491
+ * tree-ssa-pre.c (compute_avail): Set BB_MAY_NOTRETURN
+ after processing the stmt itself. Do not consider
+ pure functions possibly not returning. Properly avoid
+ adding possibly trapping calls to EXP_GEN when there's
+ a preceeding possibly not returning call.
+ * tree-ssa-sccvn.c (vn_reference_may_trap): Conservatively
+ not handle calls.
+
+2021-09-01 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102139
+ * tree-vectorizer.h (vec_base_alignments): Adjust hash-map
+ type to record a std::pair of the stmt-info and the innermost
+ loop behavior.
+ (dr_vec_info::group): New member.
+ * tree-vect-data-refs.c (vect_record_base_alignment): Adjust.
+ (vect_compute_data_ref_alignment): Verify the recorded
+ base alignment can be used.
+ (data_ref_pair): Remove.
+ (dr_group_sort_cmp): Adjust.
+ (vect_analyze_data_ref_accesses): Store the group-ID in the
+ dr_vec_info and operate on a vector of dr_vec_infos.
+
+2021-09-01 YunQiang Su <yunqiang.su@cipunited.com>
+
+ * read-md.c (md_reader::handle_enum): support value assignation.
+ * doc/md.texi: record define_c_enum value assignation support.
+
+2021-09-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/102141
+ * gimple-ssa-store-merging.c (bswap_view_convert): Add BEFORE
+ argument. If false, emit stmts after gsi instead of before, and
+ with GSI_NEW_STMT.
+ (bswap_replace): Adjust callers. When converting output of bswap,
+ emit VIEW_CONVERT prepratation stmts after a copy of gsi instead
+ of before it.
+
+2021-09-01 liuhongt <hongtao.liu@intel.com>
+
+ * emit-rtl.c (validate_subreg): Get rid of all float-int
+ special cases.
+
+2021-09-01 liuhongt <hongtao.liu@intel.com>
+
+ Revert:
+ 2021-08-30 liuhongt <hongtao.liu@intel.com>
+
+ * expmed.c (extract_bit_field_1): Make sure we're playing with
+ integral modes before call extract_integral_bit_field.
+ (extract_integral_bit_field): Add a parameter of type
+ scalar_int_mode which corresponds to of tmode.
+ And call extract_and_convert_fixed_bit_field instead of
+ extract_fixed_bit_field and convert_extracted_bit_field.
+ (extract_and_convert_fixed_bit_field): New function, it's a
+ combination of extract_fixed_bit_field and
+ convert_extracted_bit_field.
+
+2021-08-31 Thomas Schwinge <thomas@codesourcery.com>
+
+ * tree.c (walk_tree_1) <OMP_CLAUSE_TILE>: Handle three operands.
+
+2021-08-31 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-general.h (omp_is_reference): Rename to...
+ (omp_privatize_by_reference): ... this. Adjust all users...
+ * omp-general.c: ... here, ...
+ * gimplify.c: ... here, ...
+ * omp-expand.c: ... here, ...
+ * omp-low.c: ... here.
+
+2021-08-31 Martin Sebor <msebor@redhat.com>
+
+ * gimple-ssa-warn-access.cc (maybe_warn_alloc_args_overflow): Test
+ pointer element for equality to zero, not that of the cotaining
+ array.
+
+2021-08-31 Martin Sebor <msebor@redhat.com>
+
+ * gcc-rich-location.h (gcc_rich_location): Make ctor explicit.
+
+2021-08-31 Martin Sebor <msebor@redhat.com>
+
+ * function.h (function): Add comments.
+ (get_range_query): Same. Add attribute returns nonnull.
+
+2021-08-31 Roger Sayle <roger@nextmovesoftware.com>
+
+ * expr.c (convert_modes): Don't use subreg_promoted_mode on a
+ SUBREG if it can't be guaranteed to a SUBREG_PROMOTED_VAR_P set.
+ Instead use the standard (safer) is_a <scalar_int_mode> idiom.
+
+2021-08-31 Jeff Law <jlaw@localhost.localdomain>
+
+ * config.gcc (cris-*-elf, cris-*-none): Remove dbxelf.h from
+ tm_file.
+ (m32r-*-elf, m32rle-*-elf, m32r-*-linux): Likewise.
+ (mn10300-*-*, am33_2.0-*-linux*): Likewise.
+ (xtensa*-*-elf, xtensa*-*-linux, xtensa*-*-uclinux): Likewise.
+ (m32c-*-elf*, m32c-*-rtems*): Likewise.
+ * config/cris/cris.h (DBX_NO_XREFS): Remove.
+ (DBX_CONTIN_LENGTH, DBX_CONTIN_CHAR): Likewise.
+ * config/m32r/m32r.h (DBXOUT_SOURCE_LINE): Likewise.
+ (DBX_DEBUGGING_INFO, DBX_CONTIN_LENGTH): Likewise.
+ * config/mn10300/mn10300.h (DEFAULT_GDB_EXTENSIONS): Likewise.
+ * config/mn10300/linux.h (DBX_REGISTER_NAMES): Likewise.
+
+2021-08-31 Marcel Vollweiler <marcel@codesourcery.com>
+
+ * gimplify.c (gimplify_scan_omp_clauses): Error handling. 'ancestor' only
+ allowed on target constructs and only with particular other clauses.
+ * omp-expand.c (expand_omp_target): Output of 'sorry, not supported' if
+ 'ancestor' is used.
+ * omp-low.c (check_omp_nesting_restrictions): Error handling. No nested OpenMP
+ structs when 'ancestor' is used.
+ (scan_omp_1_stmt): No usage of OpenMP runtime routines in a target region when
+ 'ancestor' is used.
+ * tree-pretty-print.c (dump_omp_clause): Append 'ancestor'.
+ * tree.h (OMP_CLAUSE_DEVICE_ANCESTOR): Define macro.
+
+2021-08-31 Roger Sayle <roger@nextmovesoftware.com>
+
+ * expr.c (convert_modes): Preserve SUBREG_PROMOTED_VAR_P when
+ creating a (wider) partial subreg from a SUBREG_PROMOTED_VAR_P
+ subreg.
+ * simplify-rtx.c (simplify_unary_operation_1) [SIGN_EXTEND]:
+ Likewise, preserve SUBREG_PROMOTED_VAR_P when creating a (wider)
+ partial subreg from a SUBREG_PROMOTED_VAR_P subreg. Generate
+ SIGN_EXTEND of the SUBREG_REG when a subreg would be paradoxical.
+ [ZERO_EXTEND]: Likewise, preserve SUBREG_PROMOTED_VAR_P when
+ creating a (wider) partial subreg from a SUBREG_PROMOTED_VAR_P
+ subreg. Generate ZERO_EXTEND of the SUBREG_REG when a subreg
+ would be paradoxical.
+
+2021-08-31 Roger Sayle <roger@nextmovesoftware.com>
+
+ * combine.c (combine_simplify_rtx): Avoid converting an explicit
+ TRUNCATE into a lowpart SUBREG on !TRULY_NOOP_TRUNCATION targets.
+ * simplify-rtx.c (simplify_unary_operation_1): Likewise.
+
+2021-08-31 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102142
+ * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Fix
+ condition under which to unset the visited flag.
+
+2021-08-31 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102129
+ * tree-ssa-ter.c (find_replaceable_in_bb): Do not move
+ possibly trapping expressions across calls.
+
+2021-08-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/102134
+ * tree-ssa-ccp.c (bit_value_binop) <case RSHIFT_EXPR>: If sgn is
+ UNSIGNED and r1val | r1mask has MSB set, ensure lzcount doesn't
+ become negative.
+
+2021-08-31 Andrew Pinski <apinski@marvell.com>
+
+ PR driver/79181
+ * collect-utils.c (setup_signals): New declaration.
+ * collect-utils.h (setup_signals): New function.
+ * collect2.c (handler): Delete.
+ (main): Instead of manually setting up the signals,
+ just call setup_signals.
+ * lto-wrapper.c (main): Likewise.
+
+2021-08-31 Andrew Pinski <apinski@marvell.com>
+
+ PR target/56337
+ * config/i386/i386-protos.h (x86_output_aligned_bss):
+ Change align argument to unsigned type.
+ (x86_elf_aligned_decl_common): Likewise.
+ * config/i386/i386.c (x86_elf_aligned_decl_common): Likewise.
+ (x86_output_aligned_bss): Likewise.
+
+2021-08-31 YunQiang Su <yunqiang.su@cipunited.com>
+
+ * config/mips/mips.c (mips_module_isa_name): New.
+ mips_file_start: add .module mipsREV to all asm output
+
+2021-08-31 YunQiang Su <yunqiang.su@cipunited.com>
+
+ * config/mips/mips.h (struct mips_cpu_info): define enum mips_isa;
+ use enum instead of int for 'isa' member.
+ * config.gcc, config/mips/mips.c, config/mips/mips-cpus.def,
+ config/mips/netbsd.h: replace hardcoded numbers with enum.
+
+2021-08-31 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/sse.md (*<avx512>_ucmp<mode>3_1): Change from
+ define_split to define_insn_and_split.
+ (*avx2_eq<mode>3): Removed.
+ (<avx512>_eq<mode>3<mask_scalar_merge_name>): Adjust pattern
+ (<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Rename to ..
+ (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): .. this, and
+ adjust pattern.
+ (*avx2_gt<mode>3): Removed.
+ (<avx512>_gt<mode>3<mask_scalar_merge_name>): Change from
+ define_insn to define_expand, and adjust pattern.
+ (UNSPEC_MASKED_EQ, UNSPEC_MASKED_GT): Removed.
+
+2021-08-30 David Malcolm <dmalcolm@redhat.com>
+
+ PR analyzer/99260
+ * Makefile.in (ANALYZER_OBJS): Add analyzer/call-info.o.
+
+2021-08-30 Jason Merrill <jason@redhat.com>
+
+ * doc/invoke.texi: Document -Wmissing-requires.
+
+2021-08-30 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-call.c (rs6000_init_builtins): Remove
+ TARGET_EXTRA_BUILTINS guard.
+
+2021-08-30 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-call.c (rs6000_init_builtins): Change
+ initialization of V2DI_type_node and unsigned_V2DI_type_node.
+
+2021-08-30 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/darwin.h (SUBTARGET_INIT_BUILTINS): Use the new
+ decl when new_builtins_are_live.
+ * config/rs6000/rs6000-builtin-new.def (__builtin_cfstring): New
+ built-in.
+
+2021-08-30 Pat Haugen <pthaugen@linux.ibm.com>
+
+ * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Add
+ OPTION_MASK_P10_FUSION_2STORE.
+ (POWERPC_MASKS): Likewise.
+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Enable
+ store fusion for Power10.
+ (is_fusable_store): New.
+ (power10_sched_reorder): Likewise.
+ (rs6000_sched_reorder): Do Power10 specific reordering.
+ (rs6000_sched_reorder2): Likewise.
+ * config/rs6000/rs6000.opt: Add new option.
+
+2021-08-30 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102128
+ * tree-vect-slp.c (vect_bb_vectorization_profitable_p):
+ Move scanning for if-converted scalar code to the caller
+ and instead delay clearing the visited flag for profitable
+ subgraphs.
+ (vect_slp_region): Cost all subgraphs before scheduling.
+ For if-converted BB vectorization scan for scalar COND_EXPRs
+ and do not vectorize if any found and the cost model is
+ very-cheap.
+
+2021-08-30 Richard Biener <rguenther@suse.de>
+
+ * common.opt (fexceptions): Mark
+ EnabledBy(fnon-call-exceptions).
+ * doc/invoke.texi (fnon-call-exceptions): Document this
+ enables -fexceptions.
+
+2021-08-30 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * tsystem.h (abort): Define abort() if inhibit_libc is defined and it
+ is not already defined.
+
+2021-08-30 liuhongt <hongtao.liu@intel.com>
+
+ * expmed.c (extract_bit_field_1): Make sure we're playing with
+ integral modes before call extract_integral_bit_field.
+ (extract_integral_bit_field): Add a parameter of type
+ scalar_int_mode which corresponds to of tmode.
+ And call extract_and_convert_fixed_bit_field instead of
+ extract_fixed_bit_field and convert_extracted_bit_field.
+ (extract_and_convert_fixed_bit_field): New function, it's a
+ combination of extract_fixed_bit_field and
+ convert_extracted_bit_field.
+
+2021-08-29 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_libc_has_function): Do not run
+ the checks for x86 or modern Darwin. Make sure that there
+ is a value set for darwin_macosx_version_min before testing.
+
+2021-08-29 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/i386/darwin.h (CLEAR_INSN_CACHE): New.
+
+2021-08-28 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.h (modref_access_node::merge): Break out
+ logic combining offsets and logic merging ranges to ...
+ (modref_access_node::combined_offsets): ... here
+ (modref_access_node::update2): ... here
+ (modref_access_node::closer_pair_p): New member function.
+ (modref_access_node::forced_merge): New member function.
+ (modre_ref_node::insert): Do merging when table is full.
+
+2021-08-28 YunQiang Su <yunqiang.su@cipunited.com>
+
+ PR target/102089
+ * config.gcc: MIPS: use N64 ABI by default if the triple end
+ with -gnuabi64, which is used by Debian since 2013.
+
+2021-08-28 Alexandre Oliva <oliva@adacore.com>
+
+ * ipa-modref.c (analyze_function): Skip debug stmts.
+ * tree-inline.c (estimate_num_insn): Consider builtins even
+ without a cgraph_node.
+
+2021-08-27 Jeff Law <jlaw@localhost.localdomain>
+
+ * config/h8300/bitfield.md (cstore<mode>4): Remove expander.
+ * config/h8300/h8300.c (h8300_expand_branch): Remove function.
+ * config/h8300/h8300-protos.h (h8300_expadn_branch): Remove prototype.
+ * config/h8300/h8300.md (eqne): New code iterator.
+ (geultu, geultu_to_c): Similarly.
+ * config/h8300/testcompare.md (cstore<mode>4): Dummy expander.
+ (store_c_<mode>, store_c_i_<mode>): New define_insn_and_splits
+ (cmp<mode>_c): New pattern
+
+2021-08-27 Jeff Law <jlaw@localhost.localdomain>
+
+ * tree-ssa-dom.c (reduce_vector_comparison_to_scalar_comparison): New
+ function.
+ (dom_opt_dom_walker::optimize_stmt): Use it.
+
+2021-08-27 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (finalize_ctors): Add a section-start linker-
+ visible symbol.
+ (finalize_dtors): Likewise.
+ * config/darwin.h (MIN_LD64_INIT_TERM_START_LABELS): New.
+
+2021-08-27 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-call.c (rs6000-builtins.h): New #include.
+ (rs6000_init_builtins): Call rs6000_init_generated_builtins. Skip the
+ old initialization logic when new builtins are enabled.
+ * config/rs6000/rs6000-gen-builtins.c (write_decls): Rename
+ rs6000_autoinit_builtins to rs6000_init_generated_builtins.
+ (write_init_file): Likewise.
+
+2021-08-27 Iain Sandoe <iain@sandoe.co.uk>
+
+ * configure.ac (darwin2[[0-9]]* | darwin19*): Alter use of
+ gcc_GAS_CHECK_FEATURE to remove an extraneous parameter.
+ (amdgcn-* | gcn-*) Likewise.
+
+2021-08-27 Anthony Sharp <anthonysharp15@gmail.com>
+
+ * symbol-summary.h: Added missing template keyword.
+
+2021-08-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/45178
+ * tree-ssa-dce.c (find_obviously_necessary_stmts): For
+ infinite loops without exit do not mark control dependent
+ edges of the latch necessary.
+
+2021-08-27 konglin1 <lingling.kong@intel.com>
+
+ PR target/101472
+ * config/i386/sse.md: (<avx512>scattersi<mode>): Add mask operand to
+ UNSPEC_VSIBADDR.
+ (<avx512>scattersi<mode>): Likewise.
+ (*avx512f_scattersi<VI48F:mode>): Merge mask operand to set_dest.
+ (*avx512f_scatterdi<VI48F:mode>): Likewise
+
+2021-08-27 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_builtin_md_vectorized_function): Add
+ support for built-in functions MISC_BUILTIN_DIVWE, MISC_BUILTIN_DIVWEU,
+ MISC_BUILTIN_DIVDE, MISC_BUILTIN_DIVDEU, P10_BUILTIN_CFUGED,
+ P10_BUILTIN_CNTLZDM, P10_BUILTIN_CNTTZDM, P10_BUILTIN_PDEPD and
+ P10_BUILTIN_PEXTD on Power10.
+
+2021-08-27 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000-call.c (builtin_function_type): Add unsigned
+ signedness for some Power10 bifs.
+
+2021-08-27 David Edelsohn <dje.gcc@gmail.com>
+
+ PR target/102068
+ * config/rs6000/rs6000.c (rs6000_adjust_field_align): Use
+ computed alignment if the entire struct has attribute packed.
+
+2021-08-27 liuhongt <hongtao.liu@intel.com>
+
+ PR target/98167
+ PR target/43147
+ * config/i386/i386.c (ix86_gimple_fold_builtin): Fold
+ IX86_BUILTIN_SHUFPD512, IX86_BUILTIN_SHUFPS512,
+ IX86_BUILTIN_SHUFPD256， IX86_BUILTIN_SHUFPS，
+ IX86_BUILTIN_SHUFPS256.
+ (ix86_masked_all_ones): New function.
+
+2021-08-26 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*btr<mode>_1): Call force_reg unconditionally.
+ (conditional moves with memory inputs splitters): Ditto.
+ * config/i386/sse.md (one_cmpl<mode>2): Simplify.
+
+2021-08-26 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.h (modref_access_node::try_merge_with): Restart
+ search after merging.
+
+2021-08-26 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-overload.def: Add remaining overloads.
+
+2021-08-26 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Add cell stanza.
+
+2021-08-26 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Add ieee128-hw, dfp,
+ crypto, and htm stanzas.
+
+2021-08-26 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Add mma stanza.
+
+2021-08-26 Martin Sebor <msebor@redhat.com>
+
+ * tree-ssa-uninit.c (warn_uninit): Refactor and simplify.
+ (warn_uninit_phi_uses): Remove argument from calls to warn_uninit.
+ (warn_uninitialized_vars): Same. Reduce visibility of locals.
+ (warn_uninitialized_phi): Same.
+
+2021-08-26 Roger Sayle <roger@nextmovesoftware.com>
+
+ * tree-ssa-ccp.c (get_individual_bits): Helper function to
+ extract the individual bits from a widest_int constant (mask).
+ (gray_code_bit_flips): New read-only table for effiently
+ enumerating permutations/combinations of bits.
+ (bit_value_binop) [LROTATE_EXPR, RROTATE_EXPR]: Handle rotates
+ by unknown counts that are guaranteed less than the target
+ precision and four or fewer unknown bits by enumeration.
+ [LSHIFT_EXPR, RSHIFT_EXPR]: Likewise, also handle shifts by
+ enumeration under the same conditions. Handle remaining
+ shifts as a mask based upon the minimum possible shift value.
+
+2021-08-26 Roger Sayle <roger@nextmovesoftware.com>
+ Richard Biener <rguenther@suse.de>
+
+ * match.pd (shift transformations): Remove a redundant
+ !POINTER_TYPE_P check.
+
+2021-08-26 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/102057
+ * config/i386/i386.md (cmove reg-reg move elimination peephole2s):
+ Set all_regs to true in the call to replace_rtx.
+
+2021-08-26 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.c (test_insert_search_collapse): Update test.
+ * ipa-modref-tree.h (modref_base_node::insert): Be smarter when
+ hiting --param modref-max-refs limit.
+ (modref_tree:insert_base): Be smarter when hitting
+ --param modref-max-bases limit. Add new parameter REF.
+ (modref_tree:insert): Update.
+ (modref_tree:merge): Update.
+ * ipa-modref.c (read_modref_records): Update.
+
+2021-08-26 Jan Hubicka <hubicka@ucw.cz>
+
+ * params.opt: (modref-max-adjustments): Add full stop.
+
+2021-08-26 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.h (modref_ref_node::verify): New member
+ functoin.
+ (modref_ref_node::insert): Use it.
+ (modref_ref_node::try_mere_with): Fix off by one error.
+
+2021-08-26 Martin Liska <mliska@suse.cz>
+ Stefan Kneifel <stefan.kneifel@bluewin.ch>
+
+ * cgraph.h (create_version_clone_with_body): Add new parameter.
+ * cgraphclones.c: Likewise.
+ * multiple_target.c (create_dispatcher_calls): Do not use
+ numbered suffixes.
+ (create_target_clone): Likewise here.
+
+2021-08-26 Jonathan Yong <10walls@gmail.com>
+
+ * doc/extend.texi: Add note about reserved priorities
+ to the constructor attribute.
+
+2021-08-25 Martin Sebor <msebor@redhat.com>
+
+ * gimple-range-cache.cc (ssa_global_cache::dump): Avoid printing
+ range table header alone.
+ * gimple-range.cc (gimple_ranger::export_global_ranges): Same.
+
+2021-08-25 Jan Hubicka <hubicka@ucw.cz>
+
+ * doc/invoke.texi: Document --param modref-max-adjustments.
+ * ipa-modref-tree.c (test_insert_search_collapse): Update.
+ (test_merge): Update.
+ * ipa-modref-tree.h (struct modref_access_node): Add adjustments;
+ (modref_access_node::operator==): Fix handling of access ranges.
+ (modref_access_node::contains): Constify parameter; handle also
+ mismatched parm offsets.
+ (modref_access_node::update): New function.
+ (modref_access_node::merge): New function.
+ (unspecified_modref_access_node): Update constructor.
+ (modref_ref_node::insert_access): Add record_adjustments parameter;
+ handle merging.
+ (modref_ref_node::try_merge_with): New private function.
+ (modref_tree::insert): New record_adjustments parameter.
+ (modref_tree::merge): New record_adjustments parameter.
+ (modref_tree::copy_from): Update.
+ * ipa-modref.c (dump_access): Dump adjustments field.
+ (get_access): Update constructor.
+ (record_access): Update call of insert.
+ (record_access_lto): Update call of insert.
+ (merge_call_side_effects): Add record_adjustments parameter.
+ (get_access_for_fnspec): Update.
+ (process_fnspec): Update.
+ (analyze_call): Update.
+ (analyze_function): Update.
+ (read_modref_records): Update.
+ (ipa_merge_modref_summary_after_inlining): Update.
+ (propagate_unknown_call): Update.
+ (modref_propagate_in_scc): Update.
+ * params.opt (param-max-modref-adjustments=): New.
+
+2021-08-25 Michael Meissner <meissner@linux.ibm.com>
+
+ * config/rs6000/vsx.md (UNSPEC_XXSPLTIDP): Rename from
+ UNSPEC_XXSPLTID.
+ (xxspltiw_v4si): Use vecperm type attribute.
+ (xxspltiw_v4si_inst): Use vecperm type attribute.
+ (xxspltiw_v4sf_inst): Likewise.
+ (xxspltidp_v2df): Use vecperm type attribute. Use
+ UNSPEC_XXSPLTIDP instead of UNSPEC_XXSPLTID.
+ (xxspltidp_v2df_inst): Likewise.
+ (xxsplti32dx_v4si): Use vecperm type attribute.
+ (xxsplti32dx_v4si_inst): Likewise.
+ (xxsplti32dx_v4sf_inst): Likewise.
+ (xxblend_<mode>): Likewise.
+ (xxpermx): Likewise.
+ (xxpermx_inst): Likewise.
+ (xxeval): Likewise.
+
+2021-08-25 Lewis Hyatt <lhyatt@gmail.com>
+
+ PR other/93067
+ * coretypes.h (typedef diagnostic_input_charset_callback): Declare.
+ * diagnostic.c (diagnostic_initialize_input_context): New function.
+ * diagnostic.h (diagnostic_initialize_input_context): Declare.
+ * input.c (default_charset_callback): New function.
+ (file_cache::initialize_input_context): New function.
+ (file_cache_slot::create): Added ability to convert the input
+ according to the input context.
+ (file_cache::file_cache): Initialize the new input context.
+ (class file_cache_slot): Added new m_alloc_offset member.
+ (file_cache_slot::file_cache_slot): Initialize the new member.
+ (file_cache_slot::~file_cache_slot): Handle potentially offset buffer.
+ (file_cache_slot::maybe_grow): Likewise.
+ (file_cache_slot::needs_read_p): Handle NULL fp, which is now possible.
+ (file_cache_slot::get_next_line): Likewise.
+ * input.h (class file_cache): Added input context member.
+
+2021-08-25 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102046
+ * tree-vect-slp.c (vect_build_slp_tree_2): Conservatively
+ update ->any_pattern when swapping operands.
+
+2021-08-25 Hongyu Wang <hongyu.wang@intel.com>
+
+ PR target/101716
+ * config/i386/i386.c (ix86_live_on_entry): Adjust comment.
+ (ix86_decompose_address): Remove retval check for ASHIFT,
+ allow non-canonical zero extend if AND mask covers ASHIFT
+ count.
+ (ix86_legitimate_address_p): Adjust condition for decompose.
+ (ix86_rtx_costs): Adjust cost for lea with non-canonical
+ zero-extend.
+ Co-Authored by: Uros Bizjak <ubizjak@gmail.com>
+
+2021-08-25 Jiufu Guo <guojiufu@linux.ibm.com>
+
+ PR tree-optimization/101145
+ * tree-ssa-loop-niter.c (number_of_iterations_until_wrap):
+ New function.
+ (number_of_iterations_lt): Invoke above function.
+ (adjust_cond_for_loop_until_wrap):
+ Merge to number_of_iterations_until_wrap.
+ (number_of_iterations_cond): Update invokes for
+ adjust_cond_for_loop_until_wrap and number_of_iterations_lt.
+
+2021-08-25 konglin1 <lingling.kong@intel.com>
+
+ PR target/101471
+ * config/i386/avx512dqintrin.h (_mm512_fpclass_ps_mask): Fix
+ macro define in O0.
+ (_mm512_mask_fpclass_ps_mask): Ditto.
+
+2021-08-25 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/altivec.md (vec_unpacku_hi_v16qi): Remove.
+ (vec_unpacku_hi_v8hi): Likewise.
+ (vec_unpacku_lo_v16qi): Likewise.
+ (vec_unpacku_lo_v8hi): Likewise.
+ (vec_unpacku_hi_<VP_small_lc>): New define_expand.
+ (vec_unpacku_lo_<VP_small_lc>): Likewise.
+
+2021-08-24 David Edelsohn <dje.gcc@gmail.com>
+
+ * config/rs6000/aix.h (SYSTEM_IMPLICIT_EXTERN_C): Delete.
+ * config/rs6000/aix71.h (SYSTEM_IMPLICIT_EXTERN_C): Define.
+ * config/rs6000/aix72.h (SYSTEM_IMPLICIT_EXTERN_C): Define.
+ * config/rs6000/aix73.h (TARGET_AIX_VERSION): Increase to 73.
+
+2021-08-24 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR middle-end/102031
+ * simplify-rtx.c (simplify_truncation): When comparing precisions
+ use "subreg_prec" variable, not "subreg_mode".
+
+2021-08-24 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Add power10 and power10-64
+ stanzas.
+
+2021-08-24 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-call.c (rs6000_init_builtins): Initialize
+ various pointer type nodes.
+ * config/rs6000/rs6000.h (rs6000_builtin_type_index): Add enum
+ values for various pointer types.
+ (ptr_V16QI_type_node): New macro.
+ (ptr_V1TI_type_node): New macro.
+ (ptr_V2DI_type_node): New macro.
+ (ptr_V2DF_type_node): New macro.
+ (ptr_V4SI_type_node): New macro.
+ (ptr_V4SF_type_node): New macro.
+ (ptr_V8HI_type_node): New macro.
+ (ptr_unsigned_V16QI_type_node): New macro.
+ (ptr_unsigned_V1TI_type_node): New macro.
+ (ptr_unsigned_V8HI_type_node): New macro.
+ (ptr_unsigned_V4SI_type_node): New macro.
+ (ptr_unsigned_V2DI_type_node): New macro.
+ (ptr_bool_V16QI_type_node): New macro.
+ (ptr_bool_V8HI_type_node): New macro.
+ (ptr_bool_V4SI_type_node): New macro.
+ (ptr_bool_V2DI_type_node): New macro.
+ (ptr_bool_V1TI_type_node): New macro.
+ (ptr_pixel_type_node): New macro.
+ (ptr_intQI_type_node): New macro.
+ (ptr_uintQI_type_node): New macro.
+ (ptr_intHI_type_node): New macro.
+ (ptr_uintHI_type_node): New macro.
+ (ptr_intSI_type_node): New macro.
+ (ptr_uintSI_type_node): New macro.
+ (ptr_intDI_type_node): New macro.
+ (ptr_uintDI_type_node): New macro.
+ (ptr_intTI_type_node): New macro.
+ (ptr_uintTI_type_node): New macro.
+ (ptr_long_integer_type_node): New macro.
+ (ptr_long_unsigned_type_node): New macro.
+ (ptr_float_type_node): New macro.
+ (ptr_double_type_node): New macro.
+ (ptr_long_double_type_node): New macro.
+ (ptr_dfloat64_type_node): New macro.
+ (ptr_dfloat128_type_node): New macro.
+ (ptr_ieee128_type_node): New macro.
+ (ptr_ibm128_type_node): New macro.
+ (ptr_vector_pair_type_node): New macro.
+ (ptr_vector_quad_type_node): New macro.
+ (ptr_long_long_integer_type_node): New macro.
+ (ptr_long_long_unsigned_type_node): New macro.
+
+2021-08-24 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Add power9-vector, power9,
+ and power9-64 stanzas.
+
+2021-08-24 Roger Sayle <roger@nextmovesoftware.com>
+ Tom de Vries <tdevries@suse.de>
+
+ * config.gcc (nvptx-*-*): Define {c,c++}_target_objs.
+ * config/nvptx/nvptx-protos.h (nvptx_cpu_cpp_builtins): Prototype.
+ * config/nvptx/nvptx.h (TARGET_CPU_CPP_BUILTINS): Implement with
+ a call to the new nvptx_cpu_cpp_builtins function in nvptx-c.c.
+ * config/nvptx/t-nvptx (nvptx-c.o): New rule.
+ * config/nvptx/nvptx-c.c: New source file.
+ (nvptx_cpu_cpp_builtins): Move implementation here.
+
+2021-08-24 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/101600
+ PR middle-end/101977
+ * gimple-ssa-warn-access.cc (maybe_warn_for_bound): Tighten up
+ the phrasing of a warning.
+ (check_access): Use the remaining size after subtracting any offset
+ rather than the whole object size.
+ * pointer-query.cc (access_ref::get_ref): Clear BASE0 flag if it's
+ clear for any nonnull PHI argument.
+ (compute_objsize): Clear argument.
+
+2021-08-24 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Add power8-vector stanza.
+
+2021-08-24 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Add power7 and power7-64
+ stanzas.
+
+2021-08-24 Andrew MacLeod <amacleod@redhat.com>
+
+ * value-relation.cc (rr_transitive_table): New.
+ (relation_transitive): New.
+ (value_relation::swap): Remove.
+ (value_relation::apply_transitive): New.
+ (relation_oracle::relation_oracle): Allocate a new tmp bitmap.
+ (relation_oracle::register_relation): Call register_transitives.
+ (relation_oracle::register_transitives): New.
+ * value-relation.h (relation_oracle): Add new temporary bitmap and
+ methods.
+
+2021-08-24 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/102021
+ * config/i386/i386-expand.c (ix86_expand_vector_move): Broadcast
+ from integer to a pseudo vector register.
+
+2021-08-24 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/100089
+ * tree-vectorizer.h (vect_slp_bb): Rename to ...
+ (vect_slp_if_converted_bb): ... this and get the original
+ loop as new argument.
+ * tree-vectorizer.c (try_vectorize_loop_1): Revert previous fix,
+ pass original loop to vect_slp_if_converted_bb.
+ * tree-vect-slp.c (vect_bb_vectorization_profitable_p):
+ If orig_loop was passed scan the not vectorized stmts
+ for COND_EXPRs and force not profitable if found.
+ (vect_slp_region): Pass down all SLP instances to costing
+ if orig_loop was specified.
+ (vect_slp_bbs): Pass through orig_loop.
+ (vect_slp_bb): Rename to ...
+ (vect_slp_if_converted_bb): ... this and get the original
+ loop as new argument.
+ (vect_slp_function): Adjust.
+
+2021-08-24 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/102035
+ * config/arm/arm.md (attribute arch): Add fix_vlldm.
+ (arch_enabled): Use it.
+ * config/arm/vfp.md (lazy_store_multiple_insn): Add alternative to
+ use when erratum mitigation is needed.
+
+2021-08-24 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/102035
+ * config/arm/arm.opt (mfix-cmse-cve-2021-35465): New option.
+ * doc/invoke.texi (Arm Options): Document it.
+ * config/arm/arm-cpus.in (quirk_vlldm): New feature bit.
+ (ALL_QUIRKS): Add quirk_vlldm.
+ (cortex-m33): Add quirk_vlldm.
+ (cortex-m35p, cortex-m55): Likewise.
+ * config/arm/arm.c (arm_option_override): Enable fix_vlldm if
+ targetting an affected CPU and not explicitly controlled on
+ the command line.
+
+2021-08-24 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/arm/vfp.md (lazy_store_multiple_insn): Rewrite as valid RTL.
+ (lazy_load_multiple_insn): Likewise.
+
+2021-08-24 liuhongt <hongtao.liu@intel.com>
+
+ PR target/101989
+ * config/i386/sse.md (<avx512>_vternlog<mode><sd_maskz_name>):
+ Enable avx512 embedded broadcast.
+ (*<avx512>_vternlog<mode>_all): Ditto.
+ (<avx512>_vternlog<mode>_mask): Ditto.
+
+2021-08-24 liuhongt <hongtao.liu@intel.com>
+
+ PR target/101989
+ * config/i386/i386.c (ix86_rtx_costs): Define cost for
+ UNSPEC_VTERNLOG.
+ * config/i386/i386.h (STRIP_UNARY): New macro.
+ * config/i386/predicates.md (reg_or_notreg_operand): New
+ predicate.
+ * config/i386/sse.md (*<avx512>_vternlog<mode>_all): New define_insn.
+ (*<avx512>_vternlog<mode>_1): New pre_reload
+ define_insn_and_split.
+ (*<avx512>_vternlog<mode>_2): Ditto.
+ (*<avx512>_vternlog<mode>_3): Ditto.
+ (any_logic1,any_logic2): New code iterator.
+ (logic_op): New code attribute.
+ (ternlogsuffix): Extend to VNxDF and VNxSF.
+
+2021-08-24 Richard Biener <rguenther@suse.de>
+
+ * doc/invoke.texi (vect-inner-loop-cost-factor): Adjust.
+ * params.opt (--param vect-inner-loop-cost-factor): Adjust
+ maximum value.
+ * tree-vect-loop.c (vect_analyze_loop_form): Initialize
+ inner_loop_cost_factor to the minimum of the estimated number
+ of iterations of the inner loop and vect-inner-loop-cost-factor.
+
+2021-08-24 Roger Sayle <roger@nextmovesoftware.com>
+ Richard Biener <rguenther@suse.de>
+
+ * config/i386/i386-features.c (compute_convert_gain): Provide
+ more accurate values for CONST_INT, when optimizing for size.
+ * config/i386/i386.c (COSTS_N_BYTES): Move definition from here...
+ * config/i386/i386.h (COSTS_N_BYTES): to here.
+
+2021-08-24 Roger Sayle <roger@nextmovesoftware.com>
+ Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/102029
+ * match.pd (shift transformations): Add an additional check for
+ !POINTER_TYPE_P in the recently added left shift transformation.
+
+2021-08-24 liuhongt <hongtao.liu@intel.com>
+
+ PR tree-optimization/100089
+ * tree-vectorizer.c (try_vectorize_loop_1): Disable slp in
+ loop vectorizer when cost model is very-cheap.
+
+2021-08-23 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-gen-builtins.c (parse_bif_entry): Don't call
+ asprintf, which is not available on AIX.
+
+2021-08-23 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config.gcc (target_gtfiles): Add ./rs6000-builtins.h.
+ * config/rs6000/t-rs6000 (EXTRA_GTYPE_DEPS): Set.
+
+2021-08-23 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config.gcc (powerpc*-*-*): Add rs6000-builtins.o to extra_objs.
+ * config/rs6000/rs6000-gen-builtins.c (main): Close init_file
+ last.
+ * config/rs6000/t-rs6000 (rs6000-gen-builtins.o): New target.
+ (rbtree.o): Likewise.
+ (rs6000-gen-builtins): Likewise.
+ (rs6000-builtins.c): Likewise.
+ (rs6000-builtins.h): Likewise.
+ (rs6000.o): Add dependency.
+ (EXTRA_HEADERS): Add rs6000-vecdefines.h.
+ (rs6000-vecdefines.h): New target.
+ (rs6000-builtins.o): Likewise.
+ (rs6000-call.o): Add rs6000-builtins.h as a dependency.
+ (rs6000-c.o): Likewise.
+
+2021-08-23 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ PR target/101830
+ * config/rs6000/rs6000-gen-builtins.c (consume_whitespace):
+ Diagnose buffer overrun.
+ (safe_inc_pos): Fix overrun detection.
+ (match_identifier): Diagnose buffer overrun.
+ (match_integer): Likewise.
+ (match_to_right_bracket): Likewise.
+
+2021-08-23 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref-tree.h (modref_access_node::range_info_useful_p):
+ Improve range compare.
+ (modref_access_node::contains): New member function.
+ (modref_access_node::search): Remove.
+ (modref_access_node::insert): Be smarter about subaccesses.
+
+2021-08-23 Thomas Schwinge <thomas@codesourcery.com>
+
+ * config/i386/i386-options.c (ix86_omp_device_kind_arch_isa)
+ <omp_device_arch> [ACCEL_COMPILER]: Match "intel_mic".
+ * config/i386/t-omp-device (omp-device-properties-i386) <arch>:
+ Add "intel_mic".
+
+2021-08-23 Jeff Law <jlaw@localhost.localdomain>
+
+ * config/h8300/h8300-protos.h (h8300_expand_epilogue): Add new
+ argument.
+ * config/h8300/jumpcall.md (call, call_value): Restrict to
+ !SIBLING_CALL_P cases.
+ (subcall, sibcall_value): New patterns & expanders.
+ * config/h8300/proepi.md (epilogue): Pass new argument to
+ h8300_expand_epilogue.
+ (sibcall_epilogue): New expander.
+ * config/h8300/h8300.c (h8300_expand_epilogue): Handle sibcall
+ epilogues too.
+ (h8300_ok_for_sibcall_p): New function.
+ (TARGET_FUNCTION_OK_FOR_SIBCALL): define.
+
+2021-08-23 Roger Sayle <roger@nextmovesoftware.com>
+
+ * simplify-rtx.c (simplify_unary_operation_1): [TRUNCATE]:
+ Handle case where the operand is already the desired mode.
+
+2021-08-23 Richard Biener <rguenther@suse.de>
+
+ PR ipa/97565
+ * tree-ssa-structalias.c (ipa_pta_execute): Check in_other_partition
+ in addition to has_gimple_body.
+
+2021-08-23 Jan Hubicka <hubicka@ucw.cz>
+
+ PR middle-end/101949
+ * ipa-modref.c (analyze_ssa_name_flags): Fix merging of
+ EAF_NOCLOBBER
+
+2021-08-23 Martin Liska <mliska@suse.cz>
+
+ * doc/invoke.texi: Put the option out of -mxl-mode-app-model
+ table.
+
+2021-08-23 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
+ Properly scale the inner loop cost only once.
+
+2021-08-23 Roger Sayle <roger@nextmovesoftware.com>
+
+ * tree-ssa-ccp.c (bit_value_binop) [TRUNC_MOD_EXPR, TRUNC_DIV_EXPR]:
+ Provide bounds for unsigned (and signed with non-negative operands)
+ division and modulus.
+
+2021-08-23 Roger Sayle <roger@nextmovesoftware.com>
+
+ * simplify-rtx.c (simplify_truncation): Generalize simplification
+ of (truncate:A (subreg:B X)).
+ (simplify_unary_operation_1) [FLOAT_TRUNCATE, FLOAT_EXTEND,
+ SIGN_EXTEND, ZERO_EXTEND]: Handle cases where the operand
+ already has the desired machine mode.
+ (test_scalar_int_ops): Add tests that useless extensions and
+ truncations are optimized away.
+ (test_scalar_int_ext_ops): New self-test function to confirm
+ that truncations of extensions are correctly simplified.
+ (test_scalar_int_ext_ops2): New self-test function to check
+ truncations of truncations, extensions of extensions, and
+ truncations of extensions.
+ (test_scalar_ops): Call the above two functions with a
+ representative sampling of integer machine modes.
+
+2021-08-23 Roger Sayle <roger@nextmovesoftware.com>
+
+ * match.pd (shift transformations): Change the sign of an
+ LSHIFT_EXPR if it reduces the number of explicit conversions.
+
+2021-08-23 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/86723
+ * gimple-ssa-store-merging.c (find_bswap_or_nop_finalize): Add
+ cast64_to_32 argument, set *cast64_to_32 to false, unless n is
+ non-memory permutation of 64-bit src which only has bytes of
+ 0 or [5..8] and n->range is 4.
+ (find_bswap_or_nop): Add cast64_to_32 and mask arguments, adjust
+ find_bswap_or_nop_finalize caller, support bswap with some bytes
+ zeroed, as long as at least two bytes are not zeroed.
+ (bswap_replace): Add mask argument and handle masking of bswap
+ result.
+ (maybe_optimize_vector_constructor): Adjust find_bswap_or_nop
+ caller, punt if cast64_to_32 or mask is not all ones.
+ (pass_optimize_bswap::execute): Adjust find_bswap_or_nop_finalize
+ caller, for now punt if cast64_to_32.
+
+2021-08-23 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/79334
+ * tree-ssa-sccvn.c (copy_reference_ops_from_ref): Record
+ a type also for COMPONENT_REFs.
+ (vn_reference_may_trap): Check ARRAY_REF with constant index
+ against the array domain.
+
+2021-08-23 liuhongt <hongtao.liu@intel.com>
+
+ PR target/102016
+ * config/i386/sse.md (*avx512f_pshufb_truncv8hiv8qi_1): Add
+ TARGET_AVX512BW to condition.
+
+2021-08-23 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/101905
+ * dwarf2out.c (gen_variable_die): Add DW_AT_location for global
+ register variables already during early_dwarf if possible.
+
+2021-08-23 Christophe Lyon <christophe.lyon@foss.st.com>
+
+ * config/arm/arm_mve.h: Fix __arm_vctp16q return type.
+
+2021-08-23 Christophe Lyon <christophe.lyon@foss.st.com>
+
+ PR target/100856
+ * config/arm/arm.opt: Fix typo.
+ * config/arm/t-rmprofile: Fix typo.
+
+2021-08-23 Jakub Jelinek <jakub@redhat.com>
+
+ * tree.h (OMP_CLAUSE_GRAINSIZE_STRICT): Define.
+ (OMP_CLAUSE_NUM_TASKS_STRICT): Define.
+ * tree-pretty-print.c (dump_omp_clause) <case OMP_CLAUSE_GRAINSIZE,
+ case OMP_CLAUSE_NUM_TASKS>: Print strict: modifier.
+ * omp-expand.c (expand_task_call): Use GOMP_TASK_FLAG_STRICT in iflags
+ if either grainsize or num_tasks clause has the strict modifier.
+
+2021-08-23 Martin Liska <mliska@suse.cz>
+
+ * dbgcnt.def (DEBUG_COUNTER): New counter.
+ * gimple.c (gimple_call_arg_flags): Use it in IPA PTA.
+
+2021-08-23 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref.c (analyze_ssa_name_flags): Improve handling of return slot.
+
+2021-08-23 Xi Ruoyao <xry111@mengyan1223.wang>
+
+ PR target/101922
+ * config/mips/mips-protos.h (mips_msa_output_shift_immediate):
+ Declare.
+ * config/mips/mips.c (mips_msa_output_shift_immediate): New
+ function.
+ * config/mips/mips-msa.md (vashl<mode>3, vashr<mode>3,
+ vlshr<mode>3): Call it.
+
+2021-08-22 Jan Hubicka <hubicka@ucw.cz>
+ Martin Liska <mliska@suse.cz>
+
+ PR middle-end/101949
+ * ipa-modref.c (analyze_ssa_name_flags): Indirect call implies
+ ~EAF_NOCLOBBER.
+
+2021-08-21 Dragan Mladjenovic <OT_Dragan.Mladjenovic@mediatek.com>
+
+ * config/mips/mips.c (mips_function_rodata_section,
+ TARGET_ASM_FUNCTION_RODATA_SECTION): Removed.
+
+2021-08-21 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.c (pa_asm_output_aligned_common): Remove warning.
+
+2021-08-20 Serge Belyshev <belyshev@depni.sinp.msu.ru>
+
+ * configure.ac (thread-local storage support): Remove tls_first_major
+ and tls_first_minor. Use "$conftest_s" to check support.
+ * configure: Regenerate.
+
+2021-08-20 Serge Belyshev <belyshev@depni.sinp.msu.ru>
+
+ * configure.ac: Fixup formatting.
+
+2021-08-20 Serge Belyshev <belyshev@depni.sinp.msu.ru>
+
+ * acinclude.m4 (gcc_GAS_CHECK_FEATURE): Remove third argument and ...
+ * configure.ac: ... update all callers.
+
+2021-08-20 Serge Belyshev <belyshev@depni.sinp.msu.ru>
+
+ PR target/91602
+ * acinclude.m4 (_gcc_COMPUTE_GAS_VERSION, _gcc_GAS_VERSION_GTE_IFELSE)
+ (gcc_GAS_VERSION_GTE_IFELSE): Remove.
+ (gcc_GAS_CHECK_FEATURE): Do not handle in-tree case specially.
+ * configure.ac: Remove gcc_cv_gas_major_version, gcc_cv_gas_minor_version.
+ Remove remaining checks for in-tree assembler.
+ * configure: Regenerate.
+
+2021-08-20 Jeff Law <jlaw@localhost.localdomain>
+
+ * config/h8300/h8300.c (shift_alg_hi): Improve arithmetic shift right
+ by 15 bits for H8/300H and H8/S. Improve logical shifts by 12
+ bits for H8/S.
+ (shift_alg_si): Improve arithmetic right shift by 28-30 bits for
+ H8/300H. Improve arithmetic shift right by 15 bits for H8/S.
+ Improve logical shifts by 27 bits for H8/S.
+ (get_shift_alg): Corresponding changes.
+ (h8300_option_override): Revert to loops for -Os when profitable.
+
+2021-08-20 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (dr_group_sort_cmp): Do not compare
+ BBs.
+ (vect_analyze_data_ref_accesses): Likewise. Assign the BB
+ index as group_id when dataref_groups were not computed.
+ * tree-vect-slp.c (vect_slp_bbs): Bump current_group when
+ we advace to the next BB.
+
+2021-08-20 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-builtins.def (BUILT_IN_GOMP_WARNING, BUILT_IN_GOMP_ERROR): New
+ builtins.
+
+2021-08-20 Martin Liska <mliska@suse.cz>
+
+ PR gcov-profile/89961
+ * gcov.c (make_gcov_file_name): Rewrite using std::string.
+ (mangle_name): Simplify, do not used the second argument.
+ (strip_extention): New function.
+ (get_md5sum): Likewise.
+ (get_gcov_intermediate_filename): Handle properly -p and -x
+ options.
+ (output_gcov_file): Use string type.
+ (generate_results): Likewise.
+ (md5sum_to_hex): Remove.
+
+2021-08-20 Michael Meissner <meissner@linux.ibm.com>
+
+ * config/rs6000/altivec.md (UNSPEC_XXEVAL): Move to vsx.md.
+ (UNSPEC_XXSPLTIW): Move to vsx.md.
+ (UNSPEC_XXSPLTID): Move to vsx.md.
+ (UNSPEC_XXSPLTI32DX): Move to vsx.md.
+ (UNSPEC_XXBLEND): Move to vsx.md.
+ (UNSPEC_XXPERMX): Move to vsx.md.
+ (VM3): Move to vsx.md.
+ (VM3_char): Move to vsx.md.
+ (xxspltiw_v4si): Move to vsx.md.
+ (xxspltiw_v4sf): Move to vsx.md.
+ (xxspltiw_v4sf_inst): Move to vsx.md.
+ (xxspltidp_v2df): Move to vsx.md.
+ (xxspltidp_v2df_inst): Move to vsx.md.
+ (xxsplti32dx_v4si_inst): Move to vsx.md.
+ (xxsplti32dx_v4sf): Move to vsx.md.
+ (xxsplti32dx_v4sf_inst): Move to vsx.md.
+ (xxblend_<mode>): Move to vsx.md.
+ (xxpermx): Move to vsx.md.
+ (xxpermx_inst): Move to vsx.md.
+ * config/rs6000/vsx.md (UNSPEC_XXEVAL): Move from altivec.md.
+ (UNSPEC_XXSPLTIW): Move from altivec.md.
+ (UNSPEC_XXSPLTID): Move from altivec.md.
+ (UNSPEC_XXSPLTI32DX): Move from altivec.md.
+ (UNSPEC_XXBLEND): Move from altivec.md.
+ (UNSPEC_XXPERMX): Move from altivec.md.
+ (VM3): Move from altivec.md.
+ (VM3_char): Move from altivec.md.
+ (xxspltiw_v4si): Move from altivec.md.
+ (xxspltiw_v4sf): Move from altivec.md.
+ (xxspltiw_v4sf_inst): Move from altivec.md.
+ (xxspltidp_v2df): Move from altivec.md.
+ (xxspltidp_v2df_inst): Move from altivec.md.
+ (xxsplti32dx_v4si_inst): Move from altivec.md.
+ (xxsplti32dx_v4sf): Move from altivec.md.
+ (xxsplti32dx_v4sf_inst): Move from altivec.md.
+ (xxblend_<mode>): Move from altivec.md.
+ (xxpermx): Move from altivec.md.
+ (xxpermx_inst): Move from altivec.md.
+
+2021-08-19 Roger Sayle <roger@nextmovesoftware.com>
+
+ * tree-vect-generic.c (expand_vector_operations_1): Use either
+ gimplify_build1 or gimplify_build2 instead of gimple_build_assign
+ when constructing scalar splat expressions.
+
+2021-08-19 Peter Bergner <bergner@linux.ibm.com>
+
+ PR target/101849
+ * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Cast
+ pointer to __vector_pair *.
+
+2021-08-19 Martin Sebor <msebor@redhat.com>
+
+ * gimple-range.cc: Add comments.
+ * gimple-range.h: Same.
+
+2021-08-19 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/101984
+ * gimple-ssa-warn-access.cc (pass_waccess::execute): Also call
+ disable_ranger.
+
+2021-08-19 Jeff Law <jlaw@localhost.localdomain>
+
+ * config.gcc (h8300-*-elf*): Do not include dbxelf.h.
+ (h8300-*-linux*, v850-*-rtems*, v850*-elf*): Likewise.
+ * config/v850/v850.h (DEFAULT_GDB_EXTENSIONS): Remove.
+
+2021-08-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/101950
+ * optabs.c (expand_clrsb_using_clz): New function.
+ (expand_unop): Use it as another clrsb expansion fallback.
+
+2021-08-19 liuhongt <hongtao.liu@intel.com>
+
+ Revert:
+ 2021-07-28 liuhongt <hongtao.liu@intel.com>
+
+ PR target/99881
+ * config/i386/i386.h (processor_costs): Add new member
+ integer_to_sse.
+ * config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost,
+ i486_cost, pentium_cost, lakemont_cost, pentiumpro_cost,
+ geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost,
+ bdver_cost, znver1_cost, znver2_cost, znver3_cost,
+ btver1_cost, btver2_cost, btver3_cost, pentium4_cost,
+ nocona_cost, atom_cost, atom_cost, slm_cost, intel_cost,
+ generic_cost, core_cost): Initialize integer_to_sse same value
+ as sse_op.
+ (skylake_cost): Initialize integer_to_sse twice as much as sse_op.
+ * config/i386/i386.c (ix86_builtin_vectorization_cost):
+ Use integer_to_sse instead of sse_op to calculate the cost of
+ vec_construct.
+
+2021-08-18 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config.gcc: Include rpath.opt for Darwin.
+ * config/darwin.h (DRIVER_SELF_SPECS): Handle -rpath.
+
+2021-08-18 Thomas Schwinge <thomas@codesourcery.com>
+
+ PR bootstrap/101959
+ * hash-map-tests.c (test_map_of_type_with_ctor_and_dtor_expand):
+ Use an 'int_hash'.
+
+2021-08-18 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/arm_neon.h (vld3_lane_f64): Use float RTL
+ pattern and type cast.
+ (vld4_lane_f32): Use float RTL pattern.
+ (vld4q_lane_f64): Use float type cast.
+
+2021-08-18 Jan Hubicka <hubicka@ucw.cz>
+
+ * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Check also
+ EAF_NOREAD.
+
+2021-08-18 Thomas Schwinge <thomas@codesourcery.com>
+
+ * hash-map-tests.c (test_map_of_type_with_ctor_and_dtor): Extend.
+ (test_map_of_type_with_ctor_and_dtor_expand): Add function.
+ (hash_map_tests_c_tests): Call it.
+
+2021-08-18 Thomas Schwinge <thomas@codesourcery.com>
+
+ * ggc.h (enum ggc_collect): New.
+ (ggc_collect): Use it.
+ * ggc-page.c: Adjust.
+ * ggc-common.c: Likewise.
+ * ggc-tests.c: Likewise.
+ * read-rtl-function.c: Likewise.
+ * selftest-run-tests.c: Likewise.
+ * doc/gty.texi (Invoking the garbage collector): Likewise.
+
+2021-08-18 liuhongt <hongtao.liu@intel.com>
+
+ PR target/97147
+ * config/i386/i386.h (TARGET_V2DF_REDUCTION_PREFER_HADDPD):
+ New macro.
+ * config/i386/sse.md (*sse3_haddv2df3_low): Add
+ TARGET_V2DF_REDUCTION_PREFER_HADDPD.
+ (*sse3_hsubv2df3_low): Ditto.
+ * config/i386/x86-tune.def
+ (X86_TUNE_V2DF_REDUCTION_PREFER_HADDPD): New tune.
+
+2021-08-17 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-gori.cc (gori_compute::gori_compute): Enable tracing.
+ (gori_compute::compute_operand_range): Add tracing.
+ (gori_compute::logical_combine): Ditto.
+ (gori_compute::compute_logical_operands): Ditto.
+ (gori_compute::compute_operand1_range): Ditto.
+ (gori_compute::compute_operand2_range): Ditto.
+ (gori_compute::outgoing_edge_range_p): Ditto.
+ * gimple-range-gori.h (class gori_compute): Add range_tracer.
+
+2021-08-17 Andrew MacLeod <amacleod@redhat.com>
+
+ * flag-types.h (enum evrp_mode): Adjust evrp-mode values.
+ * gimple-range-cache.cc (DEBUG_RANGE_CACHE): Relocate from.
+ * gimple-range-trace.h (DEBUG_RANGE_CACHE): Here.
+ * params.opt (--param=evrp-mode): Adjust options.
+
+2021-08-17 Andrew MacLeod <amacleod@redhat.com>
+
+ * Makefile.in (OBJS): Add gimple-range-trace.o.
+ * gimple-range-cache.h (enable_new_values): Remove unused prototype.
+ * gimple-range-fold.cc: Adjust headers.
+ * gimple-range-trace.cc: New.
+ * gimple-range-trace.h: New.
+ * gimple-range.cc (gimple_ranger::gimple_ranger): Enable tracer.
+ (gimple_ranger::range_of_expr): Add tracing.
+ (gimple_ranger::range_on_entry): Ditto.
+ (gimple_ranger::range_on_exit): Ditto.
+ (gimple_ranger::range_on_edge): Ditto.
+ (gimple_ranger::fold_range_internal): Ditto.
+ (gimple_ranger::dump_bb): Do not calculate edge range twice.
+ (trace_ranger::*): Remove.
+ (enable_ranger): Never create a trace_ranger.
+ (debug_seed_ranger): Move to gimple-range-trace.cc.
+ (dump_ranger): Ditto.
+ (debug_ranger): Ditto.
+ * gimple-range.h: Include gimple-range-trace.h.
+ (range_on_entry, range_on_exit): No longer virtual.
+ (class trace_ranger): Remove.
+ (DEBUG_RANGE_CACHE): Move to gimple-range-trace.h.
+
+2021-08-17 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/101854
+ * builtins.c (expand_builtin_alloca): Move warning code to check_alloca
+ in gimple-ssa-warn-access.cc.
+ * calls.c (alloc_max_size): Move code to check_alloca.
+ (get_size_range): Move to pointer-query.cc.
+ (maybe_warn_alloc_args_overflow): Move to gimple-ssa-warn-access.cc.
+ (get_attr_nonstring_decl): Move to tree.c.
+ (fntype_argno_type): Move to gimple-ssa-warn-access.cc.
+ (append_attrname): Same.
+ (maybe_warn_rdwr_sizes): Same.
+ (initialize_argument_information): Move code to
+ gimple-ssa-warn-access.cc.
+ * calls.h (maybe_warn_alloc_args_overflow): Move to
+ gimple-ssa-warn-access.h.
+ (get_attr_nonstring_decl): Move to tree.h.
+ (maybe_warn_nonstring_arg): Move to gimple-ssa-warn-access.h.
+ (enum size_range_flags): Move to pointer-query.h.
+ (get_size_range): Same.
+ * gimple-ssa-warn-access.cc (has_location): Remove unused overload
+ to avoid Clang -Wunused-function.
+ (get_size_range): Declare static.
+ (maybe_emit_free_warning): Rename...
+ (maybe_check_dealloc_call): ...to this for consistency.
+ (class pass_waccess): Add members.
+ (pass_waccess::~pass_waccess): Defined.
+ (alloc_max_size): Move here from calls.c.
+ (maybe_warn_alloc_args_overflow): Same.
+ (check_alloca): New function.
+ (check_alloc_size_call): New function.
+ (check_strncat): Handle another warning flag.
+ (pass_waccess::check_builtin): Handle alloca.
+ (fntype_argno_type): Move here from calls.c.
+ (append_attrname): Same.
+ (maybe_warn_rdwr_sizes): Same.
+ (pass_waccess::check_call): Define.
+ (check_nonstring_args): New function.
+ (pass_waccess::check): Call new member functions.
+ (pass_waccess::execute): Enable ranger.
+ * gimple-ssa-warn-access.h (get_size_range): Move here from calls.h.
+ (maybe_warn_nonstring_arg): Same.
+ * gimple-ssa-warn-restrict.c: Remove #include.
+ * pointer-query.cc (get_size_range): Move here from calls.c.
+ * pointer-query.h (enum size_range_flags): Same.
+ (get_size_range): Same.
+ * tree.c (get_attr_nonstring_decl): Move here from calls.c.
+ * tree.h (get_attr_nonstring_decl): Move here from calls.h.
+
+2021-08-17 Thomas Schwinge <thomas@codesourcery.com>
+
+ * ggc.h (ggc_collect): Add 'force_collect' parameter.
+ * ggc-page.c (ggc_collect): Use that one instead of global
+ 'ggc_force_collect'. Adjust all users.
+ * doc/gty.texi (Invoking the garbage collector): Update.
+ * ggc-internal.h (ggc_force_collect): Remove.
+ * ggc-common.c (ggc_force_collect): Likewise.
+ * selftest.h (forcibly_ggc_collect): Remove.
+ * ggc-tests.c (selftest::forcibly_ggc_collect): Likewise.
+ * read-rtl-function.c (test_loading_labels): Adjust.
+ * selftest-run-tests.c (run_tests): Likewise.
+
+2021-08-17 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_file_end): Reset and reclaim the
+ section names table at the end of compile.
+
+2021-08-17 Iain Sandoe <iain@sandoe.co.uk>
+
+ PR target/100340
+ * config.in: Regenerate.
+ * config/i386/darwin.h (EXTRA_ASM_OPTS): New
+ (ASM_SPEC): Pass options to disable branch shortening where
+ needed.
+ * configure: Regenerate.
+ * configure.ac: Detect versions of 'as' that support the
+ optimisation which has the bug.
+
+2021-08-17 Richard Biener <rguenther@suse.de>
+
+ * optabs-query.c (supports_vec_gather_load_p): Also check
+ for masked optabs.
+ (supports_vec_scatter_store_p): Likewise.
+ * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Fall
+ back to masked variants if non-masked are not supported.
+ * tree-vect-patterns.c (vect_recog_gather_scatter_pattern):
+ When we need to use masked gather/scatter but do not have
+ a mask set up a constant true one.
+ * tree-vect-stmts.c (vect_check_scalar_mask): Also allow
+ non-SSA_NAME masks.
+
+2021-08-17 Roger Sayle <roger@nextmovesoftware.com>
+
+ * tree-ssa-ccp.c (bit_value_binop) [MINUS_EXPR]: Use same
+ algorithm as PLUS_EXPR to improve subtraction bit bounds.
+ [POINTER_DIFF_EXPR]: Treat as synonymous with MINUS_EXPR.
+
+2021-08-17 Roger Sayle <roger@nextmovesoftware.com>
+
+ * tree-ssa-ccp.c (bit_value_mult_const): New helper function to
+ calculate the mask-value pair result of a multiplication by an
+ unsigned constant.
+ (bit_value_binop) [MULT_EXPR]: Call it from here for
+ multiplications by (sparse) non-negative constants.
+
+2021-08-17 Christophe Lyon <christophe.lyon@foss.st.com>
+
+ PR target/100896
+ * config.gcc (gcc_cv_initfini_array): Leave undefined for
+ uclinuxfdpiceabi targets.
+
+2021-08-17 Alexandre Oliva <oliva@adacore.com>
+
+ * tree-inline.c (maybe_move_debug_stmts_to_successors): Don't
+ reverse debug stmts.
+
+2021-08-17 Alexandre Oliva <oliva@adacore.com>
+
+ * tree-cfg.c (dump_function_to_file): Use fun, not cfun.
+
+2021-08-17 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/arm_neon.h (__LD4_LANE_FUNC): Delete.
+ (__LD4Q_LANE_FUNC): Likewise.
+ (vld4_lane_u8): Define without macro.
+ (vld4_lane_u16): Likewise.
+ (vld4_lane_u32): Likewise.
+ (vld4_lane_u64): Likewise.
+ (vld4_lane_s8): Likewise.
+ (vld4_lane_s16): Likewise.
+ (vld4_lane_s32): Likewise.
+ (vld4_lane_s64): Likewise.
+ (vld4_lane_f16): Likewise.
+ (vld4_lane_f32): Likewise.
+ (vld4_lane_f64): Likewise.
+ (vld4_lane_p8): Likewise.
+ (vld4_lane_p16): Likewise.
+ (vld4_lane_p64): Likewise.
+ (vld4q_lane_u8): Likewise.
+ (vld4q_lane_u16): Likewise.
+ (vld4q_lane_u32): Likewise.
+ (vld4q_lane_u64): Likewise.
+ (vld4q_lane_s8): Likewise.
+ (vld4q_lane_s16): Likewise.
+ (vld4q_lane_s32): Likewise.
+ (vld4q_lane_s64): Likewise.
+ (vld4q_lane_f16): Likewise.
+ (vld4q_lane_f32): Likewise.
+ (vld4q_lane_f64): Likewise.
+ (vld4q_lane_p8): Likewise.
+ (vld4q_lane_p16): Likewise.
+ (vld4q_lane_p64): Likewise.
+ (vld4_lane_bf16): Likewise.
+ (vld4q_lane_bf16): Likewise.
+
+2021-08-17 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/arm_neon.h (__LD3_LANE_FUNC): Delete.
+ (__LD3Q_LANE_FUNC): Delete.
+ (vld3_lane_u8): Define without macro.
+ (vld3_lane_u16): Likewise.
+ (vld3_lane_u32): Likewise.
+ (vld3_lane_u64): Likewise.
+ (vld3_lane_s8): Likewise.
+ (vld3_lane_s16): Likewise.
+ (vld3_lane_s32): Likewise.
+ (vld3_lane_s64): Likewise.
+ (vld3_lane_f16): Likewise.
+ (vld3_lane_f32): Likewise.
+ (vld3_lane_f64): Likewise.
+ (vld3_lane_p8): Likewise.
+ (vld3_lane_p16): Likewise.
+ (vld3_lane_p64): Likewise.
+ (vld3q_lane_u8): Likewise.
+ (vld3q_lane_u16): Likewise.
+ (vld3q_lane_u32): Likewise.
+ (vld3q_lane_u64): Likewise.
+ (vld3q_lane_s8): Likewise.
+ (vld3q_lane_s16): Likewise.
+ (vld3q_lane_s32): Likewise.
+ (vld3q_lane_s64): Likewise.
+ (vld3q_lane_f16): Likewise.
+ (vld3q_lane_f32): Likewise.
+ (vld3q_lane_f64): Likewise.
+ (vld3q_lane_p8): Likewise.
+ (vld3q_lane_p16): Likewise.
+ (vld3q_lane_p64): Likewise.
+ (vld3_lane_bf16): Likewise.
+ (vld3q_lane_bf16): Likewise.
+
+2021-08-17 Jonathan Wright <jonathan.wright@arm.com>
+
+ * config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Delete.
+ (__LD2Q_LANE_FUNC): Likewise.
+ (vld2_lane_u8): Define without macro.
+ (vld2_lane_u16): Likewise.
+ (vld2_lane_u32): Likewise.
+ (vld2_lane_u64): Likewise.
+ (vld2_lane_s8): Likewise.
+ (vld2_lane_s16): Likewise.
+ (vld2_lane_s32): Likewise.
+ (vld2_lane_s64): Likewise.
+ (vld2_lane_f16): Likewise.
+ (vld2_lane_f32): Likewise.
+ (vld2_lane_f64): Likewise.
+ (vld2_lane_p8): Likewise.
+ (vld2_lane_p16): Likewise.
+ (vld2_lane_p64): Likewise.
+ (vld2q_lane_u8): Likewise.
+ (vld2q_lane_u16): Likewise.
+ (vld2q_lane_u32): Likewise.
+ (vld2q_lane_u64): Likewise.
+ (vld2q_lane_s8): Likewise.
+ (vld2q_lane_s16): Likewise.
+ (vld2q_lane_s32): Likewise.
+ (vld2q_lane_s64): Likewise.
+ (vld2q_lane_f16): Likewise.
+ (vld2q_lane_f32): Likewise.
+ (vld2q_lane_f64): Likewise.
+ (vld2q_lane_p8): Likewise.
+ (vld2q_lane_p16): Likewise.
+ (vld2q_lane_p64): Likewise.
+ (vld2_lane_bf16): Likewise.
+ (vld2q_lane_bf16): Likewise.
+
+2021-08-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+
+ * haifa-sched.c (advance_one_cycle): Output more context-synchronization
+ lines for diff.
+
+2021-08-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+
+ * haifa-sched.c (enum rfs_decision, rfs_str): Add RFS_AUTOPREF.
+ (rank_for_schedule): Use it.
+
+2021-08-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+
+ PR rtl-optimization/91598
+ * haifa-sched.c (autopref_rank_for_schedule): Prioritize "irrelevant"
+ insns after memory reads and before memory writes.
+
+2021-08-17 Alistair_Lee <alistair.lee@arm.com>
+
+ * rtl.h (CONST_VECTOR_P): New macro.
+ * config/aarch64/aarch64.c (aarch64_get_sve_pred_bits): Use RTL
+ code testing macros.
+ (aarch64_ptrue_all_mode): Likewise.
+ (aarch64_expand_mov_immediate): Likewise.
+ (aarch64_const_vec_all_in_range_p): Likewise.
+ (aarch64_rtx_costs): Likewise.
+ (aarch64_legitimate_constant_p): Likewise.
+ (aarch64_simd_valid_immediate): Likewise.
+ (aarch64_simd_make_constant): Likewise.
+ (aarch64_convert_mult_to_shift): Likewise.
+ (aarch64_expand_sve_vec_perm): Likewise.
+ (aarch64_vec_fpconst_pow_of_2): Likewise.
+
+2021-08-17 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/101938
+ * range-op.cc (operator_abs::op1_range): Special case
+ -TYPE_MIN_VALUE for flag_wrapv.
+
+2021-08-17 Kewen Lin <linkw@linux.ibm.com>
+
+ * tree-vect-slp.c (vectorizable_bb_reduc_epilogue): Add the cost for
+ value extraction.
+
+2021-08-17 Jakub Jelinek <jakub@redhat.com>
+
+ * tree.def (OMP_SCOPE): New tree code.
+ * tree.h (OMP_SCOPE_BODY, OMP_SCOPE_CLAUSES): Define.
+ * tree-nested.c (convert_nonlocal_reference_stmt,
+ convert_local_reference_stmt, convert_gimple_call): Handle
+ GIMPLE_OMP_SCOPE.
+ * tree-pretty-print.c (dump_generic_node): Handle OMP_SCOPE.
+ * gimple.def (GIMPLE_OMP_SCOPE): New gimple code.
+ * gimple.c (gimple_build_omp_scope): New function.
+ (gimple_copy): Handle GIMPLE_OMP_SCOPE.
+ * gimple.h (gimple_build_omp_scope): Declare.
+ (gimple_has_substatements): Handle GIMPLE_OMP_SCOPE.
+ (gimple_omp_scope_clauses, gimple_omp_scope_clauses_ptr,
+ gimple_omp_scope_set_clauses): New inline functions.
+ (CASE_GIMPLE_OMP): Add GIMPLE_OMP_SCOPE.
+ * gimple-pretty-print.c (dump_gimple_omp_scope): New function.
+ (pp_gimple_stmt_1): Handle GIMPLE_OMP_SCOPE.
+ * gimple-walk.c (walk_gimple_stmt): Likewise.
+ * gimple-low.c (lower_stmt): Likewise.
+ * gimplify.c (is_gimple_stmt): Handle OMP_MASTER.
+ (gimplify_scan_omp_clauses): For task reductions, handle OMP_SCOPE
+ like ORT_WORKSHARE constructs. Adjust diagnostics for %<scope%>
+ allowing task reductions. Reject inscan reductions on scope.
+ (omp_find_stores_stmt): Handle GIMPLE_OMP_SCOPE.
+ (gimplify_omp_workshare, gimplify_expr): Handle OMP_SCOPE.
+ * tree-inline.c (remap_gimple_stmt): Handle GIMPLE_OMP_SCOPE.
+ (estimate_num_insns): Likewise.
+ * omp-low.c (build_outer_var_ref): Look through GIMPLE_OMP_SCOPE
+ contexts if var isn't privatized there.
+ (check_omp_nesting_restrictions): Handle GIMPLE_OMP_SCOPE.
+ (scan_omp_1_stmt): Likewise.
+ (maybe_add_implicit_barrier_cancel): Look through outer
+ scope constructs.
+ (lower_omp_scope): New function.
+ (lower_omp_task_reductions): Handle OMP_SCOPE.
+ (lower_omp_1): Handle GIMPLE_OMP_SCOPE.
+ (diagnose_sb_1, diagnose_sb_2): Likewise.
+ * omp-expand.c (expand_omp_single): Support also GIMPLE_OMP_SCOPE.
+ (expand_omp): Handle GIMPLE_OMP_SCOPE.
+ (omp_make_gimple_edges): Likewise.
+ * omp-builtins.def (BUILT_IN_GOMP_SCOPE_START): New built-in.
+
+2021-08-17 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/101925
+ * tree-ssa-sccvn.c (copy_reference_ops_from_ref): Set
+ reverse on COMPONENT_REF and ARRAY_REF according to
+ what reverse_storage_order_for_component_p does.
+ (vn_reference_eq): Compare reversed on reference ops.
+ (reverse_storage_order_for_component_p): New overload.
+ (vn_reference_lookup_3): Check reverse_storage_order_for_component_p
+ on the reference looked up.
+
+2021-08-17 Jeff Law <jlaw@localhost.localdomain>
+
+ * config/h8300/h8300.c (shift_alg_si): Avoid loops for most SImode
+ shifts on the H8/S.
+ (h8300_option_override): Use loops on H8/S more often when optimizing
+ for size.
+ (get_shift_alg): Handle new "special" cases on H8/S. Simplify
+ accordingly. Handle various arithmetic right shifts with special
+ sequences that we couldn't handle before.
+
+2021-08-16 Jeff Law <jlaw@localhost.localdomain>
+
+ * config.gcc (rl78-*-elf*): Do not include dbxelf.h.
+
+2021-08-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define.
+ * config/sparc/sparc.c (sparc_gcov_type_size): New.
+ (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined.
+ * coverage.c (get_gcov_type): Use targetm.gcov_type_size().
+ * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc".
+ * doc/tm.texi.in: Regenerate.
+ * target.def (gcov_type_size): New target hook.
+ * targhooks.c (default_gcov_type_size): New.
+ * targhooks.h (default_gcov_type_size): Declare.
+ * tree-profile.c (gimple_gen_edge_profiler): Use precision of
+ gcov_type_node.
+ (gimple_gen_time_profiler): Likewise.
+
+2021-08-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
+
+ * dwarf2out.c (add_scalar_info): Deal with DW_AT_data_bit_offset.
+
+2021-08-16 Tobias Burnus <tobias@codesourcery.com>
+
+ PR middle-end/101931
+ * omp-low.c (omp_runtime_api_call): Update for routines
+ added in the meanwhile.
+
+2021-08-16 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/100393
+ * tree-switch-conversion.c (group_cluster::dump): Use
+ get_comparison_count.
+ (jump_table_cluster::find_jump_tables): Pre-compute number of
+ comparisons and then decrement it. Cache also max_ratio.
+ (jump_table_cluster::can_be_handled): Change signature.
+ * tree-switch-conversion.h (get_comparison_count): New.
+
+2021-08-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
+
+ * dwarf2out.c (add_data_member_location_attribute): Use GNAT
+ encodings only when -fgnat-encodings=all is specified.
+ (add_bound_info): Likewise.
+ (add_byte_size_attribute): Likewise.
+ (gen_member_die): Likewise.
+
+2021-08-16 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-oacc-neuter-broadcast.cc
+ (execute_omp_oacc_neuter_broadcast): Plug 'par' memory leak.
+
+2021-08-16 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-oacc-neuter-broadcast.cc
+ (execute_omp_oacc_neuter_broadcast): Clarify memory management for
+ 'prop_set'.
+
+2021-08-16 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-oacc-neuter-broadcast.cc (field_map): Move variable into...
+ (execute_omp_oacc_neuter_broadcast): ... here.
+ (install_var_field, build_receiver_ref, build_sender_ref): Take
+ 'field_map_t *' parameter. Adjust all users.
+ (worker_single_copy, neuter_worker_single): Take a
+ 'record_field_map_t *' parameter. Adjust all users.
+
+2021-08-16 liuhongt <hongtao.liu@intel.com>
+
+ PR target/101930
+ * config/i386/i386.md (ldexp<mode>3): Force operands[1] to
+ reg.
+
+2021-08-16 Martin Liska <mliska@suse.cz>
+
+ PR ipa/101726
+ * multiple_target.c (create_dispatcher_calls): Make default
+ function local only if it is a definition.
+
+2021-08-16 Martin Liska <mliska@suse.cz>
+
+ PR ipa/100600
+ * ipa-icf-gimple.c (func_checker::compare_ssa_name): Do not
+ consider equal SSA_NAMEs when one is a param.
+
+2021-08-16 liuhongt <hongtao.liu@intel.com>
+
+ PR target/101846
+ * config/i386/i386-expand.c (ix86_expand_vec_perm_vpermt2):
+ Support vpermi2b for V32QI/V16QImode.
+ (ix86_extract_perm_from_pool_constant): New function.
+ (ix86_expand_vec_one_operand_perm_avx512): Support
+ vpermw/vpermb under TARGET_AVX512BW/TARGET_AVX512VBMI.
+ (expand_vec_perm_1): Adjust comments for upper.
+ * config/i386/i386-protos.h (ix86_extract_perm_from_pool_constant):
+ New declare.
+ * config/i386/predicates.md (permvar_truncate_operand): New predicate.
+ (pshufb_truncv4siv4hi_operand): Ditto.
+ (pshufb_truncv8hiv8qi_operand): Ditto.
+ * config/i386/sse.md (*avx512bw_permvar_truncv16siv16hi_1):
+ New pre_reload define_insn_and_split.
+ (*avx512f_permvar_truncv8siv8hi_1): Ditto.
+ (*avx512f_vpermvar_truncv8div8si_1): Ditto.
+ (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
+ (*avx512f_permvar_truncv16hiv16qi_1): Ditto.
+ (*avx512f_permvar_truncv4div4si_1): Ditto.
+ (*avx512f_pshufb_truncv8hiv8qi_1): Ditto.
+ (*avx512f_pshufb_truncv4siv4hi_1): Ditto.
+ (*avx512f_pshufd_truncv2div2si_1): Ditto.
+
+2021-08-16 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/multilib-generator: Support code model option for
+ multi-lib.
+ * doc/install.texi: Add document of new option for
+ --with-multilib-generator.
+
+2021-08-15 Clément Chigot <clement.chigot@atos.net>
+
+ * config/rs6000/rs6000.c (xcoff_tls_exec_model_detected): New.
+ (rs6000_legitimize_tls_address_aix): Use it.
+ (rs6000_xcoff_file_end): Add ".ref __tls_get_addr" when
+ xcoff_tls_exec_model_detected is true.
+
+2021-08-15 Jeff Law <jlaw@localhost.localdomain>
+
+ * config/h8300/h8300.c (shift_alg_si): Retune H8/300H shifts
+ to allow a bit more code growth, saving many dozens of cycles.
+ (h8300_option_override): Adjus shift_alg_si if optimizing for
+ code size.
+ (get_shift_alg): Use special + inline shifts for residuals
+ in more cases.
+
+2021-08-14 Stafford Horne <shorne@gmail.com>
+
+ PR target/99783
+ * config/or1k/or1k-opts.h: New file.
+ * config/or1k/or1k.c (or1k_legitimize_address_1, print_reloc):
+ Support generating gotha relocations if -mcmodel=large is
+ specified.
+ * config/or1k/or1k.h (TARGET_CMODEL_SMALL, TARGET_CMODEL_LARGE):
+ New macros.
+ * config/or1k/or1k.opt (mcmodel=): New option.
+ * doc/invoke.texi (OpenRISC Options): Document mcmodel.
+
+2021-08-14 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/101791
+ * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Use new argument
+ to valid_new_delete_pair_p.
+ * tree.c (valid_new_delete_pair_p): Add argument.
+ * tree.h (valid_new_delete_pair_p): Same.
+
+2021-08-14 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/101896
+ * config/i386/i386-expand.c (expand_vec_perm_broadcast_1)
+ <case E_V64QImode>: For this mode assert
+ !TARGET_AVX512BW || d->perm[0] rather than !TARGET_AVX2 || d->perm[0].
+
+2021-08-13 Michael Meissner <meissner@linux.ibm.com>
+
+ PR target/99921
+ * config/rs6000/altivec.md (xxeval): Use register_predicate
+ instead of altivec_register_predicate.
+
+2021-08-13 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/101734
+ * tree-ssa-uninit.c (maybe_warn_read_write_only): New function.
+ (maybe_warn_operand): Call it.
+
+2021-08-13 Martin Liska <mliska@suse.cz>
+
+ PR ipa/101354
+ * attribs.c (decl_attributes): Make naked functions "noipa"
+ functions.
+
+2021-08-13 Martin Liska <mliska@suse.cz>
+
+ PR ipa/101261
+ * symtab.c (symtab_node::noninterposable_alias): Do not create
+ local aliases for target_clone functions as the clonning pass
+ rejects aliases.
+
+2021-08-13 Martin Liska <mliska@suse.cz>
+
+ * opts.c (LIVE_PATCHING_OPTION): Define.
+ (control_options_for_live_patching): Use it in error messages.
+
+2021-08-13 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-modref.c (dump_eaf_flags): Dump EAF_NOREAD.
+ (implicit_const_eaf_flags, implicit_pure_eaf_flags,
+ ignore_stores_eaf_flags): New constants.
+ (remove_useless_eaf_flags): New function.
+ (eaf_flags_useful_p): Use it.
+ (deref_flags): Add EAF_NOT_RETURNED if flag is unused;
+ handle EAF_NOREAD.
+ (modref_lattice::init): Add EAF_NOREAD.
+ (modref_lattice::add_escape_point): Do not reacord escape point if
+ result is unused.
+ (modref_lattice::merge): EAF_NOESCAPE implies EAF_NODIRECTESCAPE;
+ use remove_useless_eaf_flags.
+ (modref_lattice::merge_deref): Use ignore_stores_eaf_flags.
+ (modref_lattice::merge_direct_load): Add EAF_NOREAD
+ (analyze_ssa_name_flags): Fix handling EAF_NOT_RETURNED
+ (analyze_parms): Use remove_useless_eaf_flags.
+ (ipa_merge_modref_summary_after_inlining): Use ignore_stores_eaf_flags.
+ (modref_merge_call_site_flags): Add caller and ecf_flags parameter;
+ use remove_useless_eaf_flags.
+ (modref_propagate_flags_in_scc): Update.
+ * ipa-modref.h: Turn eaf_flags_t back to char.
+ * tree-core.h (EAF_NOT_RETURNED): Fix.
+ (EAF_NOREAD): New constant
+ * tree-ssa-alias.c: (ref_maybe_used_by_call_p_1): Check for
+ EAF_NOREAD.
+ * tree-ssa-structalias.c (handle_rhs_call): Handle new flags.
+ (handle_pure_call): Likewise.
+
+2021-08-12 Jakub Jelinek <jakub@redhat.com>
+
+ * tree.def (OMP_MASKED): New tree code.
+ * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_FILTER.
+ * tree.h (OMP_MASKED_BODY, OMP_MASKED_CLAUSES, OMP_MASKED_COMBINED,
+ OMP_CLAUSE_FILTER_EXPR): Define.
+ * tree.c (omp_clause_num_ops): Add OMP_CLAUSE_FILTER entry.
+ (omp_clause_code_name): Likewise.
+ (walk_tree_1): Handle OMP_CLAUSE_FILTER.
+ * tree-nested.c (convert_nonlocal_omp_clauses,
+ convert_local_omp_clauses): Handle OMP_CLAUSE_FILTER.
+ (convert_nonlocal_reference_stmt, convert_local_reference_stmt,
+ convert_gimple_call): Handle GIMPLE_OMP_MASTER.
+ * tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE_FILTER.
+ (dump_generic_node): Handle OMP_MASTER.
+ * gimple.def (GIMPLE_OMP_MASKED): New gimple code.
+ * gimple.c (gimple_build_omp_masked): New function.
+ (gimple_copy): Handle GIMPLE_OMP_MASKED.
+ * gimple.h (gimple_build_omp_masked): Declare.
+ (gimple_has_substatements): Handle GIMPLE_OMP_MASKED.
+ (gimple_omp_masked_clauses, gimple_omp_masked_clauses_ptr,
+ gimple_omp_masked_set_clauses): New inline functions.
+ (CASE_GIMPLE_OMP): Add GIMPLE_OMP_MASKED.
+ * gimple-pretty-print.c (dump_gimple_omp_masked): New function.
+ (pp_gimple_stmt_1): Handle GIMPLE_OMP_MASKED.
+ * gimple-walk.c (walk_gimple_stmt): Likewise.
+ * gimple-low.c (lower_stmt): Likewise.
+ * gimplify.c (is_gimple_stmt): Handle OMP_MASTER.
+ (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_FILTER. For clauses
+ that take one expression rather than decl or constant, force
+ gimplification of that into a SSA_NAME or temporary unless min
+ invariant.
+ (gimplify_adjust_omp_clauses): Handle OMP_CLAUSE_FILTER.
+ (gimplify_expr): Handle OMP_MASKED.
+ * tree-inline.c (remap_gimple_stmt): Handle GIMPLE_OMP_MASKED.
+ (estimate_num_insns): Likewise.
+ * omp-low.c (scan_sharing_clauses): Handle OMP_CLAUSE_FILTER.
+ (check_omp_nesting_restrictions): Handle GIMPLE_OMP_MASKED. Adjust
+ diagnostics for existence of masked construct.
+ (scan_omp_1_stmt, lower_omp_master, lower_omp_1, diagnose_sb_1,
+ diagnose_sb_2): Handle GIMPLE_OMP_MASKED.
+ * omp-expand.c (expand_omp_synch, expand_omp, omp_make_gimple_edges):
+ Likewise.
+
+2021-08-12 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/98309
+ * config/i386/i386.md (avx512f_scalef<mode>2): New insn pattern.
+ (ldexp<mode>3): Use avx512f_scalef<mode>2.
+ (UNSPEC_SCALEF): Move from ...
+ * config/i386/sse.md (UNSPEC_SCALEF): ... here.
+
+2021-08-12 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-split.c (consider_split): Fix condition testing void functions.
+
+2021-08-12 Aldy Hernandez <aldyh@redhat.com>
+
+ * doc/invoke.texi: Remove docs for threader-mode param.
+ * flag-types.h (enum threader_mode): Remove.
+ * params.opt: Remove threader-mode param.
+ * tree-ssa-threadbackward.c (class back_threader): Remove
+ path_is_unreachable_p.
+ Make find_paths private.
+ Add maybe_thread and thread_through_all_blocks.
+ Remove reference marker for m_registry.
+ Remove reference marker for m_profit.
+ (back_threader::back_threader): Adjust for registry and profit not
+ being references.
+ (dump_path): Move down.
+ (debug): Move down.
+ (class thread_jumps): Remove.
+ (class back_threader_registry): Remove m_all_paths.
+ Remove destructor.
+ (thread_jumps::thread_through_all_blocks): Move to back_threader
+ class.
+ (fsm_find_thread_path): Remove
+ (back_threader::maybe_thread): New.
+ (back_threader::thread_through_all_blocks): Move from
+ thread_jumps.
+ (back_threader_registry::back_threader_registry): Remove
+ m_all_paths.
+ (back_threader_registry::~back_threader_registry): Remove.
+ (thread_jumps::find_taken_edge): Remove.
+ (thread_jumps::check_subpath_and_update_thread_path): Remove.
+ (thread_jumps::maybe_register_path): Remove.
+ (thread_jumps::handle_phi): Remove.
+ (handle_assignment_p): Remove.
+ (thread_jumps::handle_assignment): Remove.
+ (thread_jumps::fsm_find_control_statement_thread_paths): Remove.
+ (thread_jumps::find_jump_threads_backwards): Remove.
+ (thread_jumps::find_jump_threads_backwards_with_ranger): Remove.
+ (try_thread_blocks): Rename find_jump_threads_backwards to
+ maybe_thread.
+ (pass_early_thread_jumps::execute): Same.
+
+2021-08-12 Tobias Burnus <tobias@codesourcery.com>
+
+ * tree-core.h (omp_clause_proc_bind_kind): Add
+ OMP_CLAUSE_PROC_BIND_PRIMARY.
+ * tree-pretty-print.c (dump_omp_clause): Add TODO comment to
+ change 'master' to 'primary' in proc_bind for OpenMP 5.1.
+
+2021-08-12 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * common/config/arc/arc-common.c (arc_option_init_struct): Remove
+ fno-common reference.
+ * config/arc/arc.c (arc_override_options): Remove overriding of
+ flag_no_common.
+
+2021-08-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/101860
+ * config/i386/i386-expand.c (ix86_expand_vec_one_operand_perm_avx512):
+ If d->testing_p, return true after performing checks instead of
+ actually expanding the insn.
+ (expand_vec_perm_broadcast_1): Handle V32HImode - assert
+ !TARGET_AVX512BW and return false.
+
+2021-08-12 Eric Botcazou <ebotcazou@gcc.gnu.org>
+
+ * configure.ac (PE linker --disable-dynamicbase support): New check.
+ * configure: Regenerate.
+ * config.in: Likewise.
+ * config/i386/mingw32.h (LINK_SPEC_DISABLE_DYNAMICBASE): New define.
+ (LINK_SPEC): Use it.
+ * config/i386/mingw-w64.h (LINK_SPEC_DISABLE_DYNAMICBASE): Likewise.
+ (LINK_SPEC): Likewise.
+
+2021-08-12 liuhongt <hongtao.liu@intel.com>
+
+ PR target/101846
+ * config/i386/sse.md (*avx2_zero_extendv16qiv16hi2_2): New
+ post_reload define_insn_and_split.
+ (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
+ (*sse4_1_zero_extendv8qiv8hi2_4): Ditto.
+ (*avx512f_zero_extendv16hiv16si2_2): Ditto.
+ (*avx2_zero_extendv8hiv8si2_2): Ditto.
+ (*sse4_1_zero_extendv4hiv4si2_4): Ditto.
+ (*avx512f_zero_extendv8siv8di2_2): Ditto.
+ (*avx2_zero_extendv4siv4di2_2): Ditto.
+ (*sse4_1_zero_extendv2siv2di2_4): Ditto.
+ (VI248_256, VI248_512, VI148_512, VI148_256, VI148_128): New
+ mode iterator.
+
+2021-08-11 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Add always, power5, and
+ power6 stanzas.
+
+2021-08-11 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Add vsx stanza.
+
+2021-08-11 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * config/rs6000/rs6000-builtin-new.def: Finish altivec stanza.
+ * config/rs6000/rs6000-call.c (rs6000_init_builtins): Move
+ initialization of pcvoid_type_node here...
+ (altivec_init_builtins): ...from here.
+ * config/rs6000/rs6000.h (rs6000_builtin_type_index): Add
+ RS6000_BTI_const_ptr_void.
+ (pcvoid_type_node): New macro.
+
+2021-08-11 Richard Biener <rguenther@suse.de>
+
+ PR target/101877
+ * tree-ssa-forwprop.c (pass_forwprop::execute): Do not decompose
+ hard-register accesses.
+
+2021-08-11 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-operands.c (operands_scanner::get_expr_operands):
+ Do not look at COMPONENT_REF FIELD_DECLs TREE_THIS_VOLATILE
+ to determine has_volatile_ops.
+
+2021-08-11 Eric Botcazou <ebotcazou@gcc.gnu.org>
+
+ * cfgexpand.c (expand_used_vars): Reuse attribs local variable.
+
+2021-08-11 Jan Hubicka <hubicka@ucw.cz>
+ Alexandre Oliva <oliva@adacore.com>
+
+ * ipa-modref.c (modref_lattice::dump): Fix escape_point's min_flags
+ dumping.
+ (modref_lattice::merge_deref): Fix handling of indirect scape points.
+ (update_escape_summary_1): Likewise.
+ (update_escape_summary): Likewise.
+ (ipa_merge_modref_summary_after_inlining): Likewise.
+
+2021-08-11 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/101858
+ * fold-const.c (fold_binary_loc): Guard simplification
+ of X < (cast) (1 << Y) to integer types.
+
+2021-08-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/101861
+ * tree-vect-stmts.c (vectorizable_load): Fix error in
+ previous change with regard to gather vectorization.
+
+2021-08-11 prathamesh.kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR target/66791
+ * config/arm/arm_neon.h (vdup_n_s8): Replace call to builtin
+ with constructor.
+ (vdup_n_s16): Likewise.
+ (vdup_n_s32): Likewise.
+ (vdup_n_s64): Likewise.
+ (vdup_n_u8): Likewise.
+ (vdup_n_u16): Likewise.
+ (vdup_n_u32): Likewise.
+ (vdup_n_u64): Likewise.
+ (vdup_n_p8): Likewise.
+ (vdup_n_p16): Likewise.
+ (vdup_n_p64): Likewise.
+ (vdup_n_f16): Likewise.
+ (vdup_n_f32): Likewise.
+ (vdupq_n_s8): Likewise.
+ (vdupq_n_s16): Likewise.
+ (vdupq_n_s32): Likewise.
+ (vdupq_n_s64): Likewise.
+ (vdupq_n_u8): Likewise.
+ (vdupq_n_u16): Likewise.
+ (vdupq_n_u32): Likewise.
+ (vdupq_n_u64): Likewise.
+ (vdupq_n_p8): Likewise.
+ (vdupq_n_p16): Likewise.
+ (vdupq_n_p64): Likewise.
+ (vdupq_n_f16): Likewise.
+ (vdupq_n_f32): Likewise.
+ (vmov_n_s8): Replace call to builtin with call to corresponding
+ vdup_n intrinsic.
+ (vmov_n_s16): Likewise.
+ (vmov_n_s32): Likewise.
+ (vmov_n_s64): Likewise.
+ (vmov_n_u8): Likewise.
+ (vmov_n_u16): Likewise.
+ (vmov_n_u32): Likewise.
+ (vmov_n_u64): Likewise.
+ (vmov_n_p8): Likewise.
+ (vmov_n_p16): Likewise.
+ (vmov_n_f16): Likewise.
+ (vmov_n_f32): Likewise.
+ (vmovq_n_s8): Likewise.
+ (vmovq_n_s16): Likewise.
+ (vmovq_n_s32): Likewise.
+ (vmovq_n_s64): Likewise.
+ (vmovq_n_u8): Likewise.
+ (vmovq_n_u16): Likewise.
+ (vmovq_n_u32): Likewise.
+ (vmovq_n_u64): Likewise.
+ (vmovq_n_p8): Likewise.
+ (vmovq_n_p16): Likewise.
+ (vmovq_n_f16): Likewise.
+ (vmovq_n_f32): Likewise.
+ * config/arm/arm_neon_builtins.def: Remove entries for vdup_n.
+
+2021-08-11 liuhongt <hongtao.liu@intel.com>
+
+ PR target/98309
+ * config/i386/i386.md (ldexp<mode>3): Extend to vscalefs[sd]
+ when TARGET_AVX512F and TARGET_SSE_MATH.
+
+2021-08-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/80355
+ * config/i386/i386-expand.c (expand_vec_perm_even_odd): Return false
+ for V32HImode if !TARGET_AVX512BW.
+ (ix86_vectorize_vec_perm_const) <case E_V32HImode, case E_V64QImode>:
+ If !TARGET_AVX512BW and TARGET_AVX512F and d.testing_p, don't fail
+ early, but actually check the permutation.
+
+2021-08-10 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/101809
+ * tree-vect-stmts.c (get_load_store_type): Allow emulated
+ gathers with offset vector nunits being a constant multiple
+ of the data vector nunits.
+ (vect_get_gather_scatter_ops): Use the appropriate nunits
+ for the offset vector defs.
+ (vectorizable_store): Adjust call to
+ vect_get_gather_scatter_ops.
+ (vectorizable_load): Likewise. Handle the case of less
+ offset vectors than data vectors.
+
+2021-08-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/80355
+ * config/i386/sse.md (*avx512f_shuf_<shuffletype>64x2_1<mask_name>_1,
+ *avx512f_shuf_<shuffletype>32x4_1<mask_name>_1): New define_insn
+ patterns.
+
+2021-08-10 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/101801
+ PR tree-optimization/101819
+ * tree-vectorizer.h (vect_emulated_vector_p): Declare.
+ * tree-vect-loop.c (vect_emulated_vector_p): New function.
+ (vectorizable_reduction): Re-instantiate a check for emulated
+ operations.
+ * tree-vect-stmts.c (vectorizable_shift): Likewise.
+ (vectorizable_operation): Likewise. Cost emulated vector
+ operations according to the scalar sequence synthesized by
+ vector lowering.
+
+2021-08-10 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/101824
+ * tree-nested.c (get_frame_field): Mark the COMPONENT_REF as
+ volatile in case the variable was.
+
+2021-08-10 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/101804
+ * config/i386/constraints.md (BC): Document for integer SSE
+ constant all bits set operand.
+ (BF): New constraint for const floating-point all bits set
+ vectors.
+ * config/i386/i386.c (standard_sse_constant_p): Likewise.
+ (standard_sse_constant_opcode): Likewise.
+ * config/i386/sse.md (sseconstm1): New mode attribute.
+ (mov<mode>_internal): Replace BC with <sseconstm1>.
+
+2021-08-10 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/sse.md (cond_<insn><mode>): New expander.
+ (VI248_AVX512VLBW): New mode iterator.
+ * config/i386/predicates.md
+ (nonimmediate_or_const_vec_dup_operand): New predicate.
+
+2021-08-09 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/101741
+ * gimple-range-fold.cc (fold_using_range::range_of_builtin_call): Check
+ type of parameter for toupper/tolower.
+
+2021-08-09 Martin Jambor <mjambor@suse.cz>
+
+ PR testsuite/101654
+ * ipa-prop.c (propagate_controlled_uses): Removed a spurious space.
+
+2021-08-09 Pat Haugen <pthaugen@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (is_load_insn1): Verify destination is a
+ register.
+ (is_store_insn1): Verify source is a register.
+
+2021-08-09 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/101812
+ * config/i386/mmx.md (<any_logic:code>v2sf3):
+ Rename from *mmx_<any_logic:code>v2sf3
+
+2021-08-09 Thomas Schwinge <thomas@codesourcery.com>
+
+ * config/nvptx/nvptx.c: Cross-reference parts adapted in
+ 'gcc/omp-oacc-neuter-broadcast.cc'.
+ * omp-low.c: Likewise.
+ * omp-oacc-neuter-broadcast.cc: Cross-reference parts adapted from
+ the above files.
+
+2021-08-09 Julian Brown <julian@codesourcery.com>
+ Kwok Cheung Yeung <kcy@codesourcery.com>
+ Thomas Schwinge <thomas@codesourcery.com>
+
+ * config/gcn/gcn.c (gcn_init_builtins): Override decls for
+ BUILT_IN_GOACC_SINGLE_START, BUILT_IN_GOACC_SINGLE_COPY_START,
+ BUILT_IN_GOACC_SINGLE_COPY_END and BUILT_IN_GOACC_BARRIER.
+ (gcn_goacc_validate_dims): Turn on worker partitioning unconditionally.
+ (gcn_fork_join): Update comment.
+ * config/gcn/gcn.opt (flag_worker_partitioning): Remove.
+ (macc_experimental_workers): Remove unused option.
+
+2021-08-09 Julian Brown <julian@codesourcery.com>
+ Nathan Sidwell <nathan@codesourcery.com> (via 'gcc/config/nvptx/nvptx.c' master)
+ Kwok Cheung Yeung <kcy@codesourcery.com>
+ Thomas Schwinge <thomas@codesourcery.com>
+
+ * Makefile.in (OBJS): Add omp-oacc-neuter-broadcast.o.
+ * doc/tm.texi.in (TARGET_GOACC_CREATE_WORKER_BROADCAST_RECORD):
+ Add documentation hook.
+ * doc/tm.texi: Regenerate.
+ * omp-oacc-neuter-broadcast.cc: New file.
+ * omp-builtins.def (BUILT_IN_GOACC_BARRIER)
+ (BUILT_IN_GOACC_SINGLE_START, BUILT_IN_GOACC_SINGLE_COPY_START)
+ (BUILT_IN_GOACC_SINGLE_COPY_END): New builtins.
+ * passes.def (pass_omp_oacc_neuter_broadcast): Add pass.
+ * target.def (goacc.create_worker_broadcast_record): Add target
+ hook.
+ * tree-pass.h (make_pass_omp_oacc_neuter_broadcast): Add
+ prototype.
+ * config/gcn/gcn-protos.h (gcn_goacc_adjust_propagation_record):
+ Rename prototype to...
+ (gcn_goacc_create_worker_broadcast_record): ... this.
+ * config/gcn/gcn-tree.c (gcn_goacc_adjust_propagation_record): Rename
+ function to...
+ (gcn_goacc_create_worker_broadcast_record): ... this.
+ * config/gcn/gcn.c (TARGET_GOACC_ADJUST_PROPAGATION_RECORD):
+ Rename to...
+ (TARGET_GOACC_CREATE_WORKER_BROADCAST_RECORD): ... this.
+
+2021-08-09 Tejas Belagod <tejas.belagod@arm.com>
+
+ PR target/101609
+ * config/aarch64/aarch64-simd.md (vlshr<mode>3, vashr<mode>3): Use
+ the right iterator.
+
+2021-08-09 Thomas Schwinge <thomas@codesourcery.com>
+
+ * Makefile.in (GTFILES): Remove '$(srcdir)/omp-offload.c'.
+
+2021-08-09 Thomas Schwinge <thomas@codesourcery.com>
+
+ * builtins.def (DEF_GOACC_BUILTIN, DEF_GOMP_BUILTIN): Don't
+ consider '-foffload-abi'.
+ * common.opt (-foffload-abi): Remove 'Var', 'Init'.
+ * opts.c (common_handle_option) <-foffload-abi> [ACCEL_COMPILER]:
+ Ignore.
+
+2021-08-09 Thomas Schwinge <thomas@codesourcery.com>
+
+ * optc-gen.awk: Sanity check that 'Init' doesn't appear without
+ 'Var'.
+
+2021-08-09 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-builtins.def (BUILT_IN_ACC_GET_DEVICE_TYPE): Remove.
+
+2021-08-09 Thomas Schwinge <thomas@codesourcery.com>
+
+ * doc/gty.texi (Files): Update.
+
+2021-08-09 Thomas Schwinge <thomas@codesourcery.com>
+
+ * doc/gty.texi (Files): Fix GTY header file example.
+
+2021-08-09 Roger Sayle <roger@nextmovesoftware.com>
+
+ * tree-ssa-ccp.c (value_mask_to_min_max): Helper function to
+ determine the upper and lower bounds from a mask-value pair.
+ (bit_value_unop) [ABS_EXPR, ABSU_EXPR]: Add support for
+ absolute value and unsigned absolute value expressions.
+ (bit_value_binop): Initialize *VAL's precision.
+ [LT_EXPR, LE_EXPR]: Use value_mask_to_min_max to determine
+ upper and lower bounds of operands. Add LE_EXPR/GE_EXPR
+ support when the operands are unknown but potentially equal.
+ [MIN_EXPR, MAX_EXPR]: Support minimum/maximum expressions.
+
+2021-08-09 Bin Cheng <bin.cheng@linux.alibaba.com>
+
+ * config/aarch64/aarch64.md
+ (*extend<SHORT:mode><GPI:mode>2_aarch64): Use %<GPI:w>0.
+
+2021-08-08 Sergei Trofimovich <siarheit@google.com>
+
+ * lra-constraints.c: Fix s/otput/output/ typo.
+
2021-08-06 Martin Sebor <msebor@redhat.com>
* builtins.c (expand_builtin_memchr): Move to gimple-ssa-warn-access.cc.
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