Revert "[PATCH v2 1/3] RISC-V: movmem for RISCV with V extension"

[thirdparty/gcc.git] / gcc / config / riscv / riscv.md

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 696d911a7e952bd6b406c79e372f23ed018125d4..4d6de99255726dcf86e64a9e451171e83115a7e3 100644 (file)
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2608,29 +2608,6 @@
     FAIL;
 })
 
-;; Inlining general memmove is a pessimisation as we can't avoid having to
-;; decide which direction to go at runtime, which can be costly.  Until we
-;; can benchmark implementations on real V hardware implement a conservative
-;; approach of inlining cases which can be performed with a single vector
-;; load + store.  For tiny moves, fallback to scalar.
-(define_expand "movmem<mode>"
-  [(parallel [(set (match_operand:BLK 0 "general_operand")
-                  (match_operand:BLK 1 "general_operand"))
-             (use (match_operand:P 2 "const_int_operand"))
-             (use (match_operand:SI 3 "const_int_operand"))])]
-  "TARGET_VECTOR"
-{
-  if (CONST_INT_P (operands[2])
-      && INTVAL (operands[2]) >= TARGET_MIN_VLEN / 8
-      && INTVAL (operands[2]) <= TARGET_MIN_VLEN
-      && riscv_vector::expand_block_move (operands[0],
-                                         operands[1],
-                                         operands[2]))
-    DONE;
-  else
-    FAIL;
-})
-
 ;; Expand in-line code to clear the instruction cache between operand[0] and
 ;; operand[1].
 (define_expand "clear_cache"