* config/sh/tm-sh.h (BELIEVE_PCC_PROMOTION): Define, so that

[thirdparty/binutils-gdb.git] / gdb / config / m68k / tm-delta68.h

diff --git a/gdb/config/m68k/tm-delta68.h b/gdb/config/m68k/tm-delta68.h
index e7ec0fa6552f7f42e52f09315cebcd5663aa20e1..5965bb56f9c650bf4e0a30b24177d5825c670025 100644 (file)
--- a/gdb/config/m68k/tm-delta68.h
+++ b/gdb/config/m68k/tm-delta68.h
@@ -1,5 +1,5 @@
 /* Target definitions for delta68.
-   Copyright 1993 Free Software Foundation, Inc.
+   Copyright 1993, 1994, 1998 Free Software Foundation, Inc.
 
 This file is part of GDB.
 
@@ -15,15 +15,13 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License
 along with this program; if not, write to the Free Software
-Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 /* Define BPT_VECTOR if it is different than the default.
    This is the vector number used by traps to indicate a breakpoint. */
 
 #define BPT_VECTOR 0x1
 
-#undef CPLUS_MARKER
-#define CPLUS_MARKER   '%'
 #define GCC_COMPILED_FLAG_SYMBOL "gcc_compiled%"
 #define GCC2_COMPILED_FLAG_SYMBOL "gcc2_compiled%"
 
@@ -34,6 +32,72 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
 
 /* Not sure what happens if we try to store this register, but
    phdm@info.ucl.ac.be says we need this define.  */
+
 #define CANNOT_STORE_REGISTER(regno)   (regno == FPI_REGNUM)
 
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+/* When it returns a float/double value, use fp0 in sysV68.  */
+/* When it returns a pointer value, use a0 in sysV68.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF)                       \
+  if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)                               \
+    REGISTER_CONVERT_TO_VIRTUAL (FP0_REGNUM, TYPE,                     \
+                                &REGBUF[REGISTER_BYTE (FP0_REGNUM)],   \
+                                VALBUF);                               \
+  else                                                                 \
+    memcpy ((VALBUF),                                                  \
+           (char *) ((REGBUF) +                                        \
+                     (TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 :       \
+                      (TYPE_LENGTH(TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH(TYPE)))), \
+           TYPE_LENGTH(TYPE))
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  */
+
+/* When it returns a float/double value, use fp0 in sysV68.  */
+/* When it returns a pointer value, use a0 in sysV68.  */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)                               \
+      {                                                                        \
+       char raw_buf[REGISTER_RAW_SIZE (FP0_REGNUM)];                   \
+       REGISTER_CONVERT_TO_RAW (TYPE, FP0_REGNUM, VALBUF, raw_buf);    \
+       write_register_bytes (REGISTER_BYTE (FP0_REGNUM),               \
+                             raw_buf, REGISTER_RAW_SIZE (FP0_REGNUM)); \
+      }                                                                        \
+  else                                                                 \
+    write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 : 0), \
+                         VALBUF, TYPE_LENGTH (TYPE))
+
+/* Return number of args passed to a frame.
+   Can return -1, meaning no way to tell.  */
+
+#define FRAME_NUM_ARGS(val, fi)  \
+{ register CORE_ADDR pc = FRAME_SAVED_PC (fi);                 \
+  register int insn = 0177777 & read_memory_integer (pc, 2);   \
+  val = 0;                                                     \
+  if (insn == 0047757 || insn == 0157374)  /* lea W(sp),sp or addaw #W,sp */ \
+    val = read_memory_integer (pc + 2, 2);                     \
+  else if ((insn & 0170777) == 0050217 /* addql #N, sp */      \
+          || (insn & 0170777) == 0050117)  /* addqw */         \
+    { val = (insn >> 9) & 7; if (val == 0) val = 8; }          \
+  else if (insn == 0157774) /* addal #WW, sp */                        \
+    val = read_memory_integer (pc + 2, 4);                     \
+  val >>= 2; }
+
+/* On M68040 versions of sysV68 R3V7.1, ptrace(PT_WRITE_I) does not clear
+   the processor's instruction cache as it should.  */
+#define CLEAR_INSN_CACHE()     clear_insn_cache()
+
 #include "m68k/tm-m68k.h"
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#undef EXTRACT_STRUCT_VALUE_ADDRESS
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF)\
+       (*(CORE_ADDR *)((char*)(REGBUF) + 8 * 4))