sim: move -Werror disabling to Makefile

[thirdparty/binutils-gdb.git] / include / ChangeLog

diff --git a/include/ChangeLog b/include/ChangeLog
index 19dc8e3db6f12821d3fce306b262b6ccec8b053c..b6bf28aa7c6d62f798747aa8990d172c43216b74 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,34 @@
+2021-06-15  Nick Clifton  <nickc@redhat.com>
+
+       * elf/common.h (NT_GO_BUILDID): Define.
+
+2021-06-02  Shahab Vahedi  <shahab@synopsys.com>
+
+       * dis-asm.h (disassembler_options_arc): New prototype.
+
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * opcode/mips.h (cpu_is_member): Remove code for MIPSr6 ISA
+       exclusion.
+       (opcode_is_member): Handle ISA level exclusion.
+
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * opcode/mips.h (isa_is_member): New inline function, factored
+       out from...
+       (opcode_is_member): ... here.
+
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * opcode/mips.h: Document `g' and `y' operand codes.
+       (mips_reg_operand_type): Add OP_REG_CONTROL enumeration
+       constant.
+
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * opcode/mips.h: Complement change made to opcodes and remove
+       references to the `g' regular MIPS ISA operand code.
+
 2021-05-28  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR ld/27905