* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_SYS_TEXT_BASE 0x00800000
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
-/*
- * Commands configuration
- */
-#define CONFIG_CMD_PCI
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
/* SATA support */
#define CONFIG_SYS_SATA_MAX_DEVICE 2
-#define CONFIG_SATA_MV
-#define CONFIG_LIBATA
#define CONFIG_LBA48
-/* Additional FS support/configuration */
-#define CONFIG_SUPPORT_VFAT
-
/* PCIe support */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_PCI_MVEBU
/* SPL */
/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40004030
#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)