# define CONFIG_MACH_TYPE_COMPAT_REV 1
#endif
+#ifdef CONFIG_ARM64
+#define CONFIG_BUILD_TARGET "u-boot.itb"
+#endif
+
/* Serial & console */
#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
-#define CONFIG_SCSI
#endif
#define CONFIG_SETUP_MEMORY_TAGS
*/
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
-#define CONFIG_FAT_WRITE /* enable write access */
-
#define CONFIG_SPL_FRAMEWORK
#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */
#endif
#ifdef CONFIG_SUNXI_HIGH_SRAM
-#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
-#define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB */
+#define CONFIG_SPL_TEXT_BASE 0x10060 /* sram start+header */
+#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
+#ifdef CONFIG_ARM64
+/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
+#define LOW_LEVEL_SRAM_STACK 0x00054000
+#else
#define LOW_LEVEL_SRAM_STACK 0x00018000
+#endif /* !CONFIG_ARM64 */
#else
-#define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */
-#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */
+#define CONFIG_SPL_TEXT_BASE 0x60 /* sram start+header */
+#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
#endif
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#ifndef CONFIG_ARM64
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
-#endif
-
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
-#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#endif
+#endif
#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
#define CONFIG_SYS_I2C_SOFT
#ifdef CONFIG_SUNXI_EMAC
#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
-#define CONFIG_PHYLIB
#endif
-#ifdef CONFIG_SUNXI_GMAC
-#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
+#ifdef CONFIG_SUN7I_GMAC
#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
#define CONFIG_PHY_REALTEK
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_OHCI_SUNXI
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif
#ifdef CONFIG_USB_MUSB_SUNXI
#endif
#ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_USB_FUNCTION_MASS_STORAGE
#endif
-#ifdef CONFIG_USB_FUNCTION_FASTBOOT
-#define CONFIG_CMD_FASTBOOT
-#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
-#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
-#define CONFIG_ANDROID_BOOT_IMAGE
-
-#define CONFIG_FASTBOOT_FLASH
-
-#ifdef CONFIG_MMC
-#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
-#endif
-#endif
-
#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
#endif
#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_PREBOOT
-#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
#endif
#define CONFIG_MISC_INIT_R
#define CONSOLE_STDOUT_SETTINGS \
"stdout=serial,vga\0" \
"stderr=serial,vga\0"
+#elif CONFIG_DM_VIDEO
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONSOLE_STDOUT_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
#else
#define CONSOLE_STDOUT_SETTINGS \
"stdout=serial\0" \