Add support for ARM half-precision conversion instructions.

[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 32b9728bc354a928cb251702ec763449debba380..b64a8b6dd92c24d7b79422668339ba730bcfe258 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,33 @@
+2008-11-18  Catherine Moore  <clm@codesourcery.com>
+
+       * arm.h (FPU_NEON_FP16): New.
+       (FPU_ARCH_NEON_FP16): New.
+
+2008-11-06  Chao-ying Fu  <fu@mips.com>
+
+       * mips.h: Doucument '1' for 5-bit sync type.
+
+2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB.  Update
+       IA64_RS_CR.
+
+2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
+
+       * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
+
+2008-07-30  Michael J. Eager  <eager@eagercon.com>
+
+       * ppc.h (PPC_OPCODE_405): Define.
+       (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
+
+2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
+
+       * ppc.h (ppc_cpu_t): New typedef.
+       (struct powerpc_opcode <flags>): Use it.
+       (struct powerpc_operand <insert, extract>): Likewise.
+       (struct powerpc_macro <flags>): Likewise.
+
 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 
        * mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.