rename CFG_ macros to CONFIG_SYS

[people/ms/u-boot.git] / include / ppc4xx.h

diff --git a/include/ppc4xx.h b/include/ppc4xx.h
index 59a3b06b71cdc300f171c48802ac0cd66af2b690..ce4b29a1939fbb19c29a1909cc9046634e3bb23b 100644 (file)
--- a/include/ppc4xx.h
+++ b/include/ppc4xx.h
@@ -107,8 +107,8 @@
  * Enable long long (%ll ...) printf format on 440 PPC's since most of
  * them support 36bit physical addressing
  */
-#define CFG_64BIT_VSPRINTF
-#define CFG_64BIT_STRTOUL
+#define CONFIG_SYS_64BIT_VSPRINTF
+#define CONFIG_SYS_64BIT_STRTOUL
 #include <ppc440.h>
 #else
 #include <ppc405.h>
@@ -143,7 +143,7 @@
 #define _START_OFFSET          (EXC_OFF_SYS_RESET + 0x2000)
 
 #define RESET_VECTOR   0xfffffffc
-#define CACHELINE_MASK (CFG_CACHELINE_SIZE - 1) /* Address mask for cache
+#define CACHELINE_MASK (CONFIG_SYS_CACHELINE_SIZE - 1) /* Address mask for cache
                                                     line aligned data. */
 
 #define CPR0_DCR_BASE  0x0C
@@ -203,6 +203,19 @@ typedef struct
        unsigned long pllPlbDiv;
 } PPC4xx_SYS_INFO;
 
+static inline u32 get_mcsr(void)
+{
+       u32 val;
+
+       asm volatile("mfspr %0, 0x23c" : "=r" (val) :);
+       return val;
+}
+
+static inline void set_mcsr(u32 val)
+{
+       asm volatile("mtspr 0x23c, %0" : "=r" (val) :);
+}
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* __PPC4XX_H__ */