-# Copyright (C) 2003-2016 Free Software Foundation, Inc.
+# Copyright (C) 2003-2021 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
return
}
-global ldemul
if {[istarget mips*-*-irix6*]} {
set ldemul "-melf32bsmip"
} elseif {[istarget mips*el-*-linux*]} {
set ldemul ""
}
+# Check is ld supported 32bit emulations.
+proc check_ld_support_32bit { } {
+ global ld
+ global echo
+
+ set ld_output [remote_exec host $ld "-V"]
+ if [string match "*elf32*" $ld_output] then {
+ return 1
+ } else {
+ return 0
+ }
+}
+
+# Check args is 32bit abis.
+proc check_is_32bit_args {arg} {
+
+ if { [string match "*-32*" $arg]
+ || [string match "*-mabi=32*" $arg]
+ || [string match "*-mabi=o64*" $arg]
+ || [string match "*-mgp32*" $arg] } {
+ return 1
+ } else {
+ return 0
+ }
+}
+
# Assemble jr.s using each of the argument lists in ARGLIST. Return the
# list of object files on success and an empty list on failure.
proc assemble_for_flags {arglist} {
}
# Assemble a file using each set of arguments in ARGLIST. Check that
-# the objects can be linked together and that the readelf output
-# includes each flag named in FLAGS.
-proc good_combination {arglist flags} {
+# the objects can be linked together and that the `readelf -h' output
+# includes each flag named in FLAGS. Additional one or more arguments
+# request the addition of the `-A' option to `readelf' invocation. In
+# this case check MIPS ABI Flags reported for the ISA to match the
+# first of these arguments, the ISA Extension to match the second, and
+# the ASEs listed are exactly the same as those listed in the third,
+# passed as a TCL list.
+proc good_combination {arglist flags args} {
global ld ldemul READELF
set finalobj "tmpdir/mips-flags.o"
set testname "MIPS compatible objects: $arglist"
set objs [assemble_for_flags $arglist]
+ foreach argsl $arglist {
+ if { [check_is_32bit_args $argsl] && ![check_ld_support_32bit] } {
+ unsupported $testname
+ return 0
+ }
+ }
+
if {$objs == ""} {
- unresolved $testname
- } elseif {![ld_simple_link "$ld $ldemul" $finalobj "-r $objs"]} {
+ fail $testname
+ } elseif {![ld_link "$ld $ldemul" $finalobj "-r $objs"]} {
fail $testname
} else {
- catch "exec $READELF --headers $finalobj" output
- if {![regexp "Flags: *(\[^\n\]*)" $output full gotflags]} {
+ set A [expr {[llength $args] > 0} ? {"A"} : {""}]
+ set cmd "$READELF -h$A $finalobj"
+ send_log "$cmd\n"
+ set cmdret [remote_exec host [concat sh -c [list "$cmd 2>&1"]]]
+ set output [lindex $cmdret 1]
+ set cmdret [lindex $cmdret 0]
+ if {$cmdret != 0 \
+ || ![regexp "Flags: *(\[^\n\r\]*)" $output full gotflags]} {
unresolved $testname
} else {
set failed 0
foreach flag $flags {
if {[lsearch -exact $gotflags $flag] < 0} {
+ # The mips*-*-irix* not use o32 flags.
+ if {[istarget mips*-*-irix*] && $flag == "o32"} {
+ set failed 0
+ } else {
+ set failed 1
+ }
+ }
+ }
+
+ set isa [string trim [lindex $args 0]]
+ if {$isa != ""
+ && (![regexp "ISA: *(\[^\n\r\]*)" $output full gotisa]
+ || ![string match $isa $gotisa])} {
+ set failed 1
+ }
+
+ set ext [string trim [lindex $args 1]]
+ if {$ext != ""
+ && (![regexp "ISA Extension: *(\[^\n\r\]*)" \
+ $output full gotext]
+ || ![string match $ext $gotext])} {
+ set failed 1
+ }
+
+ set ases [string trim [lindex $args 2]]
+ if {[llength $ases] > 0} {
+ if {![regexp "ASEs:\[\n\r\]+((?:\t\[^\n\r\]*\[\n\r\]+)*)" \
+ $output full gotases]} {
set failed 1
+ } else {
+ # GOTASES is a list of strings separated by tab and
+ # line separator characters. Convert it to a TCL list.
+ regsub -all "\[\n\r\t\]+" $gotases "\n" gotases
+ set gotases [split [string trim $gotases] "\n"]
+
+ foreach ase $ases {
+ set aseidx [lsearch -exact $gotases $ase]
+ if {$aseidx >= 0} {
+ set gotases [lreplace $gotases $aseidx $aseidx]
+ } else {
+ set failed 1
+ }
+ }
+ if {[llength $gotases] > 0} {
+ set failed 1
+ }
}
}
+
if {$failed} {
fail $testname
} else {
set testname "MIPS incompatible objects: $arglist"
set objs [assemble_for_flags $arglist]
+ foreach argsl $arglist {
+ if { [check_is_32bit_args $argsl] && ![check_ld_support_32bit] } {
+ unsupported $testname
+ return 0
+ }
+ }
+
if {$objs == ""} {
- unresolved $testname
- } elseif {[ld_simple_link "$ld $ldemul" $finalobj "-r $objs"]
+ fail $testname
+ } elseif {[ld_link "$ld $ldemul" $finalobj "-r $objs"]
|| [string first $message $link_output] < 0} {
fail $testname
} else {
isa_conflict { "-march=vr4100 -32" "-march=r10000 -32" } 4100 8000
isa_conflict { "-march=r5900 -32" "-march=vr4111 -32" } 5900 4111
isa_conflict { "-march=loongson2e -32" "-march=loongson2f -32" } loongson_2e loongson_2f
-isa_conflict { "-march=loongson3a -32" "-march=loongson2f -32" } loongson_3a loongson_2f
+isa_conflict { "-march=gs464 -32" "-march=loongson2f -32" } gs464 loongson_2f
+
+isa_conflict { "-march=interaptiv-mr2 -32" \
+ "-march=r4010 -32" } interaptiv-mr2 4010
+isa_conflict { "-march=interaptiv-mr2 -mnan=2008 -mfp64 -32" \
+ "-mips32r6 -32" } interaptiv-mr2 isa32r6
+isa_conflict { "-march=interaptiv-mr2 -32" \
+ "-mips3 -32" } interaptiv-mr2 4000
+isa_conflict { "-march=interaptiv-mr2 -32" \
+ "-mips64r2 -32" } interaptiv-mr2 isa64r2
+isa_conflict { "-march=interaptiv-mr2 -32" \
+ "-march=octeon -32" } interaptiv-mr2 octeon
regsize_conflict { "-mips4 -mgp64 -mabi=o64" "-mips2 -32" }
regsize_conflict { "-mips4 -mabi=o64" "-mips4 -mabi=32" }
good_combination { "-mips32 -mabi=32" "-march=sb1 -mabi=32" } { sb1 o32 }
good_combination { "-mips64r2 -mabi=32" "-mips32 -mabi=32" } { mips64r2 o32 }
good_combination { "-mips5 -mabi=o64" "-mips64r2 -mabi=o64" } { mips64r2 o64 }
+
+good_combination { "-march=interaptiv-mr2 -32" "-mips1 -32" } \
+ { mips32r2 interaptiv-mr2 } \
+ MIPS32r3 "Imagination interAptiv MR2" \
+ { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r2 -32" } \
+ { mips32r2 interaptiv-mr2 } \
+ MIPS32r3 "Imagination interAptiv MR2" \
+ { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-march=interaptiv -32" } \
+ { mips32r2 interaptiv-mr2 } \
+ MIPS32r3 "Imagination interAptiv MR2" \
+ { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -32" } \
+ { mips32r2 interaptiv-mr2 } \
+ MIPS32r3 "Imagination interAptiv MR2" \
+ { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -mips16 -32" } \
+ { mips32r2 interaptiv-mr2 } \
+ MIPS32r3 "Imagination interAptiv MR2" \
+ { "DSP ASE" "Enhanced VA Scheme" "MT ASE" "MIPS16 ASE" }
+good_combination { "-march=interaptiv-mr2 -mips16 -32" "-mips32r3 -32" } \
+ { mips32r2 interaptiv-mr2 } \
+ MIPS32r3 "Imagination interAptiv MR2" \
+ { "DSP ASE" "Enhanced VA Scheme" "MT ASE" \
+ "MIPS16 ASE" "MIPS16e2 ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r5 -32" } \
+ { mips32r2 interaptiv-mr2 } \
+ MIPS32r5 "Imagination interAptiv MR2" \
+ { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-march=m5100 -32" } \
+ { mips32r2 interaptiv-mr2 } \
+ MIPS32r5 "Imagination interAptiv MR2" \
+ { "DSP ASE" "Enhanced VA Scheme" \
+ "MCU (MicroController) ASE" "MT ASE" }
+
+good_combination { "-march=gs464 -32" "-march=gs464e -32" } \
+ { gs464e o32 } \
+ MIPS64r2 "None" \
+ { "Loongson MMI ASE" "Loongson CAM ASE" "Loongson EXT ASE" "Loongson EXT2 ASE" }
+good_combination { "-march=gs264e -32" "-march=gs464e -32" } \
+ { gs264e o32 } \
+ MIPS64r2 "None" \
+ { "Loongson MMI ASE" "Loongson CAM ASE" "Loongson EXT ASE" "Loongson EXT2 ASE" }