Remove bfd_stdint.h

[thirdparty/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 0e2e94c111c7d11c80c555b97952900f4ea8ff32..ae4dea918cb7ffffa47bc9fe4c86a84927eed1a1 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,108 @@
+2021-03-31  Alan Modra  <amodra@gmail.com>
+
+       * aarch64-dis.c: Include stdint.h in place of bfd_stdint.h.
+       * aarch64-dis.h: Likewise.
+       * aarch64-opc.c: Likewise.
+       * avr-dis.c: Likewise.
+       * csky-dis.c: Likewise.
+       * nds32-asm.c: Likewise.
+       * nds32-dis.c: Likewise.
+       * nfp-dis.c: Likewise.
+       * riscv-dis.c: Likewise.
+       * s12z-dis.c: Likewise.
+       * wasm32-dis.c: Likewise.
+
+2021-03-30  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.c (cs, ds, ss, es, fs, gs): Delete.
+       (i386_seg_prefixes): New.
+       * i386-opc.h (cs, ds, ss, es, fs, gs): Delete.
+       (i386_seg_prefixes): Declare.
+
+2021-03-30  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Delete.
+
+2021-03-30  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Adjust values.
+       * i386-reg.tbl (st): Move down.
+       (st(0)): Delete. Extend comment.
+       * i386-tbl.h: Re-generate.
+
+2021-03-29  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (movq, movabs): Move next to mov counterparts.
+       (cmpsd): Move next to cmps.
+       (movsd): Move next to movs.
+       (cmpxchg16b): Move to separate section.
+       (fisttp, fisttpll): Likewise.
+       (monitor, mwait): Likewise.
+       * i386-tbl.h: Re-generate.
+
+2021-03-29  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (psadbw): Add <sse2:comm>.
+       (vpsadbw): Add C.
+       * i386-tbl.h: Re-generate.
+
+2021-03-29  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (mmx, sse, sse2, sse3, ssse3, sse41, sse42, aes,
+       pclmul, gfni): New templates. Use them wherever possible. Move
+       SSE4.1 pextrw into respective section.
+       * i386-tbl.h: Re-generate.
+
+2021-03-29  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-gen.c (output_i386_opcode): Widen type of "opcode". Use
+       strtoull(). Bump upper loop bound. Widen masks. Sanity check
+       "length".
+       * i386-opc.tbl (Prefix_0X66, Prefix_0XF2, Prefix_0XF3): Delete.
+       Convert all of their uses to representation in opcode.
+
+2021-03-29  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.h (struct insn_template): Shrink base_opcode to 16
+       bits. Shrink extension_opcode to 9 bits. Make it signed. Change
+       value of None. Shrink operands to 3 bits.
+
+2021-03-29  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-gen.c (process_i386_opcode_modifier): New parameter
+       "space". 
+       (output_i386_opcode): New local variable "space". Adjust
+       process_i386_opcode_modifier() invocation.
+       (process_i386_opcodes): Adjust process_i386_opcode_modifier()
+       invocation.
+       * i386-tbl.h: Re-generate.
+
+2021-03-29  Alan Modra  <amodra@gmail.com>
+
+       * aarch64-opc.c (vector_qualifier_p): Simplify boolean expression.
+       (fp_qualifier_p, get_data_pattern): Likewise.
+       (aarch64_get_operand_modifier_from_value): Likewise.
+       (aarch64_extend_operator_p, aarch64_shift_operator_p): Likewise.
+       (operand_variant_qualifier_p): Likewise.
+       (qualifier_value_in_range_constraint_p): Likewise.
+       (aarch64_get_qualifier_esize): Likewise.
+       (aarch64_get_qualifier_nelem): Likewise.
+       (aarch64_get_qualifier_standard_value): Likewise.
+       (get_lower_bound, get_upper_bound): Likewise.
+       (aarch64_find_best_match, match_operands_qualifier): Likewise.
+       (aarch64_print_operand): Likewise.
+       * aarch64-opc.h (operand_has_inserter, operand_has_extractor): Likewise.
+       (operand_need_sign_extension, operand_need_shift_by_two): Likewise.
+       (operand_need_shift_by_four, operand_maybe_stack_pointer): Likewise.
+       * arm-dis.c (print_insn_mve, print_insn_thumb32): Likewise.
+       * tic6x-dis.c (tic6x_check_fetch_packet_header): Likewise.
+       (print_insn_tic6x): Likewise.
+
+2021-03-29  Alan Modra  <amodra@gmail.com>
+
+       * arc-dis.c (extract_operand_value): Correct NULL cast.
+       * frv-opc.h: Regenerate.
+
 2021-03-26  Jan Beulich  <jbeulich@suse.com>
 
        * i386-opc.tbl (movq): Add CpuSSE2 to SSE2 form. Add CpuMMX to