Add support for Score target.

[thirdparty/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 2bf851f8ef1c7b80abdcddcb51054541dd7d9fd4..b48077def72af25811e4b1f5dbdc89f32f1d582d 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,123 @@
+2006-09-17  Mei Ligang  <ligang@sunnorth.com.cn>
+
+       * score-dis.c: New file.
+       * score-opc.h: New file.
+       * Makefile.am: Add Score files.
+       * Makefile.in: Regenerate.
+       * configure.in: Add support for Score target.
+       * configure: Regenerate.
+       * disassemble.c: Add support for Score target.
+
+2006-09-16  Nick Clifton  <nickc@redhat.com>
+           Pedro Alves  <pedro_alves@portugalmail.pt>
+
+       * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
+       macros defined in bfd.h.
+       * cris-dis.c: Likewise.
+       * h8300-dis.c: Likewise.
+       * i386-dis.c: Likewise.
+       * ia64-gen.c: Likewise.
+       * mips-dis: Likewise.
+
+2006-09-04  Paul Brook  <paul@codesourcery.com>
+
+       * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
+
+2006-08-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (three_byte_table): Expand to 256 elements.
+
+2006-08-04  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
+
+       * i386-dis.c (MXC,EMC): Define.
+       (OP_MXC): New function to handle cvt* (convert instructions) between
+       %xmm and %mm register correctly.
+       (OP_EMC): ditto.        
+       (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi 
+       instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately 
+       with EMC/MXC.
+
+2006-07-29  Richard Sandiford  <richard@codesourcery.com>
+
+       * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
+       "fdaddl" entry.
+
+2006-07-19  Paul Brook  <paul@codesourcery.com>
+
+       * armd-dis.c (arm_opcodes): Fix rbit opcode.
+
+2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
+       "sldt", "str" and "smsw".
+
+2006-07-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/2829
+       * i386-dis.c (GRP11_C6): NEW.
+       (GRP11_C7): Likewise.
+       (GRP12): Updated.
+       (GRP13): Likewise.
+       (GRP14): Likewise.
+       (GRP15): Likewise.
+       (GRP16): Likewise.
+       (GRPAMD): Likewise.
+       (GRPPADLCK1): Likewise.
+       (GRPPADLCK2): Likewise.
+       (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
+       respectively.
+       (grps): Add entries for GRP11_C6 and GRP11_C7.
+
+2006-07-10 Dwarakanath Rajagopal       <dwarak.rajagopal@amd.com>
+          Michael Meissner             <michael.meissner@amd.com>
+
+       * i386-dis.c (dis386): Add support for 4 operand instructions. Add
+       support for amdfam10 SSE4a/ABM instructions. Modify all
+       initializer macros to have additional arguments. Disallow REP
+       prefix for non-string instructions.
+       (print_insn): Ditto.
+
+
+2006-07-05  Julian Brown  <julian@codesourcery.com>
+
+       * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
+
+2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
+       (twobyte_has_modrm): Set 1 for 0x1f.
+
+2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (NOP_Fixup): Removed.
+       (NOP_Fixup1): New.
+       (NOP_Fixup2): Likewise.
+       (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
+
+2006-06-12  Julian Brown  <julian@codesourcery.com>
+
+       * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
+       on 64-bit hosts.
+
+2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386.c (GRP10): Renamed to ...
+       (GRP12): This.
+       (GRP11): Renamed to ...
+       (GRP13): This.
+       (GRP12): Renamed to ...
+       (GRP14): This.
+       (GRP13): Renamed to ...
+       (GRP15): This.
+       (GRP14): Renamed to ...
+       (GRP16): This.
+       (dis386_twobyte): Updated.
+       (grps): Likewise.
+
+2006-06-09  Nick Clifton  <nickc@redhat.com>
+
+       * po/fi.po: Updated Finnish translation.
+
 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 
        * po/Make-in (pdf, ps): New dummy targets.