/* Print i386 instructions for GDB, the GNU debugger.
- Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ Copyright (C) 1988-2021 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
static void OP_C (int, int);
static void OP_D (int, int);
static void OP_T (int, int);
-static void OP_R (int, int);
static void OP_MMX (int, int);
static void OP_XMM (int, int);
static void OP_EM (int, int);
#define Gm { OP_G, m_mode }
#define Gva { OP_G, va_mode }
#define Gw { OP_G, w_mode }
-#define Rd { OP_R, d_mode }
-#define Rdq { OP_R, dq_mode }
-#define Rm { OP_R, m_mode }
#define Ib { OP_I, b_mode }
#define sIb { OP_sI, b_mode } /* sign extened byte */
#define sIbT { OP_sI, b_T_mode } /* sign extened byte like 'T' */
#define MaskG { OP_G, mask_mode }
#define MaskE { OP_E, mask_mode }
#define MaskBDE { OP_E, mask_bd_mode }
-#define MaskR { OP_R, mask_mode }
#define MaskVex { OP_VEX, mask_mode }
#define MVexVSIBDWpX { OP_M, vex_vsib_d_w_dq_mode }
REG_0F18,
REG_0F1C_P_0_MOD_0,
REG_0F1E_P_1_MOD_3,
+ REG_0F38D8_PREFIX_1,
+ REG_0F3A0F_PREFIX_1_MOD_3,
REG_0F71,
REG_0F72,
REG_0F73,
MOD_0F1B_PREFIX_1,
MOD_0F1C_PREFIX_0,
MOD_0F1E_PREFIX_1,
- MOD_0F24,
- MOD_0F26,
MOD_0F2B_PREFIX_0,
MOD_0F2B_PREFIX_1,
MOD_0F2B_PREFIX_2,
MOD_0FE7_PREFIX_2,
MOD_0FF0_PREFIX_3,
MOD_0F382A,
- MOD_VEX_0F3849_X86_64_P_0_W_0,
- MOD_VEX_0F3849_X86_64_P_2_W_0,
- MOD_VEX_0F3849_X86_64_P_3_W_0,
- MOD_VEX_0F384B_X86_64_P_1_W_0,
- MOD_VEX_0F384B_X86_64_P_2_W_0,
- MOD_VEX_0F384B_X86_64_P_3_W_0,
- MOD_VEX_0F385C_X86_64_P_1_W_0,
- MOD_VEX_0F385E_X86_64_P_0_W_0,
- MOD_VEX_0F385E_X86_64_P_1_W_0,
- MOD_VEX_0F385E_X86_64_P_2_W_0,
- MOD_VEX_0F385E_X86_64_P_3_W_0,
+ MOD_0F38DC_PREFIX_1,
+ MOD_0F38DD_PREFIX_1,
+ MOD_0F38DE_PREFIX_1,
+ MOD_0F38DF_PREFIX_1,
MOD_0F38F5,
MOD_0F38F6_PREFIX_0,
MOD_0F38F8_PREFIX_1,
MOD_0F38F8_PREFIX_2,
MOD_0F38F8_PREFIX_3,
- MOD_0F38F9_PREFIX_0,
+ MOD_0F38F9,
+ MOD_0F38FA_PREFIX_1,
+ MOD_0F38FB_PREFIX_1,
+ MOD_0F3A0F_PREFIX_1,
MOD_62_32BIT,
MOD_C4_32BIT,
MOD_C5_32BIT,
MOD_VEX_0F382D,
MOD_VEX_0F382E,
MOD_VEX_0F382F,
+ MOD_VEX_0F3849_X86_64_P_0_W_0,
+ MOD_VEX_0F3849_X86_64_P_2_W_0,
+ MOD_VEX_0F3849_X86_64_P_3_W_0,
+ MOD_VEX_0F384B_X86_64_P_1_W_0,
+ MOD_VEX_0F384B_X86_64_P_2_W_0,
+ MOD_VEX_0F384B_X86_64_P_3_W_0,
MOD_VEX_0F385A,
+ MOD_VEX_0F385C_X86_64_P_1_W_0,
+ MOD_VEX_0F385E_X86_64_P_0_W_0,
+ MOD_VEX_0F385E_X86_64_P_1_W_0,
+ MOD_VEX_0F385E_X86_64_P_2_W_0,
+ MOD_VEX_0F385E_X86_64_P_3_W_0,
MOD_VEX_0F388C,
MOD_VEX_0F388E,
MOD_VEX_0F3A30_L_0,
MOD_EVEX_0F381A_W_1,
MOD_EVEX_0F381B_W_0,
MOD_EVEX_0F381B_W_1,
+ MOD_EVEX_0F3828_P_1,
+ MOD_EVEX_0F382A_P_1_W_1,
+ MOD_EVEX_0F3838_P_1,
+ MOD_EVEX_0F383A_P_1_W_0,
MOD_EVEX_0F385A_W_0,
MOD_EVEX_0F385A_W_1,
MOD_EVEX_0F385B_W_0,
MOD_EVEX_0F385B_W_1,
+ MOD_EVEX_0F387A_W_0,
+ MOD_EVEX_0F387B_W_0,
+ MOD_EVEX_0F387C,
MOD_EVEX_0F38C6_REG_1,
MOD_EVEX_0F38C6_REG_2,
MOD_EVEX_0F38C6_REG_5,
RM_0F01_REG_5_MOD_3,
RM_0F01_REG_7_MOD_3,
RM_0F1E_P_1_MOD_3_REG_7,
+ RM_0F3A0F_P_1_MOD_3_REG_0,
RM_0FAE_REG_6_MOD_3_P_0,
RM_0FAE_REG_7_MOD_3,
RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0
enum
{
PREFIX_90 = 0,
+ PREFIX_0F01_REG_1_RM_4,
+ PREFIX_0F01_REG_1_RM_5,
+ PREFIX_0F01_REG_1_RM_6,
+ PREFIX_0F01_REG_1_RM_7,
PREFIX_0F01_REG_3_RM_1,
PREFIX_0F01_REG_5_MOD_0,
PREFIX_0F01_REG_5_MOD_3_RM_0,
PREFIX_0F01_REG_5_MOD_3_RM_1,
PREFIX_0F01_REG_5_MOD_3_RM_2,
+ PREFIX_0F01_REG_5_MOD_3_RM_4,
+ PREFIX_0F01_REG_5_MOD_3_RM_5,
+ PREFIX_0F01_REG_5_MOD_3_RM_6,
+ PREFIX_0F01_REG_5_MOD_3_RM_7,
PREFIX_0F01_REG_7_MOD_3_RM_2,
- PREFIX_0F01_REG_7_MOD_3_RM_3,
+ PREFIX_0F01_REG_7_MOD_3_RM_6,
+ PREFIX_0F01_REG_7_MOD_3_RM_7,
PREFIX_0F09,
PREFIX_0F10,
PREFIX_0F11,
PREFIX_0FAE_REG_3_MOD_3,
PREFIX_0FAE_REG_4_MOD_0,
PREFIX_0FAE_REG_4_MOD_3,
- PREFIX_0FAE_REG_5_MOD_0,
PREFIX_0FAE_REG_5_MOD_3,
PREFIX_0FAE_REG_6_MOD_0,
PREFIX_0FAE_REG_6_MOD_3,
PREFIX_0FBC,
PREFIX_0FBD,
PREFIX_0FC2,
- PREFIX_0FC3_MOD_0,
PREFIX_0FC7_REG_6_MOD_0,
PREFIX_0FC7_REG_6_MOD_3,
PREFIX_0FC7_REG_7_MOD_3,
PREFIX_0FE7,
PREFIX_0FF0,
PREFIX_0FF7,
- PREFIX_0F38C8,
- PREFIX_0F38C9,
- PREFIX_0F38CA,
- PREFIX_0F38CB,
- PREFIX_0F38CC,
- PREFIX_0F38CD,
+ PREFIX_0F38D8,
+ PREFIX_0F38DC,
+ PREFIX_0F38DD,
+ PREFIX_0F38DE,
+ PREFIX_0F38DF,
PREFIX_0F38F0,
PREFIX_0F38F1,
PREFIX_0F38F6,
PREFIX_0F38F8,
- PREFIX_0F38F9,
- PREFIX_0F3ACC,
+ PREFIX_0F38FA,
+ PREFIX_0F38FB,
+ PREFIX_0F3A0F,
PREFIX_VEX_0F10,
PREFIX_VEX_0F11,
PREFIX_VEX_0F12,
PREFIX_VEX_0F5F,
PREFIX_VEX_0F6F,
PREFIX_VEX_0F70,
- PREFIX_VEX_0F77,
PREFIX_VEX_0F7C,
PREFIX_VEX_0F7D,
PREFIX_VEX_0F7E,
PREFIX_VEX_0F384B_X86_64,
PREFIX_VEX_0F385C_X86_64,
PREFIX_VEX_0F385E_X86_64,
- PREFIX_VEX_0F38F2,
- PREFIX_VEX_0F38F3_REG_1,
- PREFIX_VEX_0F38F3_REG_2,
- PREFIX_VEX_0F38F3_REG_3,
PREFIX_VEX_0F38F5,
PREFIX_VEX_0F38F6,
PREFIX_VEX_0F38F7,
X86_64_EA,
X86_64_0F01_REG_0,
X86_64_0F01_REG_1,
+ X86_64_0F01_REG_1_RM_5_PREFIX_2,
+ X86_64_0F01_REG_1_RM_6_PREFIX_2,
+ X86_64_0F01_REG_1_RM_7_PREFIX_2,
X86_64_0F01_REG_2,
X86_64_0F01_REG_3,
+ X86_64_0F24,
+ X86_64_0F26,
X86_64_VEX_0F3849,
X86_64_VEX_0F384B,
X86_64_VEX_0F385C,
- X86_64_VEX_0F385E
+ X86_64_VEX_0F385E,
+ X86_64_0F01_REG_5_MOD_3_RM_4_PREFIX_1,
+ X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1,
+ X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1,
+ X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1,
+ X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1,
+ X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_3,
+ X86_64_0F01_REG_7_MOD_3_RM_7_PREFIX_1,
+ X86_64_0FC7_REG_6_MOD_3_PREFIX_1
};
enum
VEX_LEN_0F4B_P_0,
VEX_LEN_0F4B_P_2,
VEX_LEN_0F6E,
- VEX_LEN_0F77_P_0,
+ VEX_LEN_0F77,
VEX_LEN_0F7E_P_1,
VEX_LEN_0F7E_P_2,
VEX_LEN_0F90_P_0,
VEX_LEN_0F385E_X86_64_P_2_W_0_M_0,
VEX_LEN_0F385E_X86_64_P_3_W_0_M_0,
VEX_LEN_0F38DB,
- VEX_LEN_0F38F2_P_0,
- VEX_LEN_0F38F3_R_1_P_0,
- VEX_LEN_0F38F3_R_2_P_0,
- VEX_LEN_0F38F3_R_3_P_0,
+ VEX_LEN_0F38F2,
+ VEX_LEN_0F38F3_R_1,
+ VEX_LEN_0F38F3_R_2,
+ VEX_LEN_0F38F3_R_3,
VEX_LEN_0F38F5_P_0,
VEX_LEN_0F38F5_P_1,
VEX_LEN_0F38F5_P_3,
VEX_W_0F384B_X86_64_P_1,
VEX_W_0F384B_X86_64_P_2,
VEX_W_0F384B_X86_64_P_3,
+ VEX_W_0F3850,
+ VEX_W_0F3851,
+ VEX_W_0F3852,
+ VEX_W_0F3853,
VEX_W_0F3858,
VEX_W_0F3859,
VEX_W_0F385A_M_0_L_0,
'I' unused.
'J' unused.
'K' => print 'd' or 'q' if rex prefix is present.
- 'L' => print 'l' if suffix_always is true
+ 'L' unused.
'M' => print 'r' if intel_mnemonic is false.
'N' => print 'n' if instruction has no wait "prefix"
'O' => print 'd' or 'o' (or 'q' in Intel mode)
- 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
- or suffix_always is true. print 'q' if rex prefix is present.
+ 'P' => behave as 'T' except with register operand outside of suffix_always
+ mode
'Q' => print 'w', 'l' or 'q' for memory operand or suffix_always
is true
'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
'S' => print 'w', 'l' or 'q' if suffix_always is true
- 'T' => print 'q' in 64bit mode if instruction has no operand size
- prefix and behave as 'P' otherwise
- 'U' => print 'q' in 64bit mode if instruction has no operand size
- prefix and behave as 'Q' otherwise
- 'V' => print 'q' in 64bit mode if instruction has no operand size
- prefix and behave as 'S' otherwise
+ 'T' => print 'w', 'l'/'d', or 'q' if instruction has an operand size
+ prefix or if suffix_always is true.
+ 'U' unused.
+ 'V' unused.
'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
'X' => print 's', 'd' depending on data16 prefix (for XMM)
'Y' unused.
- 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
+ 'Z' => print 'q' in 64bit mode and 'l' otherwise, if suffix_always is true.
'!' => change condition from true to false or from false to true.
'%' => add 1 upper case letter to the macro.
'^' => print 'w', 'l', or 'q' (Intel64 ISA only) depending on operand size
prefix or suffix_always is true (lcall/ljmp).
- '@' => print 'q' for Intel64 ISA, 'w' or 'q' for AMD64 ISA depending
- on operand size prefix.
- '&' => print 'q' in 64bit mode for Intel64 ISA or if instruction
- has no operand size prefix for AMD64 ISA, behave as 'P'
- otherwise
+ '@' => in 64bit mode for Intel64 ISA or if instruction
+ has no operand sizing prefix, print 'q' if suffix_always is true or
+ nothing otherwise; behave as 'P' in all other cases
2 upper case letter macros:
"XY" => print 'x' or 'y' if suffix_always is true or no register
"XZ" => print 'x', 'y', or 'z' if suffix_always is true or no
register operands and no broadcast.
"XW" => print 's', 'd' depending on the VEX.W bit (for FMA)
+ "XV" => print "{vex3}" pseudo prefix
"LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
being false, or no operand at all in 64bit mode, or if suffix_always
is true.
{ "dec{S|}", { RMeSI }, 0 },
{ "dec{S|}", { RMeDI }, 0 },
/* 50 */
- { "pushV", { RMrAX }, 0 },
- { "pushV", { RMrCX }, 0 },
- { "pushV", { RMrDX }, 0 },
- { "pushV", { RMrBX }, 0 },
- { "pushV", { RMrSP }, 0 },
- { "pushV", { RMrBP }, 0 },
- { "pushV", { RMrSI }, 0 },
- { "pushV", { RMrDI }, 0 },
+ { "push{!P|}", { RMrAX }, 0 },
+ { "push{!P|}", { RMrCX }, 0 },
+ { "push{!P|}", { RMrDX }, 0 },
+ { "push{!P|}", { RMrBX }, 0 },
+ { "push{!P|}", { RMrSP }, 0 },
+ { "push{!P|}", { RMrBP }, 0 },
+ { "push{!P|}", { RMrSI }, 0 },
+ { "push{!P|}", { RMrDI }, 0 },
/* 58 */
- { "popV", { RMrAX }, 0 },
- { "popV", { RMrCX }, 0 },
- { "popV", { RMrDX }, 0 },
- { "popV", { RMrBX }, 0 },
- { "popV", { RMrSP }, 0 },
- { "popV", { RMrBP }, 0 },
- { "popV", { RMrSI }, 0 },
- { "popV", { RMrDI }, 0 },
+ { "pop{!P|}", { RMrAX }, 0 },
+ { "pop{!P|}", { RMrCX }, 0 },
+ { "pop{!P|}", { RMrDX }, 0 },
+ { "pop{!P|}", { RMrBX }, 0 },
+ { "pop{!P|}", { RMrSP }, 0 },
+ { "pop{!P|}", { RMrBP }, 0 },
+ { "pop{!P|}", { RMrSI }, 0 },
+ { "pop{!P|}", { RMrDI }, 0 },
/* 60 */
{ X86_64_TABLE (X86_64_60) },
{ X86_64_TABLE (X86_64_61) },
{ Bad_Opcode }, /* op size prefix */
{ Bad_Opcode }, /* adr size prefix */
/* 68 */
- { "pushT", { sIv }, 0 },
+ { "pushP", { sIv }, 0 },
{ "imulS", { Gv, Ev, Iv }, 0 },
- { "pushT", { sIbT }, 0 },
+ { "pushP", { sIbT }, 0 },
{ "imulS", { Gv, Ev, sIb }, 0 },
{ "ins{b|}", { Ybr, indirDX }, 0 },
{ X86_64_TABLE (X86_64_6D) },
{ "cR{t|}O", { XX }, 0 },
{ X86_64_TABLE (X86_64_9A) },
{ Bad_Opcode }, /* fwait */
- { "pushfT", { XX }, 0 },
- { "popfT", { XX }, 0 },
+ { "pushfP", { XX }, 0 },
+ { "popfP", { XX }, 0 },
{ "sahf", { XX }, 0 },
{ "lahf", { XX }, 0 },
/* a0 */
{ REG_TABLE (REG_C6) },
{ REG_TABLE (REG_C7) },
/* c8 */
- { "enterT", { Iw, Ib }, 0 },
- { "leaveT", { XX }, 0 },
- { "{l|}ret{|f}P", { Iw }, 0 },
- { "{l|}ret{|f}P", { XX }, 0 },
+ { "enterP", { Iw, Ib }, 0 },
+ { "leaveP", { XX }, 0 },
+ { "{l|}ret{|f}%LP", { Iw }, 0 },
+ { "{l|}ret{|f}%LP", { XX }, 0 },
{ "int3", { XX }, 0 },
{ "int", { Ib }, 0 },
{ X86_64_TABLE (X86_64_CE) },
{ PREFIX_TABLE (PREFIX_0F1E) },
{ "nopQ", { Ev }, 0 },
/* 20 */
- { "movZ", { Rm, Cm }, 0 },
- { "movZ", { Rm, Dm }, 0 },
- { "movZ", { Cm, Rm }, 0 },
- { "movZ", { Dm, Rm }, 0 },
- { MOD_TABLE (MOD_0F24) },
+ { "movZ", { Em, Cm }, 0 },
+ { "movZ", { Em, Dm }, 0 },
+ { "movZ", { Cm, Em }, 0 },
+ { "movZ", { Dm, Em }, 0 },
+ { X86_64_TABLE (X86_64_0F24) },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F26) },
+ { X86_64_TABLE (X86_64_0F26) },
{ Bad_Opcode },
/* 28 */
{ "movapX", { XM, EXx }, PREFIX_OPCODE },
{ "setle", { Eb }, 0 },
{ "setg", { Eb }, 0 },
/* a0 */
- { "pushT", { fs }, 0 },
- { "popT", { fs }, 0 },
+ { "pushP", { fs }, 0 },
+ { "popP", { fs }, 0 },
{ "cpuid", { XX }, 0 },
{ "btS", { Ev, Gv }, 0 },
{ "shldS", { Ev, Gv, Ib }, 0 },
{ REG_TABLE (REG_0FA6) },
{ REG_TABLE (REG_0FA7) },
/* a8 */
- { "pushT", { gs }, 0 },
- { "popT", { gs }, 0 },
+ { "pushP", { gs }, 0 },
+ { "popP", { gs }, 0 },
{ "rsm", { XX }, 0 },
{ "btsS", { Evh1, Gv }, 0 },
{ "shrdS", { Ev, Gv, Ib }, 0 },
},
/* REG_8F */
{
- { "popU", { stackEv }, 0 },
+ { "pop{P|}", { stackEv }, 0 },
{ XOP_8F_TABLE (XOP_09) },
{ Bad_Opcode },
{ Bad_Opcode },
{
{ "incQ", { Evh1 }, 0 },
{ "decQ", { Evh1 }, 0 },
- { "call{&|}", { NOTRACK, indirEv, BND }, 0 },
+ { "call{@|}", { NOTRACK, indirEv, BND }, 0 },
{ MOD_TABLE (MOD_FF_REG_3) },
- { "jmp{&|}", { NOTRACK, indirEv, BND }, 0 },
+ { "jmp{@|}", { NOTRACK, indirEv, BND }, 0 },
{ MOD_TABLE (MOD_FF_REG_5) },
- { "pushU", { stackEv }, 0 },
+ { "push{P|}", { stackEv }, 0 },
{ Bad_Opcode },
},
/* REG_0F00 */
/* REG_0F1E_P_1_MOD_3 */
{
{ "nopQ", { Ev }, 0 },
- { "rdsspK", { Rdq }, PREFIX_OPCODE },
+ { "rdsspK", { Edq }, PREFIX_OPCODE },
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
{ RM_TABLE (RM_0F1E_P_1_MOD_3_REG_7) },
},
+ /* REG_0F38D8_PREFIX_1 */
+ {
+ { "aesencwide128kl", { M }, 0 },
+ { "aesdecwide128kl", { M }, 0 },
+ { "aesencwide256kl", { M }, 0 },
+ { "aesdecwide256kl", { M }, 0 },
+ },
+ /* REG_0F3A0F_PREFIX_1_MOD_3 */
+ {
+ { RM_TABLE (RM_0F3A0F_P_1_MOD_3_REG_0) },
+ },
/* REG_0F71 */
{
{ Bad_Opcode },
/* REG_VEX_0F38F3 */
{
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_1) },
- { PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_2) },
- { PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_3) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_1) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_2) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_3) },
},
/* REG_0FXOP_09_01_L_0 */
{
{ NULL, { { NULL, 0 } }, PREFIX_IGNORED }
},
+ /* PREFIX_0F01_REG_1_RM_4 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { "tdcall", { Skip_MODRM }, 0 },
+ { Bad_Opcode },
+ },
+
+ /* PREFIX_0F01_REG_1_RM_5 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_1_RM_5_PREFIX_2) },
+ { Bad_Opcode },
+ },
+
+ /* PREFIX_0F01_REG_1_RM_6 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_1_RM_6_PREFIX_2) },
+ { Bad_Opcode },
+ },
+
+ /* PREFIX_0F01_REG_1_RM_7 */
+ {
+ { "encls", { Skip_MODRM }, 0 },
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_1_RM_7_PREFIX_2) },
+ { Bad_Opcode },
+ },
+
/* PREFIX_0F01_REG_3_RM_1 */
{
{ "vmmcall", { Skip_MODRM }, 0 },
{ "saveprevssp", { Skip_MODRM }, PREFIX_OPCODE },
},
+ /* PREFIX_0F01_REG_5_MOD_3_RM_4 */
+ {
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_5_MOD_3_RM_4_PREFIX_1) },
+ },
+
+ /* PREFIX_0F01_REG_5_MOD_3_RM_5 */
+ {
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1) },
+ },
+
+ /* PREFIX_0F01_REG_5_MOD_3_RM_6 */
+ {
+ { "rdpkru", { Skip_MODRM }, 0 },
+ { X86_64_TABLE (X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1) },
+ },
+
+ /* PREFIX_0F01_REG_5_MOD_3_RM_7 */
+ {
+ { "wrpkru", { Skip_MODRM }, 0 },
+ { X86_64_TABLE (X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1) },
+ },
+
/* PREFIX_0F01_REG_7_MOD_3_RM_2 */
{
{ "monitorx", { { OP_Monitor, 0 } }, 0 },
{ "mcommit", { Skip_MODRM }, 0 },
},
- /* PREFIX_0F01_REG_7_MOD_3_RM_3 */
+ /* PREFIX_0F01_REG_7_MOD_3_RM_6 */
{
- { "mwaitx", { { OP_Mwait, eBX_reg } }, 0 },
+ { "invlpgb", { Skip_MODRM }, 0 },
+ { X86_64_TABLE (X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1) },
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_3) },
+ },
+
+ /* PREFIX_0F01_REG_7_MOD_3_RM_7 */
+ {
+ { "tlbsync", { Skip_MODRM }, 0 },
+ { X86_64_TABLE (X86_64_0F01_REG_7_MOD_3_RM_7_PREFIX_1) },
+ { Bad_Opcode },
+ { "pvalidate", { Skip_MODRM }, 0 },
},
/* PREFIX_0F09 */
{ "ptwrite{%LQ|}", { Edq }, 0 },
},
- /* PREFIX_0FAE_REG_5_MOD_0 */
- {
- { "xrstor", { FXSAVE }, PREFIX_OPCODE },
- },
-
/* PREFIX_0FAE_REG_5_MOD_3 */
{
{ "lfence", { Skip_MODRM }, 0 },
- { "incsspK", { Rdq }, PREFIX_OPCODE },
+ { "incsspK", { Edq }, PREFIX_OPCODE },
},
/* PREFIX_0FAE_REG_6_MOD_0 */
{ "cmpsd", { XM, EXq, CMP }, PREFIX_OPCODE },
},
- /* PREFIX_0FC3_MOD_0 */
- {
- { "movntiS", { Edq, Gdq }, PREFIX_OPCODE },
- },
-
/* PREFIX_0FC7_REG_6_MOD_0 */
{
{ "vmptrld",{ Mq }, 0 },
/* PREFIX_0FC7_REG_6_MOD_3 */
{
{ "rdrand", { Ev }, 0 },
- { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0FC7_REG_6_MOD_3_PREFIX_1) },
{ "rdrand", { Ev }, 0 }
},
{ "maskmovdqu", { XM, XS }, PREFIX_OPCODE },
},
- /* PREFIX_0F38C8 */
- {
- { "sha1nexte", { XM, EXxmm }, PREFIX_OPCODE },
- },
-
- /* PREFIX_0F38C9 */
+ /* PREFIX_0F38D8 */
{
- { "sha1msg1", { XM, EXxmm }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { REG_TABLE (REG_0F38D8_PREFIX_1) },
},
- /* PREFIX_0F38CA */
+ /* PREFIX_0F38DC */
{
- { "sha1msg2", { XM, EXxmm }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38DC_PREFIX_1) },
+ { "aesenc", { XM, EXx }, 0 },
},
- /* PREFIX_0F38CB */
+ /* PREFIX_0F38DD */
{
- { "sha256rnds2", { XM, EXxmm, XMM0 }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38DD_PREFIX_1) },
+ { "aesenclast", { XM, EXx }, 0 },
},
- /* PREFIX_0F38CC */
+ /* PREFIX_0F38DE */
{
- { "sha256msg1", { XM, EXxmm }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38DE_PREFIX_1) },
+ { "aesdec", { XM, EXx }, 0 },
},
- /* PREFIX_0F38CD */
+ /* PREFIX_0F38DF */
{
- { "sha256msg2", { XM, EXxmm }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38DF_PREFIX_1) },
+ { "aesdeclast", { XM, EXx }, 0 },
},
/* PREFIX_0F38F0 */
{ MOD_TABLE (MOD_0F38F8_PREFIX_2) },
{ MOD_TABLE (MOD_0F38F8_PREFIX_3) },
},
+ /* PREFIX_0F38FA */
+ {
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38FA_PREFIX_1) },
+ },
- /* PREFIX_0F38F9 */
+ /* PREFIX_0F38FB */
{
- { MOD_TABLE (MOD_0F38F9_PREFIX_0) },
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38FB_PREFIX_1) },
},
- /* PREFIX_0F3ACC */
+ /* PREFIX_0F3A0F */
{
- { "sha1rnds4", { XM, EXxmm, Ib }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_0F3A0F_PREFIX_1)},
},
/* PREFIX_VEX_0F10 */
{ "vpshuflw", { XM, EXx, Ib }, 0 },
},
- /* PREFIX_VEX_0F77 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F77_P_0) },
- },
-
/* PREFIX_VEX_0F7C */
{
{ Bad_Opcode },
{ VEX_W_TABLE (VEX_W_0F385E_X86_64_P_3) },
},
- /* PREFIX_VEX_0F38F2 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F2_P_0) },
- },
-
- /* PREFIX_VEX_0F38F3_REG_1 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_1_P_0) },
- },
-
- /* PREFIX_VEX_0F38F3_REG_2 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_2_P_0) },
- },
-
- /* PREFIX_VEX_0F38F3_REG_3 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_3_P_0) },
- },
-
/* PREFIX_VEX_0F38F5 */
{
{ VEX_LEN_TABLE (VEX_LEN_0F38F5_P_0) },
/* X86_64_9A */
{
- { "{l|}call{T|}", { Ap }, 0 },
+ { "{l|}call{P|}", { Ap }, 0 },
},
/* X86_64_C2 */
/* X86_64_EA */
{
- { "{l|}jmp{T|}", { Ap }, 0 },
+ { "{l|}jmp{P|}", { Ap }, 0 },
},
/* X86_64_0F01_REG_0 */
{ "sidt", { M }, 0 },
},
+ /* X86_64_0F01_REG_1_RM_5_PREFIX_2 */
+ {
+ { Bad_Opcode },
+ { "seamret", { Skip_MODRM }, 0 },
+ },
+
+ /* X86_64_0F01_REG_1_RM_6_PREFIX_2 */
+ {
+ { Bad_Opcode },
+ { "seamops", { Skip_MODRM }, 0 },
+ },
+
+ /* X86_64_0F01_REG_1_RM_7_PREFIX_2 */
+ {
+ { Bad_Opcode },
+ { "seamcall", { Skip_MODRM }, 0 },
+ },
+
/* X86_64_0F01_REG_2 */
{
{ "lgdt{Q|Q}", { M }, 0 },
{ "lidt", { M }, 0 },
},
+ {
+ /* X86_64_0F24 */
+ { "movZ", { Em, Td }, 0 },
+ },
+
+ {
+ /* X86_64_0F26 */
+ { "movZ", { Td, Em }, 0 },
+ },
+
/* X86_64_VEX_0F3849 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_VEX_0F385E_X86_64) },
},
+
+ /* X86_64_0F01_REG_5_MOD_3_RM_4_PREFIX_1 */
+ {
+ { Bad_Opcode },
+ { "uiret", { Skip_MODRM }, 0 },
+ },
+
+ /* X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1 */
+ {
+ { Bad_Opcode },
+ { "testui", { Skip_MODRM }, 0 },
+ },
+
+ /* X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1 */
+ {
+ { Bad_Opcode },
+ { "clui", { Skip_MODRM }, 0 },
+ },
+
+ /* X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1 */
+ {
+ { Bad_Opcode },
+ { "stui", { Skip_MODRM }, 0 },
+ },
+
+ /* X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1 */
+ {
+ { Bad_Opcode },
+ { "rmpadjust", { Skip_MODRM }, 0 },
+ },
+
+ /* X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_3 */
+ {
+ { Bad_Opcode },
+ { "rmpupdate", { Skip_MODRM }, 0 },
+ },
+
+ /* X86_64_0F01_REG_7_MOD_3_RM_7_PREFIX_1 */
+ {
+ { Bad_Opcode },
+ { "psmash", { Skip_MODRM }, 0 },
+ },
+
+ /* X86_64_0FC7_REG_6_MOD_3_PREFIX_1 */
+ {
+ { Bad_Opcode },
+ { "senduipi", { Eq }, 0 },
+ },
};
static const struct dis386 three_byte_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
/* c8 */
- { PREFIX_TABLE (PREFIX_0F38C8) },
- { PREFIX_TABLE (PREFIX_0F38C9) },
- { PREFIX_TABLE (PREFIX_0F38CA) },
- { PREFIX_TABLE (PREFIX_0F38CB) },
- { PREFIX_TABLE (PREFIX_0F38CC) },
- { PREFIX_TABLE (PREFIX_0F38CD) },
+ { "sha1nexte", { XM, EXxmm }, PREFIX_OPCODE },
+ { "sha1msg1", { XM, EXxmm }, PREFIX_OPCODE },
+ { "sha1msg2", { XM, EXxmm }, PREFIX_OPCODE },
+ { "sha256rnds2", { XM, EXxmm, XMM0 }, PREFIX_OPCODE },
+ { "sha256msg1", { XM, EXxmm }, PREFIX_OPCODE },
+ { "sha256msg2", { XM, EXxmm }, PREFIX_OPCODE },
{ Bad_Opcode },
{ "gf2p8mulb", { XM, EXxmm }, PREFIX_DATA },
/* d0 */
{ Bad_Opcode },
{ Bad_Opcode },
/* d8 */
- { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_0F38D8) },
{ Bad_Opcode },
{ Bad_Opcode },
{ "aesimc", { XM, EXx }, PREFIX_DATA },
- { "aesenc", { XM, EXx }, PREFIX_DATA },
- { "aesenclast", { XM, EXx }, PREFIX_DATA },
- { "aesdec", { XM, EXx }, PREFIX_DATA },
- { "aesdeclast", { XM, EXx }, PREFIX_DATA },
+ { PREFIX_TABLE (PREFIX_0F38DC) },
+ { PREFIX_TABLE (PREFIX_0F38DD) },
+ { PREFIX_TABLE (PREFIX_0F38DE) },
+ { PREFIX_TABLE (PREFIX_0F38DF) },
/* e0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* f8 */
{ PREFIX_TABLE (PREFIX_0F38F8) },
- { PREFIX_TABLE (PREFIX_0F38F9) },
- { Bad_Opcode },
- { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38F9) },
+ { PREFIX_TABLE (PREFIX_0F38FA) },
+ { PREFIX_TABLE (PREFIX_0F38FB) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F3ACC) },
+ { "sha1rnds4", { XM, EXxmm, Ib }, PREFIX_OPCODE },
{ Bad_Opcode },
{ "gf2p8affineqb", { XM, EXxmm, Ib }, PREFIX_DATA },
{ "gf2p8affineinvqb", { XM, EXxmm, Ib }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
/* f0 */
- { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_0F3A0F) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ "vpcmpeqb", { XM, Vex, EXx }, PREFIX_DATA },
{ "vpcmpeqw", { XM, Vex, EXx }, PREFIX_DATA },
{ "vpcmpeqd", { XM, Vex, EXx }, PREFIX_DATA },
- { PREFIX_TABLE (PREFIX_VEX_0F77) },
+ { VEX_LEN_TABLE (VEX_LEN_0F77) },
/* 78 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 50 */
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
+ { VEX_W_TABLE (VEX_W_0F3850) },
+ { VEX_W_TABLE (VEX_W_0F3851) },
+ { VEX_W_TABLE (VEX_W_0F3852) },
+ { VEX_W_TABLE (VEX_W_0F3853) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* f0 */
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38F2) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38F2) },
{ REG_TABLE (REG_VEX_0F38F3) },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_VEX_0F38F5) },
{ "vmovK", { XMScalar, Edq }, PREFIX_DATA },
},
- /* VEX_LEN_0F77_P_1 */
+ /* VEX_LEN_0F77 */
{
{ "vzeroupper", { XX }, 0 },
{ "vzeroall", { XX }, 0 },
{ "vaesimc", { XM, EXx }, PREFIX_DATA },
},
- /* VEX_LEN_0F38F2_P_0 */
+ /* VEX_LEN_0F38F2 */
{
- { "andnS", { Gdq, VexGdq, Edq }, 0 },
+ { "andnS", { Gdq, VexGdq, Edq }, PREFIX_OPCODE },
},
- /* VEX_LEN_0F38F3_R_1_P_0 */
+ /* VEX_LEN_0F38F3_R_1 */
{
- { "blsrS", { VexGdq, Edq }, 0 },
+ { "blsrS", { VexGdq, Edq }, PREFIX_OPCODE },
},
- /* VEX_LEN_0F38F3_R_2_P_0 */
+ /* VEX_LEN_0F38F3_R_2 */
{
- { "blsmskS", { VexGdq, Edq }, 0 },
+ { "blsmskS", { VexGdq, Edq }, PREFIX_OPCODE },
},
- /* VEX_LEN_0F38F3_R_3_P_0 */
+ /* VEX_LEN_0F38F3_R_3 */
{
- { "blsiS", { VexGdq, Edq }, 0 },
+ { "blsiS", { VexGdq, Edq }, PREFIX_OPCODE },
},
/* VEX_LEN_0F38F5_P_0 */
/* VEX_W_0F384B_X86_64_P_3 */
{ MOD_TABLE (MOD_VEX_0F384B_X86_64_P_3_W_0) },
},
+ {
+ /* VEX_W_0F3850 */
+ { "%XV vpdpbusd", { XM, Vex, EXx }, 0 },
+ },
+ {
+ /* VEX_W_0F3851 */
+ { "%XV vpdpbusds", { XM, Vex, EXx }, 0 },
+ },
+ {
+ /* VEX_W_0F3852 */
+ { "%XV vpdpwssd", { XM, Vex, EXx }, 0 },
+ },
+ {
+ /* VEX_W_0F3853 */
+ { "%XV vpdpwssds", { XM, Vex, EXx }, 0 },
+ },
{
/* VEX_W_0F3858 */
{ "vpbroadcastd", { XM, EXxmm_md }, PREFIX_DATA },
{ "nopQ", { Ev }, 0 },
{ REG_TABLE (REG_0F1E_P_1_MOD_3) },
},
- {
- /* MOD_0F24 */
- { Bad_Opcode },
- { "movL", { Rd, Td }, 0 },
- },
- {
- /* MOD_0F26 */
- { Bad_Opcode },
- { "movL", { Td, Rd }, 0 },
- },
{
/* MOD_0F2B_PREFIX_0 */
{"movntps", { Mx, XM }, PREFIX_OPCODE },
},
{
/* MOD_0FAE_REG_5 */
- { PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_0) },
+ { "xrstor", { FXSAVE }, PREFIX_OPCODE },
{ PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_3) },
},
{
},
{
/* MOD_0FC3 */
- { PREFIX_TABLE (PREFIX_0FC3_MOD_0) },
+ { "movntiS", { Edq, Gdq }, PREFIX_OPCODE },
},
{
/* MOD_0FC7_REG_3 */
{ "movntdqa", { XM, Mx }, PREFIX_DATA },
},
{
- /* MOD_VEX_0F3849_X86_64_P_0_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0) },
- { REG_TABLE (REG_VEX_0F3849_X86_64_P_0_W_0_M_1) },
- },
- {
- /* MOD_VEX_0F3849_X86_64_P_2_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F3849_X86_64_P_3_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F384B_X86_64_P_1_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F384B_X86_64_P_2_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F384B_X86_64_P_3_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F385C_X86_64_P_1_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F385E_X86_64_P_0_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0) },
+ /* MOD_0F38DC_PREFIX_1 */
+ { "aesenc128kl", { XM, M }, 0 },
+ { "loadiwkey", { XM, EXx }, 0 },
},
{
- /* MOD_VEX_0F385E_X86_64_P_1_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0) },
+ /* MOD_0F38DD_PREFIX_1 */
+ { "aesdec128kl", { XM, M }, 0 },
},
{
- /* MOD_VEX_0F385E_X86_64_P_2_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0) },
+ /* MOD_0F38DE_PREFIX_1 */
+ { "aesenc256kl", { XM, M }, 0 },
},
{
- /* MOD_VEX_0F385E_X86_64_P_3_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0) },
+ /* MOD_0F38DF_PREFIX_1 */
+ { "aesdec256kl", { XM, M }, 0 },
},
{
/* MOD_0F38F5 */
{ "enqcmd", { Gva, M }, PREFIX_OPCODE },
},
{
- /* MOD_0F38F9_PREFIX_0 */
- { "movdiri", { Ev, Gv }, PREFIX_OPCODE },
+ /* MOD_0F38F9 */
+ { "movdiri", { Edq, Gdq }, PREFIX_OPCODE },
+ },
+ {
+ /* MOD_0F38FA_PREFIX_1 */
+ { Bad_Opcode },
+ { "encodekey128", { Gd, Ed }, 0 },
+ },
+ {
+ /* MOD_0F38FB_PREFIX_1 */
+ { Bad_Opcode },
+ { "encodekey256", { Gd, Ed }, 0 },
+ },
+ {
+ /* MOD_0F3A0F_PREFIX_1 */
+ { Bad_Opcode },
+ { REG_TABLE (REG_0F3A0F_PREFIX_1_MOD_3) },
},
{
/* MOD_62_32BIT */
{
/* MOD_VEX_W_0_0F41_P_0_LEN_1 */
{ Bad_Opcode },
- { "kandw", { MaskG, MaskVex, MaskR }, 0 },
+ { "kandw", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F41_P_0_LEN_1 */
{ Bad_Opcode },
- { "kandq", { MaskG, MaskVex, MaskR }, 0 },
+ { "kandq", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F41_P_2_LEN_1 */
{ Bad_Opcode },
- { "kandb", { MaskG, MaskVex, MaskR }, 0 },
+ { "kandb", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F41_P_2_LEN_1 */
{ Bad_Opcode },
- { "kandd", { MaskG, MaskVex, MaskR }, 0 },
+ { "kandd", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F42_P_0_LEN_1 */
{ Bad_Opcode },
- { "kandnw", { MaskG, MaskVex, MaskR }, 0 },
+ { "kandnw", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F42_P_0_LEN_1 */
{ Bad_Opcode },
- { "kandnq", { MaskG, MaskVex, MaskR }, 0 },
+ { "kandnq", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F42_P_2_LEN_1 */
{ Bad_Opcode },
- { "kandnb", { MaskG, MaskVex, MaskR }, 0 },
+ { "kandnb", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F42_P_2_LEN_1 */
{ Bad_Opcode },
- { "kandnd", { MaskG, MaskVex, MaskR }, 0 },
+ { "kandnd", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F44_P_0_LEN_0 */
{ Bad_Opcode },
- { "knotw", { MaskG, MaskR }, 0 },
+ { "knotw", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F44_P_0_LEN_0 */
{ Bad_Opcode },
- { "knotq", { MaskG, MaskR }, 0 },
+ { "knotq", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F44_P_2_LEN_0 */
{ Bad_Opcode },
- { "knotb", { MaskG, MaskR }, 0 },
+ { "knotb", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F44_P_2_LEN_0 */
{ Bad_Opcode },
- { "knotd", { MaskG, MaskR }, 0 },
+ { "knotd", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F45_P_0_LEN_1 */
{ Bad_Opcode },
- { "korw", { MaskG, MaskVex, MaskR }, 0 },
+ { "korw", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F45_P_0_LEN_1 */
{ Bad_Opcode },
- { "korq", { MaskG, MaskVex, MaskR }, 0 },
+ { "korq", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F45_P_2_LEN_1 */
{ Bad_Opcode },
- { "korb", { MaskG, MaskVex, MaskR }, 0 },
+ { "korb", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F45_P_2_LEN_1 */
{ Bad_Opcode },
- { "kord", { MaskG, MaskVex, MaskR }, 0 },
+ { "kord", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F46_P_0_LEN_1 */
{ Bad_Opcode },
- { "kxnorw", { MaskG, MaskVex, MaskR }, 0 },
+ { "kxnorw", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F46_P_0_LEN_1 */
{ Bad_Opcode },
- { "kxnorq", { MaskG, MaskVex, MaskR }, 0 },
+ { "kxnorq", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F46_P_2_LEN_1 */
{ Bad_Opcode },
- { "kxnorb", { MaskG, MaskVex, MaskR }, 0 },
+ { "kxnorb", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F46_P_2_LEN_1 */
{ Bad_Opcode },
- { "kxnord", { MaskG, MaskVex, MaskR }, 0 },
+ { "kxnord", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F47_P_0_LEN_1 */
{ Bad_Opcode },
- { "kxorw", { MaskG, MaskVex, MaskR }, 0 },
+ { "kxorw", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F47_P_0_LEN_1 */
{ Bad_Opcode },
- { "kxorq", { MaskG, MaskVex, MaskR }, 0 },
+ { "kxorq", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F47_P_2_LEN_1 */
{ Bad_Opcode },
- { "kxorb", { MaskG, MaskVex, MaskR }, 0 },
+ { "kxorb", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F47_P_2_LEN_1 */
{ Bad_Opcode },
- { "kxord", { MaskG, MaskVex, MaskR }, 0 },
+ { "kxord", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F4A_P_0_LEN_1 */
{ Bad_Opcode },
- { "kaddw", { MaskG, MaskVex, MaskR }, 0 },
+ { "kaddw", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F4A_P_0_LEN_1 */
{ Bad_Opcode },
- { "kaddq", { MaskG, MaskVex, MaskR }, 0 },
+ { "kaddq", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F4A_P_2_LEN_1 */
{ Bad_Opcode },
- { "kaddb", { MaskG, MaskVex, MaskR }, 0 },
+ { "kaddb", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F4A_P_2_LEN_1 */
{ Bad_Opcode },
- { "kaddd", { MaskG, MaskVex, MaskR }, 0 },
+ { "kaddd", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F4B_P_0_LEN_1 */
{ Bad_Opcode },
- { "kunpckwd", { MaskG, MaskVex, MaskR }, 0 },
+ { "kunpckwd", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F4B_P_0_LEN_1 */
{ Bad_Opcode },
- { "kunpckdq", { MaskG, MaskVex, MaskR }, 0 },
+ { "kunpckdq", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F4B_P_2_LEN_1 */
{ Bad_Opcode },
- { "kunpckbw", { MaskG, MaskVex, MaskR }, 0 },
+ { "kunpckbw", { MaskG, MaskVex, MaskE }, 0 },
},
{
/* MOD_VEX_0F50 */
{
/* MOD_VEX_W_0_0F92_P_0_LEN_0 */
{ Bad_Opcode },
- { "kmovw", { MaskG, Rdq }, 0 },
+ { "kmovw", { MaskG, Edq }, 0 },
},
{
/* MOD_VEX_W_0_0F92_P_2_LEN_0 */
{ Bad_Opcode },
- { "kmovb", { MaskG, Rdq }, 0 },
+ { "kmovb", { MaskG, Edq }, 0 },
},
{
/* MOD_VEX_0F92_P_3_LEN_0 */
{ Bad_Opcode },
- { "kmovK", { MaskG, Rdq }, 0 },
+ { "kmovK", { MaskG, Edq }, 0 },
},
{
/* MOD_VEX_W_0_0F93_P_0_LEN_0 */
{ Bad_Opcode },
- { "kmovw", { Gdq, MaskR }, 0 },
+ { "kmovw", { Gdq, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F93_P_2_LEN_0 */
{ Bad_Opcode },
- { "kmovb", { Gdq, MaskR }, 0 },
+ { "kmovb", { Gdq, MaskE }, 0 },
},
{
/* MOD_VEX_0F93_P_3_LEN_0 */
{ Bad_Opcode },
- { "kmovK", { Gdq, MaskR }, 0 },
+ { "kmovK", { Gdq, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F98_P_0_LEN_0 */
{ Bad_Opcode },
- { "kortestw", { MaskG, MaskR }, 0 },
+ { "kortestw", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F98_P_0_LEN_0 */
{ Bad_Opcode },
- { "kortestq", { MaskG, MaskR }, 0 },
+ { "kortestq", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F98_P_2_LEN_0 */
{ Bad_Opcode },
- { "kortestb", { MaskG, MaskR }, 0 },
+ { "kortestb", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F98_P_2_LEN_0 */
{ Bad_Opcode },
- { "kortestd", { MaskG, MaskR }, 0 },
+ { "kortestd", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F99_P_0_LEN_0 */
{ Bad_Opcode },
- { "ktestw", { MaskG, MaskR }, 0 },
+ { "ktestw", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F99_P_0_LEN_0 */
{ Bad_Opcode },
- { "ktestq", { MaskG, MaskR }, 0 },
+ { "ktestq", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_0_0F99_P_2_LEN_0 */
{ Bad_Opcode },
- { "ktestb", { MaskG, MaskR }, 0 },
+ { "ktestb", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_W_1_0F99_P_2_LEN_0 */
{ Bad_Opcode },
- { "ktestd", { MaskG, MaskR }, 0 },
+ { "ktestd", { MaskG, MaskE }, 0 },
},
{
/* MOD_VEX_0FAE_REG_2 */
{ VEX_W_TABLE (VEX_W_0F382F_M_0) },
},
{
- /* MOD_VEX_0F385A */
- { VEX_LEN_TABLE (VEX_LEN_0F385A_M_0) },
+ /* MOD_VEX_0F3849_X86_64_P_0_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0) },
+ { REG_TABLE (REG_VEX_0F3849_X86_64_P_0_W_0_M_1) },
},
{
- /* MOD_VEX_0F388C */
- { "vpmaskmov%DQ", { XM, Vex, Mx }, PREFIX_DATA },
+ /* MOD_VEX_0F3849_X86_64_P_2_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0) },
},
{
- /* MOD_VEX_0F388E */
+ /* MOD_VEX_0F3849_X86_64_P_3_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F384B_X86_64_P_1_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F384B_X86_64_P_2_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F384B_X86_64_P_3_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385A */
+ { VEX_LEN_TABLE (VEX_LEN_0F385A_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385C_X86_64_P_1_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385E_X86_64_P_0_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385E_X86_64_P_1_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385E_X86_64_P_2_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F385E_X86_64_P_3_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0) },
+ },
+ {
+ /* MOD_VEX_0F388C */
+ { "vpmaskmov%DQ", { XM, Vex, Mx }, PREFIX_DATA },
+ },
+ {
+ /* MOD_VEX_0F388E */
{ "vpmaskmov%DQ", { Mx, Vex, XM }, PREFIX_DATA },
},
{
/* MOD_VEX_0F3A30_L_0 */
{ Bad_Opcode },
- { "kshiftr%BW", { MaskG, MaskR, Ib }, PREFIX_DATA },
+ { "kshiftr%BW", { MaskG, MaskE, Ib }, PREFIX_DATA },
},
{
/* MOD_VEX_0F3A31_L_0 */
{ Bad_Opcode },
- { "kshiftr%DQ", { MaskG, MaskR, Ib }, PREFIX_DATA },
+ { "kshiftr%DQ", { MaskG, MaskE, Ib }, PREFIX_DATA },
},
{
/* MOD_VEX_0F3A32_L_0 */
{ Bad_Opcode },
- { "kshiftl%BW", { MaskG, MaskR, Ib }, PREFIX_DATA },
+ { "kshiftl%BW", { MaskG, MaskE, Ib }, PREFIX_DATA },
},
{
/* MOD_VEX_0F3A33_L_0 */
{ Bad_Opcode },
- { "kshiftl%DQ", { MaskG, MaskR, Ib }, PREFIX_DATA },
+ { "kshiftl%DQ", { MaskG, MaskE, Ib }, PREFIX_DATA },
},
{
/* MOD_VEX_0FXOP_09_12 */
{ "mwait", { { OP_Mwait, 0 } }, 0 },
{ "clac", { Skip_MODRM }, 0 },
{ "stac", { Skip_MODRM }, 0 },
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { "encls", { Skip_MODRM }, 0 },
+ { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_4) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_5) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_6) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_7) },
},
{
/* RM_0F01_REG_2 */
{ PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_1) },
{ PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_2) },
{ Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { "rdpkru", { Skip_MODRM }, 0 },
- { "wrpkru", { Skip_MODRM }, 0 },
+ { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_4) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_5) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_6) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_7) },
},
{
/* RM_0F01_REG_7_MOD_3 */
{ "swapgs", { Skip_MODRM }, 0 },
{ "rdtscp", { Skip_MODRM }, 0 },
{ PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_2) },
- { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_3) },
+ { "mwaitx", { { OP_Mwait, eBX_reg } }, PREFIX_OPCODE },
{ "clzero", { Skip_MODRM }, 0 },
{ "rdpru", { Skip_MODRM }, 0 },
+ { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_6) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_7) },
},
{
/* RM_0F1E_P_1_MOD_3_REG_7 */
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
},
+ {
+ /* RM_0F3A0F_P_1_MOD_3_REG_0 */
+ { "hreset", { Skip_MODRM, Ib }, 0 },
+ },
{
/* RM_0FAE_REG_6_MOD_3 */
{ "mfence", { Skip_MODRM }, 0 },
case 0x2e:
prefixes |= PREFIX_CS;
last_seg_prefix = i;
- active_seg_prefix = PREFIX_CS;
+
+ if (address_mode != mode_64bit)
+ active_seg_prefix = PREFIX_CS;
+
break;
case 0x36:
prefixes |= PREFIX_SS;
last_seg_prefix = i;
- active_seg_prefix = PREFIX_SS;
+
+ if (address_mode != mode_64bit)
+ active_seg_prefix = PREFIX_SS;
+
break;
case 0x3e:
prefixes |= PREFIX_DS;
last_seg_prefix = i;
- active_seg_prefix = PREFIX_DS;
+
+ if (address_mode != mode_64bit)
+ active_seg_prefix = PREFIX_DS;
+
break;
case 0x26:
prefixes |= PREFIX_ES;
last_seg_prefix = i;
- active_seg_prefix = PREFIX_ES;
+
+ if (address_mode != mode_64bit)
+ active_seg_prefix = PREFIX_ES;
+
break;
case 0x64:
prefixes |= PREFIX_FS;
FETCH_DATA (info, codep + 1);
threebyte = *codep;
dp = &dis386_twobyte[threebyte];
- need_modrm = twobyte_has_modrm[*codep];
+ need_modrm = twobyte_has_modrm[threebyte];
codep++;
}
else
modrm.reg = (*codep >> 3) & 7;
modrm.rm = *codep & 7;
}
+ else
+ memset (&modrm, 0, sizeof (modrm));
need_vex = 0;
memset (&vex, 0, sizeof (vex));
case 'A':
if (intel_syntax)
break;
- if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
+ if ((need_modrm && modrm.mod != 3)
+ || (sizeflag & SUFFIX_ALWAYS))
*obufp++ = 'b';
break;
case 'B':
used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
*obufp++ = ',';
*obufp++ = 'p';
+
+ /* Set active_seg_prefix even if not set in 64-bit mode
+ because here it is a valid branch hint. */
if (prefixes & PREFIX_DS)
- *obufp++ = 't';
+ {
+ active_seg_prefix = PREFIX_DS;
+ *obufp++ = 't';
+ }
else
- *obufp++ = 'n';
+ {
+ active_seg_prefix = PREFIX_CS;
+ *obufp++ = 'n';
+ }
}
break;
case 'K':
else
*obufp++ = 'd';
break;
- case 'Z':
- if (l != 0)
- {
- if (l != 1 || last[0] != 'X')
- abort ();
- if (!need_vex || !vex.evex)
- abort ();
- if (intel_syntax
- || ((modrm.mod == 3 || vex.b) && !(sizeflag & SUFFIX_ALWAYS)))
- break;
- switch (vex.length)
- {
- case 128:
- *obufp++ = 'x';
- break;
- case 256:
- *obufp++ = 'y';
- break;
- case 512:
- *obufp++ = 'z';
- break;
- default:
- abort ();
- }
- break;
- }
- if (intel_syntax)
- break;
- if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
- {
- *obufp++ = 'q';
- break;
- }
- /* Fall through. */
- goto case_L;
case 'L':
- if (l != 0)
- abort ();
- case_L:
- if (intel_syntax)
- break;
- if (sizeflag & SUFFIX_ALWAYS)
- *obufp++ = 'l';
- break;
+ abort ();
case 'M':
if (intel_mnemonic != cond)
*obufp++ = 'r';
if (!(rex & REX_W))
used_prefixes |= (prefixes & PREFIX_DATA);
break;
- case '&':
- if (!intel_syntax
- && address_mode == mode_64bit
- && isa64 == intel64)
- {
- *obufp++ = 'q';
- break;
- }
- /* Fall through. */
- case 'T':
- if (!intel_syntax
- && address_mode == mode_64bit
- && ((sizeflag & DFLAG) || (rex & REX_W)))
+ case '@':
+ if (address_mode == mode_64bit
+ && (isa64 == intel64 || (rex & REX_W)
+ || !(prefixes & PREFIX_DATA)))
{
- *obufp++ = 'q';
+ if (sizeflag & SUFFIX_ALWAYS)
+ *obufp++ = 'q';
break;
}
/* Fall through. */
- goto case_P;
case 'P':
if (l == 0)
{
- case_P:
- if (intel_syntax)
- {
- if ((rex & REX_W) == 0
- && (prefixes & PREFIX_DATA))
- {
- if ((sizeflag & DFLAG) == 0)
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- break;
- }
- if ((prefixes & PREFIX_DATA)
- || (rex & REX_W)
- || (sizeflag & SUFFIX_ALWAYS))
+ if ((modrm.mod == 3 || !cond)
+ && !(sizeflag & SUFFIX_ALWAYS))
+ break;
+ /* Fall through. */
+ case 'T':
+ if ((!(rex & REX_W) && (prefixes & PREFIX_DATA))
+ || ((sizeflag & SUFFIX_ALWAYS)
+ && address_mode != mode_64bit))
{
- USED_REX (REX_W);
- if (rex & REX_W)
- *obufp++ = 'q';
- else
- {
- if (sizeflag & DFLAG)
- *obufp++ = 'l';
- else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
+ *obufp++ = (sizeflag & DFLAG) ?
+ intel_syntax ? 'd' : 'l' : 'w';
+ used_prefixes |= (prefixes & PREFIX_DATA);
}
+ else if (sizeflag & SUFFIX_ALWAYS)
+ *obufp++ = 'q';
}
else if (l == 1 && last[0] == 'L')
{
else
abort ();
break;
- case 'U':
- if (intel_syntax)
- break;
- if (address_mode == mode_64bit
- && ((sizeflag & DFLAG) || (rex & REX_W)))
- {
- if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
- *obufp++ = 'q';
- break;
- }
- /* Fall through. */
- goto case_Q;
case 'Q':
if (l == 0)
{
- case_Q:
if (intel_syntax && !alt)
break;
USED_REX (REX_W);
- if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
+ if ((need_modrm && modrm.mod != 3)
+ || (sizeflag & SUFFIX_ALWAYS))
{
if (rex & REX_W)
*obufp++ = 'q';
USED_REX (REX_W);
*obufp++ = 'q';
}
- else if((address_mode == mode_64bit && need_modrm && cond)
+ else if((address_mode == mode_64bit && cond)
|| (sizeflag & SUFFIX_ALWAYS))
*obufp++ = intel_syntax? 'd' : 'l';
}
if (!(rex & REX_W))
used_prefixes |= (prefixes & PREFIX_DATA);
break;
- case 'V':
- if (l == 0)
- {
- if (intel_syntax)
- break;
- if (address_mode == mode_64bit
- && ((sizeflag & DFLAG) || (rex & REX_W)))
- {
- if (sizeflag & SUFFIX_ALWAYS)
- *obufp++ = 'q';
- break;
- }
- }
- else if (l == 1 && last[0] == 'L')
- {
- if (rex & REX_W)
- {
- *obufp++ = 'a';
- *obufp++ = 'b';
- *obufp++ = 's';
- }
- }
- else
- abort ();
- /* Fall through. */
- goto case_S;
case 'S':
if (l == 0)
{
else
abort ();
break;
+ case 'V':
+ if (l == 0)
+ abort ();
+ else if (l == 1
+ && (last[0] == 'L' || last[0] == 'X'))
+ {
+ if (last[0] == 'X')
+ {
+ *obufp++ = '{';
+ *obufp++ = 'v';
+ *obufp++ = 'e';
+ *obufp++ = 'x';
+ *obufp++ = '}';
+ }
+ else if (rex & REX_W)
+ {
+ *obufp++ = 'a';
+ *obufp++ = 'b';
+ *obufp++ = 's';
+ }
+ }
+ else
+ abort ();
+ goto case_S;
+ case 'W':
+ if (l == 0)
+ {
+ /* operand size flag for cwtl, cbtw */
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ {
+ if (intel_syntax)
+ *obufp++ = 'd';
+ else
+ *obufp++ = 'l';
+ }
+ else if (sizeflag & DFLAG)
+ *obufp++ = 'w';
+ else
+ *obufp++ = 'b';
+ if (!(rex & REX_W))
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ }
+ else if (l == 1)
+ {
+ if (!need_vex)
+ abort ();
+ if (last[0] == 'X')
+ *obufp++ = vex.w ? 'd': 's';
+ else if (last[0] == 'B')
+ *obufp++ = vex.w ? 'w': 'b';
+ else
+ abort ();
+ }
+ else
+ abort ();
+ break;
case 'X':
if (l != 0)
abort ();
else
abort ();
break;
- case 'W':
+ case 'Z':
if (l == 0)
{
- /* operand size flag for cwtl, cbtw */
- USED_REX (REX_W);
- if (rex & REX_W)
- {
- if (intel_syntax)
- *obufp++ = 'd';
- else
- *obufp++ = 'l';
- }
- else if (sizeflag & DFLAG)
- *obufp++ = 'w';
- else
- *obufp++ = 'b';
- if (!(rex & REX_W))
- used_prefixes |= (prefixes & PREFIX_DATA);
+ /* These insns ignore ModR/M.mod: Force it to 3 for OP_E(). */
+ modrm.mod = 3;
+ if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+ *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
}
- else if (l == 1)
+ else if (l == 1 && last[0] == 'X')
{
- if (!need_vex)
- abort ();
- if (last[0] == 'X')
- *obufp++ = vex.w ? 'd': 's';
- else if (last[0] == 'B')
- *obufp++ = vex.w ? 'w': 'b';
- else
+ if (!need_vex || !vex.evex)
abort ();
+ if (intel_syntax
+ || ((modrm.mod == 3 || vex.b) && !(sizeflag & SUFFIX_ALWAYS)))
+ break;
+ switch (vex.length)
+ {
+ case 128:
+ *obufp++ = 'x';
+ break;
+ case 256:
+ *obufp++ = 'y';
+ break;
+ case 512:
+ *obufp++ = 'z';
+ break;
+ default:
+ abort ();
+ }
}
else
abort ();
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
- case '@':
- if (intel_syntax)
- break;
- if (address_mode == mode_64bit
- && (isa64 == intel64
- || ((sizeflag & DFLAG) || (rex & REX_W))))
- *obufp++ = 'q';
- else if ((prefixes & PREFIX_DATA))
- {
- if (!(sizeflag & DFLAG))
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- break;
}
if (len == l)
USED_REX (REX_W);
if (rex & REX_W)
oappend ("QWORD PTR ");
+ else if (bytemode == dq_mode)
+ oappend ("DWORD PTR ");
else
{
- if ((sizeflag & DFLAG) || bytemode == dq_mode)
+ if (sizeflag & DFLAG)
oappend ("DWORD PTR ");
else
oappend ("WORD PTR ");
USED_REX (REX_W);
if (rex & REX_W)
names = names64;
+ else if (bytemode != v_mode && bytemode != v_swap_mode)
+ names = names32;
else
{
- if ((sizeflag & DFLAG)
- || (bytemode != v_mode
- && bytemode != v_swap_mode))
+ if (sizeflag & DFLAG)
names = names32;
else
names = names16;
{
if (address_mode == mode_64bit)
{
- /* Display eiz instead of addr32. */
- needindex = addr32flag;
+ if (addr32flag)
+ {
+ /* Without base nor index registers, zero-extend the
+ lower 32-bit displacement to 64 bits. */
+ disp = (unsigned int) disp;
+ needindex = 1;
+ }
needaddr32 = 1;
}
else
{
*obufp++ = '-';
*obufp = '\0';
- disp = - (bfd_signed_vma) disp;
+ disp = -disp;
}
if (havedisp)
{
*obufp++ = '-';
*obufp = '\0';
- disp = - (bfd_signed_vma) disp;
+ disp = -disp;
}
print_displacement (scratchbuf, disp);
USED_REX (REX_W);
if (rex & REX_W)
oappend (names64[modrm.reg + add]);
+ else if (bytemode != v_mode && bytemode != movsxd_mode)
+ oappend (names32[modrm.reg + add]);
else
{
- if ((sizeflag & DFLAG)
- || (bytemode != v_mode && bytemode != movsxd_mode))
+ if (sizeflag & DFLAG)
oappend (names32[modrm.reg + add]);
else
oappend (names16[modrm.reg + add]);
static bfd_signed_vma
get32 (void)
{
- bfd_signed_vma x = 0;
+ bfd_vma x = 0;
FETCH_DATA (the_info, codep + 4);
- x = *codep++ & (bfd_signed_vma) 0xff;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
+ x = *codep++ & (bfd_vma) 0xff;
+ x |= (*codep++ & (bfd_vma) 0xff) << 8;
+ x |= (*codep++ & (bfd_vma) 0xff) << 16;
+ x |= (*codep++ & (bfd_vma) 0xff) << 24;
return x;
}
static bfd_signed_vma
get32s (void)
{
- bfd_signed_vma x = 0;
+ bfd_vma x = 0;
FETCH_DATA (the_info, codep + 4);
- x = *codep++ & (bfd_signed_vma) 0xff;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
+ x = *codep++ & (bfd_vma) 0xff;
+ x |= (*codep++ & (bfd_vma) 0xff) << 8;
+ x |= (*codep++ & (bfd_vma) 0xff) << 16;
+ x |= (*codep++ & (bfd_vma) 0xff) << 24;
- x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
+ x = (x ^ ((bfd_vma) 1 << 31)) - ((bfd_vma) 1 << 31);
return x;
}
disp -= 0x100;
break;
case v_mode:
- if (isa64 != intel64)
case dqw_mode:
- USED_REX (REX_W);
if ((sizeflag & DFLAG)
|| (address_mode == mode_64bit
&& ((isa64 == intel64 && bytemode != dqw_mode)
else
add = 0;
if (intel_syntax)
- sprintf (scratchbuf, "db%d", modrm.reg + add);
+ sprintf (scratchbuf, "dr%d", modrm.reg + add);
else
sprintf (scratchbuf, "%%db%d", modrm.reg + add);
oappend (scratchbuf);
oappend_maybe_intel (scratchbuf);
}
-static void
-OP_R (int bytemode, int sizeflag)
-{
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
- OP_E_register (bytemode, sizeflag);
-}
-
static void
OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
NOTRACK_Fixup (int bytemode ATTRIBUTE_UNUSED,
int sizeflag ATTRIBUTE_UNUSED)
{
- if (active_seg_prefix == PREFIX_DS
+
+ /* Since active_seg_prefix is not set in 64-bit mode, check whether
+ we've seen a PREFIX_DS. */
+ if ((prefixes & PREFIX_DS) != 0
&& (address_mode != mode_64bit || last_data_prefix < 0))
{
/* NOTRACK prefix is only valid on indirect branch instructions.
projects / thirdparty / binutils-gdb.git / blobdiff